From fdbb165dc7bf9e0fe48a2d4d3f386d551c1de91a Mon Sep 17 00:00:00 2001
From: zouhaitao <zhongxuanzhen@xtell.cn>
Date: Wed, 8 Jul 2026 15:20:26 +0800
Subject: [PATCH] feat: prepend dummy byte 0x00 to SPI stream to absorb
 hardware startup glitch and keep first bit clean

---
 App/main.c | 70 ++++++++++++++++--------------------------------------
 1 file changed, 21 insertions(+), 49 deletions(-)

diff --git a/App/main.c b/App/main.c
index c3773b5..5bea2fc 100644
--- a/App/main.c
+++ b/App/main.c
@@ -144,22 +144,17 @@ void WS2812_EncodeByte(u8 v, u8 *buf)
 
 void WS2812_Write24Bit(u8 g, u8 r, u8 b)
 {
-    u8 data buf[9];
-    u8 b0, b1, b2, b3, b4, b5, b6, b7, b8;
+    u8 data buf[10];
+    u8 b0, b1, b2, b3, b4, b5, b6, b7, b8, b9;
     
-    WS2812_EncodeByte(g, &buf[0]);
-    WS2812_EncodeByte(r, &buf[3]);
-    WS2812_EncodeByte(b, &buf[6]);
+    buf[0] = 0x00; // Prepend dummy 0x00 to absorb SPI hardware startup delay/glitch
+    WS2812_EncodeByte(g, &buf[1]);
+    WS2812_EncodeByte(r, &buf[4]);
+    WS2812_EncodeByte(b, &buf[7]);
     
-    b0 = buf[0];
-    b1 = buf[1];
-    b2 = buf[2];
-    b3 = buf[3];
-    b4 = buf[4];
-    b5 = buf[5];
-    b6 = buf[6];
-    b7 = buf[7];
-    b8 = buf[8];
+    b0 = buf[0]; b1 = buf[1]; b2 = buf[2]; b3 = buf[3];
+    b4 = buf[4]; b5 = buf[5]; b6 = buf[6]; b7 = buf[7];
+    b8 = buf[8]; b9 = buf[9];
     
     EA = 0;
     
@@ -169,42 +164,19 @@ void WS2812_Write24Bit(u8 g, u8 r, u8 b)
     
     SPSTAT = 0xC0; // Clear flags first
     SPCTL = 0xD0;  // Enable SPI at SYSCLK/4 (3.0 MHz actual clock on board)
-    SPDAT = b0;    // Write immediately to avoid start glitch!
+    SPDAT = b0;    // Send 0x00. MOSI remains low during startup delay!
     
-    while (!(SPSTAT & 0x80));
-    SPSTAT = 0xC0;
-    SPDAT = b1;
-    
-    while (!(SPSTAT & 0x80));
-    SPSTAT = 0xC0;
-    SPDAT = b2;
-    
-    while (!(SPSTAT & 0x80));
-    SPSTAT = 0xC0;
-    SPDAT = b3;
-    
-    while (!(SPSTAT & 0x80));
-    SPSTAT = 0xC0;
-    SPDAT = b4;
-    
-    while (!(SPSTAT & 0x80));
-    SPSTAT = 0xC0;
-    SPDAT = b5;
-    
-    while (!(SPSTAT & 0x80));
-    SPSTAT = 0xC0;
-    SPDAT = b6;
-    
-    while (!(SPSTAT & 0x80));
-    SPSTAT = 0xC0;
-    SPDAT = b7;
-    
-    while (!(SPSTAT & 0x80));
-    SPSTAT = 0xC0;
-    SPDAT = b8;
-    
-    while (!(SPSTAT & 0x80));
-    SPSTAT = 0xC0;
+    // Unrolled 10-byte transmission with minimal gap (~300ns)
+    while (!(SPSTAT & 0x80)); SPSTAT = 0xC0; SPDAT = b1;
+    while (!(SPSTAT & 0x80)); SPSTAT = 0xC0; SPDAT = b2;
+    while (!(SPSTAT & 0x80)); SPSTAT = 0xC0; SPDAT = b3;
+    while (!(SPSTAT & 0x80)); SPSTAT = 0xC0; SPDAT = b4;
+    while (!(SPSTAT & 0x80)); SPSTAT = 0xC0; SPDAT = b5;
+    while (!(SPSTAT & 0x80)); SPSTAT = 0xC0; SPDAT = b6;
+    while (!(SPSTAT & 0x80)); SPSTAT = 0xC0; SPDAT = b7;
+    while (!(SPSTAT & 0x80)); SPSTAT = 0xC0; SPDAT = b8;
+    while (!(SPSTAT & 0x80)); SPSTAT = 0xC0; SPDAT = b9;
+    while (!(SPSTAT & 0x80)); SPSTAT = 0xC0;
     
     SPCTL = 0x90; // Disable SPI
     WS2812_DI = 0;