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feat: eliminate SPI start glitch and optimize byte gap by loading buffer variables into data space

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zouhaitao
2026-07-08 14:50:31 +08:00
parent 299ab090f2
commit d4513504d7
1 changed files with 48 additions and 12 deletions
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58
App/main.c
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@@ -144,30 +144,66 @@ void WS2812_EncodeByte(u8 v, u8 *buf)
void WS2812_Write24Bit(u8 g, u8 r, u8 b)
{
u8 xdata buf[9];
u8 data buf[9];
u8 b0, b1, b2, b3, b4, b5, b6, b7, b8;
WS2812_EncodeByte(g, &buf[0]);
WS2812_EncodeByte(r, &buf[3]);
WS2812_EncodeByte(b, &buf[6]);
b0 = buf[0];
b1 = buf[1];
b2 = buf[2];
b3 = buf[3];
b4 = buf[4];
b5 = buf[5];
b6 = buf[6];
b7 = buf[7];
b8 = buf[8];
EA = 0;
// Ensure P2.3 (MOSI) and P2.5 (SCLK) are configured as push-pull output
P2M1 &= ~((1 << 3) | (1 << 5));
P2M0 |= ((1 << 3) | (1 << 5));
SPSTAT = 0xC0; // Clear flags first
SPCTL = 0xD0; // Enable SPI at SYSCLK/4 (3.0 MHz actual clock on board)
SPDAT = b0; // Write immediately to avoid start glitch!
// Unrolled 9-byte transmission with minimal gap (~300ns)
SPSTAT = 0xC0; SPDAT = buf[0]; while (!(SPSTAT & 0x80));
SPSTAT = 0xC0; SPDAT = buf[1]; while (!(SPSTAT & 0x80));
SPSTAT = 0xC0; SPDAT = buf[2]; while (!(SPSTAT & 0x80));
SPSTAT = 0xC0; SPDAT = buf[3]; while (!(SPSTAT & 0x80));
SPSTAT = 0xC0; SPDAT = buf[4]; while (!(SPSTAT & 0x80));
SPSTAT = 0xC0; SPDAT = buf[5]; while (!(SPSTAT & 0x80));
SPSTAT = 0xC0; SPDAT = buf[6]; while (!(SPSTAT & 0x80));
SPSTAT = 0xC0; SPDAT = buf[7]; while (!(SPSTAT & 0x80));
SPSTAT = 0xC0; SPDAT = buf[8]; while (!(SPSTAT & 0x80));
while (!(SPSTAT & 0x80));
SPSTAT = 0xC0;
SPDAT = b1;
while (!(SPSTAT & 0x80));
SPSTAT = 0xC0;
SPDAT = b2;
while (!(SPSTAT & 0x80));
SPSTAT = 0xC0;
SPDAT = b3;
while (!(SPSTAT & 0x80));
SPSTAT = 0xC0;
SPDAT = b4;
while (!(SPSTAT & 0x80));
SPSTAT = 0xC0;
SPDAT = b5;
while (!(SPSTAT & 0x80));
SPSTAT = 0xC0;
SPDAT = b6;
while (!(SPSTAT & 0x80));
SPSTAT = 0xC0;
SPDAT = b7;
while (!(SPSTAT & 0x80));
SPSTAT = 0xC0;
SPDAT = b8;
while (!(SPSTAT & 0x80));
SPSTAT = 0xC0;
SPCTL = 0x90; // Disable SPI