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feat: implement double-buffered 4-bit SPI driver to eliminate byte gaps at 3.0 MHz SCLK

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zouhaitao
2026-07-08 13:33:25 +08:00
parent 486b225bb3
commit 55409027b9
1 changed files with 17 additions and 3 deletions
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20
App/main.c
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@@ -157,14 +157,28 @@ void WS2812_Write24Bit(u8 g, u8 r, u8 b)
SPCTL = 0xD0; // Enable SPI at SYSCLK/4 (3.0 MHz actual clock on board) SPCTL = 0xD0; // Enable SPI at SYSCLK/4 (3.0 MHz actual clock on board)
SPSTAT = 0xC0; // Clear flags SPSTAT = 0xC0; // Clear flags
for (i = 0; i < 12; i++) SPDAT = buf[0]; // Start transmitting buf[0]
// Wait 16 system cycles to ensure buf[0] has moved to shifter
_nop_(); _nop_(); _nop_(); _nop_(); _nop_(); _nop_(); _nop_(); _nop_();
_nop_(); _nop_(); _nop_(); _nop_(); _nop_(); _nop_(); _nop_(); _nop_();
SPDAT = buf[1]; // Buffer buf[1]
for (i = 2; i < 12; i++)
{ {
SPDAT = buf[i];
timeout = 2000; timeout = 2000;
while (!(SPSTAT & 0x80) && --timeout); // Safe wait with timeout while (!(SPSTAT & 0x80) && --timeout); // Wait for buf[i-2] to finish, buf[i-1] moves to shifter
SPSTAT = 0xC0; SPSTAT = 0xC0;
SPDAT = buf[i]; // Buffer buf[i] (zero gap!)
} }
timeout = 2000;
while (!(SPSTAT & 0x80) && --timeout); // Wait for buf[10] to finish, buf[11] moves to shifter
SPSTAT = 0xC0;
timeout = 2000;
while (!(SPSTAT & 0x80) && --timeout); // Wait for buf[11] to finish
SPSTAT = 0xC0;
SPCTL = 0x90; // Disable SPI SPCTL = 0x90; // Disable SPI
WS2812_DI = 0; WS2812_DI = 0;
MOTOR = 0; // Ensure motor is off MOTOR = 0; // Ensure motor is off