1119 lines
30 KiB
C
1119 lines
30 KiB
C
#include "typesdef.h"
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#include "errno.h"
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#include "osal/irq.h"
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#include "devid.h"
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#include "dev/scale/hgscale.h"
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#include "osal/string.h"
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#include "osal/sleep.h"
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uint32_t in_disable_irq(void);
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struct hgscale1_hw
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{
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__IO uint32 SCALECON; //0x00
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__IO uint32 SWINCON; //0x04
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__IO uint32 SSTART;
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__IO uint32 TWINCON; //0x08
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__IO uint32 SWIDTH_STEP; //0x0C
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__IO uint32 SHEIGH_STEP; //0x10
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__IO uint32 INBUF_LINE_NUM; //0x14
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__IO uint32 INYDMA_STADR; //0x18
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__IO uint32 INUDMA_STADR; //0x1C
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__IO uint32 INVDMA_STADR; //0x20
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__IO uint32 INBUFCON; //0x24
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__IO uint32 SHEIGH_CNT; //0x28
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__IO uint32 SCALESTA; //0x2C
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};
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struct hgscale2_hw
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{
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__IO uint32 SCALECON; //0x00
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__IO uint32 SWINCON; //0x04
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__IO uint32 SSTART; //0x08
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__IO uint32 TWINCON; //0x0C
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__IO uint32 SWIDTH_STEP; //0x10
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__IO uint32 SHEIGH_STEP; //0x14
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__IO uint32 YSRAMBUF_STADR; //0x18
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__IO uint32 USRAMBUF_STADR; //0x18
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__IO uint32 VSRAMBUF_STADR; //0x18
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__IO uint32 INYDMA_STADR; //0x1C
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__IO uint32 INUDMA_STADR; //0x20
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__IO uint32 INVDMA_STADR; //0x24
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__IO uint32 OUTYDMA_STADR; //0x1C
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__IO uint32 OUTUDMA_STADR; //0x20
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__IO uint32 OUTVDMA_STADR; //0x24
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__IO uint32 SHEIGH_CNT; //0x28
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__IO uint32 SCALESTA; //0x2C
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};
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struct hgscale3_hw
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{
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__IO uint32 SCALECON; //0x00
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__IO uint32 SWINCON; //0x04
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__IO uint32 SSTART; //0x08
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__IO uint32 TWINCON; //0x0C
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__IO uint32 SWIDTH_STEP; //0x10
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__IO uint32 SHEIGH_STEP; //0x14
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__IO uint32 INBUF_LINE_NUM; //0x18
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__IO uint32 INYDMA_STADR; //0x1C
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__IO uint32 INUDMA_STADR; //0x20
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__IO uint32 INVDMA_STADR; //0x24
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__IO uint32 OUTYDMA_STADR; //0x28
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__IO uint32 OUTUDMA_STADR; //0x2C
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__IO uint32 OUTVDMA_STADR; //0x30
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__IO uint32 INBUFCON; //0x34
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__IO uint32 SHEIGH_CNT; //0x38
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__IO uint32 SCALESTA; //0x3C
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};
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scale_irq_hdl scaleirq1_vector_table[SCALE_IRQ_NUM];
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volatile uint32 scaleirq1_dev_table[SCALE_IRQ_NUM];
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scale_irq_hdl scaleirq2_vector_table[SCALE_IRQ_NUM];
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volatile uint32 scaleirq2_dev_table[SCALE_IRQ_NUM];
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scale_irq_hdl scaleirq3_vector_table[SCALE_IRQ_NUM];
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volatile uint32 scaleirq3_dev_table[SCALE_IRQ_NUM];
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extern volatile uint8 isp_ov_err;
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extern volatile uint8 scaler3_lost;
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static int32 hgscale1_ioctl(struct scale_device *p_scale, enum scale_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2)
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{
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int32 ret_val = RET_OK;
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uint32 s_w,s_h,d_w,d_h;
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uint32 s_x,s_y;
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struct hgscale *scale_hw = (struct hgscale*)p_scale;
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struct hgscale1_hw *hw = (struct hgscale1_hw *)scale_hw->hw;
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if(scale_hw->clk_en == 0){
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scale_hw->clk_en = 1;
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if((SYSCTRL->CLK_CON4 & BIT(29)) == 0){ //lcd clk not open
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SYSCTRL->CLK_CON4 |= BIT(29); //lcdc clk en
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SYSCTRL->CLK_CON4 &= ~BIT(30);
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SYSCTRL->CLK_CON4 |= BIT(30); //lcdc rest
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*(volatile uint32_t*)0x400070d4 |= BIT(1); //scale1 clk enable
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}else{
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*(volatile uint32_t*)0x400070d4 |= BIT(1); //scale1 clk enable
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}
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}
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switch(ioctl_cmd){
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case SCALE_IOCTL_CMD_SET_IN_OUT_SIZE:
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s_w = param1 & 0xffff;
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s_h = (param1>>16) & 0xffff;
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d_w = param2 & 0xffff;
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d_h = (param2>>16) & 0xffff;
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hw->SWINCON = (s_w-1)|((s_h-1)<<16);
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hw->TWINCON = (d_w-1)|((d_h-1)<<16);
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break;
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case SCALE_IOCTL_CMD_GET_INPUT_WIDTH:
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ret_val = (hw->SWINCON & 0xffff)+1;
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break;
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case SCALE_IOCTL_CMD_GET_INPUT_HIGH:
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ret_val = ((hw->SWINCON & 0xffff0000)>>16)+1;
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break;
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case SCALE_IOCTL_CMD_SET_STEP:
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s_w = param1 & 0xffff;
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s_h = (param1>>16) & 0xffff;
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d_w = param2 & 0xffff;
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d_h = (param2>>16) & 0xffff;
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hw->SWIDTH_STEP = 256*s_w/d_w;
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hw->SHEIGH_STEP = 256*s_h/d_h;
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break;
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case SCALE_IOCTL_CMD_SET_START_ADDR:
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s_x = param1 & 0xffff;
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s_y = (param1>>16) & 0xffff;
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hw->SSTART = (s_x) |(s_y<<16);
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break;
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case SCALE_IOCTL_CMD_SET_LINE_BUF_NUM:
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hw->INBUF_LINE_NUM = param1;
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break;
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case SCALE_IOCTL_CMD_SET_IN_Y_ADDR:
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hw->INYDMA_STADR = param1;
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break;
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case SCALE_IOCTL_CMD_SET_IN_U_ADDR:
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hw->INUDMA_STADR = param1;
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break;
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case SCALE_IOCTL_CMD_SET_IN_V_ADDR:
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hw->INVDMA_STADR = param1;
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break;
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case SCALE_IOCTL_CMD_SET_BOTH_MJPG_H264:
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if(param1)
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hw->SCALECON |= BIT(3); //both mjpg and h264
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else
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hw->SCALECON &= ~BIT(3); //
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break;
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case SCALE_IOCTL_CMD_SET_DATA_FROM:
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if(param1)
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hw->SCALECON &=~BIT(2); //vpp
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else
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hw->SCALECON |= BIT(2); //soft
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break;
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case SCALE_IOCTL_CMD_GET_INBUF_NUM:
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ret_val = (hw->INBUFCON>>16)&0x3ff;
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break;
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case SCALE_IOCTL_CMD_SET_INBUF_NUM:
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hw->INBUFCON = ((param1)<<16)|(param2);
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break;
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case SCALE_IOCTL_CMD_SET_NEW_FRAME:
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hw->INBUFCON |= BIT(15);
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break;
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case SCALE_IOCTL_CMD_SET_END_FRAME:
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hw->INBUFCON |= BIT(31);
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break;
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case SCALE_IOCTL_CMD_GET_HEIGH_CNT:
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ret_val = hw->SHEIGH_CNT;
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break;
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case SCALE_IOCTL_CMD_GET_IS_OPEN:
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if(scale_hw->clk_en){ //判断scaler是否启动在运行
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ret_val = 1;
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}else{
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ret_val = 0;
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}
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break;
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default:
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os_printf("NO SCALE1 IOCTL:%d\r\n",ioctl_cmd);
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ret_val = -ENOTSUPP;
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break;
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}
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return ret_val;
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}
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static int32 hgscale2_ioctl(struct scale_device *p_scale, enum scale_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2)
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{
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int32 ret_val = RET_OK;
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uint32 s_w,s_h,d_w,d_h;
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uint32 s_x,s_y;
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uint32 *param_buf;
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struct hgscale *scale_hw = (struct hgscale*)p_scale;
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struct hgscale2_hw *hw = (struct hgscale2_hw *)scale_hw->hw;
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if(scale_hw->clk_en == 0){
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scale_hw->clk_en = 1;
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if((SYSCTRL->CLK_CON4 & BIT(29)) == 0){ //lcd clk not open
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SYSCTRL->CLK_CON4 |= BIT(29); //lcdc clk en
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SYSCTRL->CLK_CON4 &= ~BIT(30);
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SYSCTRL->CLK_CON4 |= BIT(30); //lcdc rest
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*(volatile uint32_t*)0x400070d4 |= BIT(2); //scale2 clk enable
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}else{
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*(volatile uint32_t*)0x400070d4 |= BIT(2); //scale2 clk enable
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}
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}
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switch(ioctl_cmd){
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case SCALE_IOCTL_CMD_SET_IN_OUT_SIZE:
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s_w = param1 & 0xffff;
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s_h = (param1>>16) & 0xffff;
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d_w = param2 & 0xffff;
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d_h = (param2>>16) & 0xffff;
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hw->SWINCON = (s_w-1)|((s_h-1)<<16);
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hw->TWINCON = (d_w-1)|((d_h-1)<<16);
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break;
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case SCALE_IOCTL_CMD_GET_INPUT_WIDTH:
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ret_val = (hw->SWINCON & 0xffff)+1;
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break;
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case SCALE_IOCTL_CMD_GET_INPUT_HIGH:
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ret_val = ((hw->SWINCON & 0xffff0000)>>16)+1;
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break;
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case SCALE_IOCTL_CMD_SET_STEP:
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s_w = param1 & 0xffff;
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s_h = (param1>>16) & 0xffff;
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d_w = param2 & 0xffff;
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d_h = (param2>>16) & 0xffff;
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hw->SWIDTH_STEP = 256*s_w/d_w;
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hw->SHEIGH_STEP = 256*s_h/d_h;
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break;
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case SCALE_IOCTL_CMD_INPUT_STREAM:
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hw->SCALECON &= ~(7<<1);
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hw->SCALECON |= (param1<<1); //0:jpg decoder
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//1:h264 decoder
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//memory frame buf yuv420
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//memory frame buf yuv422
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//memory frame buf yuv444
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//memory frame buf rgb888
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break;
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case SCALE_IOCTL_CMD_SET_NEW_FRAME:
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hw->SCALECON |= BIT(15);
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break;
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case SCALE_IOCTL_CMD_SET_LINE_BUF_NUM:
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hw->SCALECON &= ~(BIT(7)|BIT(8)); //line 16
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if(param1 == 32){
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hw->SCALECON |= BIT(7);
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}else if(param1 == 64){
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hw->SCALECON |= BIT(8);
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}else if(param1 == 128){
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hw->SCALECON |= (BIT(7)|BIT(8));
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}
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break;
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case SCALE_IOCTL_CMD_OUT2SRAM_FRAME:
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if(param1 == 1){
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hw->SCALECON &= ~BIT(6); //line buf
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}else{
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hw->SCALECON |= BIT(6); //frame
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}
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break;
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case SCALE_IOCTL_CMD_SRAM_ROTATE:
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hw->SCALECON &= ~(BIT(9)|BIT(10)); //rotate 0
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if(param1 == 1){
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hw->SCALECON |= BIT(9); //rotate 90
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}else if(param1 == 2){
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hw->SCALECON |= BIT(10); //rotate 180
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}else if(param1 == 3){
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hw->SCALECON |= (BIT(9)|BIT(10)); //rotate 270
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}
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break;
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case SCALE_IOCTL_CMD_SRAM_MIRROR:
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if(param1 == 0){
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hw->SCALECON &= ~BIT(11); //no mirror
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}else{
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hw->SCALECON |= BIT(11); //mirror
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}
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break;
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case SCALE_IOCTL_CMD_PSRAM_BURST:
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hw->SCALECON &= ~(BIT(12)|BIT(13)); //8 word
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if(param1 == 16){
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hw->SCALECON |= BIT(12); //16 word
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}else if(param1 == 32){
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hw->SCALECON |= BIT(13); //32 word
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}else if(param1 == 64){
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hw->SCALECON |= (BIT(12)|BIT(13));//64 word
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}
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break;
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case SCALE_IOCTL_CMD_SET_START_ADDR:
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s_x = param1 & 0xffff;
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s_y = (param1>>16) & 0xffff;
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hw->SSTART = (s_x) |(s_y<<16);
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break;
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case SCALE_IOCTL_CMD_SET_SRAMBUF_WLEN:
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hw->SCALECON &= ~(BIT(4)|BIT(5));
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if(param1 == 64){
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hw->SCALECON |= BIT(4);
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}else if(param1 == 256){
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hw->SCALECON |= BIT(5);
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}else if(param1 == 512){
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hw->SCALECON |= (BIT(4)|BIT(5));
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}
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break;
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case SCALE_IOCTL_CMD_SET_IN_Y_ADDR:
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hw->INYDMA_STADR = param1;
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break;
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case SCALE_IOCTL_CMD_SET_IN_U_ADDR:
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hw->INUDMA_STADR = param1;
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break;
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case SCALE_IOCTL_CMD_SET_IN_V_ADDR:
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hw->INVDMA_STADR = param1;
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break;
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case SCALE_IOCTL_CMD_SET_OUT_Y_ADDR:
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hw->OUTYDMA_STADR = param1;
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break;
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case SCALE_IOCTL_CMD_SET_OUT_U_ADDR:
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hw->OUTUDMA_STADR = param1;
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break;
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case SCALE_IOCTL_CMD_SET_OUT_V_ADDR:
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hw->OUTVDMA_STADR = param1;
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break;
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case SCALE_IOCTL_CMD_SET_LINEBUF_YUV_ADDR:
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param_buf = (uint32*)param1;
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//printf("YUV:%08x %08x %08x\r\n",param_buf[0],param_buf[1],param_buf[2]);
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hw->YSRAMBUF_STADR = param_buf[0];
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hw->USRAMBUF_STADR = param_buf[1];
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hw->VSRAMBUF_STADR = param_buf[2];
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break;
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case SCALE_IOCTL_CMD_SET_INBUF_YUV_ADDR:
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param_buf = (uint32*)param1;
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hw->INYDMA_STADR = param_buf[0];
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hw->INUDMA_STADR = param_buf[1];
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hw->INVDMA_STADR = param_buf[2];
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break;
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case SCALE_IOCTL_CMD_GET_HEIGH_CNT:
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ret_val = hw->SHEIGH_CNT;
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break;
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case SCALE_IOCTL_CMD_GET_IS_OPEN:
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if(scale_hw->clk_en){ //判断scaler是否启动在运行
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ret_val = 1;
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}else{
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ret_val = 0;
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}
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break;
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default:
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os_printf("NO SCALE2 IOCTL:%d\r\n",ioctl_cmd);
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ret_val = -ENOTSUPP;
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break;
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}
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return ret_val;
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}
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static int32 hgscale3_ioctl(struct scale_device *p_scale, enum scale_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2)
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{
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int32 ret_val = RET_OK;
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uint32 s_w,s_h,d_w,d_h;
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uint32 s_x,s_y;
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// uint32 *size_array;
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struct hgscale *scale_hw = (struct hgscale*)p_scale;
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struct hgscale3_hw *hw = (struct hgscale3_hw *)scale_hw->hw;
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if(scale_hw->clk_en == 0){
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scale_hw->clk_en = 1;
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if((SYSCTRL->CLK_CON4 & BIT(29)) == 0){ //lcd clk not open
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SYSCTRL->CLK_CON4 |= BIT(29); //lcdc clk en
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SYSCTRL->CLK_CON4 &= ~BIT(30);
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SYSCTRL->CLK_CON4 |= BIT(30); //lcdc rest
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*(volatile uint32_t*)0x400070d4 |= BIT(3); //scale3 clk enable
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}else{
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*(volatile uint32_t*)0x400070d4 |= BIT(3); //scale3 clk enable
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}
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}
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switch(ioctl_cmd){
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case SCALE_IOCTL_CMD_SET_IN_OUT_SIZE:
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s_w = param1 & 0xffff;
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s_h = (param1>>16) & 0xffff;
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d_w = param2 & 0xffff;
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d_h = (param2>>16) & 0xffff;
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hw->SWINCON = (s_w-1)|((s_h-1)<<16);
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hw->TWINCON = (d_w-1)|((d_h-1)<<16);
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break;
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case SCALE_IOCTL_CMD_GET_INPUT_WIDTH:
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ret_val = (hw->SWINCON & 0xffff)+1;
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break;
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case SCALE_IOCTL_CMD_GET_INPUT_HIGH:
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ret_val = ((hw->SWINCON & 0xffff0000)>>16)+1;
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break;
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case SCALE_IOCTL_CMD_SET_STEP:
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s_w = param1 & 0xffff;
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s_h = (param1>>16) & 0xffff;
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d_w = param2 & 0xffff;
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d_h = (param2>>16) & 0xffff;
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//printf("s:%d %d d:%d %d \r\n",s_w,s_h,d_w,d_h);
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hw->SWIDTH_STEP = 256*s_w/d_w;
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hw->SHEIGH_STEP = 256*s_h/d_h;
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break;
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case SCALE_IOCTL_CMD_SET_START_ADDR:
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s_x = param1 & 0xffff;
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s_y = (param1>>16) & 0xffff;
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hw->SSTART = (s_x) |(s_y<<16);
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break;
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case SCALE_IOCTL_CMD_SET_LINE_BUF_NUM:
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hw->INBUF_LINE_NUM = param1;
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break;
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case SCALE_IOCTL_CMD_SET_IN_Y_ADDR:
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hw->INYDMA_STADR = param1;
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break;
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case SCALE_IOCTL_CMD_SET_IN_U_ADDR:
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hw->INUDMA_STADR = param1;
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_SET_IN_V_ADDR:
|
|
hw->INVDMA_STADR = param1;
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_SET_OUT_Y_ADDR:
|
|
hw->OUTYDMA_STADR = param1;
|
|
//printf("YO:%08x %08x\r\n",hw->OUTYDMA_STADR,param1);
|
|
//if(param1 < 0x20000000){
|
|
// hw->SCALECON &= ~BIT(0); //disable
|
|
// __BKPT();
|
|
//}
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_SET_OUT_U_ADDR:
|
|
hw->OUTUDMA_STADR = param1;
|
|
//printf("UO:%08x %08x\r\n",hw->OUTYDMA_STADR,param1);
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_SET_OUT_V_ADDR:
|
|
hw->OUTVDMA_STADR = param1;
|
|
//printf("VO:%08x %08x\r\n",hw->OUTYDMA_STADR,param1);
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_SET_OUTPUT_FORMAT:
|
|
if(param1 == 0){
|
|
hw->SCALECON &= ~BIT(5); //yuv420p
|
|
}else{
|
|
hw->SCALECON |= BIT(5); //rgb888p
|
|
}
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_SET_INPUT_IS_FRAMEBUF:
|
|
if(param1 == 0){
|
|
hw->SCALECON &= ~BIT(4); //line buf
|
|
}else{
|
|
hw->SCALECON |= BIT(4); //all frame
|
|
}
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_SET_INPUT_FORMAT:
|
|
if(param1 == 0){
|
|
hw->SCALECON &= ~BIT(3); //YUV420P
|
|
}else{
|
|
hw->SCALECON |= BIT(3); //RGB888p
|
|
}
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_DMA_TO_MEMORY:
|
|
if(param1){
|
|
hw->SCALECON |= BIT(1);
|
|
}else{
|
|
hw->SCALECON &= ~BIT(1);
|
|
}
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_SET_DATA_FROM:
|
|
if(param1)
|
|
hw->SCALECON &=~BIT(2); //vpp
|
|
else
|
|
hw->SCALECON |= BIT(2); //soft
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_GET_INBUF_NUM:
|
|
ret_val = (hw->INBUFCON>>16)&0x3ff;
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_SET_INBUF_NUM:
|
|
//os_printf("set inbuf_num:%d %d\r\n",param1,param2);
|
|
hw->INBUFCON = ((param1)<<16)|(param2);
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_SET_NEW_FRAME:
|
|
hw->INBUFCON |= BIT(15);
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_SET_END_FRAME:
|
|
hw->INBUFCON |= BIT(31);
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_GET_HEIGH_CNT:
|
|
ret_val = hw->SHEIGH_CNT;
|
|
break;
|
|
|
|
case SCALE_IOCTL_CMD_GET_IS_OPEN:
|
|
if(scale_hw->clk_en){ //判断scaler是否启动在运行
|
|
ret_val = 1;
|
|
}else{
|
|
ret_val = 0;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
os_printf("NO SCALE3 IOCTL:%d\r\n",ioctl_cmd);
|
|
ret_val = -ENOTSUPP;
|
|
break;
|
|
}
|
|
|
|
return ret_val;
|
|
}
|
|
|
|
|
|
void irq_scale1_enable(struct scale_device *p_scale,uint8 mode,uint8 irq){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale1_hw *hw = (struct hgscale1_hw *)scale_hw->hw;
|
|
if(mode){
|
|
hw->SCALECON |= BIT(irq+16);
|
|
}else{
|
|
hw->SCALECON &= ~BIT(irq+16);
|
|
}
|
|
}
|
|
|
|
void irq_scale2_enable(struct scale_device *p_scale,uint8 mode,uint8 irq){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale2_hw *hw = (struct hgscale2_hw *)scale_hw->hw;
|
|
if(mode){
|
|
hw->SCALECON |= BIT(irq+16);
|
|
}else{
|
|
hw->SCALECON &= ~BIT(irq+16);
|
|
}
|
|
}
|
|
|
|
void irq_scale3_enable(struct scale_device *p_scale,uint8 mode,uint8 irq){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale3_hw *hw = (struct hgscale3_hw *)scale_hw->hw;
|
|
if(mode){
|
|
hw->SCALECON |= BIT(irq+16);
|
|
}else{
|
|
hw->SCALECON &= ~BIT(irq+16);
|
|
}
|
|
}
|
|
|
|
void SCALE1_IRQHandler_action(void *p_scale)
|
|
{
|
|
uint32 sta = 0;
|
|
uint8 loop;
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale1_hw *hw = (struct hgscale1_hw *)scale_hw->hw;
|
|
sta = hw->SCALESTA;
|
|
for(loop = 0;loop < SCALE_IRQ_NUM;loop++){
|
|
if(sta&BIT(loop)){
|
|
hw->SCALESTA = BIT(loop);
|
|
if(scaleirq1_vector_table[loop] != NULL)
|
|
scaleirq1_vector_table[loop] (loop,scaleirq1_dev_table[loop],0);
|
|
}
|
|
}
|
|
|
|
if(scale_hw->need_close)
|
|
{
|
|
hw->SCALECON &= ~BIT(0); //disable
|
|
scale_hw->need_close = 0;
|
|
}
|
|
}
|
|
|
|
|
|
int32 scaleirq1_register(struct scale_device *p_scale,uint32 irq, scale_irq_hdl isr, uint32 dev_id){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale1_hw *hw = (struct hgscale1_hw *)scale_hw->hw;
|
|
request_irq(scale_hw->irq_num, SCALE1_IRQHandler_action, p_scale);
|
|
|
|
irq_scale1_enable(p_scale, 1, irq);
|
|
scaleirq1_vector_table[irq] = isr;
|
|
scaleirq1_dev_table[irq] = dev_id;
|
|
hw->SCALESTA |= BIT(irq);
|
|
os_printf("scaleirq1_register:%d %x %x\r\n",irq,(uint32)scaleirq1_vector_table[irq],(uint32)isr);
|
|
return 0;
|
|
}
|
|
|
|
|
|
int32 scaleirq1_unregister(struct scale_device *p_scale,uint32 irq){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale1_hw *hw = (struct hgscale1_hw *)scale_hw->hw;
|
|
irq_scale1_enable(p_scale, 0, irq);
|
|
scaleirq1_vector_table[irq] = NULL;
|
|
scaleirq1_dev_table[irq] = 0;
|
|
hw->SCALESTA |= BIT(irq);
|
|
return 0;
|
|
}
|
|
|
|
|
|
void SCALE2_IRQHandler_action(void *p_scale)
|
|
{
|
|
uint32 sta = 0;
|
|
uint8 loop;
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale2_hw *hw = (struct hgscale2_hw *)scale_hw->hw;
|
|
sta = hw->SCALESTA;
|
|
for(loop = 0;loop < SCALE_IRQ_NUM;loop++){
|
|
if(sta&BIT(loop)){
|
|
hw->SCALESTA = BIT(loop);
|
|
if(scaleirq2_vector_table[loop] != NULL)
|
|
scaleirq2_vector_table[loop] (loop,scaleirq2_dev_table[loop],0);
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
int32 scaleirq2_register(struct scale_device *p_scale,uint32 irq, scale_irq_hdl isr, uint32 dev_id){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale2_hw *hw = (struct hgscale2_hw *)scale_hw->hw;
|
|
request_irq(scale_hw->irq_num, SCALE2_IRQHandler_action, p_scale);
|
|
|
|
irq_scale2_enable(p_scale, 1, irq);
|
|
scaleirq2_vector_table[irq] = isr;
|
|
scaleirq2_dev_table[irq] = dev_id;
|
|
hw->SCALESTA |= BIT(irq);
|
|
return 0;
|
|
}
|
|
|
|
|
|
int32 scaleirq2_unregister(struct scale_device *p_scale,uint32 irq){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale2_hw *hw = (struct hgscale2_hw *)scale_hw->hw;
|
|
irq_scale2_enable(p_scale, 0, irq);
|
|
scaleirq2_vector_table[irq] = NULL;
|
|
scaleirq2_dev_table[irq] = 0;
|
|
hw->SCALESTA |= BIT(irq);
|
|
return 0;
|
|
}
|
|
|
|
|
|
void SCALE3_IRQHandler_action(void *p_scale)
|
|
{
|
|
uint32 sta = 0;
|
|
uint8 loop;
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale3_hw *hw = (struct hgscale3_hw *)scale_hw->hw;
|
|
sta = hw->SCALESTA;
|
|
// printf("STA:%08x CNT:%08x\r\n",hw->SCALESTA,hw->SHEIGH_CNT);
|
|
for(loop = 0;loop < SCALE_IRQ_NUM;loop++){
|
|
if(sta&BIT(loop)){
|
|
hw->SCALESTA = BIT(loop);
|
|
|
|
if(scaleirq3_vector_table[loop] != NULL){
|
|
if(scaler3_lost){
|
|
os_printf("isp error,scaler3 drop\r\n");
|
|
scaler3_lost = 0;
|
|
}else{
|
|
scaleirq3_vector_table[loop] (loop,scaleirq3_dev_table[loop],0);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
int32 scaleirq3_register(struct scale_device *p_scale,uint32 irq, scale_irq_hdl isr, uint32 dev_id){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale3_hw *hw = (struct hgscale3_hw *)scale_hw->hw;
|
|
request_irq(scale_hw->irq_num, SCALE3_IRQHandler_action, p_scale);
|
|
|
|
irq_scale3_enable(p_scale, 1, irq);
|
|
scaleirq3_vector_table[irq] = isr;
|
|
scaleirq3_dev_table[irq] = dev_id;
|
|
hw->SCALESTA |= BIT(irq);
|
|
//os_printf("scaleirq3_register:%d %x %x\r\n",irq,(uint32)scaleirq3_vector_table[irq],(uint32)isr);
|
|
return 0;
|
|
}
|
|
|
|
|
|
int32 scaleirq3_unregister(struct scale_device *p_scale,uint32 irq){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale3_hw *hw = (struct hgscale3_hw *)scale_hw->hw;
|
|
irq_scale3_enable(p_scale, 0, irq);
|
|
scaleirq3_vector_table[irq] = NULL;
|
|
scaleirq3_dev_table[irq] = 0;
|
|
hw->SCALESTA |= BIT(irq);
|
|
return 0;
|
|
}
|
|
|
|
|
|
static int32 hgscale1_open(struct scale_device *p_scale){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale1_hw *hw = (struct hgscale1_hw *)scale_hw->hw;
|
|
irq_enable(scale_hw->irq_num);
|
|
hw->SCALECON |= BIT(0); //enable
|
|
return 0;
|
|
}
|
|
|
|
static int32 hgscale1_close(struct scale_device *p_scale){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale1_hw *hw = (struct hgscale1_hw *)scale_hw->hw;
|
|
//如果关闭中断或者在中断调用,就不再处理,并且是在vpp模式需要等待中断关闭
|
|
if((!(__in_interrupt() || in_disable_irq())) && hw->SCALECON & BIT(2))
|
|
{
|
|
uint32_t timeout = 50;
|
|
scale_hw->need_close = 1;
|
|
while(scale_hw->need_close && --timeout)
|
|
{
|
|
os_sleep_ms(1);
|
|
}
|
|
scale_hw->need_close = 0;
|
|
}
|
|
hw->SCALECON &= ~BIT(0); //disable
|
|
hw->SCALESTA = hw->SCALESTA;
|
|
scale_hw->clk_en = 0;
|
|
*(volatile uint32_t*)0x400070d4 &= ~BIT(1); //scale1 clk enable
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int32 hgscale2_open(struct scale_device *p_scale){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale2_hw *hw = (struct hgscale2_hw *)scale_hw->hw;
|
|
irq_enable(scale_hw->irq_num);
|
|
hw->SCALECON |= BIT(0); //enable
|
|
return 0;
|
|
}
|
|
|
|
static int32 hgscale2_close(struct scale_device *p_scale){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale2_hw *hw = (struct hgscale2_hw *)scale_hw->hw;
|
|
//如果关闭中断或者在中断调用,就不再处理
|
|
uint32_t in_disable_irq(void);
|
|
if(!(__in_interrupt() || in_disable_irq()))
|
|
{
|
|
uint32_t timeout = 100;
|
|
while((hw->SCALESTA &BIT(16)) && --timeout)
|
|
{
|
|
os_sleep_ms(1);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
while(hw->SCALESTA &BIT(16));
|
|
}
|
|
|
|
hw->SCALECON &= ~BIT(0); //disable
|
|
hw->SCALESTA = hw->SCALESTA;
|
|
scale_hw->clk_en = 0;
|
|
*(volatile uint32_t*)0x400070d4 &= ~BIT(2); //scale2 clk enable
|
|
return 0;
|
|
}
|
|
|
|
|
|
static int32 hgscale3_open(struct scale_device *p_scale){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale3_hw *hw = (struct hgscale3_hw *)scale_hw->hw;
|
|
irq_enable(scale_hw->irq_num);
|
|
hw->SCALECON |= BIT(0); //enable
|
|
return 0;
|
|
}
|
|
|
|
static int32 hgscale3_close(struct scale_device *p_scale){
|
|
struct hgscale *scale_hw = (struct hgscale*)p_scale;
|
|
struct hgscale3_hw *hw = (struct hgscale3_hw *)scale_hw->hw;
|
|
//如果关闭中断或者在中断调用,就不再处理
|
|
uint32_t in_disable_irq(void);
|
|
if(!(__in_interrupt() || in_disable_irq()))
|
|
{
|
|
uint32_t timeout = 100;
|
|
while((hw->SCALESTA &BIT(16)) && --timeout)
|
|
{
|
|
os_sleep_ms(1);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
while(hw->SCALESTA &BIT(16));
|
|
}
|
|
hw->SCALECON &= ~BIT(0); //disable
|
|
hw->SCALESTA = hw->SCALESTA;
|
|
scale_hw->clk_en = 0;
|
|
*(volatile uint32_t*)0x400070d4 &= ~BIT(3); //scale3 clk enable
|
|
return 0;
|
|
}
|
|
|
|
int32 hgscale1_suspend(struct dev_obj *obj){
|
|
struct hgscale *scale_hw = (struct hgscale*)obj;
|
|
struct hgscale1_hw *hw;
|
|
struct hgscale1_hw *hw_cfg;
|
|
if(!scale_hw->opened || scale_hw->dsleep)
|
|
{
|
|
return RET_OK;
|
|
}
|
|
scale_hw->dsleep = 1;
|
|
scale_hw->cfg_backup = (uint32 *)os_malloc(sizeof(struct hgscale1_hw));
|
|
hw_cfg = (struct hgscale1_hw*)scale_hw->cfg_backup;
|
|
hw = (struct hgscale1_hw*)scale_hw->hw;
|
|
hw_cfg->SCALECON = hw->SCALECON;
|
|
hw_cfg->SWINCON = hw->SWINCON;
|
|
hw_cfg->SSTART = hw->SSTART;
|
|
hw_cfg->TWINCON = hw->TWINCON;
|
|
hw_cfg->SWIDTH_STEP = hw->SWIDTH_STEP;
|
|
hw_cfg->SHEIGH_STEP = hw->SHEIGH_STEP;
|
|
hw_cfg->INBUF_LINE_NUM = hw->INBUF_LINE_NUM;
|
|
hw_cfg->INYDMA_STADR = hw->INYDMA_STADR;
|
|
hw_cfg->INUDMA_STADR = hw->INUDMA_STADR;
|
|
hw_cfg->INVDMA_STADR = hw->INVDMA_STADR;
|
|
hw_cfg->INBUFCON = hw->INBUFCON;
|
|
hw_cfg->SHEIGH_CNT = hw->SHEIGH_CNT;
|
|
hw_cfg->SCALESTA = hw->SCALESTA;
|
|
irq_disable(scale_hw->irq_num);
|
|
return 0;
|
|
}
|
|
|
|
int32 hgscale1_resume(struct dev_obj *obj){
|
|
struct hgscale *scale_hw = (struct hgscale*)obj;
|
|
struct hgscale1_hw *hw;
|
|
struct hgscale1_hw *hw_cfg;
|
|
if(!scale_hw->opened || !scale_hw->dsleep)
|
|
{
|
|
return RET_OK;
|
|
}
|
|
scale_hw->dsleep = 0;
|
|
hw_cfg = (struct hgscale1_hw*)scale_hw->cfg_backup;
|
|
hw = (struct hgscale1_hw*)scale_hw->hw;
|
|
hw->SCALECON = hw_cfg->SCALECON;
|
|
hw->SWINCON = hw_cfg->SWINCON;
|
|
hw->SSTART = hw_cfg->SSTART;
|
|
hw->TWINCON = hw_cfg->TWINCON;
|
|
hw->SWIDTH_STEP = hw_cfg->SWIDTH_STEP;
|
|
hw->SHEIGH_STEP = hw_cfg->SHEIGH_STEP;
|
|
hw->INBUF_LINE_NUM = hw_cfg->INBUF_LINE_NUM;
|
|
hw->INYDMA_STADR = hw_cfg->INYDMA_STADR;
|
|
hw->INUDMA_STADR = hw_cfg->INUDMA_STADR;
|
|
hw->INVDMA_STADR = hw_cfg->INVDMA_STADR;
|
|
hw->INBUFCON = hw_cfg->INBUFCON;
|
|
hw->SHEIGH_CNT = hw_cfg->SHEIGH_CNT;
|
|
hw->SCALESTA = hw_cfg->SCALESTA;
|
|
irq_enable(scale_hw->irq_num);
|
|
os_free(scale_hw->cfg_backup);
|
|
return 0;
|
|
}
|
|
|
|
|
|
int32 hgscale2_suspend(struct dev_obj *obj){
|
|
struct hgscale *scale_hw = (struct hgscale*)obj;
|
|
struct hgscale2_hw *hw;
|
|
struct hgscale2_hw *hw_cfg;
|
|
if(!scale_hw->opened || scale_hw->dsleep)
|
|
{
|
|
return RET_OK;
|
|
}
|
|
scale_hw->dsleep = 1;
|
|
scale_hw->cfg_backup = (uint32 *)os_malloc(sizeof(struct hgscale2_hw));
|
|
hw_cfg = (struct hgscale2_hw*)scale_hw->cfg_backup;
|
|
hw = (struct hgscale2_hw*)scale_hw->hw;
|
|
hw_cfg->SCALECON = hw->SCALECON;
|
|
hw_cfg->SWINCON = hw->SWINCON;
|
|
hw_cfg->SSTART = hw->SSTART;
|
|
hw_cfg->TWINCON = hw->TWINCON;
|
|
hw_cfg->SWIDTH_STEP = hw->SWIDTH_STEP;
|
|
hw_cfg->SHEIGH_STEP = hw->SHEIGH_STEP;
|
|
hw_cfg->YSRAMBUF_STADR = hw->YSRAMBUF_STADR;
|
|
hw_cfg->USRAMBUF_STADR = hw->USRAMBUF_STADR;
|
|
hw_cfg->VSRAMBUF_STADR = hw->VSRAMBUF_STADR;
|
|
hw_cfg->INYDMA_STADR = hw->INYDMA_STADR;
|
|
hw_cfg->INUDMA_STADR = hw->INUDMA_STADR;
|
|
hw_cfg->INVDMA_STADR = hw->INVDMA_STADR;
|
|
hw_cfg->OUTYDMA_STADR = hw->OUTYDMA_STADR;
|
|
hw_cfg->OUTUDMA_STADR = hw->OUTUDMA_STADR;
|
|
hw_cfg->OUTVDMA_STADR = hw->OUTVDMA_STADR;
|
|
hw_cfg->SHEIGH_CNT = hw->SHEIGH_CNT;
|
|
hw_cfg->SCALESTA = hw->SCALESTA;
|
|
irq_disable(scale_hw->irq_num);
|
|
return 0;
|
|
}
|
|
|
|
int32 hgscale2_resume(struct dev_obj *obj){
|
|
struct hgscale *scale_hw = (struct hgscale*)obj;
|
|
struct hgscale2_hw *hw;
|
|
struct hgscale2_hw *hw_cfg;
|
|
if(!scale_hw->opened || !scale_hw->dsleep)
|
|
{
|
|
return RET_OK;
|
|
}
|
|
scale_hw->dsleep = 0;
|
|
hw_cfg = (struct hgscale2_hw*)scale_hw->cfg_backup;
|
|
hw = (struct hgscale2_hw*)scale_hw->hw;
|
|
hw->SCALECON = hw_cfg->SCALECON;
|
|
hw->SWINCON = hw_cfg->SWINCON;
|
|
hw->SSTART = hw_cfg->SSTART;
|
|
hw->TWINCON = hw_cfg->TWINCON;
|
|
hw->SWIDTH_STEP = hw_cfg->SWIDTH_STEP;
|
|
hw->SHEIGH_STEP = hw_cfg->SHEIGH_STEP;
|
|
hw->YSRAMBUF_STADR = hw_cfg->YSRAMBUF_STADR;
|
|
hw->USRAMBUF_STADR = hw_cfg->USRAMBUF_STADR;
|
|
hw->VSRAMBUF_STADR = hw_cfg->VSRAMBUF_STADR;
|
|
hw->INYDMA_STADR = hw_cfg->INYDMA_STADR;
|
|
hw->INUDMA_STADR = hw_cfg->INUDMA_STADR;
|
|
hw->INVDMA_STADR = hw_cfg->INVDMA_STADR;
|
|
hw->OUTYDMA_STADR = hw_cfg->OUTYDMA_STADR;
|
|
hw->OUTUDMA_STADR = hw_cfg->OUTUDMA_STADR;
|
|
hw->OUTVDMA_STADR = hw_cfg->OUTVDMA_STADR;
|
|
hw->SHEIGH_CNT = hw_cfg->SHEIGH_CNT;
|
|
hw->SCALESTA = hw_cfg->SCALESTA;
|
|
|
|
irq_enable(scale_hw->irq_num);
|
|
os_free(scale_hw->cfg_backup);
|
|
return 0;
|
|
}
|
|
|
|
int32 hgscale3_suspend(struct dev_obj *obj){
|
|
struct hgscale *scale_hw = (struct hgscale*)obj;
|
|
struct hgscale3_hw *hw;
|
|
struct hgscale3_hw *hw_cfg;
|
|
if(!scale_hw->opened || scale_hw->dsleep)
|
|
{
|
|
return RET_OK;
|
|
}
|
|
scale_hw->dsleep = 1;
|
|
scale_hw->cfg_backup = (uint32 *)os_malloc(sizeof(struct hgscale3_hw));
|
|
hw_cfg = (struct hgscale3_hw*)scale_hw->cfg_backup;
|
|
hw = (struct hgscale3_hw*)scale_hw->hw;
|
|
hw_cfg->SCALECON = hw->SCALECON;
|
|
hw_cfg->SWINCON = hw->SWINCON;
|
|
hw_cfg->SSTART = hw->SSTART;
|
|
hw_cfg->TWINCON = hw->TWINCON;
|
|
hw_cfg->SWIDTH_STEP = hw->SWIDTH_STEP;
|
|
hw_cfg->SHEIGH_STEP = hw->SHEIGH_STEP;
|
|
hw_cfg->INBUF_LINE_NUM = hw->INBUF_LINE_NUM;
|
|
hw_cfg->INYDMA_STADR = hw->INYDMA_STADR;
|
|
hw_cfg->INUDMA_STADR = hw->INUDMA_STADR;
|
|
hw_cfg->INVDMA_STADR = hw->INVDMA_STADR;
|
|
hw_cfg->OUTYDMA_STADR = hw->OUTYDMA_STADR;
|
|
hw_cfg->OUTUDMA_STADR = hw->OUTUDMA_STADR;
|
|
hw_cfg->OUTVDMA_STADR = hw->OUTVDMA_STADR;
|
|
hw_cfg->INBUFCON = hw->INBUFCON;
|
|
hw_cfg->SHEIGH_CNT = hw->SHEIGH_CNT;
|
|
hw_cfg->SCALESTA = hw->SCALESTA;
|
|
irq_disable(scale_hw->irq_num);
|
|
return 0;
|
|
}
|
|
|
|
int32 hgscale3_resume(struct dev_obj *obj){
|
|
struct hgscale *scale_hw = (struct hgscale*)obj;
|
|
struct hgscale3_hw *hw;
|
|
struct hgscale3_hw *hw_cfg;
|
|
if(!scale_hw->opened || !scale_hw->dsleep)
|
|
{
|
|
return RET_OK;
|
|
}
|
|
scale_hw->dsleep = 0;
|
|
hw_cfg = (struct hgscale3_hw*)scale_hw->cfg_backup;
|
|
hw = (struct hgscale3_hw*)scale_hw->hw;
|
|
hw->SCALECON = hw_cfg->SCALECON;
|
|
hw->SWINCON = hw_cfg->SWINCON;
|
|
hw->SSTART = hw_cfg->SSTART;
|
|
hw->TWINCON = hw_cfg->TWINCON;
|
|
hw->SWIDTH_STEP = hw_cfg->SWIDTH_STEP;
|
|
hw->SHEIGH_STEP = hw_cfg->SHEIGH_STEP;
|
|
hw->INBUF_LINE_NUM = hw_cfg->INBUF_LINE_NUM;
|
|
hw->INYDMA_STADR = hw_cfg->INYDMA_STADR;
|
|
hw->INUDMA_STADR = hw_cfg->INUDMA_STADR;
|
|
hw->INVDMA_STADR = hw_cfg->INVDMA_STADR;
|
|
hw->OUTYDMA_STADR = hw_cfg->OUTYDMA_STADR;
|
|
hw->OUTUDMA_STADR = hw_cfg->OUTUDMA_STADR;
|
|
hw->OUTVDMA_STADR = hw_cfg->OUTVDMA_STADR;
|
|
hw->INBUFCON = hw_cfg->INBUFCON;
|
|
hw->SHEIGH_CNT = hw_cfg->SHEIGH_CNT;
|
|
hw->SCALESTA = hw_cfg->SCALESTA;
|
|
irq_enable(scale_hw->irq_num);
|
|
os_free(scale_hw->cfg_backup);
|
|
return 0;
|
|
}
|
|
|
|
|
|
static const struct scale_hal_ops dev1_ops = {
|
|
.open = hgscale1_open,
|
|
.close = hgscale1_close,
|
|
.ioctl = hgscale1_ioctl,
|
|
.request_irq = scaleirq1_register,
|
|
.release_irq = scaleirq1_unregister,
|
|
#ifdef CONFIG_SLEEP
|
|
.ops.suspend = hgscale1_suspend,
|
|
.ops.resume = hgscale1_resume,
|
|
#endif
|
|
};
|
|
|
|
static const struct scale_hal_ops dev2_ops = {
|
|
.open = hgscale2_open,
|
|
.close = hgscale2_close,
|
|
.ioctl = hgscale2_ioctl,
|
|
.request_irq = scaleirq2_register,
|
|
.release_irq = scaleirq2_unregister,
|
|
#ifdef CONFIG_SLEEP
|
|
.ops.suspend = hgscale2_suspend,
|
|
.ops.resume = hgscale2_resume,
|
|
#endif
|
|
};
|
|
|
|
static const struct scale_hal_ops dev3_ops = {
|
|
.open = hgscale3_open,
|
|
.close = hgscale3_close,
|
|
.ioctl = hgscale3_ioctl,
|
|
.request_irq = scaleirq3_register,
|
|
.release_irq = scaleirq3_unregister,
|
|
#ifdef CONFIG_SLEEP
|
|
.ops.suspend = hgscale3_suspend,
|
|
.ops.resume = hgscale3_resume,
|
|
#endif
|
|
};
|
|
|
|
int32 hgscale1_attach(uint32 dev_id, struct hgscale *scale){
|
|
scale->clk_en = 0;
|
|
scale->opened = 0;
|
|
scale->use_dma = 0;
|
|
scale->irq_hdl = NULL;
|
|
//memset(dvp->irq_hdl,0,sizeof(dvp->irq_hdl));
|
|
scale->irq_data = 0;
|
|
//memset(dvp->irq_data,0,sizeof(dvp->irq_data));
|
|
|
|
scale->dev.dev.ops = (const struct devobj_ops *)&dev1_ops;
|
|
|
|
irq_disable(scale->irq_num);
|
|
dev_register(dev_id, (struct dev_obj *)scale);
|
|
return 0;
|
|
}
|
|
|
|
|
|
int32 hgscale2_attach(uint32 dev_id, struct hgscale *scale){
|
|
scale->clk_en = 0;
|
|
scale->opened = 0;
|
|
scale->use_dma = 0;
|
|
scale->irq_hdl = NULL;
|
|
//memset(dvp->irq_hdl,0,sizeof(dvp->irq_hdl));
|
|
scale->irq_data = 0;
|
|
//memset(dvp->irq_data,0,sizeof(dvp->irq_data));
|
|
|
|
scale->dev.dev.ops = (const struct devobj_ops *)&dev2_ops;
|
|
|
|
irq_disable(scale->irq_num);
|
|
dev_register(dev_id, (struct dev_obj *)scale);
|
|
return 0;
|
|
}
|
|
|
|
|
|
int32 hgscale3_attach(uint32 dev_id, struct hgscale *scale){
|
|
scale->clk_en = 0;
|
|
scale->opened = 0;
|
|
scale->use_dma = 0;
|
|
scale->irq_hdl = NULL;
|
|
//memset(dvp->irq_hdl,0,sizeof(dvp->irq_hdl));
|
|
scale->irq_data = 0;
|
|
//memset(dvp->irq_data,0,sizeof(dvp->irq_data));
|
|
scale->dev.dev.ops = (const struct devobj_ops *)&dev3_ops;
|
|
|
|
|
|
irq_disable(scale->irq_num);
|
|
dev_register(dev_id, (struct dev_obj *)scale);
|
|
return 0;
|
|
}
|
|
|
|
|
|
|