235 lines
6.7 KiB
Plaintext
235 lines
6.7 KiB
Plaintext
#set breakpoint always-inserted on
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# watchdog close : WDT->WDTKEY
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set *(unsigned int *)0x400C1004=0xdddd
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set *(unsigned int *)0x400C1014=0xdddd
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# sysctrl writable : SYSCTRL->SYS_KEY
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set *(unsigned int *)0x40020000=0x3fac87e4
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#set *(unsigned int *)0x40020000=~0x0fac87e4
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#/* msrom */
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# sysctrl writable : SYSCTRL->SYS_KEY
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set *(unsigned int *)0x40020000=0x3fac87e4
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# ROM Writable : SYSCTRL->SYS_CON3[4]
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set *(unsigned int *)0x40020010=0x00000010
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set *(unsigned int *)0x4002019c=0x0
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# sysclk = osc : SYSCTRL->CLK_CON0
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set *(unsigned int *)0x40020044=0x0000000b
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set *(unsigned int *)0x40020048=0x00000000
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# ROM Writable : SYSCTRL->SYS_CON3[4]
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set *(unsigned int *)0x40020010=0x08000010
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#set *(unsigned int *)0x00000000=0x180000E8
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#rst pin cfg
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set *(unsigned int *)0x400e0000 = 0x40000000
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set *(unsigned int *)0x400e0024 = 0x00008000
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#reset
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#SYSCTRL->CLK_CON4 &= ~BIT(20);
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#delay_ms(10);
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#SYSCTRL->CLK_CON4 |= BIT(20);
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#delay_ms(10);
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set *(unsigned int *)0x40020040= (*(unsigned int *)0x40020040 & 0xfffeffff)
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set *(unsigned int *)0x40020040= (*(unsigned int *)0x40020040 | 0x00010000)
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#0xe3ff4a57 60MHZ 0xe2ff4a57 80MHZ
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set *(unsigned int *)0x40020054=0xe2ff4a57
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#odd_even clk (8/16wire)
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#SYSCTRL->SYS_CON15 |= (BIT(14) | BIT(15));
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set *(unsigned int *)0x40020040= (*(unsigned int *)0x40020040 | 0x0000c000)
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#SET IO
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#restore ./utilities/ospi_io_cfg binary 0x400201A8
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#set *(unsigned int *)0x400201cc = 0
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set *(unsigned int *)0x400201a8 = 0x01871404
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set *(unsigned int *)0x400201ac = 0x16a4a0e6
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set *(unsigned int *)0x400201c4 = 0x2728c1ac
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set *(unsigned int *)0x400201c8 = 0x000bdab4
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set *(unsigned int *)0x400201cc = 0x00000000
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set *(unsigned int *)0x400201d0 = 0xffffffff
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set *(unsigned int *)0x400201d4 = 0xffffffff
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#OSPI CFG
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restore ./utilities/ospi_cfg binary 0x40001000
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set *(unsigned int *)0x400201d0 = 0xffffffff
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set *(unsigned int *)0x400201d4 = 0xffffffff
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#p_qspi->PHY_CONFIG = (p_qspi->PHY_CONFIG & ~(0x7FUL << 16)) | ((delay & 0x7FUL) << 16) | BIT(30);
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# rx0, tx
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set *(unsigned int*)0x400010b4 = (*(unsigned int*)0x400010b4 & (~0xffffff)) | (2) | (12 << 16)
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# rx1
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set *(unsigned int*)0x400010c4 = (*(unsigned int*)0x400010c4 & (~0xff)) | (2)
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#p_qspi->PHY_CONFIG = (p_qspi->PHY_CONFIG & ~(0x7FUL << 0)) | ((delay & 0x7FUL) << 0) | BIT(30);
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#p_qspi->NEW_ADD_CONFIG3 = (p_qspi->NEW_ADD_CONFIG3 & ~(0x7FUL << 0)) | ((delay & 0x7FUL) << 0);
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set *(unsigned int *)0x400010b4 = (*(unsigned int *)0x400010b4 & 0x7fffffff)
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set *(unsigned int *)0x400010b4 = (*(unsigned int *)0x400010b4 | 0x80000000)
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shell ping -c 10 -i 5 www.google.com
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#rwreg start
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#p_qspi->NEW_ADD_CONFIG2 = (p_qspi->NEW_ADD_CONFIG2 & ~(0x1UL << 22)) | ((0x1UL) << 22);
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set *(unsigned int *)0x400010d4 = 0x00d03f3f
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shell ping -c 10 -i 5 www.google.com
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#OSPI->DEV_WRINSTR_CONFIG = WR_OPC(wr_opc) | WEL_DISEN(0x1) | ADDR_TM(0x3) | DATA_TM(0x3) | WR_DUMMY(wr_dummy);
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set *(unsigned int *)0x40001008 = 0x00033160
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set *(unsigned int *)0x40001004 = 0x03033fe0
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set *(unsigned int *)0x4000100C = 0x02020202
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#reset
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#dummy & various lc
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set *(unsigned short *)0x28001000 = 0x8f07
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#OSPI->DEV_WRINSTR_CONFIG = WR_OPC(wr_opc) | WEL_DISEN(0x1) | ADDR_TM(0x3) | DATA_TM(0x3) | WR_DUMMY(wr_dummy);
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#OSPI->DEV_RDINSTR_CONFIG = WR_OPC(wr_opc) | WEL_DISEN(0x1) | ADDR_TM(0x3) | DATA_TM(0x3) | WR_DUMMY(wr_dummy);
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set *(unsigned int *)0x40001004 = 0x05033fa0
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set *(unsigned int *)0x40001008 = 0x05033120
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#rwreg end
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#p_qspi->NEW_ADD_CONFIG2 = (p_qspi->NEW_ADD_CONFIG2 & ~(0x1UL << 22)) | ((0x0UL) << 22) ;
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set *(unsigned int *)0x400010d4 = 0x00903f3f
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#reset
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#set *(unsigned int *)0x40020040= (*(unsigned int *)0x40020040 | 0x0000c000)
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#0xe3ff4a57 60MHZ 0xe2ff4a57 80MHZ
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set *(unsigned int *)0x40020054=0xe4ff4a57
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# load cpu1 psram code
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#restore ./../txw4302803/Obj/txw4302_core.ihex
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#restore ./../txw4302803/txw4302803.bin binary 0x28000000
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#restore ./../txw4302803/Obj/txw4302_core.elf
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#tb sys_main_loop
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#restore ./../txw4302803/Obj/txw4302_core.elf
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#tb sys_main_loop
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#set breakpoint always-inserted on
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# watchdog close : WDT->WDTKEY
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set *(unsigned int *)0x400c1004=0xdddd
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# sysctrl writable : SYSCTRL->SYS_KEY
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set *(unsigned int *)0x40020000=0x3fac87e4
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# sysclk = osc : SYSCTRL->CLK_CON0
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set *(unsigned int *)0x40020044=0x00000009
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set *(unsigned int *)0x40020048=0x00000000
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# ROM Writable : SYSCTRL->SYS_CON3[4]
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set *(unsigned int *)0x40020010=0x08000010
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#set *(unsigned int *)0x00000000=0x180000E8
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# MONITOR disable : SYSMNT CTRL
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set *(unsigned int *)0x40021300=0x0
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set *(unsigned int *)0x40021308=0x1
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# CQSPI IO MAP: GPIOB->PUPL/H
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set *(unsigned int *)0x40020B10=0x00111111
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set *(unsigned int *)0x40020B14=0x00000000
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# CQSPI IO MAP : GPIOB->MODE
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set *(unsigned int *)0x40020B00=0x00000000
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# CQSPI IO MAP : SYSCTRL->QSPI_MAP_CON
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set *(unsigned int *)0x40020184=0x00053A21
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# VCC_FLASH POWER ON
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# pmu_reg_write((uint32)&PMU->PMUCON11, PMU->PMUCON11 & (~ BIT(17)));\
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# pmu_reg_write((uint32)&PMU->PMUCON0, PMU->PMUCON0 | BIT(23)); \
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set *(unsigned int *)0x400180B8=0x00000044
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set *(unsigned int *)0x400180B4=0x32c046a4
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set *(unsigned int *)0x400180BC=0xc053781b
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set *(unsigned int *)0x400180B8=0x00000010
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set *(unsigned int *)0x400180B4=0x20880400
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set *(unsigned int *)0x400180BC=0xc053781b
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# QSPI clk(96Mhz source) : QSPI->CONFIG
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#set *(unsigned int *)0x40000000=0x00F90081
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set *(unsigned int *)0x40000000=0x80883881
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# QSPI clk(96Mhz source) : QSPI->CONFIG
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#READ_DATA_CAPTURE
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set *(unsigned int *)0x40000010=0x00000003
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# QSPI DELAY: QSPI->DEV_DELAY
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set *(unsigned int *)0x4000000C=0x02020202
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# QSPI write protect low addr : QSPI->WRITE_PROT_L
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set *(unsigned int *)0x40000050=0x00000000
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# QSPI write protect high addr : QSPI->WRITE_PROT_H
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set *(unsigned int *)0x40000054=0x00020000
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# QSPI write protect enable : QSPI->WRITE_PROT_CTRL
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set *(unsigned int *)0x40000058=0x0
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# FLASH reset
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set *(unsigned int *)0x40000090=0x66000001
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set *(unsigned int *)0x40000090=0x99000001
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# SPIFLASH write enable : QSPI->FLASH_CMD_CTRL
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set *(unsigned int *)0x40000090=0x06000001
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# QUAL MODE enable : QSPI->FLASH_CMD_WDATA_L && QSPI->FLASH_CMD_CTRL
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set *(unsigned int *)0x400000A8=0x0200
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set *(unsigned int *)0x40000090=0x01009001
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# QSPI DUAL MODE : QSPI->DEV_RDINSTR_CONFIG
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#set *(unsigned int *)0x40000004=0x0801003B
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# QSPI QUAL MODE : QSPI->DEV_RDINSTR_CONFIG
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#set *(unsigned int *)0x40000004=0x0802006B
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set *(unsigned int *)0x40000004=0x0802006B
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#READ_DATA_CAPTURE_EXT
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# QSPI poll disable
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#set *(unsigned int *)0x40000038=0x00014005
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# QSPI WEL disable
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#set *(unsigned int *)0x40000008=0x00000102
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# scramble enable
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#set *(unsigned int *)0x40020188=0x80000000
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# chip erase : QSPI->FLASH_CMD_CTRL
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#set *(unsigned int *)0x40000090=0xC7000001
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#softreset
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#set $chr=0xabcd0009
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set $pc=*(unsigned int *)0x10040000
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# sysctrl writable : SYSCTRL->SYS_KEY
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set *(unsigned int *)0x40020028=0x00300000
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