/** ****************************************************************************** * @file sdk\include\chip\txw80x\io_function.h * @author HUGE-IC Application Team * @version V1.0.0 * @date 2022-01-11 * @brief This file contains all the GPIO functions. * @copyright Copyright (c) 2016-2022 HUGE-IC ****************************************************************************** * @attention * Only used for txw80x. * * * * ****************************************************************************** */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __IO_FUNCTION_H #define __IO_FUNCTION_H #ifdef __cplusplus extern "C" { #endif #include "typesdef.h" #define REG_GPIO_DIR_CLR(port, n) \ (*(volatile unsigned int*)(port+0x00)) &= ~(3<<((n)<<1)) #define REG_GPIO_DIR_INPUT(port, n) \ do { \ REG_GPIO_DIR_CLR(port, n); \ (*(volatile unsigned int*)(port+0x00)) |= (0<<((n)<<1)); \ } while(0) #define REG_GPIO_DIR_OUTPUT(port, n) \ do { \ REG_GPIO_DIR_CLR(port, n); \ (*(volatile unsigned int*)(port+0x00)) |= (1<<((n)<<1)); \ } while(0) #define REG_GPIO_OTYPE_CLR(port, n) \ (*(volatile unsigned int*)(port+0x04)) &= ~(1<<(n)); #define REG_GPIO_OPEN_DRAIN(port, n) \ do { \ REG_GPIO_OTYPE_CLR(port, n); \ (*(volatile unsigned int*)(port+0x04)) |= (1<<(n));\ } while(0) #define REG_GPIO_PUSH_PULL(port, n) \ do { \ REG_GPIO_OTYPE_CLR(port, n); \ (*(volatile unsigned int*)(port+0x04)) |= (0<<(n));\ } while(0) #define REG_GPIO_PUL_100(port, n) \ (*(volatile unsigned int*)(port+0x10)) |= BIT((((n)-0)<<2)) #define REG_GPIO_PUH_100(port, n) \ (*(volatile unsigned int*)(port+0x14)) |= BIT((((n)-8)<<2)) #define REG_GPIO_PDL_100(port, n) \ (*(volatile unsigned int*)(port+0x18)) |= BIT((((n)-0)<<2)) #define REG_GPIO_PDH_100(port, n) \ (*(volatile unsigned int*)(port+0x1C)) |= BIT((((n)-8)<<2)) #define REG_GPIO_SET(port, n) \ (*(volatile unsigned int*)(port+0x24)) = \ ((*(volatile unsigned int*)(port+0x24)) & ~BIT(n)) | BIT(n) #define REG_GPIO_RESET(port, n) \ (*(volatile unsigned int*)(port+0x24)) = \ ((*(volatile unsigned int*)(port+0x24)) & ~BIT(n)) /** @addtogroup Docxygenid_GPIO_enum * @{ */ /** * @brief Enumeration constant for GPIO command. * @note * Enum number start from 0x101. */ enum gpio_cmd { /*! GPIO cmd afio set */ GPIO_CMD_AFIO_SET = 0x101, /*! GPIO cmd iomap output */ GPIO_CMD_IOMAP_OUT_FUNC, /*! GPIO cmd iomap input */ GPIO_CMD_IOMAP_IN_FUNC, /*! GPIO cmd iomap inout */ GPIO_CMD_IOMAP_INOUT_FUNC, /*! GPIO pin driver strength config */ GPIO_CMD_DRIVER_STRENGTH, }; /** * @brief Enumeration constant for GPIO afio set. */ enum gpio_afio_set{ /*! gpio cmd afio 0 */ GPIO_AF_0 = 0, /*! gpio cmd afio 1 */ GPIO_AF_1 , /*! gpio cmd afio 2 */ GPIO_AF_2 , /*! gpio cmd afio 3 */ GPIO_AF_3 , }; /** * @breif : Enumeration constant for GPIO pull level. */ enum gpio_pull_level { /*! gpio pull level : NONE */ GPIO_PULL_LEVEL_NONE = 0, /*! gpio pull level : 4.7K */ GPIO_PULL_LEVEL_4_7K , /*! gpio pull level : 100k */ GPIO_PULL_LEVEL_100K , }; /** * @breif : Enumeration constant for GPIO driver strength */ enum pin_driver_strength { /** *对于81x, 分别对应4, 12, 20, 28mA *对于82x, 分别对应4, 8, 16, 20mA. 对于PB12/PD8/PD14/PE1, 则分别是8, 20, 32, 60mA */ GPIO_DS_G0, GPIO_DS_G1, GPIO_DS_G2, GPIO_DS_G3, }; /** @defgroup GPIO IO map output function selection * @{ */ //除了GPIO_IOMAP_OUTPUT， 不能同时存在两个及以上 [ (枚举值+4)/5 ]相同的GPIO OUTPUT MAPPING 配置，下表已经分好类了 enum gpio_iomap_out_func{ GPIO_IOMAP_OUTPUT = 0, GPIO_IOMAP_OUT_OSPI_CS_IO = 0x1, GPIO_IOMAP_OUT_DBGPATH_DBGO_8 = 0x2, GPIO_IOMAP_OUT_LCD_DE_OR_ERD = 0x3, GPIO_IOMAP_OUT_COMP_DOUT_DIG0 = 0x5, GPIO_IOMAP_OUT_LCD_DATA_O_0 = 0x6, GPIO_IOMAP_OUT_VIDEO_PAR_DATA_O_0 = 0x7, GPIO_IOMAP_OUT_DBGPATH_DBGO_9 = 0x8, GPIO_IOMAP_OUT_COMP_DOUT_DIG1 = 0xA, GPIO_IOMAP_OUT_LCD_DE_OR_ERD1 = 0xB, GPIO_IOMAP_OUT_ANTENNA_SEL = 0xF, GPIO_IOMAP_OUT_LCD_HSYNC_OR_DC = 0x10, GPIO_IOMAP_OUT_PA_EN = 0x14, GPIO_IOMAP_OUT_LCD_VSYNC_OR_CS0 = 0x15, GPIO_IOMAP_OUT_RF_EXT_LNA_EN = 0x19, GPIO_IOMAP_OUT_LCD_DOTCLK_OR_RWR0 = 0x1A, GPIO_IOMAP_OUT_RF_SWITCH_EN1 = 0x1B, GPIO_IOMAP_OUT_RF_TX_EN_FEM = 0x1E, GPIO_IOMAP_OUT_RF_SWITCH_EN0 = 0x1F, GPIO_IOMAP_OUT_DVP_MCLK_OUT = 0x20, GPIO_IOMAP_OUT_RF_RX_EN_FEM = 0x23, GPIO_IOMAP_OUT_VIDEO_PAR_DATA_O_1 = 0x24, GPIO_IOMAP_OUT_RF_TRX_SW_FEM = 0x25, GPIO_IOMAP_OUT_LCD_DATA_O_1 = 0x28, GPIO_IOMAP_OUT_DAC_PDM_OUT = 0x29, GPIO_IOMAP_OUT_VIDEO_PAR_DATA_O_2 = 0x2A, GPIO_IOMAP_OUT_RF_PA_EN_FEM = 0x2B, GPIO_IOMAP_OUT_LCD_DATA_O_2 = 0x2D, GPIO_IOMAP_OUT_LCD_DATA_O_3 = 0x2E, GPIO_IOMAP_OUT_VIDEO_PAR_DATA_O_3 = 0x2F, GPIO_IOMAP_OUT_DBGPATH_DBGO_0 = 0x30, GPIO_IOMAP_OUT_UART1_RTS_RE_O = 0x32, GPIO_IOMAP_OUT_LCD_DATA_O_4 = 0x33, GPIO_IOMAP_OUT_VIDEO_PAR_DATA_O_4 = 0x34, GPIO_IOMAP_OUT_DBGPATH_DBGO_1 = 0x35, GPIO_IOMAP_OUT_UART1_CTS_DE_OUT = 0x37, GPIO_IOMAP_OUT_LCD_DATA_O_5 = 0x38, GPIO_IOMAP_OUT_VIDEO_PAR_DATA_O_5 = 0x39, GPIO_IOMAP_OUT_UART1_OUT = 0x3C, GPIO_IOMAP_OUT_DBGPATH_DBGO_2 = 0x3D, GPIO_IOMAP_OUT_UART0_RTS_RE_O = 0x41, GPIO_IOMAP_OUT_DBGPATH_DBGO_3 = 0x42, GPIO_IOMAP_OUT_UART0_CTS_DE_OUT = 0x46, GPIO_IOMAP_OUT_UART0_OUT = 0x4B, GPIO_IOMAP_OUT_LCD_DATA_O_6 = 0x4C, GPIO_IOMAP_OUT_VIDEO_PAR_DATA_O_6 = 0x4D, GPIO_IOMAP_OUT_STMR3_PWM_OUT = 0x50, GPIO_IOMAP_OUT_LCD_DATA_O_7 = 0x51, GPIO_IOMAP_OUT_VIDEO_PAR_DATA_O_7 = 0x52, GPIO_IOMAP_OUT_STMR2_PWM_OUT = 0x55, GPIO_IOMAP_OUT_LCD_DATA_O_8 = 0x56, GPIO_IOMAP_OUT_VIDEO_PAR_DATA_O_8 = 0x57, GPIO_IOMAP_OUT_STMR1_PWM_OUT = 0x5A, GPIO_IOMAP_OUT_LCD_DATA_O_9 = 0x5B, GPIO_IOMAP_OUT_VIDEO_PAR_DATA_O_9 = 0x5C, GPIO_IOMAP_OUT_STMR0_PWM_OUT = 0x5F, GPIO_IOMAP_OUT_LCD_DATA_O_10 = 0x60, GPIO_IOMAP_OUT_VIDEO_PAR_DATA_O_10 = 0x61, GPIO_IOMAP_OUT_STMR4_PWM_OUT = 0x64, GPIO_IOMAP_OUT_LCD_DATA_O_11 = 0x65, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_6 = 0x66, GPIO_IOMAP_OUT_STMR5_PWM_OUT = 0x69, GPIO_IOMAP_OUT_SPI0_IO3_OUT = 0x6A, GPIO_IOMAP_OUT_SDHOST_SCLK_O = 0x6E, GPIO_IOMAP_OUT_SPI0_IO2_OUT = 0x6F, GPIO_IOMAP_OUT_TMR3_PWM_OUT = 0x73, GPIO_IOMAP_OUT_SPI0_IO1_OUT = 0x74, GPIO_IOMAP_OUT_TMR2_PWM_OUT = 0x78, GPIO_IOMAP_OUT_SPI1_NSS_OUT = 0x79, GPIO_IOMAP_OUT_TMR1_PWM_OUT = 0x7D, GPIO_IOMAP_OUT_LCD_DATA_O_12 = 0x7E, GPIO_IOMAP_OUT_TMR0_PWM_OUT = 0x82, GPIO_IOMAP_OUT_DBGPATH_DBGO_4 = 0x83, GPIO_IOMAP_OUT_SDHOST1_DAT1_OUT = 0x84, GPIO_IOMAP_OUT_DUAL_ORG_FSYNC = 0x85, GPIO_IOMAP_OUT_LED_TMR0_PWM_OUT = 0x87, GPIO_IOMAP_OUT_LCD_DATA_O_13 = 0x88, GPIO_IOMAP_OUT_DBGPATH_DBGO_5 = 0x89, GPIO_IOMAP_OUT_LED_TMR1_PWM_OUT = 0x8C, GPIO_IOMAP_OUT_LCD_DATA_O_14 = 0x8D, GPIO_IOMAP_OUT_DBGPATH_DBGO_6 = 0x8E, GPIO_IOMAP_OUT_LED_TMR2_PWM_OUT = 0x91, GPIO_IOMAP_OUT_LCD_DATA_O_15 = 0x92, GPIO_IOMAP_OUT_DBGPATH_DBGO_7 = 0x93, GPIO_IOMAP_OUT_LED_TMR3_PWM_OUT = 0x96, GPIO_IOMAP_OUT_CAN_TXD = 0x97, GPIO_IOMAP_OUT_CPU1_JTG_TMS = 0x98, GPIO_IOMAP_OUT_PDM_MCLK = 0x9B, GPIO_IOMAP_OUT_OSPI_CS_IO1 = 0x9C, GPIO_IOMAP_OUT_QSPI_NSS1_OUT = 0xA0, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_0 = 0xA1, GPIO_IOMAP_OUT_GRANT_BLE = 0xA2, GPIO_IOMAP_OUT_SPI0_NSS_OUT = 0xA5, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_1 = 0xA6, GPIO_IOMAP_OUT_GRANT_BLE_SWITCH_O = 0xA7, GPIO_IOMAP_OUT_SPI0_SCK_OUT = 0xAA, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_2 = 0xAB, GPIO_IOMAP_OUT_GRANT_WIFI_SWITCH_O = 0xAC, GPIO_IOMAP_OUT_SPI0_IO0_OUT = 0xAF, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_3 = 0xB0, GPIO_IOMAP_OUT_SPARE0 = 0xB4, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_4 = 0xB5, GPIO_IOMAP_OUT_SPARE1 = 0xB9, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_5 = 0xBA, GPIO_IOMAP_OUT_SPARE2 = 0xBE, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_7 = 0xBF, GPIO_IOMAP_OUT_SPARE3 = 0xC3, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_8 = 0xC4, GPIO_IOMAP_OUT_SPI1_SCK_OUT = 0xC8, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_9 = 0xC9, GPIO_IOMAP_OUT_SPI1_IO0_OUT = 0xCD, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_10 = 0xCE, GPIO_IOMAP_OUT_SPI1_IO1_OUT = 0xD2, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_11 = 0xD3, GPIO_IOMAP_OUT_LCD_DATA_O_16 = 0xD7, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_12 = 0xD8, GPIO_IOMAP_OUT_LCD_DATA_O_17 = 0xDC, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_13 = 0xDD, GPIO_IOMAP_OUT_LCD_DATA_O_18 = 0xDE, GPIO_IOMAP_OUT_SPI2_NSS_OUT = 0xE1, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_14 = 0xE2, GPIO_IOMAP_OUT_SDHOST1_SCLK_O = 0xE3, GPIO_IOMAP_OUT_SPI2_SCK_OUT = 0xE6, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_15 = 0xE7, GPIO_IOMAP_OUT_SDHOST1_DAT0_OUT = 0xE8, GPIO_IOMAP_OUT_SPI2_IO0_OUT = 0xEB, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_16 = 0xEC, GPIO_IOMAP_OUT_LCD_DATA_O_19 = 0xED, GPIO_IOMAP_OUT_SDHOST1_CMD_OUT = 0xEE, GPIO_IOMAP_OUT_SPI2_IO1_OUT = 0xF0, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_17 = 0xF1, GPIO_IOMAP_OUT_LCD_DATA_O_20 = 0xF2, GPIO_IOMAP_OUT_SDHOST1_DAT2_OUT = 0xF3, GPIO_IOMAP_OUT_SPI2_IO2_OUT = 0xF5, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_18 = 0xF6, GPIO_IOMAP_OUT_LCD_DATA_O_21 = 0xF7, GPIO_IOMAP_OUT_SDHOST1_DAT3_OUT = 0xF8, GPIO_IOMAP_OUT_SPI2_IO3_OUT = 0xFA, GPIO_IOMAP_OUT_QSPI_OSPI_MNT_O_19 = 0xFB, GPIO_IOMAP_OUT_SDHOST_CMD_OUT = 0xFF, GPIO_IOMAP_OUT_UART6_TX = 0x100, GPIO_IOMAP_OUT_SDHOST_DAT0_OUT = 0x104, GPIO_IOMAP_OUT_LCD_DOTCLK_OR_RWR1 = 0x105, GPIO_IOMAP_OUT_SDHOST_DAT1_OUT = 0x109, GPIO_IOMAP_OUT_LCD_VSYNC_OR_CS1 = 0x10A, GPIO_IOMAP_OUT_SDHOST_DAT2_OUT = 0x10E, GPIO_IOMAP_OUT_LCD_HSYNC_OR_DC1 = 0x10F, GPIO_IOMAP_OUT_SDHOST_DAT3_OUT = 0x113, GPIO_IOMAP_OUT_LCD_DOTCLK_OR_RWR2 = 0x114, GPIO_IOMAP_OUT_IO2IO_CHANNAL3 = 0x115, GPIO_IOMAP_OUT_IIS0_MCLK_OUT = 0x118, GPIO_IOMAP_OUT_LCD_VSYNC_OR_CS2 = 0x119, GPIO_IOMAP_OUT_IO2IO_CHANNAL2 = 0x11A, GPIO_IOMAP_OUT_IIS0_WSCLK_OUT = 0x11D, GPIO_IOMAP_OUT_LCD_HSYNC_OR_DC2 = 0x11E, GPIO_IOMAP_OUT_IO2IO_CHANNAL1 = 0x11F, GPIO_IOMAP_OUT_IIS0_BCLK_OUT = 0x122, GPIO_IOMAP_OUT_LCD_DE_OR_ERD2 = 0x123, GPIO_IOMAP_OUT_IO2IO_CHANNAL0 = 0x124, GPIO_IOMAP_OUT_IIS0_DO = 0x127, GPIO_IOMAP_OUT_UART5_TX = 0x128, GPIO_IOMAP_OUT_LCD_DATA_O_22 = 0x129, GPIO_IOMAP_OUT_IIS1_MCLK_OUT = 0x12C, GPIO_IOMAP_OUT_LCD_DATA_O_23 = 0x12D, GPIO_IOMAP_OUT_NFC_TX_GATE_N = 0x12E, GPIO_IOMAP_OUT_IIS1_WSCLK_OUT = 0x131, GPIO_IOMAP_OUT_SPI1_IO2_OUT = 0x132, GPIO_IOMAP_OUT_NFC_TX_N = 0x133, GPIO_IOMAP_OUT_IIS1_BCLK_OUT = 0x136, GPIO_IOMAP_OUT_SPI1_IO3_OUT = 0x137, GPIO_IOMAP_OUT_NFC_TX_GATE_P = 0x138, GPIO_IOMAP_OUT_IIS1_DO = 0x13B, GPIO_IOMAP_OUT_UART4_TX = 0x13C, GPIO_IOMAP_OUT_NFC_TX_P = 0x13D, GPIO_IOMAP_OUT_CLK_TO_IO = 0x140, }; /** @defgroup Enumeration constant for GPIO IO map input function selection * @{ */ enum gpio_iomap_in_func{ GPIO_IOMAP_INPUT = 0xF000, GPIO_IOMAP_IN_SPARE_IO1 = 0x0000, GPIO_IOMAP_IN_SPARE_IO2, GPIO_IOMAP_IN_SPARE_IO3, GPIO_IOMAP_IN_TMR2_CAP_IN, GPIO_IOMAP_IN_TMR3_CAP_IN, GPIO_IOMAP_IN_PDM_DATA_IN_EPWM_TZ1_M3_2, GPIO_IOMAP_IN_PTA_REQ_IN_EPWM_TZ2_M3_3, GPIO_IOMAP_IN_PTA_PRI_IN_EPWM_TZ3_M3_4, GPIO_IOMAP_IN_FREQ_IND_IN_EPWM_TZ4_M3_5, GPIO_IOMAP_IN_STMR0_CAP_IN_LCD_D3_IN_M1_22_EPWM_SYNC_IO_M3_6, GPIO_IOMAP_IN_STMR1_CAP_IN_LCD_D4_IN_M1_23, GPIO_IOMAP_IN_STMR2_CAP_IN_LCD_D5_IN_M1_24, GPIO_IOMAP_IN_STMR3_CAP_IN_LCD_D6_IN_M1_25, GPIO_IOMAP_IN_PORT_WKUP_IN0 = 13, GPIO_IOMAP_IN_TMR0_CAP_IN = 13, GPIO_IOMAP_IN_PORT_WKUP_IN1_LCD_D7_IN_M1_26 = 14, GPIO_IOMAP_IN_TMR0_SYNCI = 14, GPIO_IOMAP_IN_EXT_RFSWITCH_EN0 = 14, GPIO_IOMAP_IN_PORT_WKUP_IN2_LCD_D8_IN_M1_27 = 15, GPIO_IOMAP_IN_TMR1_CAP_IN = 15, GPIO_IOMAP_IN_PORT_WKUP_IN3_LCD_TE_M0_10, GPIO_IOMAP_IN_UART0_IN, GPIO_IOMAP_IN_UART0_CTS_DE_IN, GPIO_IOMAP_IN_UART1_IN_LCD_D9_IN_M1_28, GPIO_IOMAP_IN_UART1_CTS_DE_IN_LCD_D10_IN_M1_29, GPIO_IOMAP_IN_FB_IN_EXT_PA_EN_SYS_NMI_CAN_RXD, GPIO_IOMAP_IN_UART4_IN, GPIO_IOMAP_IN_LCD_D0_IN_M1_19, GPIO_IOMAP_IN_SPI0_NSS_IN, GPIO_IOMAP_IN_SPI0_SCK_IN, GPIO_IOMAP_IN_SPI0_IO0_IN, GPIO_IOMAP_IN_SPI0_IO1_IN, GPIO_IOMAP_IN_SPI0_IO2_IN, GPIO_IOMAP_IN_SPI0_IO3_IN, GPIO_IOMAP_IN_SPI1_NSS_IN_LCD_D11_IN_M1_30, GPIO_IOMAP_IN_SPI1_SCK_IN, GPIO_IOMAP_IN_SPI1_IO0_IN, GPIO_IOMAP_IN_SPI1_IO1_IN_LCD_D12_IN_M1_31, GPIO_IOMAP_IN_LCD_D1_IN_M1_20, GPIO_IOMAP_IN_LCD_D2_IN_M1_21, GPIO_IOMAP_IN_SPI2_NSS_IN_LCD_D13_IN_M2_0, GPIO_IOMAP_IN_SPI2_SCK_IN, GPIO_IOMAP_IN_SPI2_IO0_IN, GPIO_IOMAP_IN_SPI2_IO1_IN_LCD_D14_IN_M2_1, GPIO_IOMAP_IN_SPI2_IO2_IN_LCD_D15_IN_M2_2, GPIO_IOMAP_IN_SPI2_IO3_IN_LCD_D16_IN_M2_3, GPIO_IOMAP_IN_STMR4_CAP_IN_LCD_D17_IN_M2_4, GPIO_IOMAP_IN_STMR5_CAP_IN_LCD_D18_IN_M2_5, GPIO_IOMAP_IN_SDHOST_CMD_IN, GPIO_IOMAP_IN_SDHOST_DAT0_IN, GPIO_IOMAP_IN_SDHOST_DAT1_IN, GPIO_IOMAP_IN_SDHOST_DAT2_IN, GPIO_IOMAP_IN_SDHOST_DAT3_IN, GPIO_IOMAP_IN_IIS0_MCLK_IN_LCD_D19_IN_M2_6, GPIO_IOMAP_IN_IIS0_WSCLK_IN_LCD_D20_IN_M2_7, GPIO_IOMAP_IN_IIS0_BCLK_IN_LCD_D21_IN_M2_8, GPIO_IOMAP_IN_IIS0_DAT_IN_UART6_RX_M3_9, GPIO_IOMAP_IN_IIS1_MCLK_IN_Uart5_IN_LCD_D22_IN_M2_9, GPIO_IOMAP_IN_IIS1_WSCLK_IN_LCD_D23_IN_M2_10, GPIO_IOMAP_IN_SPI1_IO2_IN_IIS1_BCLK_IN, GPIO_IOMAP_IN_SPI1_IO3_IN_IIS1_DAT_IN_UART6_RX_M3_9, }; /** @defgroup Enumeration constant for GPIO spare iomap function * @{ 选择一个IO连接到备用的功能点上， 解决同组MAP无法复用的问题 * */ enum smap_node{ SMAP_OUT_0 = 0, SMAP_OUT_1, SMAP_OUT_2, SMAP_OUT_3, SMAP_IN_1, SMAP_IN_2, SMAP_IN_3, }; enum smap_output{ SMAP_OUT_RF_EXT_LNA_EN , SMAP_OUT_RF_TX_EN_FEM , SMAP_OUT_RF_SWITCH_EN1 , SMAP_OUT_RF_RX_EN_FEM , SMAP_OUT_RF_SWITCH_EN0 , SMAP_OUT_RF_TRX_SW_FEM , SMAP_OUT_RF_PA_EN_FEM , SMAP_OUT_GRANT_BLE , SMAP_OUT_GRANT_BLE_SWITCH_O , SMAP_OUT_GRANT_WIFI_SWITCH_O , SMAP_OUT_UART0_RTS_RE_O , SMAP_OUT_UART0_CTS_DE_OUT , SMAP_OUT_UART0_OUT , SMAP_OUT_UART1_RTS_RE_O , SMAP_OUT_UART1_CTS_DE_OUT , SMAP_OUT_UART1_OUT , SMAP_OUT_UART4_TX , SMAP_OUT_UART5_TX , SMAP_OUT_UART6_TX , SMAP_OUT_VIDEO_PAR_DATA_O_0 , SMAP_OUT_VIDEO_PAR_DATA_O_1 , SMAP_OUT_VIDEO_PAR_DATA_O_2 , SMAP_OUT_VIDEO_PAR_DATA_O_3 , SMAP_OUT_VIDEO_PAR_DATA_O_4 , SMAP_OUT_VIDEO_PAR_DATA_O_5 , SMAP_OUT_VIDEO_PAR_DATA_O_6 , SMAP_OUT_VIDEO_PAR_DATA_O_7 , SMAP_OUT_VIDEO_PAR_DATA_O_8 , SMAP_OUT_VIDEO_PAR_DATA_O_9 , SMAP_OUT_DBGPATH_DBGO_0 , SMAP_OUT_DBGPATH_DBGO_1 , SMAP_OUT_DBGPATH_DBGO_2 , SMAP_OUT_DBGPATH_DBGO_3 , SMAP_OUT_DBGPATH_DBGO_4 , SMAP_OUT_DBGPATH_DBGO_5 , SMAP_OUT_DBGPATH_DBGO_6 , SMAP_OUT_DBGPATH_DBGO_7 , SMAP_OUT_DBGPATH_DBGO_8 , SMAP_OUT_DBGPATH_DBGO_9 , SMAP_OUT_STMR0_PWM_OUT , SMAP_OUT_STMR1_PWM_OUT , SMAP_OUT_STMR2_PWM_OUT , SMAP_OUT_STMR3_PWM_OUT , SMAP_OUT_STMR4_PWM_OUT , SMAP_OUT_STMR5_PWM_OUT , SMAP_OUT_TMR3_PWM_OUT , SMAP_OUT_TMR2_PWM_OUT , SMAP_OUT_TMR1_PWM_OUT , SMAP_OUT_TMR0_PWM_OUT , SMAP_OUT_LED_TMR0_PWM_OUT , SMAP_OUT_LED_TMR1_PWM_OUT , SMAP_OUT_LED_TMR2_PWM_OUT , SMAP_OUT_LED_TMR3_PWM_OUT , SMAP_OUT_OSPI_CS_IO , SMAP_OUT_QSPI_NSS1_OUT , SMAP_OUT_QSPI_OSPI_MNT_O_0 , SMAP_OUT_QSPI_OSPI_MNT_O_1 , SMAP_OUT_QSPI_OSPI_MNT_O_2 , SMAP_OUT_QSPI_OSPI_MNT_O_3 , SMAP_OUT_QSPI_OSPI_MNT_O_4 , SMAP_OUT_QSPI_OSPI_MNT_O_5 , SMAP_OUT_QSPI_OSPI_MNT_O_6 , SMAP_OUT_QSPI_OSPI_MNT_O_7 , SMAP_OUT_QSPI_OSPI_MNT_O_8 , SMAP_OUT_QSPI_OSPI_MNT_O_9 , SMAP_OUT_QSPI_OSPI_MNT_O_10 , SMAP_OUT_QSPI_OSPI_MNT_O_11 , SMAP_OUT_QSPI_OSPI_MNT_O_12 , SMAP_OUT_QSPI_OSPI_MNT_O_13 , SMAP_OUT_QSPI_OSPI_MNT_O_14 , SMAP_OUT_QSPI_OSPI_MNT_O_15 , SMAP_OUT_QSPI_OSPI_MNT_O_16 , SMAP_OUT_QSPI_OSPI_MNT_O_17 , SMAP_OUT_QSPI_OSPI_MNT_O_18 , SMAP_OUT_QSPI_OSPI_MNT_O_19 , SMAP_OUT_SDHOST1_CMD_OUT , SMAP_OUT_SDHOST1_SCLK_O , SMAP_OUT_SDHOST1_DAT0_OUT, SMAP_OUT_SDHOST1_DAT1_OUT, SMAP_OUT_SDHOST1_DAT2_OUT, SMAP_OUT_SDHOST1_DAT3_OUT, SMAP_OUT_SDHOST_SCLK_O , SMAP_OUT_SDHOST_CMD_OUT , SMAP_OUT_SDHOST_DAT0_OUT , SMAP_OUT_SDHOST_DAT1_OUT , SMAP_OUT_SDHOST_DAT2_OUT , SMAP_OUT_SDHOST_DAT3_OUT , SMAP_OUT_IO2IO_CHANNAL3 , SMAP_OUT_IO2IO_CHANNAL2 , SMAP_OUT_IO2IO_CHANNAL1 , SMAP_OUT_IO2IO_CHANNAL0 , SMAP_OUT_IIS1_WSCLK_OUT , SMAP_OUT_IIS1_BCLK_OUT , SMAP_OUT_IIS1_DO , SMAP_OUT_IIS1_MCLK_OUT , SMAP_OUT_IIS0_MCLK_OUT , SMAP_OUT_IIS0_WSCLK_OUT , SMAP_OUT_IIS0_BCLK_OUT , SMAP_OUT_IIS0_DO , SMAP_OUT_LCD_DATA_O_0 , SMAP_OUT_LCD_DATA_O_1 , SMAP_OUT_LCD_DATA_O_2 , SMAP_OUT_LCD_DATA_O_3 , SMAP_OUT_LCD_DATA_O_4 , SMAP_OUT_LCD_DATA_O_5 , SMAP_OUT_LCD_DATA_O_6 , SMAP_OUT_LCD_DATA_O_7 , SMAP_OUT_LCD_DATA_O_8 , SMAP_OUT_LCD_DATA_O_9 , SMAP_OUT_LCD_DATA_O_10 , SMAP_OUT_LCD_DATA_O_11 , SMAP_OUT_LCD_DATA_O_12 , SMAP_OUT_LCD_DATA_O_13 , SMAP_OUT_LCD_DATA_O_14 , SMAP_OUT_LCD_DATA_O_15 , SMAP_OUT_LCD_DATA_O_16 , SMAP_OUT_LCD_DATA_O_17 , SMAP_OUT_LCD_DATA_O_18 , SMAP_OUT_LCD_DATA_O_19 , SMAP_OUT_LCD_DATA_O_20 , SMAP_OUT_LCD_DATA_O_21 , SMAP_OUT_LCD_DATA_O_22 , SMAP_OUT_LCD_DATA_O_23 , SMAP_OUT_LCD_DOTCLK_OR_RWR , SMAP_OUT_LCD_VSYNC_OR_CS , SMAP_OUT_LCD_HSYNC_OR_DC , SMAP_OUT_LCD_DE_OR_ERD , SMAP_OUT_SPI0_NSS_OUT , SMAP_OUT_SPI0_SCK_OUT , SMAP_OUT_SPI0_IO0_OUT , SMAP_OUT_SPI0_IO1_OUT , SMAP_OUT_SPI0_IO2_OUT , SMAP_OUT_SPI0_IO3_OUT , SMAP_OUT_SPI1_SCK_OUT , SMAP_OUT_SPI1_NSS_OUT , SMAP_OUT_SPI1_IO0_OUT , SMAP_OUT_SPI1_IO1_OUT , SMAP_OUT_SPI1_IO2_OUT , SMAP_OUT_SPI1_IO3_OUT , SMAP_OUT_SPI2_NSS_OUT , SMAP_OUT_SPI2_SCK_OUT , SMAP_OUT_SPI2_IO0_OUT , SMAP_OUT_SPI2_IO1_OUT , SMAP_OUT_SPI2_IO2_OUT , SMAP_OUT_SPI2_IO3_OUT , SMAP_OUT_NFC_TX_GATE_N , SMAP_OUT_NFC_TX_N , SMAP_OUT_NFC_TX_GATE_P , SMAP_OUT_NFC_TX_P , SMAP_OUT_COMP_DOUT_DIG0 , SMAP_OUT_COMP_DOUT_DIG1 , SMAP_OUT_ANTENNA_SEL , SMAP_OUT_LIN_TX , SMAP_OUT_LIN1_TX , SMAP_OUT_PA_EN , SMAP_OUT_DVP_MCLK_OUT , SMAP_OUT_DAC_PDM_OUT , SMAP_OUT_DUAL_ORG_FSYNC , SMAP_OUT_PDM_MCLK , SMAP_OUT_CAN_TXD , SMAP_OUT_CLK_TO_IO , }; enum smap_input{ SMAP_IN_IO2IO_CH0 = 1, SMAP_IN_IO2IO_CH1, SMAP_IN_IO2IO_CH2, SMAP_IN_IO2IO_CH3, SMAP_IN_LCD_DAT_3 =5, SMAP_IN_LCD_DAT_4, SMAP_IN_LCD_DAT_5, SMAP_IN_LCD_DAT_6, SMAP_IN_LCD_DAT_7, SMAP_IN_LCD_DAT_8 = 10, SMAP_IN_EX_RFSWI_EN0 = 11, SMAP_IN_LCD_DAT_9 = 12, SMAP_IN_LCD_DAT_10, SMAP_IN_FB_IN = 14, SMAP_IN_EX_RF_PA_EN = 15, SMAP_IN_LCD_DAT_11 = 16, SMAP_IN_LCD_DAT_12, SMAP_IN_SDHOST1_DAT3, SMAP_IN_LCD_DAT_13, SMAP_IN_SDHOST1_DAT0, SMAP_IN_SDHOST1_CMD, SMAP_IN_LCD_DAT_14, SMAP_IN_SDHOST1_DAT2, SMAP_IN_LCD_DAT_15, SMAP_IN_SPI2_IO3, SMAP_IN_LCD_DAT_16, SMAP_IN_LCD_DAT_17, SMAP_IN_LCD_DAT_18, SMAP_IN_LCD_DAT_19, SMAP_IN_LCD_DAT_20, SMAP_IN_LCD_DAT_21, SMAP_IN_UART5_RX = 32, SMAP_IN_LCD_DAT_22, SMAP_IN_LCD_DAT_23, SMAP_IN_SPI_IO2, SMAP_IN_SPI_IO3, SMAP_IN_UART6_RX, }; /** @} Docxygenid_IO_function_enum*/ int32 gpio_driver_strength(uint32 pin, enum pin_driver_strength strength); int32 gpio_set_altnt_func(uint32 pin, enum gpio_afio_set afio); int32 gpio_iomap_output(uint32 pin, enum gpio_iomap_out_func func_sel); int32 gpio_iomap_input(uint32 pin, enum gpio_iomap_in_func func_sel); int32 gpio_iomap_inout(uint32 pin, enum gpio_iomap_in_func in_func_sel, enum gpio_iomap_out_func out_func_sel); int lmac_fem_pin_func(int request); #ifdef __cplusplus } #endif #endif /*************************** (C) COPYRIGHT 2016-2022 HUGE-IC ***** END OF FILE *****/