Initial commit: TXW82x FPV v2.7.0.7-42229 SDK + project sources
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102
sdk/include/lib/spi_nand/spi_nand.h
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102
sdk/include/lib/spi_nand/spi_nand.h
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/*
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* Copyright (C) 2026 ChuangDian, Xu
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*
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* Author: ChuangDian, Xu <xcdanswer@gmail.com>
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*/
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#ifndef __NAND_CHIP_H__
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#define __NAND_CHIP_H__
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#include "typesdef.h"
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#include "lib/spi_nand/nand.h"
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#include "lib/spi_nand/spi_mem.h"
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#define SPI_NAND_CMD_ONLY(__cmd) \
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SPI_MEM_OP_BASIC(__cmd, SPI_MEM_OP_DETAIL(0, 0, OP_ADR_DAT_111, SPI_MEM_OP_NO_DATA), 0, 0)
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#define SPI_NAND_WITHOUT_DATA30(__cmd, __addr, __line) \
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SPI_MEM_OP_BASIC(__cmd, SPI_MEM_OP_DETAIL(3, 0, __line, SPI_MEM_OP_NO_DATA), __addr, 0)
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#define SPI_NAND_WITHOUT_DATA20(__cmd, __addr, __line) \
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SPI_MEM_OP_BASIC(__cmd, SPI_MEM_OP_DETAIL(2, 0, __line, SPI_MEM_OP_NO_DATA), __addr, 0)
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#define SPI_NAND_READ_REG(__addr, __buf) \
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SPI_MEM_OP_BASIC(0x0f, \
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SPI_MEM_OP_DETAIL(1, 0, OP_ADR_DAT_111, SPI_MEM_OP_DATA_IN), __addr, __buf)
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#define SPI_NAND_WRITE_REG(__addr, __buf) \
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SPI_MEM_OP_BASIC(0x1f, \
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SPI_MEM_OP_DETAIL(1, 0, OP_ADR_DAT_111, SPI_MEM_OP_DATA_OUT), __addr, __buf)
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#define SPI_NAND_IN_WITHOUT_ADDR(__cmd, __dummy, __buf) \
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SPI_MEM_OP_BASIC(__cmd, \
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SPI_MEM_OP_DETAIL(0, __dummy, OP_ADR_DAT_111, SPI_MEM_OP_DATA_IN), 0, __buf)
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#define SPI_NAND_READ_CACHE_OP() \
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SPI_MEM_OP_BASIC(0x03, \
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SPI_MEM_OP_DETAIL(2, 1, OP_ADR_DAT_111, SPI_MEM_OP_DATA_IN), 0, NULL)
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#define SPI_NAND_READ_CACHE_OP114() \
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SPI_MEM_OP_BASIC(0x6b, \
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SPI_MEM_OP_DETAIL(2, 1, OP_ADR_DAT_114, SPI_MEM_OP_DATA_IN), 0, NULL)
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#define SPI_NAND_WRITE_CACHE_OP() \
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SPI_MEM_OP_BASIC(0x02, \
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SPI_MEM_OP_DETAIL(2, 0, OP_ADR_DAT_111, SPI_MEM_OP_DATA_OUT), 0, NULL)
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#define SPI_NAND_WRITE_CACHE_OP114() \
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SPI_MEM_OP_BASIC(0x32, \
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SPI_MEM_OP_DETAIL(2, 0, OP_ADR_DAT_114, SPI_MEM_OP_DATA_OUT), 0, NULL)
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struct spi_nand_info {
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uint8 id[4];
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uint32 blks;
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uint32 pgs_per_blk;
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uint32 pg_size;
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uint32 oob_size;
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};
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struct spi_nand {
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struct nand_dev nand;
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struct spi_nand_info info;
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struct spi_mem_op *op_rd_cache;
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struct spi_mem_op *op_wr_cache;
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/*
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page : 2^11
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block: 2^17
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*/
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uint8_t reg_adr[DEV_REG_CNT];
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uint8_t reg_ini[DEV_REG_CNT];
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struct spi_mem *ctrl;
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};
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int sn_cmd_only(struct spi_nand *sn, uint8 cmd);
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int sn_wren(struct spi_nand *sn);
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int sn_wrdi(struct spi_nand *sn);
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int sn_rd_reg(struct spi_nand *sn, uint32 addr, uint8 *buf);
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int sn_wr_reg(struct spi_nand *sn, uint32 addr, uint8 reg);
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int sn_read_jedid(struct spi_nand *sn, uint8 *id);
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void sn_read_cache(struct spi_nand *sn, uint32 ofs, uint8 *buf, uint32 len);
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void sn_write_cache(struct spi_nand *sn, uint32 ofs, uint8 *buf, uint32 len);
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int sn_dump_pg(struct spi_nand *sn, uint32 pg);
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int sn_prog_pg(struct spi_nand *sn, uint32 pg);
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int sn_erase(struct spi_nand *sn, uint32 blk);
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int sn_init(struct spi_nand *sn);
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int spi_nand_init(struct nand_dev *nd);
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#endif
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