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Initial commit: TXW82x FPV v2.7.0.7-42229 SDK + project sources

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zouhaitao
2026-07-06 11:30:13 +08:00
commit e76462eeb7
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125
sdk/include/lib/atcmd/iot_atcmd.h Normal file
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#ifndef _TXW_IOT_ATCMD_H_
#define _TXW_IOT_ATCMD_H_
#include "basic_include.h"
#ifdef __cplusplus
extern "C" {
#endif
#define iot_atcmd_dbg(fmt, ...) //os_printf("%s:%d::"fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__)
#define iot_atcmd_err(fmt, ...) os_printf(KERN_ERR"%s:%d::"fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__)
struct iot_atcmd_link {
uint8 type: 4, parent: 4;
uint8 mode: 3, connected: 1, svr: 1, rx_pending:1;
int8 sock;
uint8 connection_cnt;
uint16 remote_port;
uint32 remote_ip;
uint32 send_len;
uint8 *rx_buff;
uint16 rx_len;
uint16 rd_off;
};
struct iot_atcmd_mgr {
uint32 uart_baudrate;
uint8 uart_databits;
uint8 uart_stopbits;
uint8 uart_parity;
uint8 uart_flowcontrol;
uint8 CIPMUX: 1, //多连接模式
CIPMODE: 1, //透传模式
CIPRECVMODE: 1 //数据接收模式: 0-主动， 1-被动
;
uint8 link_max;
uint8 cur_txlink, svr_link;
uint8 max_connection, rev;
uint16 tx_len;
struct uart_device *uart;
////////////////////////////////
struct iot_atcmd_link links[0];
};
extern struct iot_atcmd_mgr *iot_atcmd;
int32 atcmd_TEST(const char *cmd, char *argv[], uint32 count);
int32 atcmd_RESTOR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_RESET(const char *cmd, char *argv[], uint32 count);
int32 atcmd_GMR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_GSLP(const char *cmd, char *argv[], uint32 count);
int32 atcmd_ATE(const char *cmd, char *argv[], uint32 count);
int32 atcmd_UART_CUR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_UART_DEF(const char *cmd, char *argv[], uint32 count);
int32 atcmd_SLEEP(const char *cmd, char *argv[], uint32 count);
int32 atcmd_WAKEUPGPIO(const char *cmd, char *argv[], uint32 count);
int32 atcmd_RFPOWER(const char *cmd, char *argv[], uint32 count);
int32 atcmd_RFVDD(const char *cmd, char *argv[], uint32 count);
int32 atcmd_SYSRAM(const char *cmd, char *argv[], uint32 count);
int32 atcmd_SYSADC(const char *cmd, char *argv[], uint32 count);
int32 atcmd_SYSIOSETCFG(const char *cmd, char *argv[], uint32 count);
int32 atcmd_SYSIOGETCFG(const char *cmd, char *argv[], uint32 count);
int32 atcmd_SYSGPIODIR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_SYSGPIOWRITE(const char *cmd, char *argv[], uint32 count);
int32 atcmd_SYSGPIOREAD(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSTATUS(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPDOMAIN(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSTART(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSSLSIZE(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSSLCCONF(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSEND(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSENDEX(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSENDBUF(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPBUFRESET(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPBUFSTATUS(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPCHECKSEQ(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPCLOSE(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIFSR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPMUX(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSERVER(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSERVERMAXCONN(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPMODE(const char *cmd, char *argv[], uint32 count);
int32 atcmd_SAVETRANSLINK(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSTO(const char *cmd, char *argv[], uint32 count);
int32 atcmd_PING(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIUPDATE(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPDINFO(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPRECVMODE(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPRECVDATA(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPRECVLEN(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSNTPCFG(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSNTPTIME(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPDNS_CUR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPDNS_DEF(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWMODE(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWJAP(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWLAP(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWQAP(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWSAP(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWLIF(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWDHCP_CUR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWDHCP_DEF(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWDHCPS_CUR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWDHCPS_DEF(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWAUTOCONN(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSTAMAC_CUR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSTAMAC_DEF(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPAPMAC_CUR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPAPMAC_DEF(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSTA_CUR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPSTA_DEF(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPAP_CUR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CIPAP_DEF(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWHOSTNAME(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWCOUNTRY_CUR(const char *cmd, char *argv[], uint32 count);
int32 atcmd_CWCOUNTRY_DEF(const char *cmd, char *argv[], uint32 count);
#ifdef __cplusplus
}
#endif
#endif

59
sdk/include/lib/atcmd/libatcmd.h Normal file
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#ifndef _HUGEIC_ATCMD_H_
#define _HUGEIC_ATCMD_H_
#ifdef __cplusplus
extern "C" {
#endif
enum ATCMD_RESULT{
ATCMD_RESULT_ERR = -1, // 小于0，atcmd执行失败，并返回错误码, 打印"ERROR: ret = -1"
ATCMD_RESULT_OK = 0, // atcmd执行成功并退出，需要打印"OK"
ATCMD_RESULT_CONTINUE = 1, // atcmd执行成功未退出, 进入continue模式
ATCMD_RESULT_DONE = 2, // atcmd执行成功并退出，不需要打印任何信息
};
typedef void(*hgic_atcmd_outhdl)(void *priv, uint8 *data, int32 len);
typedef int32(*hgic_atcmd_hdl)(const char *cmd, char *argv[], uint32 argc);
struct atcmd_settings{
uint8 args_count, separator;
uint16 static_cmdcnt;
uint16 printbuf_size;
uint16 mute:1, rev:15;
const struct hgic_atcmd *static_atcmds;
};
struct hgic_atcmd{
const char *name;
hgic_atcmd_hdl hdl;
};
struct atcmd_dataif {
int32(*write)(struct atcmd_dataif *dataif, uint8 *buf, int32 len);
int32(*read)(struct atcmd_dataif *dataif, uint8 *buf, int32 len);
};
#define atcmd_dbg(fmt, ...) //os_printf("%s:%d::"fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__)
#define atcmd_err(fmt, ...) os_printf(fmt, ##__VA_ARGS__)
#define atcmd_resp(fmt, ...) atcmd_printf("%s:"fmt"\r\n", cmd+2, ##__VA_ARGS__)
#define atcmd_ok atcmd_printf("OK\r\n")
#define atcmd_error atcmd_printf("ERROR\r\n")
#define atcmd_query() (argc == 1 && argv[0][0] == '?')
#define atcmd_atoi(idx) (argc>(idx) ? os_atoi(argv[idx]) : 0)
int32 atcmd_init(struct atcmd_dataif *dataif, struct atcmd_settings *settings);
int32 atcmd_uart_init(uint32 uart_id, uint32 baudrate, uint8 rx_tmo, struct atcmd_settings *settings);
int32 atcmd_recv(uint8 *data, int32 len);
int32 atcmd_register(const char *cmd, hgic_atcmd_hdl hdl);
int32 atcmd_unregister(const char *cmd);
void atcmd_output(uint8 *data, int32 len);
void atcmd_output_hdl(hgic_atcmd_outhdl output, void *arg);
void atcmd_printf(const char *format, ...);
void atcmd_dumphex(char *prestr, uint8 *data, int32 len, uint8 newline);
#ifdef __cplusplus
}
#endif
#endif

213
sdk/include/lib/audio/audio_code/audio_code.h Normal file
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#ifndef _AUDIO_CODE_H_
#define _AUDIO_CODE_H_
#include "typesdef.h"
#include "osal/string.h"
#include "osal/sleep.h"
#define AUCODER_NO_RUN 0
#define AUCODER_RUN_IN_CPU0 1
#define AUCODER_RUN_IN_CPU1 2
#ifndef AAC_ENC_CTRL
#define AAC_ENC_CTRL AUCODER_NO_RUN
#endif
#ifndef AAC_DEC_CTRL
#define AAC_DEC_CTRL AUCODER_NO_RUN
#endif
#ifndef AMRNB_DEC_CTRL
#define AMRNB_DEC_CTRL AUCODER_NO_RUN
#endif
#ifndef AMRWB_DEC_CTRL
#define AMRWB_DEC_CTRL AUCODER_NO_RUN
#endif
#ifndef MP3_DEC_CTRL
#define MP3_DEC_CTRL AUCODER_NO_RUN
#endif
#ifndef ALAW_ENC_CTRL
#define ALAW_ENC_CTRL AUCODER_NO_RUN
#endif
#ifndef ALAW_DEC_CTRL
#define ALAW_DEC_CTRL AUCODER_NO_RUN
#endif
#ifndef ULAW_ENC_CTRL
#define ULAW_ENC_CTRL AUCODER_NO_RUN
#endif
#ifndef ULAW_DEC_CTRL
#define ULAW_DEC_CTRL AUCODER_NO_RUN
#endif
#ifndef OPUS_ENC_CTRL
#define OPUS_ENC_CTRL AUCODER_NO_RUN
#endif
#ifndef OPUS_DEC_CTRL
#define OPUS_DEC_CTRL AUCODER_NO_RUN
#endif
#define AUCODE_INFO os_printf
#define aucode_memcpy os_memcpy
#define aucode_memset os_memset
#define aucode_memmove os_memmove
#define AUCODE_OK 0
#define AUCODE_ERR -1
#define MAX_AUCODER_NUM 10
#if OPUS_ENC_CTRL
#define AUCODE_STACK_SIZE 10240
#elif OPUS_DEC_CTRL
#define AUCODE_STACK_SIZE 4096
#else
#define AUCODE_STACK_SIZE 0
#endif
enum {
AAC_ENC = 1,
AAC_DEC,
AMRNB_DEC,
AMRWB_DEC,
MP3_DEC,
ALAW_ENC,
ALAW_DEC,
ULAW_ENC,
ULAW_DEC,
OPUS_ENC,
OPUS_DEC,
};
enum {
codec_start = BIT(0),
codec_finish = BIT(1),
coder_close = BIT(2),
coder_exit = BIT(3),
decode_plc = BIT(4),
};
typedef struct {
void *coder;
void *priv;
uint8_t coder_type;
uint8_t fade_type;
uint32_t frame_nsamples;
} AUCODE_HDL;
typedef struct {
int32_t frame_bytes;
uint32_t samplerate;
uint32_t channels;
} AUCODE_FRAME_INFO;
typedef int32_t (*audio_encode_func)(void *coder, int16_t *in_data, uint32_t samples, uint8_t *out_data);
typedef int32_t (*audio_decode_func)(void *coder, uint8_t *in_data, uint32_t bytes, int16_t *out_data, AUCODE_FRAME_INFO *frame_info);
typedef int32_t (*decode_plc_func)(void *coder, int16_t *out_data, uint32_t samples);
typedef int32_t (*aucoder_close_func)(void *coder);
typedef void *(*AUCODE_MALLOC)(int size);
typedef void *(*AUCODE_ZALLOC)(int size);
typedef void *(*AUCODE_CALLOC)(int nmemb, int size);
typedef void *(*AUCODE_REALLOC)(void *ptr, int size);
typedef void (*AUCODE_FREE)(void *ptr);
typedef struct {
void *coder;
void *in_data;
void *out_data;
uint32_t nbytes;
uint32_t nsamples;
uint32_t coder_state;
int32_t ret;
AUCODE_FRAME_INFO *frame_info;
audio_encode_func encode_func;
audio_decode_func decode_func;
decode_plc_func plc_func;
aucoder_close_func close_func;
} RPC_AUCODE_STRUCT;
typedef struct {
void *task_hdl;
int8_t *stack_priv;
uint32_t used_size;
uint32_t total_size;
uint32_t state;
uint32_t coder_num;
uint32_t rpc_coder_num;
uint32_t stack_used_num;
RPC_AUCODE_STRUCT *rpc_aucode_s[MAX_AUCODER_NUM];
} AUCODE_MANAGE;
extern AUCODE_MANAGE *g_aucode_manage;
extern AUCODE_MALLOC aucode_malloc;
extern AUCODE_ZALLOC aucode_zalloc;
extern AUCODE_CALLOC aucode_calloc;
extern AUCODE_REALLOC aucode_realloc;
extern AUCODE_FREE aucode_free;
extern void reg_aucoder_alloc(AUCODE_MALLOC m, AUCODE_ZALLOC z, AUCODE_CALLOC c, AUCODE_REALLOC r, AUCODE_FREE f);
extern void aucode_mutex_init(void);
extern void *aucode_stack_alloc(uint32_t size);
extern void aucode_stack_free(void *ptr);
extern AUCODE_HDL *audio_coder_open(uint32_t coder, uint32_t samplerate, uint32_t channel);
extern int32_t audio_encoder_set_bitrate(AUCODE_HDL *aucode_hdl, uint32_t bitrate);
extern int32_t audio_encode_data(AUCODE_HDL *aucode_hdl, int16_t *in_data, uint32_t samples, uint8_t *out_data);
extern int32_t audio_decode_fade_in(AUCODE_HDL *aucode_hdl);
extern int32_t audio_decode_fade_out(AUCODE_HDL *aucode_hdl);
extern int32_t audio_decode_data(AUCODE_HDL *aucode_hdl, uint8_t *in_data, uint32_t bytes, int16_t *out_data, AUCODE_FRAME_INFO *frame_info);
extern int32_t audio_decode_output_mute(AUCODE_HDL *aucode_hdl, int16_t *out_data);
extern int32_t audio_decode_do_plc(AUCODE_HDL *aucode_hdl, int16_t *out_data);
extern void audio_coder_close(AUCODE_HDL *aucode_hdl);
extern void *aac_encoder_open(uint32_t samplerate, uint32_t channel);
extern void *aac_decoder_open(void);
extern void *amrnb_decoder_open(void);
extern void *amrnb_decoder_open(void);
extern void *mp3_decoder_open(void);
extern void *alaw_encoder_open(void);
extern void *alaw_decoder_open(void);
extern void *ulaw_encoder_open(void);
extern void *ulaw_decoder_open(void);
extern void *opus_encoder_open(uint32_t samplerate, uint32_t channel);
extern void *opus_decoder_open(uint32_t samplerate, uint32_t channel);
extern int32_t opus_encoder_set_bitrate(void *coder, uint32_t bitrate);
extern int32_t aac_encode_data(void *coder, int16_t *in_data, uint32_t samples, uint8_t *out_data);
extern int32_t alaw_encode_data(void *coder, int16_t *in_data, uint32_t samples, uint8_t *out_data);
extern int32_t ulaw_encode_data(void *coder, int16_t *in_data, uint32_t samples, uint8_t *out_data);
extern int32_t opus_encode_data(void *coder, int16_t *in_data, uint32_t samples, uint8_t *out_data);
extern int32_t aac_decode_data(void *coder, uint8_t *in_data, uint32_t bytes, int16_t *out_data, AUCODE_FRAME_INFO *frame_info);
extern int32_t amrnb_decode_data(void *coder, uint8_t *in_data, uint32_t bytes, int16_t *out_data, AUCODE_FRAME_INFO *frame_info);
extern int32_t amrwb_decode_data(void *coder, uint8_t *in_data, uint32_t bytes, int16_t *out_data, AUCODE_FRAME_INFO *frame_info);
extern int32_t mp3_decode_data(void *coder, uint8_t *in_data, uint32_t bytes, int16_t *out_data, AUCODE_FRAME_INFO *frame_info);
extern int32_t alaw_decode_data(void *coder, uint8_t *in_data, uint32_t bytes, int16_t *out_data, AUCODE_FRAME_INFO *frame_info);
extern int32_t ulaw_decode_data(void *coder, uint8_t *in_data, uint32_t bytes, int16_t *out_data, AUCODE_FRAME_INFO *frame_info);
extern int32_t opus_decode_data(void *coder, uint8_t *in_data, uint32_t bytes, int16_t *out_data, AUCODE_FRAME_INFO *frame_info);
extern int32_t opus_decode_plc(void *coder, int16_t *out_data, uint32_t samples);
extern int32_t aac_encoder_close(void *coder);
extern int32_t aac_decoder_close(void *coder);
extern int32_t amrnb_decoder_close(void *coder);
extern int32_t amrwb_decoder_close(void *coder);
extern int32_t mp3_decoder_close(void *coder);
extern int32_t opus_encoder_close(void *coder);
extern int32_t opus_decoder_close(void *coder);
extern void *aac_encoder_open_rpc(uint32_t samplerate, uint32_t channel);
extern void *aac_decoder_open_rpc(void);
extern void *amrnb_decoder_open_rpc(void);
extern void *amrwb_decoder_open_rpc(void);
extern void *mp3_decoder_open_rpc(void);
extern void *alaw_encoder_open_rpc(void);
extern void *alaw_decoder_open_rpc(void);
extern void *ulaw_encoder_open_rpc(void);
extern void *ulaw_decoder_open_rpc(void);
extern void *opus_encoder_open_rpc(uint32_t samplerate, uint32_t channel);
extern void *opus_decoder_open_rpc(uint32_t samplerate, uint32_t channel);
extern int32_t opus_encoder_set_bitrate_rpc(void *coder, uint32_t bitrate);
extern int32_t audio_encode_data_rpc(void *coder, int16_t *in_data, uint32_t samples, uint8_t *out_data, int32_t *enc_bytes);
extern int32_t audio_decode_data_rpc(void *coder, uint8_t *in_data, uint32_t bytes, int16_t *out_data, AUCODE_FRAME_INFO *frame_info, int32_t *dec_samples);
extern int32_t audio_decode_plc_rpc(void *coder, int16_t *out_data, uint32_t samples, int32_t *dec_samples);
extern int32_t audio_coder_close_rpc(void *coder);
extern int32_t audio_coder_run(AUCODE_MANAGE *aucode_manage);
extern int32_t audio_coder_run_rpc(AUCODE_MANAGE *aucode_manage);
#endif

92
sdk/include/lib/audio/audio_proc/audio_proc.h Normal file
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#ifndef _AUDIO_PROCESS_CTRL_H_
#define _AUDIO_PROCESS_CTRL_H_
#include "typesdef.h"
#include "osal/string.h"
#define AUPROC_STACK_SIZE 5120
#define ANF_PROCESSING 0
#define AEC_PROCESSING 1
#define AHS_PROCESSING 1
#define ANS_PROCESSING 1
#define RES_PROCESSING 1
typedef void *(*AUPROC_MALLOC)(int size);
typedef void *(*AUPROC_ZALLOC)(int size);
typedef void *(*AUPROC_CALLOC)(int nmemb, int size);
typedef void *(*AUPROC_REALLOC)(void *ptr, int size);
typedef void (*AUPROC_FREE)(void *ptr);
extern volatile AUPROC_MALLOC auproc_malloc;
extern volatile AUPROC_ZALLOC auproc_zalloc;
extern volatile AUPROC_CALLOC auproc_calloc;
extern volatile AUPROC_REALLOC auproc_realloc;
extern volatile AUPROC_FREE auproc_free;
enum {
TYPE_VOICE_ONLY,
TYPE_MUSIC_ONLY,
TYPE_HYBRID,
};
typedef struct {
int8_t *stack_priv;
uint32_t used_size;
uint32_t total_size;
} AUPROC_STACK;
typedef struct {
uint32_t samplerate;
uint32_t channels;
uint32_t near_discard_ms;
uint32_t far_discard_ms;
uint32_t rand_seed;
float cosTable[256];
float sinTable[256];
float *time_inputbuf;
float *last_freq_buf;
int16_t *overlap_buf;
float *last_magn;
float *filter_w;
struct domainTrans_struct *domainTrans_s;
void *anf;
void *aec;
void *ahs;
void *ans;
void *vad;
void *agc;
void *res;
float *noiseEsit;
} AUPROC_HDL;
AUPROC_HDL *audio_process_init(uint32_t samplerate, uint32_t channels, uint32_t frame_size);
int32_t audio_process_data(AUPROC_HDL *auproc_hdl, int16_t *data, uint32_t nsamples);
int32_t audio_process_fardata(AUPROC_HDL *auproc_hdl, int16_t *data, uint32_t nsamples);
int32_t audio_resample_config(AUPROC_HDL *auproc_hdl, uint32_t src_samplerate, uint32_t dest_samplerate);
int32_t audio_resample_data(AUPROC_HDL *auproc_hdl, int16_t *in_data, uint32_t in_size, int16_t *out_data, uint32_t *out_size);
int32_t audio_process_deinit(AUPROC_HDL *auproc_hdl);
void reg_auproc_alloc(AUPROC_MALLOC m, AUPROC_ZALLOC z, AUPROC_CALLOC c, AUPROC_REALLOC r, AUPROC_FREE f);
void *auproc_stack_alloc(uint32_t size);
void auproc_stack_free(void *ptr);
AUPROC_HDL *audio_process_open(uint32_t samplerate, uint32_t channels, uint32_t frame_size);
int32_t audio_process_prepare(AUPROC_HDL *auproc_hdl);
int32_t audio_process(AUPROC_HDL *auproc_hdl, int16_t *data, uint32_t size);
int32_t audio_process_put_fardata(AUPROC_HDL *auproc_hdl, int16_t *data, uint32_t size);
int32_t audio_resample_reconfig(AUPROC_HDL *auproc_hdl, uint32_t src_samplerate, uint32_t dest_samplerate);
int32_t audio_resample(AUPROC_HDL *auproc_hdl, int16_t *in_data, uint32_t in_size, int16_t *out_data, uint32_t *out_size);
int32_t audio_process_close(AUPROC_HDL *auproc_hdl);
int32_t auproc_attach_anf(AUPROC_HDL * auproc_hdl);
int32_t auproc_attach_aec(AUPROC_HDL * auproc_hdl);
int32_t auproc_attach_ahs(AUPROC_HDL * auproc_hdl, uint8_t mode);
int32_t auproc_attach_ans(AUPROC_HDL * auproc_hdl, uint8_t mode);
int32_t auproc_attach_res(AUPROC_HDL * auproc_hdl);
#endif

22
sdk/include/lib/audio/ring_buffer/ring_buffer.h Normal file
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#ifndef _RING_BUFFER_H_
#define _RING_BUFFER_H_
typedef struct RINGBUF {
uint8_t *data;
uint32_t front;
uint32_t rear;
uint32_t elementsize;
uint32_t elementcount;
} RINGBUF;
RINGBUF *ringbuf_Init(uint8_t elementsize, uint32_t elementcount);
int32_t ringbuf_read_available(RINGBUF *ringbuf);
int32_t ringbuf_write_available(RINGBUF *ringbuf);
int32_t ringbuf_read(RINGBUF *ringbuf, void *data, uint32_t elementcount);
int32_t ringbuf_write(RINGBUF *ringbuf, void *data, uint32_t elementcount);
int32_t ringbuf_move_readptr(RINGBUF *ringbuf, int32_t elementcount);
int32_t ringbuf_read_nomove(RINGBUF *ringbuf, void *data, uint32_t elementcount);
void ringbuf_clean(RINGBUF *ringbuf);
void ringbuf_del(RINGBUF *ringbuf);
#endif

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#ifndef _UAC_HOST_H_
#define _UAC_HOST_H_
#include "basic_include.h"
#include "hal/usb_device.h"
typedef struct{
struct list_head list;
uint8 *data_addr; //当前写入数据的地址
uint32 data_len;
uint32 respace_len;
uint32 offset;
uint8 sta;
}UAC_MANAGE;
typedef void (*usbh_audio_spk_tx)(void * p_dev, uint8_t ep, uint8_t *data, uint32_t len);
void del_usbmic_frame(UAC_MANAGE *uac_manage);
void del_usbspk_frame(UAC_MANAGE *uac_manage);
UAC_MANAGE *get_usbmic_frame(void);
UAC_MANAGE *get_usbspk_new_frame(uint8 grab);
uint32 get_uac_frame_datalen(UAC_MANAGE *uac_manage);
uint8 *get_uac_frame_data(UAC_MANAGE *uac_manage);
void set_uac_frame_datalen(UAC_MANAGE *uac_manage, uint32 len);
void put_usbspk_frame_to_use(UAC_MANAGE *uac_manage);
void set_uac_frame_sta(UAC_MANAGE *uac_manage, uint8 sta);
void usbspk_room_init(uint32_t empty_buf_len);
void usbmic_room_init(void);
void usbmic_room_del(void);
void usbspk_room_del(void);
void uac_stop(void);
void force_reset_usbmic_frame();
void force_reset_usbspk_frame();
int usbmic_deal(struct usb_device *p_dev, uint8_t* rx_buff);
void usbspk_tx(struct usb_device *p_dev, uint8_t ep, uint32_t len, usbh_audio_spk_tx func);
#endif

89
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#ifndef _WSOLA_PROCESS_H_
#define _WSOLA_PROCESS_H_
#include "typesdef.h"
#include "osal/string.h"
#include "lib/audio/ring_buffer/ring_buffer.h"
typedef void *(*WSOLA_MALLOC)(int size);
typedef void *(*WSOLA_ZALLOC)(int size);
typedef void *(*WSOLA_CALLOC)(int nmemb, int size);
typedef void *(*WSOLA_REALLOC)(void *ptr, int size);
typedef void (*WSOLA_FREE)(void *ptr);
extern WSOLA_MALLOC wsola_malloc;
extern WSOLA_ZALLOC wsola_zalloc;
extern WSOLA_CALLOC wsola_calloc;
extern WSOLA_REALLOC wsola_realloc;
extern WSOLA_FREE wsola_free;
typedef struct {
RINGBUF *input_ringbuf;
RINGBUF *output_ringbuf;
int16_t *input_buf;
int16_t *output_buf;
int16_t *downsample_buf;
int16_t *pitch_buf;
int32_t max_required;
int32_t max_period_nsamples;
int32_t min_period_nsamples;
int32_t prev_period_nsamples;
int32_t prev_min_diff;
float pitch;
float speed;
float persample_time;
float input_playtime;
float time_err;
int32_t input_nsamples;
int32_t output_nsamples;
int32_t pitch_nsamples;
int32_t reserve_nsamples;
int32_t old_rate_position;
int32_t new_rate_position;
uint32_t input_buf_size;
uint32_t output_buf_size;
uint32_t downsample_buf_size;
uint32_t pitch_buf_size;
uint32_t samplerate;
uint32_t channels;
}WsolaStream;
void reg_wsola_alloc(WSOLA_MALLOC m, WSOLA_ZALLOC z, WSOLA_CALLOC c, WSOLA_REALLOC r, WSOLA_FREE f);
WsolaStream *wsolaStream_init(uint32_t samplerate, uint32_t channels, float speed, float pitch,
uint32_t max_input_nsamples, uint32_t max_output_nsamples);
int32_t wsolaStream_input_data(WsolaStream* stream, int16_t *data, uint32_t nsamples);
int32_t wsolaStream_output_data(WsolaStream* stream, int16_t *data, uint32_t max_nsamples);
int32_t wsolaStream_input_available(WsolaStream* stream);
int32_t wsolaStream_output_available(WsolaStream* stream);
void wsolaStream_set_pitch(WsolaStream* stream, float pitch);
void wsolaStream_set_speed(WsolaStream* stream, float speed);
float wsolaStream_get_pitch(WsolaStream* stream);
float wsolaStream_get_speed(WsolaStream* stream);
uint32_t wsolaStream_get_sampleRate(WsolaStream *stream);
void wsolaStream_clean(WsolaStream* stream);
int32_t wsolaStream_flush(WsolaStream* stream);
void wsolaStream_deinit(WsolaStream *stream);
WsolaStream *wsola_stream_init(uint32_t samplerate, uint32_t channels,
uint32_t max_input_nsamples, uint32_t max_output_nsamples);
int32_t wsola_stream_write_data(WsolaStream* stream, int16_t *data, uint32_t nsamples);
int32_t wsola_stream_read_data(WsolaStream* stream, int16_t *data, uint32_t max_nsamples);
int32_t wsola_stream_write_available(WsolaStream* stream);
int32_t wsola_stream_read_available(WsolaStream* stream);
void wsola_stream_set_pitch(WsolaStream* stream, float pitch);
void wsola_stream_set_speed(WsolaStream* stream, float speed);
float wsola_stream_get_pitch(WsolaStream* stream);
float wsola_stream_get_speed(WsolaStream* stream);
uint32_t wsola_stream_get_samplerate(WsolaStream *stream);
void wsola_stream_clean(WsolaStream* stream);
int32_t wsola_stream_flush(WsolaStream *stream);
void wsola_stream_deinit(WsolaStream *stream);
#endif

99
sdk/include/lib/bluetooth/hci/hci_controller.h Normal file
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#ifndef _HCI_CONTROLLER_H_
#define _HCI_CONTROLLER_H_
#include "basic_include.h"
#include "lib/skb/skb.h"
#include "lib/lmac/lmac_def.h"
#ifdef __cplusplus
extern "C" {
#endif
enum BLE_LL_TYPE {
BLE_LL_TYPE_ADV_TRX = 0x0,
BLE_LL_TYPE_ADV_CUSTOM,
BLE_LL_TYPE_CONNECT,
};
enum BLE_LL_EVENT {
BLE_LL_EVENT_CONNECTED = 0x1,
BLE_LL_EVENT_DISCONNECTED,
BLE_LL_EVENT_EXCHANGE_LEHGTH,
};
enum BLE_LL_IOCTL {
BLE_IOCTL_SET_DEV_ADDR = 1,
BLE_IOCTL_SET_ADV_DATA = 2,
BLE_IOCTL_SET_SCAN_RESP = 3,
BLE_IOCTL_SET_ADV_INTERVAL = 4,
BLE_IOCTL_SET_ADV_EN = 5,
BLE_IOCTL_SET_ADV_TYPE_FILTER = 6,
BLE_IOCTL_GET_PERR_ADDRTYPE = 7,
BLE_IOCTL_GET_PERR_ADDR = 8,
BLE_IOCTL_GET_CONN_INTERVAL = 9,
BLE_IOCTL_GET_CONN_LATENCY = 10,
BLE_IOCTL_GET_SUPERVISION_TIMEOUT = 11,
BLE_IOCTL_SET_COEXIST_EN = 12,
BLE_IOCTL_GET_COEXIST_CRASH = 13,
BLE_IOCTL_SET_LL_LENGTH = 14,
BLE_IOCTL_SET_DISCONNECT = 15,
BLE_IOCTL_GET_RSSI = 16,
BLE_IOCTL_GET_BLE_EN = 17,
};
struct bt_rx_info {
uint8 channel; //current channel
uint8 con_handle; //hci handle
int8 rssi;
uint8 frm_type;
uint32 rev;
};
struct bt_tx_info {
uint16 con_handle; //hci handle
uint8 data_type; //hci type
uint8 r1;
};
struct bt_ops {
void *priv;
void *lops;
uint8 headroom, tailroom;
int32(*open)(struct bt_ops *ops, uint8 type, uint8 chan);
int32(*close)(struct bt_ops *ops);
int32(*tx)(struct bt_ops *ops, struct sk_buff *skb);
int32(*tx_status)(void *priv, struct sk_buff *skb);
int32(*rx)(void *priv, struct sk_buff *skb);
int32(*ioctl)(struct bt_ops *ops, uint32 cmd, uint32 param1, uint32 param2);
int32(*event)(void *priv, uint32 event_id, uint32 param1, uint32 param2);
};
#define ble_ll_open(ops, type, chan) ops->open(ops, type, chan)
#define ble_ll_close(ops) ops->close(ops)
#define ble_ll_set_advdata(ops, data, len) ops->ioctl(ops, BLE_IOCTL_SET_ADV_DATA, (uint32)(data), (len))
#define ble_ll_set_scan_rsp(ops, data, len) ops->ioctl(ops, BLE_IOCTL_SET_SCAN_RESP, (uint32)(data), (len))
#define ble_ll_set_devaddr(ops, addr) ops->ioctl(ops, BLE_IOCTL_SET_DEV_ADDR, (uint32)(addr), 0)
#define ble_ll_set_adv_interval(ops, interval) ops->ioctl(ops, BLE_IOCTL_SET_ADV_INTERVAL, (uint32)(interval), 0)
#define ble_ll_set_adv_en(ops, en) ops->ioctl(ops, BLE_IOCTL_SET_ADV_EN, (uint32)(en), 0)
#define ble_ll_set_adv_type_filter(ops, type) ops->ioctl(ops, BLE_IOCTL_SET_ADV_TYPE_FILTER, (uint32)(type), 0)
#define ble_ll_get_peer_addr(ops, hdl) ops->ioctl(ops, BLE_IOCTL_GET_PERR_ADDR, (uint32)(hdl), 0)
#define ble_ll_get_peer_addrtype(ops, hdl) ops->ioctl(ops, BLE_IOCTL_GET_PERR_ADDRTYPE, (uint32)(hdl), 0)
#define ble_ll_get_conn_interval(ops, hdl) ops->ioctl(ops, BLE_IOCTL_GET_CONN_INTERVAL, (uint32)(hdl), 0)
#define ble_ll_get_conn_latency(ops, hdl) ops->ioctl(ops, BLE_IOCTL_GET_CONN_LATENCY, (uint32)(hdl), 0)
#define ble_ll_get_supervision_timeout(ops, hdl) ops->ioctl(ops, BLE_IOCTL_GET_SUPERVISION_TIMEOUT, (uint32)(hdl), 0)
#define ble_ll_set_coexist_en(ops, coexist_en, duty_en) ops->ioctl(ops, BLE_IOCTL_SET_COEXIST_EN, (uint32)(coexist_en), (uint32)(duty_en))
#define ble_ll_get_coexist_crash(ops) ops->ioctl(ops, BLE_IOCTL_GET_COEXIST_CRASH, 0, 0)
#define ble_ll_set_ll_length(ops, length) ops->ioctl(ops, BLE_IOCTL_SET_LL_LENGTH, length, 0)
#define ble_ll_set_disconnect(ops) ops->ioctl(ops, BLE_IOCTL_SET_DISCONNECT, 0, 0)
#define ble_ll_get_rssi(ops) ops->ioctl(ops, BLE_IOCTL_GET_RSSI, 0, 0)
#define ble_ll_get_ble_en(ops) ops->ioctl(ops, BLE_IOCTL_GET_BLE_EN, 0, 0)
struct bt_ops *ble_ll_init(struct lmac_ops *ops);
int32 bt_hci_init(struct bt_ops *btops);
#ifdef __cplusplus
}
#endif
#endif

49
sdk/include/lib/bluetooth/hci/hci_host.h Normal file
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#ifndef _UBLE_HCI_HOST_H_
#define _UBLE_HCI_HOST_H_
#include "basic_include.h"
#ifdef __cplusplus
extern "C" {
#endif
struct hci_data {
uint8 type;
uint8 *data;
uint32 len;
};
struct bt_rx_info {
uint8 channel; //current channel
uint8 con_handle; //hci handle
int8 rssi;
uint8 frm_type;
uint32 rev;
};
struct bt_tx_info {
uint16 con_handle; //hci handle
uint8 data_type; //hci type
uint8 r1;
};
int32 bt_hci_tx_acl_data(uint8 *data, uint32 len);
int32 bt_hci_tx_adv_data(uint8 *data, uint32 len);
int32 bt_hci_set_mode(uint8 mode, uint8 chan);
int32 bt_hci_set_advdata(uint8 *data, uint32 data_len);
int32 bt_hci_set_scan_rsp(uint8 *data, uint32 data_len);
int32 bt_hci_set_devaddr(uint8 *addr);
int32 bt_hci_set_adv_interval(uint32 interval);
int32 bt_hci_set_adv_en(uint8 enable);
int32 bt_hci_set_adv_type_filter(uint8 type);
int32 bt_hci_set_coexist_en(uint8 coexist_en, uint8 duty_en);
int32 bt_hci_set_ll_length(uint16 length);
#ifdef __cplusplus
}
#endif
#endif

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sdk/include/lib/bluetooth/hci/hci_transport_rpc.h Normal file
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#ifndef HCI_TRANSPORT_RPC_H
#define HCI_TRANSPORT_RPC_H
#include "basic_include.h"
#if defined __cplusplus
extern "C" {
#endif
int32 hci_controller_recv(uint32 data, uint32 len);
int32 hci_host_recv(uint32 data, uint32 len);
/* API_END */
#if defined __cplusplus
}
#endif
#endif // HCI_TRANSPORT_RPC_H

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sdk/include/lib/bluetooth/uble/ble_adv.h Normal file
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#ifndef _BLE_ADV_H_
#define _BLE_ADV_H_
#ifdef __cplusplus
extern "C" {
#endif
// 自定义协议
#define ADV_DISCOVER_TYPE (6) // 广播包类型（可过滤广播包）
#define ADV_MANUFACTURER_ID (0x4104) // 生产厂商ID（可做识别头信息）
#define ADV_DATA_MAX_LEN (39) // 广播最大长度（header+payload）
#define RX_DATA_MAX_LEN (256) // 接收数据总长度（id+len+data）
#define ADV_IDENTIFY_MAX_LEN (24) // 识别头最大长度
#define ADV_IDENTIFY_SET_LEN (8) // 识别头设置长度(0~23)
#define ADV_MAX_SECTION_LEN (16) // 广播发送数据段最大长度
typedef struct ble_pro_str {
uint32 cur_tsf;
uint32 next_tsf;
uint32 cur_interval_tsf;
uint32 next_interval_tsf;
uint32 sync_tsf;
uint8 sync_tsf_en;
}TYPE_STRUCT_BLE_CTRL;
struct ble_adv_info {
union HEADER_INFO {
struct {
uint16 pdu_type : 4, // bit0:3
reserved0 : 1, // bit4
chn_sel : 1, // bit5
tx_add : 1, // bit6
rx_add : 1, // bit7
length : 8; // bit8:15
};
uint16 header;
} header_info;
union PAYLOAD_INFO {
struct {
uint8 addr[6];
uint8 ad_len;
uint8 ad_type;
uint16 manufacturer_id;
#if (ADV_IDENTIFY_SET_LEN > 0 && ADV_IDENTIFY_SET_LEN < ADV_IDENTIFY_MAX_LEN)
uint8 identify_info[ADV_IDENTIFY_SET_LEN];
#endif
uint8 section_num;
uint8 section_idx;
uint8 byte_len;
#if (ADV_IDENTIFY_SET_LEN > 0 && ADV_IDENTIFY_SET_LEN < ADV_IDENTIFY_MAX_LEN)
uint8 data[24-ADV_IDENTIFY_SET_LEN];
#else
uint8 data[24];
#endif
};
uint8 payload[37];
} payload_info;
}__attribute__((packed));
struct ble_adv_process {
uint8 start_flag;
uint16 section_num;
uint16 section_idx;
uint16 byte_offset_len;
uint16 rec_overtime; // 广播接收超时时间,根据不同包数来定义超时时间
uint32 cur_tick;
uint16 len;
uint8 data[RX_DATA_MAX_LEN];
};
struct ble_rx_ctrl {
struct ble_adv_info adv_info; // 广播包数据
struct ble_adv_process adv_pro; // 数据处理
};
int32 ble_adv_rx_data(uint8 *data, uint32 len);
int32 ble_adv_tx_data(uint8 *data, int32 len);
int32 ble_adv_ctrl_create(void);
int32 ble_adv_ctrl_destory(void);
#ifdef __cplusplus
}
#endif
#endif

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/**
******************************************************************************
* @file sdk\include\lib\bluetooth\uble
* @author TAIXIN-SEMI Application Team
* @version V2.0.0
* @date 03-07-2025
* @brief This file contains three BLE configuration network features.
******************************************************************************
* @attention
*
* COPYRIGHT 2023 TAIXIN-SEMI
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef _BLE_DEMO_H_
#define _BLE_DEMO_H_
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "lib/bluetooth/hci/hci_host.h"
#include "lib/bluetooth/uble/uble.h"
#include "lib/bluetooth/uble/ble_adv.h"
enum switch_type
{
WIRELESS_WIFI,
WIRELESS_BLE,
};
void ble_adv_parse_param(uint8 *data, uint32 len);
int32 ble_demo_init(void);
int32 ble_set_mode(uint8 mode, uint8 chan);
int32 ble_set_coexist_en(uint8 coexist, uint8 dec_duty);
#ifdef __cplusplus
}
#endif
#endif
/*************************** (C) COPYRIGHT 2023 TAIXIN-SEMI ***** END OF FILE *****/

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#ifndef _HGIC_UBLE_H_
#define _HGIC_UBLE_H_
#include "basic_include.h"
#ifdef __cplusplus
extern "C" {
#endif
#define uble_dbg(fmt, ...) os_printf(KERN_DEBUG"%s:%d::"fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__)
#define uble_err(fmt, ...) os_printf(KERN_ERR"%s:%d::"fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__)
#define UBLE_GATT_CHARAC_BROADCAST (0x01)
#define UBLE_GATT_CHARAC_READ (0x02)
#define UBLE_GATT_CHARAC_WRITE_WITHOUT_RESPONSE (0x04)
#define UBLE_GATT_CHARAC_WRITE (0x08)
#define UBLE_GATT_CHARAC_NOTIFY (0x10)
#define UBLE_GATT_CHARAC_INDICATE (0x20)
#define UBLE_GATT_CHARAC_AUTHENTICATED_SIGNED_WRITES (0x40)
#define UBLE_GATT_CHARAC_EXTENDED_PROPERTIES (0x80)
#define UBLE_ATT_ERR_INVALID_HANDLE 0x01
#define UBLE_ATT_ERR_READ_NOT_PERMITTED 0x02
#define UBLE_ATT_ERR_WRITE_NOT_PERMITTED 0x03
#define UBLE_ATT_ERR_INVALID_PDU 0x04
#define UBLE_ATT_ERR_INSUFFICIENT_AUTHEN 0x05
#define UBLE_ATT_ERR_REQ_NOT_SUPPORTED 0x06
#define UBLE_ATT_ERR_INVALID_OFFSET 0x07
#define UBLE_ATT_ERR_INSUFFICIENT_AUTHOR 0x08
#define UBLE_ATT_ERR_PREPARE_QUEUE_FULL 0x09
#define UBLE_ATT_ERR_ATTR_NOT_FOUND 0x0a
#define UBLE_ATT_ERR_ATTR_NOT_LONG 0x0b
#define UBLE_ATT_ERR_INSUFFICIENT_KEY_SZ 0x0c
#define UBLE_ATT_ERR_INVALID_ATTR_VALUE_LEN 0x0d
#define UBLE_ATT_ERR_UNLIKELY 0x0e
#define UBLE_ATT_ERR_INSUFFICIENT_ENC 0x0f
#define UBLE_ATT_ERR_UNSUPPORTED_GROUP 0x10
#define UBLE_ATT_ERR_INSUFFICIENT_RES 0x11
#define UBLE_OPCODE_ATT_ERROR (0x01)
#define UBLE_OPCODE_EXCHANGE_MTU_REQ (0x02)
#define UBLE_OPCODE_EXCHANGE_MTU_RSP (0x03)
#define UBLE_OPCODE_FIND_INFORMATION_REQ (0x04)
#define UBLE_OPCODE_FIND_INFORMATION_RSP (0x05)
#define UBLE_OPCODE_FIND_BY_TYPE_VALUE_REQ (0x06)
#define UBLE_OPCODE_FIND_BY_TYPE_VALUE_RESP (0x07)
#define UBLE_OPCODE_READ_BY_TYPE_REQ (0x08)
#define UBLE_OPCODE_READ_BY_TYPE_RSP (0x09)
#define UBLE_OPCODE_READ_REQ (0x0A)
#define UBLE_OPCODE_READ_RSP (0x0B)
#define UBLE_OPCODE_READ_BLOB_REQ (0x0C)
#define UBLE_OPCODE_READ_MULTIPLE_REQ (0x0e)
#define UBLE_OPCODE_READ_MULTIPLE_RESP (0x0f)
#define UBLE_OPCODE_READ_BY_GROUP_TYPE_REQ (0x10)
#define UBLE_OPCODE_READ_BY_GROUP_TYPE_RSP (0x11)
#define UBLE_OPCODE_WRITE_REQ (0x12)
#define UBLE_OPCODE_WRITE_RESP (0x13)
#define UBLE_OPCODE_PREPARE_WRITE_REQ (0x16)
#define UBLE_OPCODE_EXECUTE_WRITE_REQ (0x18)
#define UBLE_OPCODE_EXECUTE_WRITE_RESP (0x19)
#define UBLE_OPCODE_HANDLE_VALUE_NOTIFY (0x1B)
#define UBLE_OPCODE_HANDLE_VALUE_INDICATION (0x1D)
#define UBLE_OPCODE_HANDLE_VALUE_CONFIRM (0x1E)
#define UBLE_OPCODE_WRITE_CMD (0x52)
#define UBLE_OPCODE_SIGNED_WRITE_CMD (0xD2)
enum UBLE_VALUE_TYPE {
UBLE_VALUE_TYPE_UINT8,
UBLE_VALUE_TYPE_UINT16,
UBLE_VALUE_TYPE_UINT32,
UBLE_VALUE_TYPE_UINT8_BIT,
UBLE_VALUE_TYPE_UINT16_BIT,
UBLE_VALUE_TYPE_UINT32_BIT,
UBLE_VALUE_TYPE_BYTES,
UBLE_VALUE_TYPE_STRING,
UBLE_VALUE_TYPE_HDL,
};
struct uble_value_entry {
uint8 type, bitoff;
uint16 maskbit;
uint32 size;
void *value;
};
#if UBLE_UUID_128_SUPPORT
struct uble_gatt_data {
union{
uint16 att_type;
uint8 att_type_128[16];
};
uint16 properties;
union{
uint32 att_value; /*value att_type or uble_value_entry*/
uint8 att_value_128[16];
};
};
#else
struct uble_gatt_data {
uint16 att_type, properties;
uint32 att_value; /*value att_type or uble_value_entry*/
};
#endif
typedef int32(*uble_gatt_valhdl)(const struct uble_value_entry *entry, uint8 read, uint8 *buff, int32 size, uint32 offset);
extern int32 uble_init(const struct uble_gatt_data *att_table, uint16 att_table_size, uint16 att_mtu, void *adv_rx);
// att_hdl: the CHARACTER_VALUE's handle that has Notify properties.
extern int32 uble_gatt_notify(uint16 att_hdl, uint8 *data, int32 len);
// att_hdl: the CHARACTER_VALUE's handle that has Indicate properties.
extern int32 uble_gatt_indicate(uint16 att_hdl, uint8 *data, int32 len);
// query att_hdl by uuid.
// args:
// uuid: short number, e.g: 0x2b10, 'size' must is 16.
// uuid: uint8 pointer, e.g: uint8 uuid_128[16], 'size' must is 128.
extern int32 uble_uuid_2hdl(uint32 uuid, uint8 size);
/*
0x1800 Generic Access service
0x1801 Generic Attribute service
0x1802 Immediate Alert service
0x1803 Link Loss service
0x1804 Tx Power service
0x1805 Current Time service
0x1806 Reference Time Update service
0x1807 Next DST Change service
0x1808 Glucose service
0x1809 Health Thermometer service
0x180A Device Information service
0x180D Heart Rate service
0x180E Phone Alert Status service
0x180F Battery service
0x1810 Blood Pressure service
0x1811 Alert Notification service
0x1812 Human Interface Device service
0x1813 Scan Parameters service
0x1814 Running Speed and Cadence service
0x1815 Automation IO service
0x1816 Cycling Speed and Cadence service
0x1818 Cycling Power service
0x1819 Location and Navigation service
0x181A Environmental Sensing service
0x181B Body Composition service
0x181C User Data service
0x181D Weight Scale service
0x181E Bond Management service
0x181F Continuous Glucose Monitoring service
0x1820 Internet Protocol Support service
0x1821 Indoor Positioning service
0x1822 Pulse Oximeter service
0x1823 HTTP Proxy service
0x1824 Transport Discovery service
0x1825 Object Transfer service
0x1826 Fitness Machine service
0x1827 Mesh Provisioning service
0x1828 Mesh Proxy service
0x1829 Reconnection Configuration service
0x183A Insulin Delivery service
0x183B Binary Sensor service
0x183C Emergency Configuration service
0x183D Authorization Control service
0x183E Physical Activity Monitor service
0x1843 Audio Input Control service
0x1844 Volume Control service
0x1845 Volume Offset Control service
0x1846 Coordinated Set Identification service
0x1847 Device Time service
0x1848 Media Control service
0x1849 Generic Media Control service
0x184A Constant Tone Extension service
0x184B Telephone Bearer service
0x184C Generic Telephone Bearer service
0x184D Microphone Control service
0x184E Audio Stream Control service
0x184F Broadcast Audio Scan service
0x1850 Published Audio Capabilities service
0x1851 Basic Audio Announcement service
0x1852 Broadcast Audio Announcement service
0x1853 Common Audio service
0x1854 Hearing Aid service
0x1855 TMAS service
0x2800 Primary Service
0x2801 Secondary Service
0x2802 Include
0x2803 Characteristic
0x2900 Characteristic Extended Properties
0x2901 Characteristic User Description
0x2902 Client Characteristic Configuration
0x2903 Server Characteristic Configuration
0x2904 Characteristic Presentation Format
0x2905 Characteristic Aggregate Format
0x2906 Valid Range
0x2907 External Report Reference
0x2908 Report Reference
0x2909 Number of Digitals
0x290A Value Trigger Setting
0x290B Environmental Sensing Configuration
0x290C Environmental Sensing Measurement
0x290D Environmental Sensing Trigger Setting
0x290E Time Trigger Setting
0x290F Complete BR-EDR Transport Block Data
0x2A00 Device Name
0x2A01 Appearance
0x2A02 Peripheral Privacy Flag
0x2A03 Reconnection Address
0x2A04 Peripheral Preferred Connection Parameters
0x2A05 Service Changed
0x2A06 Alert Level
0x2A07 Tx Power Level
0x2A08 Date Time
0x2A09 Day of Week
0x2A0A Day Date Time
0x2A0C Exact Time 256
0x2A0D DST Offset
0x2A0E Time Zone
0x2A0F Local Time Information
0x2A11 Time with DST
0x2A12 Time Accuracy
0x2A13 Time Source
0x2A14 Reference Time Information
0x2A16 Time Update Control Point
0x2A17 Time Update State
0x2A18 Glucose Measurement
0x2A19 Battery Level
0x2A1C Temperature Measurement
0x2A1D Temperature Type
0x2A1E Intermediate Temperature
0x2A21 Measurement Interval
0x2A22 Boot Keyboard Input Report
0x2A23 System ID
0x2A24 Model Number String
0x2A25 Serial Number String
0x2A26 Firmware Revision String
0x2A27 Hardware Revision String
0x2A28 Software Revision String
0x2A29 Manufacturer Name String
0x2A2A IEEE 11073-20601 Regulatory Certification Data List
0x2A2B Current Time
0x2A2C Magnetic Declination
0x2A31 Scan Refresh
0x2A32 Boot Keyboard Output Report
0x2A33 Boot Mouse Input Report
0x2A34 Glucose Measurement Context
0x2A35 Blood Pressure Measurement
0x2A36 Intermediate Cuff Pressure
0x2A37 Heart Rate Measurement
0x2A38 Body Sensor Location
0x2A39 Heart Rate Control Point
0x2A3F Alert Status
0x2A40 Ringer Control Point
0x2A41 Ringer Setting
0x2A42 Alert Category ID Bit Mask
0x2A43 Alert Category ID
0x2A44 Alert Notification Control Point
0x2A45 Unread Alert Status
0x2A46 New Alert
0x2A47 Supported New Alert Category
0x2A48 Supported Unread Alert Category
0x2A49 Blood Pressure Feature
0x2A4A HID Information
0x2A4B Report Map
0x2A4C HID Control Point
0x2A4D Report
0x2A4E Protocol Mode
0x2A4F Scan Interval Window
0x2A50 PnP ID
0x2A51 Glucose Feature
0x2A52 Record Access Control Point
0x2A53 RSC Measurement
0x2A54 RSC Feature
0x2A55 SC Control Point
0x2A5A Aggregate
0x2A5B CSC Measurement
0x2A5C CSC Feature
0x2A5D Sensor Location
0x2A5E PLX Spot-Check Measurement
0x2A5F PLX Continuous Measurement
0x2A60 PLX Features
0x2A63 Cycling Power Measurement
0x2A64 Cycling Power Vector
0x2A65 Cycling Power Feature
0x2A66 Cycling Power Control Point
0x2A67 Location and Speed
0x2A68 Navigation
0x2A69 Position Quality
0x2A6A LN Feature
0x2A6B LN Control Point
0x2A6C Elevation
0x2A6D Pressure
0x2A6E Temperature
0x2A6F Humidity
0x2A70 True Wind Speed
0x2A71 True Wind Direction
0x2A72 Apparent Wind Speed
0x2A73 Apparent Wind Direction
0x2A74 Gust Factor
0x2A75 Pollen Concentration
0x2A76 UV Index
0x2A77 Irradiance
0x2A78 Rainfall
0x2A79 Wind Chill
0x2A7A Heat Index
0x2A7B Dew Point
0x2A7D Descriptor Value Changed
0x2A7E Aerobic Heart Rate Lower Limit
0x2A7F Aerobic Threshold
0x2A80 Age
0x2A81 Anaerobic Heart Rate Lower Limit
0x2A82 Anaerobic Heart Rate Upper Limit
0x2A83 Anaerobic Threshold
0x2A84 Aerobic Heart Rate Upper Limit
0x2A85 Date of Birth
0x2A86 Date of Threshold Assessment
0x2A87 Email Address
0x2A88 Fat Burn Heart Rate Lower Limit
0x2A89 Fat Burn Heart Rate Upper Limit
0x2A8A First Name
0x2A8B Five Zone Heart Rate Limits
0x2A8C Gender
0x2A8D Heart Rate Max
0x2A8E Height
0x2A8F Hip Circumference
0x2A90 Last Name
0x2A91 Maximum Recommended Heart Rate
0x2A92 Resting Heart Rate
0x2A93 Sport Type for Aerobic and Anaerobic Thresholds
0x2A94 Three Zone Heart Rate Limits
0x2A95 Two Zone Heart Rate Limits
0x2A96 VO2 Max
0x2A97 Waist Circumference
0x2A98 Weight
0x2A99 Database Change Increment
0x2A9A User Index
0x2A9B Body Composition Feature
0x2A9C Body Composition Measurement
0x2A9D Weight Measurement
0x2A9E Weight Scale Feature
0x2A9F User Control Point
0x2AA0 Magnetic Flux Density - 2D
0x2AA1 Magnetic Flux Density - 3D
0x2AA2 Language
0x2AA3 Barometric Pressure Trend
0x2AA4 Bond Management Control Point
0x2AA5 Bond Management Feature
0x2AA6 Central Address Resolution
0x2AA7 CGM Measurement
0x2AA8 CGM Feature
0x2AA9 CGM Status
0x2AAA CGM Session Start Time
0x2AAB CGM Session Run Time
0x2AAC CGM Specific Ops Control Point
0x2AAD Indoor Positioning Configuration
0x2AAE Latitude
0x2AAF Longitude
0x2AB0 Local North Coordinate
0x2AB1 Local East Coordinate
0x2AB2 Floor Number
0x2AB3 Altitude
0x2AB4 Uncertainty
0x2AB5 Location Name
0x2AB6 URI
0x2AB7 HTTP Headers
0x2AB8 HTTP Status Code
0x2AB9 HTTP Entity Body
0x2ABA HTTP Control Point
0x2ABB HTTPS Security
0x2ABC TDS Control Point
0x2ABD OTS Feature
0x2ABE Object Name
0x2ABF Object Type
0x2AC0 Object Size
0x2AC1 Object First-Created
0x2AC2 Object Last-Modified
0x2AC3 Object ID
0x2AC4 Object Properties
0x2AC5 Object Action Control Point
0x2AC6 Object List Control Point
0x2AC7 Object List Filter
0x2AC8 Object Changed
0x2AC9 Resolvable Private Address Only
0x2ACC Fitness Machine Feature
0x2ACD Treadmill Data
0x2ACE Cross Trainer Data
0x2ACF Step Climber Data
0x2AD0 Stair Climber Data
0x2AD1 Rower Data
0x2AD2 Indoor Bike Data
0x2AD3 Training Status
0x2AD4 Supported Speed Range
0x2AD5 Supported Inclination Range
0x2AD6 Supported Resistance Level Range
0x2AD7 Supported Heart Rate Range
0x2AD8 Supported Power Range
0x2AD9 Fitness Machine Control Point
0x2ADA Fitness Machine Status
0x2ADB Mesh Provisioning Data In
0x2ADC Mesh Provisioning Data Out
0x2ADD Mesh Proxy Data In
0x2ADE Mesh Proxy Data Out
0x2AE0 Average Current
0x2AE1 Average Voltage
0x2AE2 Boolean
0x2AE3 Chromatic Distance from Planckian
0x2AE4 Chromaticity Coordinates
0x2AE5 Chromaticity in CCT and Duv Values
0x2AE6 Chromaticity Tolerance
0x2AE7 CIE 13.3-1995 Color Rendering Index
0x2AE8 Coefficient
0x2AE9 Correlated Color Temperature
0x2AEA Count 16
0x2AEB Count 24
0x2AEC Country Code
0x2AED Date UTC
0x2AEE Electric Current
0x2AEF Electric Current Range
0x2AF0 Electric Current Specification
0x2AF1 Electric Current Statistics
0x2AF2 Energy
0x2AF3 Energy in a Period of Day
0x2AF4 Event Statistics
0x2AF5 Fixed String 16
0x2AF6 Fixed String 24
0x2AF7 Fixed String 36
0x2AF8 Fixed String 8
0x2AF9 Generic Level
0x2AFA Global Trade Item Number
0x2AFB Illuminance
0x2AFC Luminous Efficacy
0x2AFD Luminous Energy
0x2AFE Luminous Exposure
0x2AFF Luminous Flux
0x2B00 Luminous Flux Range
0x2B01 Luminous Intensity
0x2B02 Mass Flow
0x2B03 Perceived Lightness
0x2B04 Percentage 8
0x2B05 Power
0x2B06 Power Specification
0x2B07 Relative Runtime in a Current Range
0x2B08 Relative Runtime in a Generic Level Range
0x2B09 Relative Value in a Voltage Range
0x2B0A Relative Value in an Illuminance Range
0x2B0B Relative Value in a Period of Day
0x2B0C Relative Value in a Temperature Range
0x2B0D Temperature 8
0x2B0E Temperature 8 in a Period of Day
0x2B0F Temperature 8 Statistics
0x2B10 Temperature Range
0x2B11 Temperature Statistics
0x2B12 Time Decihour 8
0x2B13 Time Exponential 8
0x2B14 Time Hour 24
0x2B15 Time Millisecond 24
0x2B16 Time Second 16
0x2B17 Time Second 8
0x2B18 Voltage
0x2B19 Voltage Specification
0x2B1A Voltage Statistics
0x2B1B Volume Flow
0x2B1C Chromaticity Coordinate
0x2B1D RC Feature
0x2B1E RC Settings
0x2B1F Reconnection Configuration Control Point
0x2B20 IDD Status Changed
0x2B21 IDD Status
0x2B22 IDD Annunciation Status
0x2B23 IDD Features
0x2B24 IDD Status Reader Control Point
0x2B25 IDD Command Control Point
0x2B26 IDD Command Data
0x2B27 IDD Record Access Control Point
0x2B28 IDD History Data
0x2B29 Client Supported Features
0x2B2A Database Hash
0x2B2B BSS Control Point
0x2B2C BSS Response
0x2B2D Emergency ID
0x2B2E Emergency Text
0x2B2F ACS Status
0x2B30 ACS Data In
0x2B31 ACS Data Out Notify
0x2B32 ACS Data Out Indicate
0x2B33 ACS Control Point
0x2B34 Enhanced Blood Pressure Measurement
0x2B35 Enhanced Intermediate Cuff Pressure
0x2B36 Blood Pressure Record
0x2B37 Registered User
0x2B38 BR-EDR Handover Data
0x2B39 Bluetooth SIG Data
0x2B3A Server Supported Features
0x2B3B Physical Activity Monitor Features
0x2B3C General Activity Instantaneous Data
0x2B3D General Activity Summary Data
0x2B3E CardioRespiratory Activity Instantaneous Data
0x2B3F CardioRespiratory Activity Summary Data
0x2B40 Step Counter Activity Summary Data
0x2B41 Sleep Activity Instantaneous Data
0x2B42 Sleep Activity Summary Data
0x2B43 Physical Activity Monitor Control Point
0x2B44 Activity Current Session
0x2B45 Physical Activity Session Descriptor
0x2B46 Preferred Units
0x2B47 High Resolution Height
0x2B48 Middle Name
0x2B49 Stride Length
0x2B4A Handedness
0x2B4B Device Wearing Position
0x2B4C Four Zone Heart Rate Limits
0x2B4D High Intensity Exercise Threshold
0x2B4E Activity Goal
0x2B4F Sedentary Interval Notification
0x2B50 Caloric Intake
0x2B51 TMAP Role
0x2B77 Audio Input State
0x2B78 Gain Settings Attribute
0x2B79 Audio Input Type
0x2B7A Audio Input Status
0x2B7B Audio Input Control Point
0x2B7C Audio Input Description
0x2B7D Volume State
0x2B7E Volume Control Point
0x2B7F Volume Flags
0x2B80 Volume Offset State
0x2B81 Audio Location
0x2B82 Volume Offset Control Point
0x2B83 Audio Output Description
0x2B84 Set Identity Resolving Key
0x2B85 Coordinated Set Size
0x2B86 Set Member Lock
0x2B87 Set Member Rank
0x2B89 Apparent Energy 32
0x2B8A Apparent Power
0x2B8C CO2 Concentration
0x2B8D Cosine of the Angle
0x2B8E Device Time Feature
0x2B8F Device Time Parameters
0x2B90 Device Time
0x2B91 Device Time Control Point
0x2B92 Time Change Log Data
0x2B93 Media Player Name
0x2B94 Media Player Icon Object ID
0x2B95 Media Player Icon URL
0x2B96 Track Changed
0x2B97 Track Title
0x2B98 Track Duration
0x2B99 Track Position
0x2B9A Playback Speed
0x2B9B Seeking Speed
0x2B9C Current Track Segments Object ID
0x2B9D Current Track Object ID
0x2B9E Next Track Object ID
0x2B9F Parent Group Object ID
0x2BA0 Current Group Object ID
0x2BA1 Playing Order
0x2BA2 Playing Orders Supported
0x2BA3 Media State
0x2BA4 Media Control Point
0x2BA5 Media Control Point Opcodes Supported
0x2BA6 Search Results Object ID
0x2BA7 Search Control Point
0x2BA8 Energy 32
0x2BA9 Media Player Icon Object Type
0x2BAA Track Segments Object Type
0x2BAB Track Object Type
0x2BAC Group Object Type
0x2BAD Constant Tone Extension Enable
0x2BAE Advertising Constant Tone Extension Minimum Length
0x2BAF Advertising Constant Tone Extension Minimum Transmit Count
0x2BB0 Advertising Constant Tone Extension Transmit Duration
0x2BB1 Advertising Constant Tone Extension Interval
0x2BB2 Advertising Constant Tone Extension PHY
0x2BB3 Bearer Provider Name
0x2BB4 Bearer UCI
0x2BB5 Bearer Technology
0x2BB6 Bearer URI Schemes Supported List
0x2BB7 Bearer Signal Strength
0x2BB8 Bearer Signal Strength Reporting Interval
0x2BB9 Bearer List Current Calls
0x2BBA Content Control ID
0x2BBB Status Flags
0x2BBC Incoming Call Target Bearer URI
0x2BBD Call State
0x2BBE Call Control Point
0x2BBF Call Control Point Optional Opcodes
0x2BC0 Termination Reason
0x2BC1 Incoming Call
0x2BC2 Call Friendly Name
0x2BC3 Mute
0x2BC4 Sink ASE
0x2BC5 Source ASE
0x2BC6 ASE Control Point
0x2BC7 Broadcast Audio Scan Control Point
0x2BC8 Broadcast Receive State
0x2BC9 Sink PAC
0x2BCA Sink Audio Locations
0x2BCB Source PAC
0x2BCC Source Audio Locations
0x2BCD Available Audio Contexts
0x2BCE Supported Audio Contexts
0x2BCF Ammonia Concentration
0x2BD0 Carbon Monoxide Concentration
0x2BD1 Methane Concentration
0x2BD2 Nitrogen Dioxide Concentration
0x2BD3 Non-Methane Volatile Organic Compounds Concentration
0x2BD4 Ozone Concentration
0x2BD5 Particulate Matter - PM1 Concentration
0x2BD6 Particulate Matter - PM2.5 Concentration
0x2BD7 Particulate Matter - PM10 Concentration
0x2BD8 Sulfur Dioxide Concentration
0x2BD9 Sulfur Hexafluoride Concentration
0x2BDA Hearing Aid Features
0x2BDB Hearing Aid Preset Control Point
0x2BDC Active Preset Index
0x2BDE Fixed String 64
0x2BDF High Temperature
0x2BE0 High Voltage
0x2BE1 Light Distribution
0x2BE2 Light Output
0x2BE3 Light Source Type
0x2BE4 Noise
0x2BE5 Relative Runtime in a Correlated Color Temperature Range
0x2BE6 Time Second 32
0x2BE7 VOC Concentration
0x2BE8 Voltage Frequency
*/
#ifdef __cplusplus
}
#endif
#endif

78
sdk/include/lib/bus/macbus/mac_bus.h Normal file
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#ifndef _MAC_BUS_H_
#define _MAC_BUS_H_
#ifdef __cplusplus
extern "C" {
#endif
#define DATA_AREA_SIZE (1700)
enum mac_bus_type {
MAC_BUS_TYPE_NONE,
MAC_BUS_TYPE_SDIO,
MAC_BUS_TYPE_USB,
MAC_BUS_TYPE_EMAC,
MAC_BUS_TYPE_UART,
MAC_BUS_TYPE_NDEV,
MAC_BUS_TYPE_QC,
MAC_BUS_TYPE_COMBI,
MAC_BUS_TYPE_SPI,
MAC_BUS_TYPE_MMC,
MAC_BUS_TYPE_GDUART,
};
enum MAC_BUS_IOCTL{
MACBUS_IOCTL_IS_BUSY = 1,
MACBUS_IOCTL_REINIT_BUS,
MACBUS_IOCTL_BOOTDL_FLAG,
MACBUS_IOCTL_BUFFER_IDLE,
};
struct macbus_param{
uint16 drv_aggsize;
uint16 sdio_clk;
};
struct mac_bus {
int type;
void *priv;
uint32 rxerr, txerr;
int (*write)(struct mac_bus *bus, unsigned char *data, int len);
int (*write_scatter)(struct mac_bus *bus, scatter_data *data, int count);
int (*recv)(struct mac_bus *bus, unsigned char *data, int len);
int (*ioctl)(struct mac_bus *bus, uint32 cmd, uint32 param1, uint32 param2);
};
typedef int (*mac_bus_recv)(struct mac_bus *bus, unsigned char *data, int len);
extern struct mac_bus *mac_bus_attach(int bus_type, mac_bus_recv recv, void *priv, struct macbus_param *param);
extern struct mac_bus *mac_bus_sdio_attach(mac_bus_recv recv, void *priv, struct macbus_param *param);
extern struct mac_bus *mac_bus_usb_attach(mac_bus_recv recv, void *priv, struct macbus_param *param);
extern struct mac_bus *mac_bus_uart_attach(mac_bus_recv recv, void *priv, struct macbus_param *param);
extern struct mac_bus *mac_bus_gmac_attach(mac_bus_recv recv, void *priv, struct macbus_param *param);
extern struct mac_bus *mac_bus_qa_gmac_attach(mac_bus_recv recv, void *priv, struct macbus_param *param);
extern struct mac_bus *mac_bus_qc_attach(mac_bus_recv recv, void *priv, struct macbus_param *param);
extern struct mac_bus *mac_bus_ndev_attach(mac_bus_recv recv, void *priv, struct macbus_param *param);
extern struct mac_bus *mac_bus_combi_attach(mac_bus_recv recv, void *priv, struct macbus_param *param);
extern struct mac_bus *mac_bus_sdspi_attach(mac_bus_recv recv, void *priv, struct macbus_param *param);
extern struct mac_bus *mac_bus_spi_attach(mac_bus_recv recv, void *priv, struct macbus_param *param);
extern struct mac_bus *mac_bus_mmc_attach(mac_bus_recv recv, void *priv, struct macbus_param *param);
extern struct mac_bus *mac_bus_gduart_attach(mac_bus_recv recv, void *priv, struct macbus_param *param);
extern void mac_bus_sdio_detach(struct mac_bus *bus);
extern void mac_bus_usb_detach(struct mac_bus *bus);
extern void mac_bus_gmac_detach(struct mac_bus *bus);
extern void mac_bus_spi_detach(struct mac_bus *bus);
#define MACBUS_IS_BUSY(bus) (bus)->ioctl(bus, MACBUS_IOCTL_IS_BUSY, 0, 0)
#define MACBUS_BOOTDL(bus, bootdl) (bus)->ioctl(bus, MACBUS_IOCTL_BOOTDL_FLAG, bootdl, 0)
#define MACBUS_BUFFER_IDLE(bus) (bus)->ioctl(bus, MACBUS_IOCTL_BUFFER_IDLE, 0, 0)
#define MACBUS_REINIT(bus) (bus)->ioctl(bus, MACBUS_IOCTL_REINIT_BUS, 0, 0)
#ifdef __cplusplus
}
#endif
#endif

29
sdk/include/lib/bus/xmodem/xmodem.h Normal file
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#ifndef _XMODEM_LIB_H_
#define _XMODEM_LIB_H_
#ifdef __cplusplus
extern "C" {
#endif
enum xmodem_flags {
XMODEM_START,
XMODEM_ACK,
XMODEM_NAK,
XMODEM_STOP,
};
struct xmodem_hdl {
void (*out)(uint8 data);
uint8(*in)(uint32 tmo, int32 *err);
uint8 pktno;
};
int32 xmodem_receive(struct xmodem_hdl *xmodem, enum xmodem_flags flags, uint8 *buff, int32 size);
int32 xmodem_fwupgrade_hdl(const char *cmd, char *argv[], uint32 count);
void xmodem_stop(struct xmodem_hdl *xmodem);
#ifdef __cplusplus
}
#endif
#endif

71
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#ifndef _COMMON_ATCMD_H_
#define _COMMON_ATCMD_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 sys_atcmd_loaddef(const char *cmd, char *argv[], uint32 argc);
int32 sys_atcmd_reset(const char *cmd, char *argv[], uint32 argc);
int32 sys_atcmd_jtag(const char *cmd, char *argv[], uint32 argc);
int32 sys_syscfg_dump_hdl(const char *cmd, char *argv[], uint32 argc);
int32 sys_atcmd_errlog(const char *cmd, char *argv[], uint32 argc);
int32 sys_atcmd_sysdbg(const char *cmd, char *argv[], uint32 argc);
int32 sys_atcmd_disprintf(const char *cmd, char *argv[], uint32 argc);
int32 xmodem_fwupgrade_hdl(const char *cmd, char *argv[], uint32 count);
int32 sys_heap_dump_hdl(const char *cmd, char *argv[], uint32 argc);
int32 sys_atcmd_watchdog(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_set_channel(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_set_bssid(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_set_encrypt(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_set_ssid(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_set_key(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_set_rssid(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_set_rkey(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_set_rmode(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_set_wifimode(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_loaddef(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_scan(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_pair(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_aphide(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_hwmode(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_ft(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_passwd(const char *cmd, char *argv[], uint32 argc);
int32 sys_ble_atcmd_blenc(const char *cmd, char *argv[], uint32 argc);
int32 sys_ble_atcmd_set_coexist_en(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_ble_start_hdl(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_ble_tx_hdl(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_ble_rx_hdl(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_ble_rx_cnt_clr_hdl(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_ble_rx_cnt_get_hdl(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_ble_tx_delay_hdl(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_ble_chan_hdl(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_ble_rx_timeout_hdl(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_ble_tx_gain_hdl(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_write_ble_tx_gain_hdl(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_write_mac_addr2_hdl(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_io_test_hdl(const char *cmd, char *argv[], uint32 argc);
int32 atcmd_io_test_res_get_hdl(const char *cmd, char *argv[], uint32 argc);
int32 sys_atcmd_ping(const char *cmd, char *argv[], uint32 argc);
int32 sys_atcmd_icmp_mntr(const char *cmd, char *argv[], uint32 argc);
int32 sys_atcmd_iperf2(const char *cmd, char *argv[], uint32 argc);
int32 sys_atcmd_goto_boot(const char *cmd, char *argv[], uint32 argc);
int32 sys_atcmd_reboot_test_mode(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_pcap(const char *cmd, char *argv[], uint32 argc);
int32 sys_wifi_atcmd_wificsa(const char *cmd, char *argv[], uint32 argc);
int32 udp_test_atcmd_hdl(const char *cmd, char *argv[], uint32 argc);
int32 tcp_test_atcmd_hdl(const char *cmd, char *argv[], uint32 argc);
int32 sys_get_gpio_imap(const char *cmd, char *argv[], uint32 argc);
int32 sys_get_gpio_omap(const char *cmd, char *argv[], uint32 argc);
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _HGIC_COMMON_H_
#define _HGIC_COMMON_H_
#ifdef __cplusplus
extern "C" {
#endif
void do_global_ctors(void);
void do_global_dtors(void);
void cpu_loading_print(uint8 all, struct os_task_info *tsk_info, uint32 size);
void sys_wakeup_host(void);
void module_version_show(void);
extern const uint32 sdk_version;
extern const uint32 svn_version;
extern const uint32 app_version;
uint32 scatter_size(scatter_data *data, uint32 count);
uint8 *scatter_offset(scatter_data *data, uint32 count, uint32 off);
void trap_data_set(int8 id, void *addr, uint32 len);
void trap_hdl_set(int8 id, void (*hdl)(void *), void *arg);
void trap_data_dump(void);
void trap_hdl_run(void);
void set_errno(int32 err);
int32 get_errno(void);
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _HGIC_DSLEEP_DATA_H_
#define _HGIC_DSLEEP_DATA_H_
#ifdef __cplusplus
extern "C" {
#endif
enum system_sleepdata_id {
SYSTEM_SLEEPDATA_ID_LMAC,
SYSTEM_SLEEPDATA_ID_UMAC,
SYSTEM_SLEEPDATA_ID_PSALIVE,
SYSTEM_SLEEPDATA_ID_PSCONNECT,
SYSTEM_SLEEPDATA_ID_WKDATA,
SYSTEM_SLEEPDATA_ID_USER,
SYSTEM_SLEEPDATA_ID_SLEEPLOG,
SYSTEM_SLEEPDATA_ID_MAX,
};
extern void sys_sleepdata_init(void);
extern void *sys_sleepdata_request(uint8 id, uint32 size);
extern void sys_sleepdata_reset(void);
extern uint32 sys_sleepdata_freesize(void);
extern void *sys_sleepdata_get(uint8 id);
extern int32 dsleeplog_int(uint32 size);
extern void dsleeplog_print(void);
extern void dsleeplog_save(char c);
#ifdef __cplusplus
}
#endif
#endif

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#ifndef __RBUFFER_H__
#define __RBUFFER_H__
#ifdef __cplusplus
extern "C" {
#endif
#define RB_NPOS(rb, pos, i) ({ \
uint32 __pos__ = (rb)->pos;\
((__pos__+(i)>=(rb)->qsize) ? (__pos__+(i)-(rb)->qsize) : (__pos__+(i))); \
})
/* rpos == wpos 表示 rbuffer 为空 */
#define RB_EMPTY(rb) ((rb)->wpos == (rb)->rpos)
/* wpos+1 == rpos 表示 rbuffer 已满 */
#define RB_FULL(rb) ({ \
uint32 _rpos_ = ((rb)->rpos);\
uint32 _wpos_ = ((rb)->wpos)+1;\
((_wpos_>=(rb)->qsize) ? (_wpos_-(rb)->qsize) : (_wpos_)) == (_rpos_);\
})
/* rbuffer 中未被读取的数据长度 */
#define RB_COUNT(rb) ({ \
uint32 _rpos_ = ((rb)->rpos);\
uint32 _wpos_ = ((rb)->wpos);\
((_rpos_<=_wpos_)? (_wpos_-_rpos_): ((rb)->qsize-_rpos_+_wpos_));\
})
/* rbuffer中剩余空间长度 */
#define RB_IDLE(rb) ({ \
uint32 _rpos_ = ((rb)->rpos);\
uint32 _wpos_ = ((rb)->wpos);\
((_wpos_<_rpos_)? (_rpos_-_wpos_-1): ((rb)->qsize-_wpos_+_rpos_-1));\
})
/*ringbuffer define*/
#define RBUFFER_DEF(name, type, size) \
struct {\
uint32 rpos, wpos, qsize;\
type rbq[(size)+1];\
}name
/*ringbuffer define (refference)*/
#define RBUFFER_DEF_R(name, type) \
struct {\
uint32 rpos, wpos, qsize;\
type *rbq;\
}name
/*get a value from ringbuffer*/
#define RB_GET(rb, val) ({\
uint8 __ret__ = 0;\
if(!RB_EMPTY(rb)){\
val = (rb)->rbq[(rb)->rpos];\
(rb)->rpos = RB_NPOS((rb), rpos, 1);\
__ret__ = 1;\
}\
__ret__;\
})
/*set a value into ringbuffer*/
#define RB_SET(rb, val) ({\
uint8 __ret__ = 0;\
if(!RB_FULL(rb)){\
(rb)->rbq[(rb)->wpos] = val;\
(rb)->wpos = RB_NPOS((rb), wpos, 1);\
__ret__ = 1;\
}\
__ret__;\
})
#define RB_SET_F(rb, val) ({\
if(RB_FULL(rb)) (rb)->rpos = RB_NPOS((rb), rpos, 1);\
(rb)->rbq[(rb)->wpos] = val;\
(rb)->wpos = RB_NPOS((rb), wpos, 1);\
1;\
})
/*get a value from ringbuffer in interrupt*/
#define RB_INT_GET(rb, val) ({\
uint8 __ret__ = 0;\
uint32 flag = disable_irq(); \
if(!RB_EMPTY(rb)){\
val = (rb)->rbq[(rb)->rpos];\
(rb)->rpos = RB_NPOS((rb), rpos, 1);\
__ret__ = 1;\
}\
enable_irq(flag);\
__ret__;\
})
/*set a value into ringbuffer in interrupt*/
#define RB_INT_SET(rb, val) ({\
uint8 __ret__ = 0;\
uint32 flag = disable_irq(); \
if(!RB_FULL(rb)){\
(rb)->rbq[(rb)->wpos] = val;\
(rb)->wpos = RB_NPOS((rb), wpos, 1);\
__ret__ = 1;\
}\
enable_irq(flag);\
__ret__;\
})
#define RB_INT_SET_F(rb, val) ({\
uint32 flag = disable_irq(); \
if(RB_FULL(rb)) (rb)->rpos = RB_NPOS((rb), rpos, 1);\
(rb)->rbq[(rb)->wpos] = val;\
(rb)->wpos = RB_NPOS((rb), wpos, 1);\
enable_irq(flag);\
1;\
})
/*ringbuffer init*/
#define RB_INIT(rb, size) do{\
(rb)->qsize = (size)+1;\
(rb)->rpos = 0;\
(rb)->wpos = 0;\
} while (0)
/*ringbuffer init (referrence mode)*/
#define RB_INIT_R(rb, size, buff) do{\
(rb)->qsize = (size);\
(rb)->rpos = 0;\
(rb)->wpos = 0;\
(rb)->rbq = buff;\
} while (0)
#define RB_RESET(rb) do{\
uint32 flag = disable_irq(); \
(rb)->rpos = 0;\
(rb)->wpos = 0;\
enable_irq(flag);\
}while(0)
#define RB_INIT_ALLOC(rb, size) rbuffer_alloc((struct rbuffer *)(rb), size)
#define RB_FREE(rb) rbuffer_free((struct rbuffer *)(rb))
struct rbuffer {
uint32 rpos, wpos, qsize, bpos;
char *rbq;
};
int32 rbuffer_init(struct rbuffer *rb, uint32 size, void *buff);
int32 rbuffer_set(struct rbuffer *rb, void *data, uint32 length);
int32 rbuffer_set_force(struct rbuffer *rb, void *data, uint32 length);
int32 rbuffer_get(struct rbuffer *rb, void *buff, uint32 size);
void rbuffer_destroy(struct rbuffer *rb);
void rbuffer_reset(struct rbuffer *rb);
int32 rbuffer_alloc(struct rbuffer *rb, uint32 size);
void rbuffer_free(struct rbuffer *rb);
int32 rbuffer_set_block(struct rbuffer *rb, void *data, uint32 length, uint8 block);
int32 rbuffer_get_block(struct rbuffer *rb, void *buff, uint32 size, uint8 *block);
////////////////////////////////////////////////////////////////
// 硬件模块可使用的ringbuffer, 默认仅支持 "1读-1写" 模式
// 如果要支持 "多读-多写" 模式，需要打开 HWRB_IRQ 宏定义: 关中断后访问ringbuffer
// 可支持 2~N 个小buffer乒乓使用，max_size 决定了每个乒乓小buffer的大小
//#define HWRB_IRQ
struct hwrbuffer {
uint32 rpos, wpos, qsize, ipos;
uint16 min_size, max_size;
uint8 *buff;
};
//初始化 ringbuffer:
// max_size: 可写数据的buffer最大长度，大于此长度，则切分buffer使用
// min_size: 可写数据的buffer最小长度，小于此长度，则忽略调过此buffer，使用下一块buffer
void hwrbuffer_init(struct hwrbuffer *rb, uint8 *buff, uint32 size, uint16 max_size, uint16 min_size);
//更新写地址 并 获取下一个可写的buffer地址 和 长度
//buff: 需要更新的buffer地址，并输出 下一个可写的buffer地址
//size: 需要更新的buffer长度，并输出 下一个可写的buffer长度
void hwrbuffer_update_wpos(struct hwrbuffer *rb, uint8 **buff, uint32 *size);
//更新读地址
//buff: 更新已读取数据的buffer地址
//size: 更新已读取数据的buffer长度
void hwrbuffer_update_rpos(struct hwrbuffer *rb, uint8 *buff, uint32 size);
#ifdef __cplusplus
}
#endif
#endif

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/**
* @file sleep_api.h
* @author HUGE-IC Application Team
* @brief Dsleep mode function library
* @version 1.0.0
* @date 2021-9-6
*
* @copyright Copyright (c) 2021 HUGE-IC
*/
#ifndef _HGIC_SLEEP_API_H_
#define _HGIC_SLEEP_API_H_
#ifdef __cplusplus
extern "C" {
#endif
enum sleep_setcfg_cmd {
SLEEP_SETCFG_GPIOA_RESV,
SLEEP_SETCFG_GPIOB_RESV,
SLEEP_SETCFG_GPIOC_RESV,
SLEEP_SETCFG_SLEEP_US,
SLEEP_SETCFG_BOOT_MODE,
SLEEP_SETCFG_DSLEEP_EN,
SLEEP_SETCFG_WKSRC_DETECT,
SLEEP_SETCFG_IO_LEVEL_WK,
};
void system_sleep_enter_hook(void);
void system_sleep_wakeup_hook(void);
int32 system_sleep_rxdata_hook(uint8 *data, uint32 len);
void system_sleep_config(uint32 cmd, uint32 param1, uint32 param2);
void system_sleep_reset(void);
void dsleep_gpio_set_val(uint32 pin, uint32 val);
uint32 dsleep_gpio_get_val(uint32 pin);
void dsleep_itoa(int32 n);
void dsleep_print(char *buff);
//void delay_us(uint32 n);
//uint32 io_input_meas_mv(void);
#ifdef __cplusplus
}
#endif
#endif // _HGIC_SLEEP_API_H_

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#ifndef _SDK_SYSEVT_H_
#define _SDK_SYSEVT_H_
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
SYSEVT_CONTINUE = 0,
SYSEVT_CONSUMED = 1,
} sysevt_hdl_res;
typedef sysevt_hdl_res(*sysevt_hdl)(uint32 event_id, uint32 data, uint32 priv);
int32 sys_event_init(uint16 evt_max_cnt);
int32 sys_event_new(uint32 event_id, uint32 data);
int32 sys_event_take(uint32 event_id, sysevt_hdl hdl, uint32 priv);
void sys_event_untake(uint32 event_id, sysevt_hdl hdl);
#define SYS_EVENT(main, sub) ((main)<<16|(sub&0xffff))
enum SYSEVT_MAINID { /* uint16 */
SYS_EVENT_NETWORK = 1,
SYS_EVENT_WIFI,
SYS_EVENT_LMAC,
SYS_EVENT_SYSTEM,
SYS_EVENT_BLE,
SYS_EVENT_LTE,
SYS_EVENT_MEDIA,
SYS_EVENT_USB,
////////////////////////////////////
SYSEVT_MAINID_ID,
};
//////////////////////////////////////////
enum SYSEVT_SYSTEM_SUBEVT { /* uint16 */
SYSEVT_SYSTEM_RESUME = 1,
SYSEVT_SYSTEM_SD_MOUNT,
SYSEVT_SYSTEM_SD_UNMOUNT,
SYSEVT_TASK_DELETE,
};
#define SYSEVT_NEW_SYSTEM_EVT(subevt, data) sys_event_new(SYS_EVENT(SYS_EVENT_SYSTEM, subevt), data)
//////////////////////////////////////////
enum SYSEVT_LMAC_SUBEVT { /* uint16 */
SYSEVT_LMAC_ACS_DONE = 1,
SYSEVT_LMAC_TX_STATUS = 2,
SYSEVT_LMAC_APP_HBDATA_DETECT = 3, //检测到应用心跳包
};
#define SYSEVT_NEW_LMAC_EVT(subevt, data) sys_event_new(SYS_EVENT(SYS_EVENT_LMAC, subevt), data)
//////////////////////////////////////////
enum SYSEVT_WIFI_SUBEVT { /* uint16 */
SYSEVT_WIFI_CONNECT_START = 1, //STA start connect, event data: 0
SYSEVT_WIFI_CONNECTTED, //STA connect success, event data: my AID.
SYSEVT_WIFI_CONNECT_FAIL, //STA connect fail, event data: status code.
SYSEVT_WIFI_DISCONNECT, //unused.
SYSEVT_WIFI_SCAN_START, //Start Scanning, event data: 0
SYSEVT_WIFI_SCAN_DONE, //Scan done, event data: 0
SYSEVT_WIFI_STA_DISCONNECT, //STA disconnect, event data: STA's AID.
SYSEVT_WIFI_STA_CONNECTTED, //STA connected, event data: STA's AID.
SYSEVT_WIFI_STA_PS_START, //STA enter ps mode, event data: STA's AID.
SYSEVT_WIFI_STA_PS_END, //STA exit ps mode, event data: STA's AID.
SYSEVT_WIFI_PAIR_DONE, //pair done, event data: 1:success, 0:fail.
SYSEVT_WIFI_TX_SUCCESS, //wifi tx success, event data: data tag setted by ieee80211_conf_set_datatag.
SYSEVT_WIFI_TX_FAIL, //wifi tx fail, event data: data tag setted by ieee80211_conf_set_datatag.
SYSEVT_WIFI_UNPAIR, //unpaired, event data:0
SYSEVT_WIFI_WRONG_KEY, //wifi password is wrong. event data:0
SYSEVT_WIFI_P2P_DONE, //p2p wsc done. update wifi syscfg
};
#define SYSEVT_NEW_WIFI_EVT(subevt, data) sys_event_new(SYS_EVENT(SYS_EVENT_WIFI, subevt), data)
//////////////////////////////////////////
enum SYSEVT_NETWORK_SUBEVT { /* uint16 */
SYSEVT_GMAC_LINK_UP = 1,
SYSEVT_GMAC_LINK_DOWN,
SYSEVT_LWIP_DHCPC_START,
SYSEVT_LWIP_DHCPC_DONE,
SYSEVT_WIFI_DHCPC_START,
SYSEVT_WIFI_DHCPC_DONE,
SYSEVT_DHCPD_NEW_IP,
SYSEVT_DHCPD_IPPOOL_FULL,
SYSEVT_NTP_UPDATE,
};
#define SYSEVT_NEW_NETWORK_EVT(subevt, data) sys_event_new(SYS_EVENT(SYS_EVENT_NETWORK, subevt), data)
//////////////////////////////////////////
enum SYSEVT_BLE_SUBEVT { /* uint16 */
SYSEVT_BLE_CONNECTED = 1,
SYSEVT_BLE_DISCONNECT,
SYSEVT_BLE_NETWORK_CONFIGURED,
SYSEVT_BLE_EXCHANGE_MTU,
};
#define SYSEVT_NEW_BLE_EVT(subevt, data) sys_event_new(SYS_EVENT(SYS_EVENT_BLE, subevt), data)
//////////////////////////////////////////
enum SYSEVT_LTE_SUBEVT { /* uint16 */
SYSEVT_LTE_CONNECTED = 1,
SYSEVT_LTE_DISCONNECT,
SYSEVT_LTE_NETWORK_CONFIGURED,
SYSEVT_LTE_OVERLAP_WIFI,
};
#define SYSEVT_NEW_LTE_EVT(subevt, data) sys_event_new(SYS_EVENT(SYS_EVENT_LTE, subevt), data)
//////////////////////////////////////////
enum SYSEVT_MEDIA_SUBEVT { /* uint16 */
SYSEVT_MEDIA_PLAY_START = 1, //启动播放
SYSEVT_MEDIA_PLAY_STOP, //停止播放
SYSEVT_MEDIA_PLAYING, //进入播放状态
SYSEVT_MEDIA_PLAY_PAUSE, //暂停播放
SYSEVT_MEDIA_PLAY_SPEED, //播放速度改变
SYSEVT_MEDIA_PLAY_SEEK_ERR, //播放跳转失败
SYSEVT_MEDIA_PLAY_CLOSE, //播放器关闭
SYSEVT_MEDIA_OPEN_SUCCESS, //数据流打开成功
SYSEVT_MEDIA_OPEN_FAIL, //数据流打开失败
SYSEVT_MEDIA_READ_EOF, //数据流读取完成
SYSEVT_MEDIA_READ_ERROR, //数据流读取出错
SYSEVT_MEDIA_BUFFERING_DATA, //数据流缓冲等待
SYSEVT_MEDIA_UNKNOWN_CONTAINER, //未支持的container类型
SYSEVT_MEDIA_UNKNOWN_DECODER, //未支持的decoder类型
SYSEVT_MEDIA_DECODER_MATCH, //decoder成功匹配
SYSEVT_MEDIA_DECODER_ERROR, //decoder解码异常
SYSEVT_MEDIA_CONTAINER_MATCH, //container成功匹配
SYSEVT_MEDIA_CONTAINER_OPEN_ERROR, //container打开失败
SYSEVT_MEDIA_CONTAINER_DEMUX_ERROR, //container解码异常
};
#define SYSEVT_NEW_MEDIA_EVT(subevt, data) sys_event_new(SYS_EVENT(SYS_EVENT_MEDIA, subevt), data)
//////////////////////////////////////////
enum SYSEVT_USB_SUBEVT { /* uint16 */
SYSEVT_USB_DEVICE_CONNECT = 1, //USB设备连接
SYSEVT_USB_DEVICE_DISCONNECT, //USB设备断开
};
#define SYSEVT_NEW_USB_EVT(subevt, data) sys_event_new(SYS_EVENT(SYS_EVENT_USB, subevt), data)
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _HGIC_TICKER_API_H_
#define _HGIC_TICKER_API_H_
#ifdef __cplusplus
extern "C" {
#endif
void delay_us(uint32 n);
#ifdef __cplusplus
}
#endif
#endif

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/*
* AES functions
* Copyright (c) 2003-2006, Jouni Malinen <j@w1.fi>
*
* This software may be distributed under the terms of the BSD license.
* See README for more details.
*/
#ifndef AES_H
#define AES_H
#define AES_BLOCK_SIZE 16
void * aes_encrypt_init(const u8 *key, size_t len);
int aes_encrypt(void *ctx, const u8 *plain, u8 *crypt);
void aes_encrypt_deinit(void *ctx);
void * aes_decrypt_init(const u8 *key, size_t len);
int aes_decrypt(void *ctx, const u8 *crypt, u8 *plain);
void aes_decrypt_deinit(void *ctx);
#endif /* AES_H */

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/*
* AES (Rijndael) cipher
* Copyright (c) 2003-2012, Jouni Malinen <j@w1.fi>
*
* This software may be distributed under the terms of the BSD license.
* See README for more details.
*/
#ifndef AES_I_H
#define AES_I_H
#include "aes.h"
/* #define FULL_UNROLL */
#define AES_SMALL_TABLES
extern const u32 Te0[256];
extern const u32 Te1[256];
extern const u32 Te2[256];
extern const u32 Te3[256];
extern const u32 Te4[256];
extern const u32 Td0[256];
extern const u32 Td1[256];
extern const u32 Td2[256];
extern const u32 Td3[256];
extern const u32 Td4[256];
extern const u32 rcon[10];
extern const u8 Td4s[256];
extern const u8 rcons[10];
#ifndef AES_SMALL_TABLES
#define RCON(i) rcon[(i)]
#define TE0(i) Te0[((i) >> 24) & 0xff]
#define TE1(i) Te1[((i) >> 16) & 0xff]
#define TE2(i) Te2[((i) >> 8) & 0xff]
#define TE3(i) Te3[(i) & 0xff]
#define TE41(i) (Te4[((i) >> 24) & 0xff] & 0xff000000)
#define TE42(i) (Te4[((i) >> 16) & 0xff] & 0x00ff0000)
#define TE43(i) (Te4[((i) >> 8) & 0xff] & 0x0000ff00)
#define TE44(i) (Te4[(i) & 0xff] & 0x000000ff)
#define TE421(i) (Te4[((i) >> 16) & 0xff] & 0xff000000)
#define TE432(i) (Te4[((i) >> 8) & 0xff] & 0x00ff0000)
#define TE443(i) (Te4[(i) & 0xff] & 0x0000ff00)
#define TE414(i) (Te4[((i) >> 24) & 0xff] & 0x000000ff)
#define TE411(i) (Te4[((i) >> 24) & 0xff] & 0xff000000)
#define TE422(i) (Te4[((i) >> 16) & 0xff] & 0x00ff0000)
#define TE433(i) (Te4[((i) >> 8) & 0xff] & 0x0000ff00)
#define TE444(i) (Te4[(i) & 0xff] & 0x000000ff)
#define TE4(i) (Te4[(i)] & 0x000000ff)
#define TD0(i) Td0[((i) >> 24) & 0xff]
#define TD1(i) Td1[((i) >> 16) & 0xff]
#define TD2(i) Td2[((i) >> 8) & 0xff]
#define TD3(i) Td3[(i) & 0xff]
#define TD41(i) (Td4[((i) >> 24) & 0xff] & 0xff000000)
#define TD42(i) (Td4[((i) >> 16) & 0xff] & 0x00ff0000)
#define TD43(i) (Td4[((i) >> 8) & 0xff] & 0x0000ff00)
#define TD44(i) (Td4[(i) & 0xff] & 0x000000ff)
#define TD0_(i) Td0[(i) & 0xff]
#define TD1_(i) Td1[(i) & 0xff]
#define TD2_(i) Td2[(i) & 0xff]
#define TD3_(i) Td3[(i) & 0xff]
#else /* AES_SMALL_TABLES */
#define RCON(i) ((u32) rcons[(i)] << 24)
static inline u32 rotr(u32 val, int bits)
{
return (val >> bits) | (val << (32 - bits));
}
#define TE0(i) Te0[((i) >> 24) & 0xff]
#define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8)
#define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16)
#define TE3(i) rotr(Te0[(i) & 0xff], 24)
#define TE41(i) ((Te0[((i) >> 24) & 0xff] << 8) & 0xff000000)
#define TE42(i) (Te0[((i) >> 16) & 0xff] & 0x00ff0000)
#define TE43(i) (Te0[((i) >> 8) & 0xff] & 0x0000ff00)
#define TE44(i) ((Te0[(i) & 0xff] >> 8) & 0x000000ff)
#define TE421(i) ((Te0[((i) >> 16) & 0xff] << 8) & 0xff000000)
#define TE432(i) (Te0[((i) >> 8) & 0xff] & 0x00ff0000)
#define TE443(i) (Te0[(i) & 0xff] & 0x0000ff00)
#define TE414(i) ((Te0[((i) >> 24) & 0xff] >> 8) & 0x000000ff)
#define TE411(i) ((Te0[((i) >> 24) & 0xff] << 8) & 0xff000000)
#define TE422(i) (Te0[((i) >> 16) & 0xff] & 0x00ff0000)
#define TE433(i) (Te0[((i) >> 8) & 0xff] & 0x0000ff00)
#define TE444(i) ((Te0[(i) & 0xff] >> 8) & 0x000000ff)
#define TE4(i) ((Te0[(i)] >> 8) & 0x000000ff)
#define TD0(i) Td0[((i) >> 24) & 0xff]
#define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8)
#define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16)
#define TD3(i) rotr(Td0[(i) & 0xff], 24)
#define TD41(i) ((u32) Td4s[((i) >> 24) & 0xff] << 24)
#define TD42(i) ((u32) Td4s[((i) >> 16) & 0xff] << 16)
#define TD43(i) ((u32) Td4s[((i) >> 8) & 0xff] << 8)
#define TD44(i) ((u32) Td4s[(i) & 0xff])
#define TD0_(i) Td0[(i) & 0xff]
#define TD1_(i) rotr(Td0[(i) & 0xff], 8)
#define TD2_(i) rotr(Td0[(i) & 0xff], 16)
#define TD3_(i) rotr(Td0[(i) & 0xff], 24)
#endif /* AES_SMALL_TABLES */
#ifdef _MSC_VER
#define SWAP(x) (_lrotl(x, 8) & 0x00ff00ff | _lrotr(x, 8) & 0xff00ff00)
#define GETU32(p) SWAP(*((u32 *)(p)))
#define PUTU32(ct, st) { *((u32 *)(ct)) = SWAP((st)); }
#else
#define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ \
((u32)(pt)[2] << 8) ^ ((u32)(pt)[3]))
#define PUTU32(ct, st) { \
(ct)[0] = (u8)((st) >> 24); (ct)[1] = (u8)((st) >> 16); \
(ct)[2] = (u8)((st) >> 8); (ct)[3] = (u8)(st); }
#endif // endif
#define AES_PRIV_SIZE (4 * 4 * 15 + 4)
#define AES_PRIV_NR_POS (4 * 15)
int rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits);
#endif /* AES_I_H */

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/*
* AES-based functions
*
* - AES Key Wrap Algorithm (RFC3394)
* - One-Key CBC MAC (OMAC1) hash with AES-128 and AES-256
* - AES-128/192/256 CTR mode encryption
* - AES-128 EAX mode encryption/decryption
* - AES-128 CBC
* - AES-GCM
* - AES-CCM
*
* Copyright (c) 2003-2012, Jouni Malinen <j@w1.fi>
*
* This software may be distributed under the terms of the BSD license.
* See README for more details.
*/
#ifndef AES_WRAP_H
#define AES_WRAP_H
#include "crypto.h"
int __must_check aes_wrap(const u8 *kek, size_t kek_len, int n, const u8 *plain,
u8 *cipher);
int __must_check aes_unwrap(const u8 *kek, size_t kek_len, int n,
const u8 *cipher, u8 *plain);
int __must_check omac1_aes_vector(const u8 *key, size_t key_len,
size_t num_elem, const u8 *addr[],
const size_t *len, u8 *mac);
int __must_check omac1_aes_128_vector(const u8 *key, size_t num_elem,
const u8 *addr[], const size_t *len,
u8 *mac);
int __must_check omac1_aes_128(const u8 *key, const u8 *data, size_t data_len,
u8 *mac);
int __must_check omac1_aes_256(const u8 *key, const u8 *data, size_t data_len,
u8 *mac);
int __must_check aes_128_encrypt_block(const u8 *key, const u8 *in, u8 *out);
int __must_check aes_ctr_encrypt(const u8 *key, size_t key_len, const u8 *nonce,
u8 *data, size_t data_len);
int __must_check aes_128_ctr_encrypt(const u8 *key, const u8 *nonce,
u8 *data, size_t data_len);
int __must_check aes_128_eax_encrypt(const u8 *key,
const u8 *nonce, size_t nonce_len,
const u8 *hdr, size_t hdr_len,
u8 *data, size_t data_len, u8 *tag);
int __must_check aes_128_eax_decrypt(const u8 *key,
const u8 *nonce, size_t nonce_len,
const u8 *hdr, size_t hdr_len,
u8 *data, size_t data_len, const u8 *tag);
//int __must_check aes_128_cbc_encrypt(const u8 *key, const u8 *iv, u8 *data,
// size_t data_len);
//int __must_check aes_128_cbc_decrypt(const u8 *key, const u8 *iv, u8 *data,
// size_t data_len);
int __must_check aes_gcm_ae(const u8 *key, size_t key_len,
const u8 *iv, size_t iv_len,
const u8 *plain, size_t plain_len,
const u8 *aad, size_t aad_len,
u8 *crypt, u8 *tag);
int __must_check aes_gcm_ad(const u8 *key, size_t key_len,
const u8 *iv, size_t iv_len,
const u8 *crypt, size_t crypt_len,
const u8 *aad, size_t aad_len, const u8 *tag,
u8 *plain);
int __must_check aes_gmac(const u8 *key, size_t key_len,
const u8 *iv, size_t iv_len,
const u8 *aad, size_t aad_len, u8 *tag);
int __must_check aes_ccm_ae(const u8 *key, size_t key_len, const u8 *nonce,
size_t M, const u8 *plain, size_t plain_len,
const u8 *aad, size_t aad_len, u8 *crypt, u8 *auth);
int __must_check aes_ccm_ad(const u8 *key, size_t key_len, const u8 *nonce,
size_t M, const u8 *crypt, size_t crypt_len,
const u8 *aad, size_t aad_len, const u8 *auth,
u8 *plain);
#endif /* AES_WRAP_H */

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#ifndef COMMON_H
#define COMMON_H
#include "osal/string.h"
typedef uint64_t u64;
typedef uint32_t u32;
typedef uint16_t u16;
typedef uint8_t u8;
typedef int64_t s64;
typedef int32_t s32;
typedef int16_t s16;
typedef int8_t s8;
#ifndef __must_check
#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
#define __must_check __attribute__((__warn_unused_result__))
#else
#define __must_check
#endif /* __GNUC__ */
#endif /* __must_check */
#endif /* COMMON_H */

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/*
* Wrapper functions for crypto libraries
* Copyright (c) 2004-2017, Jouni Malinen <j@w1.fi>
*
* This software may be distributed under the terms of the BSD license.
* See README for more details.
*
* This file defines the cryptographic functions that need to be implemented
* for wpa_supplicant and hostapd. When TLS is not used, internal
* implementation of MD5, SHA1, and AES is used and no external libraries are
* required. When TLS is enabled (e.g., by enabling EAP-TLS or EAP-PEAP), the
* crypto library used by the TLS implementation is expected to be used for
* non-TLS needs, too, in order to save space by not implementing these
* functions twice.
*
* Wrapper code for using each crypto library is in its own file (crypto*.c)
* and one of these files is build and linked in to provide the functions
* defined here.
*/
#ifndef CRYPTO_H
#define CRYPTO_H
/**
* md4_vector - MD4 hash for data vector
* @num_elem: Number of elements in the data vector
* @addr: Pointers to the data areas
* @len: Lengths of the data blocks
* @mac: Buffer for the hash
* Returns: 0 on success, -1 on failure
*/
int md4_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac);
/**
* md5_vector - MD5 hash for data vector
* @num_elem: Number of elements in the data vector
* @addr: Pointers to the data areas
* @len: Lengths of the data blocks
* @mac: Buffer for the hash
* Returns: 0 on success, -1 on failure
*/
int md5_vector(size_t num_elem, const u8 *addr[], const size_t *len, u8 *mac);
/**
* sha1_vector - SHA-1 hash for data vector
* @num_elem: Number of elements in the data vector
* @addr: Pointers to the data areas
* @len: Lengths of the data blocks
* @mac: Buffer for the hash
* Returns: 0 on success, -1 on failure
*/
int sha1_vector(size_t num_elem, const u8 *addr[], const size_t *len,
u8 *mac);
/**
* fips186_2-prf - NIST FIPS Publication 186-2 change notice 1 PRF
* @seed: Seed/key for the PRF
* @seed_len: Seed length in bytes
* @x: Buffer for PRF output
* @xlen: Output length in bytes
* Returns: 0 on success, -1 on failure
*
* This function implements random number generation specified in NIST FIPS
* Publication 186-2 for EAP-SIM. This PRF uses a function that is similar to
* SHA-1, but has different message padding.
*/
int __must_check fips186_2_prf(const u8 *seed, size_t seed_len, u8 *x,
size_t xlen);
/**
* sha256_vector - SHA256 hash for data vector
* @num_elem: Number of elements in the data vector
* @addr: Pointers to the data areas
* @len: Lengths of the data blocks
* @mac: Buffer for the hash
* Returns: 0 on success, -1 on failure
*/
int sha256_vector(size_t num_elem, const u8 *addr[], const size_t *len,
u8 *mac);
/**
* sha384_vector - SHA384 hash for data vector
* @num_elem: Number of elements in the data vector
* @addr: Pointers to the data areas
* @len: Lengths of the data blocks
* @mac: Buffer for the hash
* Returns: 0 on success, -1 on failure
*/
int sha384_vector(size_t num_elem, const u8 *addr[], const size_t *len,
u8 *mac);
/**
* sha512_vector - SHA512 hash for data vector
* @num_elem: Number of elements in the data vector
* @addr: Pointers to the data areas
* @len: Lengths of the data blocks
* @mac: Buffer for the hash
* Returns: 0 on success, -1 on failure
*/
int sha512_vector(size_t num_elem, const u8 *addr[], const size_t *len,
u8 *mac);
/**
* des_encrypt - Encrypt one block with DES
* @clear: 8 octets (in)
* @key: 7 octets (in) (no parity bits included)
* @cypher: 8 octets (out)
* Returns: 0 on success, -1 on failure
*/
int des_encrypt(const u8 *clear, const u8 *key, u8 *cypher);
/**
* aes_encrypt_init - Initialize AES for encryption
* @key: Encryption key
* @len: Key length in bytes (usually 16, i.e., 128 bits)
* Returns: Pointer to context data or %NULL on failure
*/
void * aes_encrypt_init(const u8 *key, size_t len);
/**
* aes_encrypt - Encrypt one AES block
* @ctx: Context pointer from aes_encrypt_init()
* @plain: Plaintext data to be encrypted (16 bytes)
* @crypt: Buffer for the encrypted data (16 bytes)
* Returns: 0 on success, -1 on failure
*/
int aes_encrypt(void *ctx, const u8 *plain, u8 *crypt);
/**
* aes_encrypt_deinit - Deinitialize AES encryption
* @ctx: Context pointer from aes_encrypt_init()
*/
void aes_encrypt_deinit(void *ctx);
/**
* aes_decrypt_init - Initialize AES for decryption
* @key: Decryption key
* @len: Key length in bytes (usually 16, i.e., 128 bits)
* Returns: Pointer to context data or %NULL on failure
*/
void * aes_decrypt_init(const u8 *key, size_t len);
/**
* aes_decrypt - Decrypt one AES block
* @ctx: Context pointer from aes_encrypt_init()
* @crypt: Encrypted data (16 bytes)
* @plain: Buffer for the decrypted data (16 bytes)
* Returns: 0 on success, -1 on failure
*/
int aes_decrypt(void *ctx, const u8 *crypt, u8 *plain);
/**
* aes_decrypt_deinit - Deinitialize AES decryption
* @ctx: Context pointer from aes_encrypt_init()
*/
void aes_decrypt_deinit(void *ctx);
enum crypto_hash_alg {
CRYPTO_HASH_ALG_MD5, CRYPTO_HASH_ALG_SHA1,
CRYPTO_HASH_ALG_HMAC_MD5, CRYPTO_HASH_ALG_HMAC_SHA1,
CRYPTO_HASH_ALG_SHA256, CRYPTO_HASH_ALG_HMAC_SHA256,
CRYPTO_HASH_ALG_SHA384, CRYPTO_HASH_ALG_SHA512
};
struct crypto_hash;
/**
* crypto_hash_init - Initialize hash/HMAC function
* @alg: Hash algorithm
* @key: Key for keyed hash (e.g., HMAC) or %NULL if not needed
* @key_len: Length of the key in bytes
* Returns: Pointer to hash context to use with other hash functions or %NULL
* on failure
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
struct crypto_hash * crypto_hash_init(enum crypto_hash_alg alg, const u8 *key,
size_t key_len);
/**
* crypto_hash_update - Add data to hash calculation
* @ctx: Context pointer from crypto_hash_init()
* @data: Data buffer to add
* @len: Length of the buffer
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
void crypto_hash_update(struct crypto_hash *ctx, const u8 *data, size_t len);
/**
* crypto_hash_finish - Complete hash calculation
* @ctx: Context pointer from crypto_hash_init()
* @hash: Buffer for hash value or %NULL if caller is just freeing the hash
* context
* @len: Pointer to length of the buffer or %NULL if caller is just freeing the
* hash context; on return, this is set to the actual length of the hash value
* Returns: 0 on success, -1 if buffer is too small (len set to needed length),
* or -2 on other failures (including failed crypto_hash_update() operations)
*
* This function calculates the hash value and frees the context buffer that
* was used for hash calculation.
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
int crypto_hash_finish(struct crypto_hash *ctx, u8 *hash, size_t *len);
enum crypto_cipher_alg {
CRYPTO_CIPHER_NULL = 0, CRYPTO_CIPHER_ALG_AES, CRYPTO_CIPHER_ALG_3DES,
CRYPTO_CIPHER_ALG_DES, CRYPTO_CIPHER_ALG_RC2, CRYPTO_CIPHER_ALG_RC4
};
struct crypto_cipher;
/**
* crypto_cipher_init - Initialize block/stream cipher function
* @alg: Cipher algorithm
* @iv: Initialization vector for block ciphers or %NULL for stream ciphers
* @key: Cipher key
* @key_len: Length of key in bytes
* Returns: Pointer to cipher context to use with other cipher functions or
* %NULL on failure
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
struct crypto_cipher * crypto_cipher_init(enum crypto_cipher_alg alg,
const u8 *iv, const u8 *key,
size_t key_len);
/**
* crypto_cipher_encrypt - Cipher encrypt
* @ctx: Context pointer from crypto_cipher_init()
* @plain: Plaintext to cipher
* @crypt: Resulting ciphertext
* @len: Length of the plaintext
* Returns: 0 on success, -1 on failure
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
int __must_check crypto_cipher_encrypt(struct crypto_cipher *ctx,
const u8 *plain, u8 *crypt, size_t len);
/**
* crypto_cipher_decrypt - Cipher decrypt
* @ctx: Context pointer from crypto_cipher_init()
* @crypt: Ciphertext to decrypt
* @plain: Resulting plaintext
* @len: Length of the cipher text
* Returns: 0 on success, -1 on failure
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
int __must_check crypto_cipher_decrypt(struct crypto_cipher *ctx,
const u8 *crypt, u8 *plain, size_t len);
/**
* crypto_cipher_decrypt - Free cipher context
* @ctx: Context pointer from crypto_cipher_init()
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
void crypto_cipher_deinit(struct crypto_cipher *ctx);
struct crypto_public_key;
struct crypto_private_key;
/**
* crypto_public_key_import - Import an RSA public key
* @key: Key buffer (DER encoded RSA public key)
* @len: Key buffer length in bytes
* Returns: Pointer to the public key or %NULL on failure
*
* This function can just return %NULL if the crypto library supports X.509
* parsing. In that case, crypto_public_key_from_cert() is used to import the
* public key from a certificate.
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
struct crypto_public_key * crypto_public_key_import(const u8 *key, size_t len);
struct crypto_public_key *
crypto_public_key_import_parts(const u8 *n, size_t n_len,
const u8 *e, size_t e_len);
/**
* crypto_private_key_import - Import an RSA private key
* @key: Key buffer (DER encoded RSA private key)
* @len: Key buffer length in bytes
* @passwd: Key encryption password or %NULL if key is not encrypted
* Returns: Pointer to the private key or %NULL on failure
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
struct crypto_private_key * crypto_private_key_import(const u8 *key,
size_t len,
const char *passwd);
/**
* crypto_public_key_from_cert - Import an RSA public key from a certificate
* @buf: DER encoded X.509 certificate
* @len: Certificate buffer length in bytes
* Returns: Pointer to public key or %NULL on failure
*
* This function can just return %NULL if the crypto library does not support
* X.509 parsing. In that case, internal code will be used to parse the
* certificate and public key is imported using crypto_public_key_import().
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
struct crypto_public_key * crypto_public_key_from_cert(const u8 *buf,
size_t len);
/**
* crypto_public_key_encrypt_pkcs1_v15 - Public key encryption (PKCS #1 v1.5)
* @key: Public key
* @in: Plaintext buffer
* @inlen: Length of plaintext buffer in bytes
* @out: Output buffer for encrypted data
* @outlen: Length of output buffer in bytes; set to used length on success
* Returns: 0 on success, -1 on failure
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
int __must_check crypto_public_key_encrypt_pkcs1_v15(
struct crypto_public_key *key, const u8 *in, size_t inlen,
u8 *out, size_t *outlen);
/**
* crypto_private_key_decrypt_pkcs1_v15 - Private key decryption (PKCS #1 v1.5)
* @key: Private key
* @in: Encrypted buffer
* @inlen: Length of encrypted buffer in bytes
* @out: Output buffer for encrypted data
* @outlen: Length of output buffer in bytes; set to used length on success
* Returns: 0 on success, -1 on failure
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
int __must_check crypto_private_key_decrypt_pkcs1_v15(
struct crypto_private_key *key, const u8 *in, size_t inlen,
u8 *out, size_t *outlen);
/**
* crypto_private_key_sign_pkcs1 - Sign with private key (PKCS #1)
* @key: Private key from crypto_private_key_import()
* @in: Plaintext buffer
* @inlen: Length of plaintext buffer in bytes
* @out: Output buffer for encrypted (signed) data
* @outlen: Length of output buffer in bytes; set to used length on success
* Returns: 0 on success, -1 on failure
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
int __must_check crypto_private_key_sign_pkcs1(struct crypto_private_key *key,
const u8 *in, size_t inlen,
u8 *out, size_t *outlen);
/**
* crypto_public_key_free - Free public key
* @key: Public key
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
void crypto_public_key_free(struct crypto_public_key *key);
/**
* crypto_private_key_free - Free private key
* @key: Private key from crypto_private_key_import()
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
void crypto_private_key_free(struct crypto_private_key *key);
/**
* crypto_public_key_decrypt_pkcs1 - Decrypt PKCS #1 signature
* @key: Public key
* @crypt: Encrypted signature data (using the private key)
* @crypt_len: Encrypted signature data length
* @plain: Buffer for plaintext (at least crypt_len bytes)
* @plain_len: Plaintext length (max buffer size on input, real len on output);
* Returns: 0 on success, -1 on failure
*/
int __must_check crypto_public_key_decrypt_pkcs1(
struct crypto_public_key *key, const u8 *crypt, size_t crypt_len,
u8 *plain, size_t *plain_len);
int crypto_dh_init(u8 generator, const u8 *prime, size_t prime_len, u8 *privkey,
u8 *pubkey);
int crypto_dh_derive_secret(u8 generator, const u8 *prime, size_t prime_len,
const u8 *order, size_t order_len,
const u8 *privkey, size_t privkey_len,
const u8 *pubkey, size_t pubkey_len,
u8 *secret, size_t *len);
/**
* crypto_global_init - Initialize crypto wrapper
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
int __must_check crypto_global_init(void);
/**
* crypto_global_deinit - Deinitialize crypto wrapper
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
void crypto_global_deinit(void);
/**
* crypto_mod_exp - Modular exponentiation of large integers
* @base: Base integer (big endian byte array)
* @base_len: Length of base integer in bytes
* @power: Power integer (big endian byte array)
* @power_len: Length of power integer in bytes
* @modulus: Modulus integer (big endian byte array)
* @modulus_len: Length of modulus integer in bytes
* @result: Buffer for the result
* @result_len: Result length (max buffer size on input, real len on output)
* Returns: 0 on success, -1 on failure
*
* This function calculates result = base ^ power mod modulus. modules_len is
* used as the maximum size of modulus buffer. It is set to the used size on
* success.
*
* This function is only used with internal TLSv1 implementation
* (CONFIG_TLS=internal). If that is not used, the crypto wrapper does not need
* to implement this.
*/
int __must_check crypto_mod_exp(const u8 *base, size_t base_len,
const u8 *power, size_t power_len,
const u8 *modulus, size_t modulus_len,
u8 *result, size_t *result_len);
/**
* rc4_skip - XOR RC4 stream to given data with skip-stream-start
* @key: RC4 key
* @keylen: RC4 key length
* @skip: number of bytes to skip from the beginning of the RC4 stream
* @data: data to be XOR'ed with RC4 stream
* @data_len: buf length
* Returns: 0 on success, -1 on failure
*
* Generate RC4 pseudo random stream for the given key, skip beginning of the
* stream, and XOR the end result with the data buffer to perform RC4
* encryption/decryption.
*/
int rc4_skip(const u8 *key, size_t keylen, size_t skip,
u8 *data, size_t data_len);
/**
* crypto_get_random - Generate cryptographically strong pseudy-random bytes
* @buf: Buffer for data
* @len: Number of bytes to generate
* Returns: 0 on success, -1 on failure
*
* If the PRNG does not have enough entropy to ensure unpredictable byte
* sequence, this functions must return -1.
*/
int crypto_get_random(void *buf, size_t len);
/**
* struct crypto_bignum - bignum
*
* Internal data structure for bignum implementation. The contents is specific
* to the used crypto library.
*/
struct crypto_bignum;
/**
* crypto_bignum_init - Allocate memory for bignum
* Returns: Pointer to allocated bignum or %NULL on failure
*/
struct crypto_bignum * crypto_bignum_init(void);
/**
* crypto_bignum_init_set - Allocate memory for bignum and set the value
* @buf: Buffer with unsigned binary value
* @len: Length of buf in octets
* Returns: Pointer to allocated bignum or %NULL on failure
*/
struct crypto_bignum * crypto_bignum_init_set(const u8 *buf, size_t len);
/**
* crypto_bignum_init_set - Allocate memory for bignum and set the value (uint)
* @val: Value to set
* Returns: Pointer to allocated bignum or %NULL on failure
*/
struct crypto_bignum * crypto_bignum_init_uint(unsigned int val);
/**
* crypto_bignum_deinit - Free bignum
* @n: Bignum from crypto_bignum_init() or crypto_bignum_init_set()
* @clear: Whether to clear the value from memory
*/
void crypto_bignum_deinit(struct crypto_bignum *n, int clear);
/**
* crypto_bignum_to_bin - Set binary buffer to unsigned bignum
* @a: Bignum
* @buf: Buffer for the binary number
* @len: Length of @buf in octets
* @padlen: Length in octets to pad the result to or 0 to indicate no padding
* Returns: Number of octets written on success, -1 on failure
*/
int crypto_bignum_to_bin(const struct crypto_bignum *a,
u8 *buf, size_t buflen, size_t padlen);
/**
* crypto_bignum_rand - Create a random number in range of modulus
* @r: Bignum; set to a random value
* @m: Bignum; modulus
* Returns: 0 on success, -1 on failure
*/
int crypto_bignum_rand(struct crypto_bignum *r, const struct crypto_bignum *m);
/**
* crypto_bignum_add - c = a + b
* @a: Bignum
* @b: Bignum
* @c: Bignum; used to store the result of a + b
* Returns: 0 on success, -1 on failure
*/
int crypto_bignum_add(const struct crypto_bignum *a,
const struct crypto_bignum *b,
struct crypto_bignum *c);
/**
* crypto_bignum_mod - c = a % b
* @a: Bignum
* @b: Bignum
* @c: Bignum; used to store the result of a % b
* Returns: 0 on success, -1 on failure
*/
int crypto_bignum_mod(const struct crypto_bignum *a,
const struct crypto_bignum *b,
struct crypto_bignum *c);
/**
* crypto_bignum_exptmod - Modular exponentiation: d = a^b (mod c)
* @a: Bignum; base
* @b: Bignum; exponent
* @c: Bignum; modulus
* @d: Bignum; used to store the result of a^b (mod c)
* Returns: 0 on success, -1 on failure
*/
int crypto_bignum_exptmod(const struct crypto_bignum *a,
const struct crypto_bignum *b,
const struct crypto_bignum *c,
struct crypto_bignum *d);
/**
* crypto_bignum_inverse - Inverse a bignum so that a * c = 1 (mod b)
* @a: Bignum
* @b: Bignum
* @c: Bignum; used to store the result
* Returns: 0 on success, -1 on failure
*/
int crypto_bignum_inverse(const struct crypto_bignum *a,
const struct crypto_bignum *b,
struct crypto_bignum *c);
/**
* crypto_bignum_sub - c = a - b
* @a: Bignum
* @b: Bignum
* @c: Bignum; used to store the result of a - b
* Returns: 0 on success, -1 on failure
*/
int crypto_bignum_sub(const struct crypto_bignum *a,
const struct crypto_bignum *b,
struct crypto_bignum *c);
/**
* crypto_bignum_div - c = a / b
* @a: Bignum
* @b: Bignum
* @c: Bignum; used to store the result of a / b
* Returns: 0 on success, -1 on failure
*/
int crypto_bignum_div(const struct crypto_bignum *a,
const struct crypto_bignum *b,
struct crypto_bignum *c);
/**
* crypto_bignum_addmod - d = a + b (mod c)
* @a: Bignum
* @b: Bignum
* @c: Bignum
* @d: Bignum; used to store the result of (a + b) % c
* Returns: 0 on success, -1 on failure
*/
int crypto_bignum_addmod(const struct crypto_bignum *a,
const struct crypto_bignum *b,
const struct crypto_bignum *c,
struct crypto_bignum *d);
/**
* crypto_bignum_mulmod - d = a * b (mod c)
* @a: Bignum
* @b: Bignum
* @c: Bignum
* @d: Bignum; used to store the result of (a * b) % c
* Returns: 0 on success, -1 on failure
*/
int crypto_bignum_mulmod(const struct crypto_bignum *a,
const struct crypto_bignum *b,
const struct crypto_bignum *c,
struct crypto_bignum *d);
/**
* crypto_bignum_sqrmod - c = a^2 (mod b)
* @a: Bignum
* @b: Bignum
* @c: Bignum; used to store the result of a^2 % b
* Returns: 0 on success, -1 on failure
*/
int crypto_bignum_sqrmod(const struct crypto_bignum *a,
const struct crypto_bignum *b,
struct crypto_bignum *c);
/**
* crypto_bignum_rshift - r = a >> n
* @a: Bignum
* @n: Number of bits
* @r: Bignum; used to store the result of a >> n
* Returns: 0 on success, -1 on failure
*/
int crypto_bignum_rshift(const struct crypto_bignum *a, int n,
struct crypto_bignum *r);
/**
* crypto_bignum_cmp - Compare two bignums
* @a: Bignum
* @b: Bignum
* Returns: -1 if a < b, 0 if a == b, or 1 if a > b
*/
int crypto_bignum_cmp(const struct crypto_bignum *a,
const struct crypto_bignum *b);
/**
* crypto_bignum_is_zero - Is the given bignum zero
* @a: Bignum
* Returns: 1 if @a is zero or 0 if not
*/
int crypto_bignum_is_zero(const struct crypto_bignum *a);
/**
* crypto_bignum_is_one - Is the given bignum one
* @a: Bignum
* Returns: 1 if @a is one or 0 if not
*/
int crypto_bignum_is_one(const struct crypto_bignum *a);
/**
* crypto_bignum_is_odd - Is the given bignum odd
* @a: Bignum
* Returns: 1 if @a is odd or 0 if not
*/
int crypto_bignum_is_odd(const struct crypto_bignum *a);
/**
* crypto_bignum_legendre - Compute the Legendre symbol (a/p)
* @a: Bignum
* @p: Bignum
* Returns: Legendre symbol -1,0,1 on success; -2 on calculation failure
*/
int crypto_bignum_legendre(const struct crypto_bignum *a,
const struct crypto_bignum *p);
/**
* struct crypto_ec - Elliptic curve context
*
* Internal data structure for EC implementation. The contents is specific
* to the used crypto library.
*/
struct crypto_ec;
/**
* crypto_ec_init - Initialize elliptic curve context
* @group: Identifying number for the ECC group (IANA "Group Description"
* attribute registrty for RFC 2409)
* Returns: Pointer to EC context or %NULL on failure
*/
struct crypto_ec * crypto_ec_init(int group);
/**
* crypto_ec_deinit - Deinitialize elliptic curve context
* @e: EC context from crypto_ec_init()
*/
void crypto_ec_deinit(struct crypto_ec *e);
/**
* crypto_ec_prime_len - Get length of the prime in octets
* @e: EC context from crypto_ec_init()
* Returns: Length of the prime defining the group
*/
size_t crypto_ec_prime_len(struct crypto_ec *e);
/**
* crypto_ec_prime_len_bits - Get length of the prime in bits
* @e: EC context from crypto_ec_init()
* Returns: Length of the prime defining the group in bits
*/
size_t crypto_ec_prime_len_bits(struct crypto_ec *e);
/**
* crypto_ec_order_len - Get length of the order in octets
* @e: EC context from crypto_ec_init()
* Returns: Length of the order defining the group
*/
size_t crypto_ec_order_len(struct crypto_ec *e);
/**
* crypto_ec_get_prime - Get prime defining an EC group
* @e: EC context from crypto_ec_init()
* Returns: Prime (bignum) defining the group
*/
const struct crypto_bignum * crypto_ec_get_prime(struct crypto_ec *e);
/**
* crypto_ec_get_order - Get order of an EC group
* @e: EC context from crypto_ec_init()
* Returns: Order (bignum) of the group
*/
const struct crypto_bignum * crypto_ec_get_order(struct crypto_ec *e);
/**
* crypto_ec_get_a - Get 'a' coefficient of an EC group's curve
* @e: EC context from crypto_ec_init()
* Returns: 'a' coefficient (bignum) of the group
*/
const struct crypto_bignum * crypto_ec_get_a(struct crypto_ec *e);
/**
* crypto_ec_get_b - Get 'b' coeffiecient of an EC group's curve
* @e: EC context from crypto_ec_init()
* Returns: 'b' coefficient (bignum) of the group
*/
const struct crypto_bignum * crypto_ec_get_b(struct crypto_ec *e);
/**
* struct crypto_ec_point - Elliptic curve point
*
* Internal data structure for EC implementation to represent a point. The
* contents is specific to the used crypto library.
*/
struct crypto_ec_point;
/**
* crypto_ec_point_init - Initialize data for an EC point
* @e: EC context from crypto_ec_init()
* Returns: Pointer to EC point data or %NULL on failure
*/
struct crypto_ec_point * crypto_ec_point_init(struct crypto_ec *e);
/**
* crypto_ec_point_deinit - Deinitialize EC point data
* @p: EC point data from crypto_ec_point_init()
* @clear: Whether to clear the EC point value from memory
*/
void crypto_ec_point_deinit(struct crypto_ec_point *p, int clear);
/**
* crypto_ec_point_x - Copies the x-ordinate point into big number
* @e: EC context from crypto_ec_init()
* @p: EC point data
* @x: Big number to set to the copy of x-ordinate
* Returns: 0 on success, -1 on failure
*/
int crypto_ec_point_x(struct crypto_ec *e, const struct crypto_ec_point *p,
struct crypto_bignum *x);
/**
* crypto_ec_point_to_bin - Write EC point value as binary data
* @e: EC context from crypto_ec_init()
* @p: EC point data from crypto_ec_point_init()
* @x: Buffer for writing the binary data for x coordinate or %NULL if not used
* @y: Buffer for writing the binary data for y coordinate or %NULL if not used
* Returns: 0 on success, -1 on failure
*
* This function can be used to write an EC point as binary data in a format
* that has the x and y coordinates in big endian byte order fields padded to
* the length of the prime defining the group.
*/
int crypto_ec_point_to_bin(struct crypto_ec *e,
const struct crypto_ec_point *point, u8 *x, u8 *y);
/**
* crypto_ec_point_from_bin - Create EC point from binary data
* @e: EC context from crypto_ec_init()
* @val: Binary data to read the EC point from
* Returns: Pointer to EC point data or %NULL on failure
*
* This function readers x and y coordinates of the EC point from the provided
* buffer assuming the values are in big endian byte order with fields padded to
* the length of the prime defining the group.
*/
struct crypto_ec_point * crypto_ec_point_from_bin(struct crypto_ec *e,
const u8 *val);
/**
* crypto_ec_point_add - c = a + b
* @e: EC context from crypto_ec_init()
* @a: Bignum
* @b: Bignum
* @c: Bignum; used to store the result of a + b
* Returns: 0 on success, -1 on failure
*/
int crypto_ec_point_add(struct crypto_ec *e, const struct crypto_ec_point *a,
const struct crypto_ec_point *b,
struct crypto_ec_point *c);
/**
* crypto_ec_point_mul - res = b * p
* @e: EC context from crypto_ec_init()
* @p: EC point
* @b: Bignum
* @res: EC point; used to store the result of b * p
* Returns: 0 on success, -1 on failure
*/
int crypto_ec_point_mul(struct crypto_ec *e, const struct crypto_ec_point *p,
const struct crypto_bignum *b,
struct crypto_ec_point *res);
/**
* crypto_ec_point_invert - Compute inverse of an EC point
* @e: EC context from crypto_ec_init()
* @p: EC point to invert (and result of the operation)
* Returns: 0 on success, -1 on failure
*/
int crypto_ec_point_invert(struct crypto_ec *e, struct crypto_ec_point *p);
/**
* crypto_ec_point_solve_y_coord - Solve y coordinate for an x coordinate
* @e: EC context from crypto_ec_init()
* @p: EC point to use for the returning the result
* @x: x coordinate
* @y_bit: y-bit (0 or 1) for selecting the y value to use
* Returns: 0 on success, -1 on failure
*/
int crypto_ec_point_solve_y_coord(struct crypto_ec *e,
struct crypto_ec_point *p,
const struct crypto_bignum *x, int y_bit);
/**
* crypto_ec_point_compute_y_sqr - Compute y^2 = x^3 + ax + b
* @e: EC context from crypto_ec_init()
* @x: x coordinate
* Returns: y^2 on success, %NULL failure
*/
struct crypto_bignum *
crypto_ec_point_compute_y_sqr(struct crypto_ec *e,
const struct crypto_bignum *x);
/**
* crypto_ec_point_is_at_infinity - Check whether EC point is neutral element
* @e: EC context from crypto_ec_init()
* @p: EC point
* Returns: 1 if the specified EC point is the neutral element of the group or
* 0 if not
*/
int crypto_ec_point_is_at_infinity(struct crypto_ec *e,
const struct crypto_ec_point *p);
/**
* crypto_ec_point_is_on_curve - Check whether EC point is on curve
* @e: EC context from crypto_ec_init()
* @p: EC point
* Returns: 1 if the specified EC point is on the curve or 0 if not
*/
int crypto_ec_point_is_on_curve(struct crypto_ec *e,
const struct crypto_ec_point *p);
/**
* crypto_ec_point_cmp - Compare two EC points
* @e: EC context from crypto_ec_init()
* @a: EC point
* @b: EC point
* Returns: 0 on equal, non-zero otherwise
*/
int crypto_ec_point_cmp(const struct crypto_ec *e,
const struct crypto_ec_point *a,
const struct crypto_ec_point *b);
struct crypto_ecdh;
struct crypto_ecdh * crypto_ecdh_init(int group);
struct wpabuf * crypto_ecdh_get_pubkey(struct crypto_ecdh *ecdh, int inc_y);
struct wpabuf * crypto_ecdh_set_peerkey(struct crypto_ecdh *ecdh, int inc_y,
const u8 *key, size_t len);
void crypto_ecdh_deinit(struct crypto_ecdh *ecdh);
#endif /* CRYPTO_H */

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#ifndef _HGIC_MMPOOL_H_
#define _HGIC_MMPOOL_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "list.h"
#define MMPOOL_OBJ \
const char *name;\
uint32 size, free_size;\
uint8 region_cnt, align, headsize, tailsize, trace_off, ofchk_off;
struct mmpool_base {
MMPOOL_OBJ;
};
#define MMPOOL_REGION_MAX (4)
struct mmpool1 {
MMPOOL_OBJ;
uint32 regions[MMPOOL_REGION_MAX][2];
struct list_head free_list;
struct list_head used_list;
#ifdef MMPOOL_PERF_COUNT
uint32 tot_alloc, tot_free;
uint32 alloc_perf[MMPOOL_PERF_COUNT];
uint32 free_perf[MMPOOL_PERF_COUNT];
#endif
};
#define MMPOOL2_REGION_MAX (4)
#define MMPOOL2_FRAG_LOG (12)
struct mmpool2 {
MMPOOL_OBJ;
uint32 regions[MMPOOL2_REGION_MAX][2];
struct list_head free_list[MMPOOL2_FRAG_LOG];
struct list_head used_list;
#ifdef MMPOOL_PERF_COUNT
uint32 tot_alloc, tot_free;
uint32 alloc_perf[MMPOOL_PERF_COUNT];
uint32 free_perf[MMPOOL_PERF_COUNT];
#endif
};
#define MMPOOL3_REGION_MAX (4)
#define MMPOOL3_FRAG_LOG (12)
struct mmpool3_region {
uint32 start, end;
uint32 blk_size, blocks, blk_cnt;
struct list_head block_list;
};
struct mmpool3 {
MMPOOL_OBJ;
uint8 min_size;
struct mmpool3_region regions[MMPOOL3_REGION_MAX];
struct list_head used_list;
struct list_head frag_list[MMPOOL3_FRAG_LOG];
#ifdef MMPOOL_PERF_COUNT
uint32 tot_alloc, tot_free;
uint32 alloc_perf[MMPOOL_PERF_COUNT];
uint32 free_perf[MMPOOL_PERF_COUNT];
#endif
};
struct mmpool_ops {
void *(*alloc)(void *mp, uint32 size, const char *func, int32 line);
int32(*free)(void *mp, void *ptr);
int32(*init)(void *mp, uint32 addr, uint32 size, uint32 blk_size);
int32(*free_state)(void *mp, uint32 *stat_buf, int32 size, uint32 *tot_size);
int32(*used_state)(void *mp, uint32 *stat_buf, int32 size, uint32 *tot_size, uint32 mini_size);
int32(*add_region)(void *mp, uint32 addr, uint32 size, uint32 blk_size);
int32(*of_check)(void *mp, uint32 addr, uint32 size);
int32(*valid_addr)(void *pool, uint32 addr, uint8 first);
int32(*perfermance)(void *mp, uint8 alloc, uint32 *values, uint32 count);
void (*dump)(void *mp);
void (*time)(void *mp, uint32 *alloc_time, uint32 *free_time);
int32 (*used_list)(void *pool, uint32_t *list_buf, int32 list_size);
};
extern const struct mmpool_ops mmpool1_ops;
extern const struct mmpool_ops mmpool2_ops;
extern const struct mmpool_ops mmpool3_ops;
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _MEM_POOL_H_
#define _MEM_POOL_H_
#ifdef __cplusplus
extern "C" {
#endif
#define LOG_MAX (12)
/*free frag list*/
struct frag_list {
struct frag_list *next;
struct frag_list *prev;
};
struct mem_pool {
unsigned int block_size: 24, init:1, rev: 7;
unsigned int block_count;
unsigned int heap_start;
unsigned int heap_end;
unsigned int heap_ptr;
unsigned int heap_base;
unsigned int blocks;
struct frag_list frags[LOG_MAX];
#ifdef MMPOOL_PERF_COUNT
uint32 alloc_perf[MMPOOL_PERF_COUNT];
uint32 free_perf[MMPOOL_PERF_COUNT];
#endif
};
#define mpool_free_size(pool) ((pool)->heap_end-(pool)->heap_ptr)
int32 mpool_init(struct mem_pool *pool, uint32 block_size, uint32 mem_addr, uint32 mem_size);
void mpool_free(struct mem_pool *pool, void *ptr);
void *mpool_alloc(struct mem_pool *pool, uint32 size);
void mpool_state(struct mem_pool *pool, char *state_buf, int32 buf_size);
#ifdef __cplusplus
}
#endif
#endif

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sdk/include/lib/heap/mtrace.h Normal file
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#ifndef _HGIC_SDK_MTRACE_H_
#define _HGIC_SDK_MTRACE_H_
#ifdef __cplusplus
extern "C" {
#endif
struct mtrace_entry {
void *ptr;
const char *func;
int line;
int size;
};
struct mtrace {
int size;
struct mtrace_entry *entrys;
};
void mtrace_print(struct mtrace *mt);
void mtrace_add(struct mtrace *mt, void *ptr, const char *func, int line, int size);
void mtrace_del(struct mtrace *mt, void *ptr);
#ifdef __cplusplus
}
#endif
#endif

120
sdk/include/lib/heap/sysheap.h Normal file
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#ifndef _SYS_HEAP_H_
#define _SYS_HEAP_H_
#include "lib/heap/mmpool.h"
#ifdef __cplusplus
extern "C" {
#endif
enum SYSHEAP_FLAGS {
SYSHEAP_FLAGS_MEM_LEAK_TRACE = (1u << 0),
SYSHEAP_FLAGS_MEM_OVERFLOW_CHECK = (1u << 1),
SYSHEAP_FLAGS_MEM_ALIGN_16 = (1u << 2),
SYSHEAP_FLAGS_MEM_ALIGN_32 = (1u << 3),
SYSHEAP_FLAGS_MEM_TAIL_ALIGN_4 = (1u << 4),
SYSHEAP_FLAGS_MEM_TAIL_ALIGN_16 = (1u << 5),
SYSHEAP_FLAGS_MEM_TAIL_ALIGN_32 = (1u << 6),
};
struct sys_heap {
const char *name;
const struct mmpool_ops *ops;
struct mmpool_base pool;
};
struct sys_sramheap {
const char *name;
const struct mmpool_ops *ops;
struct mmpool1 pool;
//可以修改为mmpool3, 同时修改malloc_init函数：sram_heap.ops = &mmpool3_ops;
};
struct sys_psramheap {
const char *name;
const struct mmpool_ops *ops;
struct mmpool1 pool;
//可以修改为mmpool3, 同时修改malloc_psram_init函数：psram_heap.ops = &mmpool3_ops;
};
struct sys_av_heap {
const char *name;
const struct mmpool_ops *ops;
struct mmpool1 pool;
//可以修改为mmpool3, 同时修改初始化函数的ops赋值
};
void *__malloc(struct sys_heap *heap, int size, void *lr);
void __free(struct sys_heap *heap, void *ptr, void *lr);
void *__zalloc(struct sys_heap *heap, int size, void *lr);
void *__realloc(struct sys_heap *heap, void *ptr, int size, void *lr);
void *__malloc_t(struct sys_heap *heap, int size, const char *func, int line);
void __free_t(struct sys_heap *heap, void *ptr, const char *func, int line);
void *__zalloc_t(struct sys_heap *heap, int size, const char *func, int line);
void *__realloc_t(struct sys_heap *heap, void *ptr, int size, const char *func, int line);
int32 _sysheap_init(struct sys_heap *heap, void *heap_start, uint32 heap_size, uint32 flags);
void *_sysheap_alloc(struct sys_heap *heap, int size, const char *func, int line);
int32 _sysheap_free(struct sys_heap *heap, void *ptr);
uint32 _sysheap_freesize(struct sys_heap *heap);
uint32 _sysheap_totalsize(struct sys_heap *heap);
void _sysheap_collect_init(struct sys_heap *heap);
int32 _sysheap_add(struct sys_heap *heap, uint32 start_addr, uint32 end_addr);
int32 _sysheap_of_check(struct sys_heap *heap, void *ptr, uint32 size);
void _sysheap_status(struct sys_heap *heap, uint32 *status_buf, int32 buf_size, uint32 mini_size);
int32 _sysheap_valid_addr(struct sys_heap *heap, void *ptr, uint8 first);
uint32 _sysheap_time(struct sys_heap *heap);
int32 _sysheap_used_list(struct sys_heap *heap, uint32 *list_buf, int32 buf_size);
void _sysheap_dump(struct sys_heap *heap);
#define sysheap_init(heap, heap_start, heap_size, flags) \
_sysheap_init((struct sys_heap *)(heap), heap_start, heap_size, flags)
#define sysheap_time(heap)\
_sysheap_time((struct sys_heap *)(heap))
#define sysheap_alloc(heap, size, func, line)\
_sysheap_alloc((struct sys_heap *)(heap), size, (const char *)func, line)
#define sysheap_free(heap, ptr)\
_sysheap_free((struct sys_heap *)(heap), ptr)
#define sysheap_freesize(heap)\
_sysheap_freesize((struct sys_heap *)(heap))
#define sysheap_totalsize(heap)\
_sysheap_totalsize((struct sys_heap *)(heap))
#define sysheap_collect_init(heap)\
_sysheap_collect_init((struct sys_heap *)(heap))
#define sysheap_add(heap, start_addr, end_addr)\
_sysheap_add((struct sys_heap *)(heap), start_addr, end_addr)
#define sysheap_of_check(heap, ptr, size)\
_sysheap_of_check((struct sys_heap *)(heap), ptr, size)
#define sysheap_status(heap, status_buf, buf_size, mini_size)\
_sysheap_status((struct sys_heap *)(heap), status_buf, buf_size, mini_size)
#define sysheap_valid_addr(heap, ptr, first)\
_sysheap_valid_addr((struct sys_heap *)(heap), ptr, first)
#define sysheap_time(heap)\
_sysheap_time((struct sys_heap *)(heap))
#define sysheap_used_list(heap, list_buf, buf_size)\
_sysheap_used_list((struct sys_heap *)(heap), list_buf, buf_size)
#define sysheap_dump(heap)\
_sysheap_dump((struct sys_heap *)(heap))
extern struct sys_sramheap sram_heap;
extern struct sys_psramheap psram_heap;
#endif
#ifdef __cplusplus
}
#endif

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#ifndef _GUI_H_
#define _GUI_H_
typedef struct
{
uint32_t dvp_w;
uint32_t dvp_h;
uint32_t uvc_w;
uint32_t uvc_h;
uint32_t photo_w;
uint32_t photo_h;
uint32_t rec_w;
uint32_t rec_h;
uint8_t sound_en;
uint8_t iso_en;
uint8_t cycle_rec_en;
uint8_t take_photo_num;
uint8_t enlarge_lcd; //10 == double
}gui_msg;
extern gui_msg gui_cfg;
#endif

187
sdk/include/lib/lcd/lcd.h Normal file
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#ifndef LIB_LCD_H
#define LIB_LCD_H
#include "typesdef.h"
#include "dev.h"
#include "hal/lcdc.h"
#include "hal/scale.h"
#define LCD_ROTATE 1
#define SCALE_DIRECT_TO_LCD 0
#define LCD_FROM_DEC 0
#define LCD_SET_ROTATE_180 0
#define LCD_THREE_BUF 0
#define LCD_FROM_DMA2D_BUF 1
#define LCD_33_WVGA 1
#if LCD_33_WVGA
#define SCALE_WIDTH 800//800//800//854//848//640
#define SCALE_HIGH 480//480//480//480//480//
#else
#define SCALE_WIDTH 480//400//162//320
#define SCALE_HIGH 320//400//132//240
#endif
#define PHOTO1_W 320
#define PHOTO1_H 240
#define SCALE_CONFIG_W ((SCALE_WIDTH+3)/4)*4
#define SCALE_PHOTO1_CONFIG_W ((PHOTO1_W+3)/4)*4
#define SCALE_CONFIG_H ((SCALE_HIGH+7)/8)*8
#if LCD_SET_ROTATE_180
#define Y_OFFSET SCALE_CONFIG_W*(SCALE_HIGH-1)
#define UV_OFFSET ((SCALE_CONFIG_W/2+3)/4)*4 * (SCALE_HIGH/2-1)
#define DEC_Y_OFFSET PHOTO1_W*(PHOTO1_H-1)//428*(240-1)
#define DEC_UV_OFFSET ((SCALE_PHOTO1_CONFIG_W/2+3)/4)*4 * (PHOTO1_H/2-1) //160*119//216*(119)
#else
#define Y_OFFSET 0
#define UV_OFFSET 0
#define DEC_Y_OFFSET 0
#define DEC_UV_OFFSET 0
#endif
extern uint32 p1_w,p1_h;
extern uint32 scale_p1_w;
extern uint32 dec_y_offset,dec_uv_offset;
#define SRAMBUF_WLEN 64
enum init_tab_token_e {
LCD_CMD,
LCD_DAT,
SPI_DAT,
DELAY_MS,
LCD_TAB_END = 0XFFUL,
};
typedef struct
{
uint8_t osd_buf_to_lcd;
uint8_t osd_buf_to_updata;
uint8_t updata_finish;
uint8_t lcd_run_new_lcd;
uint8_t lcd_p0p1_state; //0:p0p1 disable 1:p0 enable p1 disable 2: p0 disable p1 enable 3: p0p1 enable
uint8_t lcd_p0p1_cur;
uint8_t lcd_p1_size_reset;
uint8_t lcd_osd_mode;
uint8_t lcd_osd_cur_mode;
}lcd_msg;
typedef struct _lcd_desc_s {
char name[32];
uint8 lcd_bus_type;
uint8 bus_width;
uint8 bus_cmd;
uint8 color_mode;
//uint8 red_width;
//uint8 green_width;
//uint8 blue_width;
uint8 osd_scan_mode; //osd是否旋转,给到lvgl
uint8 scan_mode;
//only mcu-bus use
//-1,te disable.
//0,te just interrupt,no kick TX.用户(写APP的人)自己编写TE中断服务函数,自己控制kick tx.
//1,te interrupt and auto kick TX,中断被内部使用,用户不应该操作TE中断
uint8 te_mode;
uint8 lane_num;
//for mcu data-bus, cs_setup and cs_hold eq 0 default,so freq(wr) = src_clk/div/2.
//for rgb bus,freq(pclk) = src_clk/div;
uint32 pclk;
//the 'lcd_data_mode' eq LCDDMOD
uint32 lcd_data_mode;
uint32 lcd_data_mode1;
uint32 colrarray;
uint16 screen_w,video_x,video_w;
uint16 screen_h,video_y,video_h;
uint16 osd_x,osd_y,osd_w,osd_h;
uint8 (* init_table)[2];
uint8 * frame_table;
uint8 clk_per_pixel;
uint8 even_order;
uint8 odd_order;
//------rgb-bus----------
uint8 pclk_inv;
//unit:line,real vfp=vfp+1(line)
uint8 vlw,vbp,vfp;
//unit:pclk
uint8 hlw;
//unit:pixel,real hfp=.hfp(pixel) + 1(pclk)
uint8 hbp,hfp;
uint8 de_en;
uint8 hs_en;
uint8 vs_en;
uint8 de_inv;//de默认是高电平有效,如果de_inv是1，则将其反转,0xff:disable
uint8 hs_inv;//hs_inv同de_inv
uint8 vs_inv;//vs_inv同de_inv
union
{
uint8_t value;
struct
{
uint8_t rd_inv: 1;
uint8_t cs_inv: 1;
uint8_t dc_inv: 1;
uint8_t wr_inv: 1;
uint8_t resev: 4;
}mcu;
}signal_config;
uint8 spi_cpol; //CPOL = 0,CLK is "Low" when inactive
uint8 spi_cpha; //CPHA = 0,sample edge is first edge
uint8 spi_order;//ORDER = 0,MSB
uint8 spi_bits; //number of data bits
uint32 contrast;
uint32 brightness;
uint32 saturation;
uint32 contra_index;
uint32 gamma_red;
uint32 gamma_green;
uint32 gamma_blue;
uint32 de_ccm[12];
uint32 de_saj[5];
}
lcddev_t;
extern lcddev_t lcdstruct;
void scale_soft_run(uint8_t *softbuf,uint32_t w,uint32 h);
void scale_to_lcd_config_soft(uint8_t *softbuf,uint32_t w,uint32_t h);
void scale_from_vpp_to_jpg(struct scale_device *scale_dev,uint32 yuvbuf_addr,uint32 s_w,uint32 s_h,uint32 d_w,uint32 d_h);
void scale_from_soft_to_jpg(struct scale_device *scale_dev,uint32 yuvbuf_addr,uint32 s_w,uint32 s_h,uint32 d_w,uint32 d_h);
void set_lcd_photo1_config(uint32 w,uint32 h,uint8 rotate_180);
void set_lcd_enlarge_config(uint32_t sw,uint32_t sh,uint32_t ow,uint32_t oh,uint8_t enlarge);
void jpg_dec_scale_del();
void jpg_decode_scale_config();
void lcd_module_run();
void lcd_user_frame(uint32 frame_addr);
void jpg_decode_to_lcd(uint32 photo,uint32 jpg_w,uint32 jpg_h,uint32 video_w,uint32 video_h);
int32 jpg_decode_is_finish();
void mipi_dsi_init(uint32 w,uint32 h,uint32 dclk,uint8 vsa,uint8 vbp,uint8 vfp,uint8 hsa,uint8 hbp,uint8 hfp,uint8 lanenum,uint8 colortype);
#endif

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#ifndef _HUGE_IC_H_
#define _HUGE_IC_H_
#define HGIC_WDEV_ID_AP 0
#define HGIC_WDEV_ID_STA 1
#define HGIC_SCAN_MAX_NUM 32
#define HGIC_HDR_TX_MAGIC 0x1A2B
#define HGIC_HDR_RX_MAGIC 0x2B1A
#define HGIC_VENDOR_ID (0xA012)
#define HGIC_WLAN_AH_6001 (0x6001)
#define HGIC_WLAN_AH_4001 (0x4001)
#define HGIC_WLAN_AH_4002 (0x4002)
#define HGIC_WLAN_BGN_4102 (0x4102)
#define HGIC_WLAN_BGN_4103 (0x4103)
#define HGIC_WLAN_BGN_4104 (0x4104)
#define HGIC_WLAN_BGN_8400 (0x8400)
#define HGIC_CTRL_TIMEOUT 100
#define HGIC_CMD_PRIORITY 0
#define HGIC_TX_WINDOW 20
#define HGIC_TX_COOKIE_MASK 0x7FFF
#define HGIC_BLOCK_ACK_CNT 256
#define HGIC_BOOTDL_CMD_ENTER (0x00)
#define HGIC_BOOTDL_CMD_WRITE_MEM (0x02)
#define HGIC_BOOTDL_CMD_RUN (0x04)
#define HGIC_BOOTDL_RSP_ERR_IN_FW (0xFF)
#define hgic_dbg(fmt, ...) //os_printf("%s:%d::"fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__)
#define hgic_err(fmt, ...) os_printf(fmt, ##__VA_ARGS__)
#define hgic_enter() os_printf("enter %s\n", __FUNCTION__)
#define hgic_leave() os_printf("leave %s\n", __FUNCTION__)
#define HGIC_CMD_TIMEOUT 100
#define HGIC_TX_TIMEOUT 10
enum hgic_dev_flags {
HGIC_DEV_FLAGS_STOP = BIT(0),
HGIC_DEV_FLAGS_RUNNING = BIT(1),
};
enum hgic_bus_type {
HGIC_BUS_SDIO = 0x1,
HGIC_BUS_USB,
HGIC_BUS_HWSIM,
HGIC_BUS_WFOE,
};
enum hgic_cmd {
HGIC_CMD_DEV_OPEN = 1,
HGIC_CMD_DEV_CLOSE = 2,
HGIC_CMD_SET_MAC = 3,
HGIC_CMD_SET_SSID = 4,
HGIC_CMD_SET_BSSID = 5,
HGIC_CMD_SET_COUNTRY = 6,
HGIC_CMD_SET_CHANNEL = 7,
HGIC_CMD_SET_CENTER_FREQ = 8,
HGIC_CMD_SET_RTS_THRESHOLD = 9,
HGIC_CMD_SET_FRG_THRESHOLD = 10,
HGIC_CMD_SET_KEY_MGMT = 11,
HGIC_CMD_SET_WPA_PSK = 12,
HGIC_CMD_SET_KEY = 13,
HGIC_CMD_SCAN = 14,
HGIC_CMD_GET_SCAN_LIST = 15,
HGIC_CMD_SET_BSSID_FILTER = 16,
HGIC_CMD_DISCONNECT = 17,
HGIC_CMD_GET_BSSID = 18,
HGIC_CMD_SET_WBNAT = 19,
HGIC_CMD_GET_STATUS = 20,
HGIC_CMD_SET_LISTEN_INTERVAL = 21,
HGIC_CMD_SET_TX_POWER = 22,
HGIC_CMD_GET_TX_POWER = 23,
HGIC_CMD_SET_TX_LCOUNT = 24,
HGIC_CMD_SET_TX_SCOUNT = 25,
HGIC_CMD_ADD_STA = 26,
HGIC_CMD_REMOVE_STA = 27,
HGIC_CMD_SET_TX_BW = 28,
HGIC_CMD_SET_TX_MCS = 29,
HGIC_CMD_SET_FREQ_RANGE = 30,
HGIC_CMD_ACS_ENABLE = 31,
HGIC_CMD_SET_PRIMARY_CHAN = 32,
HGIC_CMD_SET_BG_RSSI = 33,
HGIC_CMD_SET_BSS_BW = 34,
HGIC_CMD_TESTMODE_CMD = 35,
HGIC_CMD_SET_AID = 36,
HGIC_CMD_GET_FW_STATE = 37,
HGIC_CMD_SET_TXQ_PARAM = 38,
HGIC_CMD_SET_CHAN_LIST = 39,
HGIC_CMD_GET_CONN_STATE = 40,
HGIC_CMD_SET_WORK_MODE = 41,
HGIC_CMD_SET_PAIRED_STATIONS = 42,
HGIC_CMD_GET_FW_INFO = 43,
HGIC_CMD_PAIRING = 44,
HGIC_CMD_GET_TEMPERATURE = 45,
HGIC_CMD_ENTER_SLEEP = 46,
HGIC_CMD_OTA = 47,
HGIC_CMD_GET_SSID = 48,
HGIC_CMD_GET_WPA_PSK = 49,
HGIC_CMD_GET_SIGNAL = 50,
HGIC_CMD_GET_TX_BITRATE = 51,
HGIC_CMD_SET_BEACON_INT = 52,
HGIC_CMD_GET_STA_LIST = 53,
HGIC_CMD_SAVE_CFG = 54,
HGIC_CMD_JOIN_GROUP = 55,
HGIC_CMD_SET_ETHER_TYPE = 56,
HGIC_CMD_GET_STA_COUNT = 57,
HGIC_CMD_SET_HEARTBEAT_INT = 58,
HGIC_CMD_SET_MCAST_KEY = 59,
HGIC_CMD_SET_AGG_CNT = 60,
HGIC_CMD_GET_AGG_CNT = 61,
HGIC_CMD_GET_BSS_BW = 62,
HGIC_CMD_GET_FREQ_RANGE = 63,
HGIC_CMD_GET_CHAN_LIST = 64,
HGIC_CMD_RADIO_ONOFF = 65,
HGIC_CMD_SET_PS_HEARTBEAT = 66,
HGIC_CMD_SET_WAKEUP_STA = 67,
HGIC_CMD_SET_PS_HEARTBEAT_RESP = 68,
HGIC_CMD_SET_PS_WAKEUP_DATA = 69,
HGIC_CMD_SET_PS_CONNECT = 70,
HGIC_CMD_SET_BSS_MAX_IDLE = 71,
HGIC_CMD_SET_WKIO_MODE = 72,
HGIC_CMD_SET_DTIM_PERIOD = 73,
HGIC_CMD_SET_PS_MODE = 74,
HGIC_CMD_LOAD_DEF = 75,
HGIC_CMD_DISASSOC_STA = 76,
HGIC_CMD_SET_APLOST_TIME = 77,
HGIC_CMD_GET_WAKEUP_REASON = 78,
HGIC_CMD_UNPAIR = 79,
HGIC_CMD_SET_AUTO_CHAN_SWITCH = 80,
HGIC_CMD_SET_REASSOC_WKHOST = 81,
HGIC_CMD_SET_WAKEUP_IO = 82,
HGIC_CMD_DBGINFO_OUTPUT = 83,
HGIC_CMD_SET_SYSDBG = 84,
HGIC_CMD_SET_AUTO_SLEEP_TIME = 85,
HGIC_CMD_GET_KEY_MGMT = 86,
HGIC_CMD_SET_PAIR_AUTOSTOP = 87,
HGIC_CMD_SET_SUPER_PWR = 88,
HGIC_CMD_SET_REPEATER_SSID = 89,
HGIC_CMD_SET_REPEATER_PSK = 90,
HGIC_CMD_CFG_AUTO_SAVE = 91,
HGIC_CMD_SEND_CUST_MGMT = 92,
HGIC_CMD_GET_BATTERY_LEVEL = 93,
HGIC_CMD_SET_DCDC13 = 94,
HGIC_CMD_SET_ACKTMO = 95,
HGIC_CMD_GET_MODULETYPE = 96,
HGIC_CMD_PA_PWRCTRL_DIS = 97,
HGIC_CMD_SET_DHCPC = 98,
HGIC_CMD_GET_DHCPC_RESULT = 99,
HGIC_CMD_SET_WKUPDATA_MASK = 100,
HGIC_CMD_GET_WKDATA_BUFF = 101,
HGIC_CMD_GET_DISASSOC_REASON = 102,
HGIC_CMD_SET_WKUPDATA_SAVEEN = 103,
HGIC_CMD_SET_CUST_DRIVER_DATA = 104,
HGIC_CMD_SET_MCAST_TXPARAM = 105,
HGIC_CMD_SET_STA_FREQINFO = 106,
HGIC_CMD_SET_RESET_STA = 107,
HGIC_CMD_SET_UART_FIXLEN = 108,
HGIC_CMD_GET_UART_FIXLEN = 109,
HGIC_CMD_SET_ANT_AUTO = 110,
HGIC_CMD_SET_ANT_SEL = 111,
HGIC_CMD_GET_ANT_SEL = 112,
HGIC_CMD_SET_WKUP_HOST_REASON = 113,
HGIC_CMD_SET_MAC_FILTER_EN = 114,
HGIC_CMD_SET_ATCMD = 115,
HGIC_CMD_SET_ROAMING = 116,
HGIC_CMD_SET_AP_HIDE = 117,
HGIC_CMD_SET_DUAL_ANT = 118,
HGIC_CMD_SET_MAX_TCNT = 119,
HGIC_CMD_SET_ASSERT_HOLDUP = 120,
HGIC_CMD_SET_AP_PSMODE_EN = 121,
HGIC_CMD_SET_DUPFILTER_EN = 122,
HGIC_CMD_SET_DIS_1V1_M2U = 123,
HGIC_CMD_SET_DIS_PSCONNECT = 124,
HGIC_CMD_SET_RTC = 125,
HGIC_CMD_GET_RTC = 126,
HGIC_CMD_SET_KICK_ASSOC = 127,
HGIC_CMD_START_ASSOC = 128,
HGIC_CMD_SET_AUTOSLEEP = 129,
HGIC_CMD_SET_BLENC_DATA = 130,
HGIC_CMD_SET_BLENC_EN = 131,
HGIC_CMD_RESET = 132,
HGIC_CMD_SET_HWSCAN = 133,
HGIC_CMD_GET_TXQ_PARAM = 134,
HGIC_CMD_SET_PROMISC = 135,
HGIC_CMD_SET_USER_EDCA = 136,
HGIC_CMD_SET_FIX_TXRATE = 137,
HGIC_CMD_SET_NAV_MAX = 138,
HGIC_CMD_CLEAR_NAV = 139,
HGIC_CMD_SET_CCA_PARAM = 140,
HGIC_CMD_SET_TX_MODGAIN = 141,
HGIC_CMD_GET_NAV = 142,
HGIC_CMD_SET_BEACON_START = 143,
HGIC_CMD_SET_BLE_OPEN = 144,
HGIC_CMD_GET_MODE = 145,
HGIC_CMD_GET_BGRSSI = 146,
HGIC_CMD_SET_BLENC_ADVDATA = 147,
HGIC_CMD_SET_BLENC_SCANRESP = 148,
HGIC_CMD_SET_BLENC_DEVADDR = 149,
HGIC_CMD_SET_BLENC_ADVINTERVAL = 150,
HGIC_CMD_SET_BLENC_STARTADV = 151,
HGIC_CMD_SET_RTS_DURATION = 152,
HGIC_CMD_STANDBY_CFG = 153,
HGIC_CMD_SET_CONNECT_PAIRONLY = 154,
HGIC_CMD_SET_DIFFCUST_CONN = 155,
HGIC_CMD_GET_CENTER_FREQ = 156,
HGIC_CMD_SET_WAIT_PSMODE = 157,
HGIC_CMD_SET_AP_CHAN_SWITCH = 158,
HGIC_CMD_SET_CCA_FOR_CE = 159,
HGIC_CMD_SET_DISABLE_PRINT = 160,
HGIC_CMD_SET_APEP_PADDING = 161,
HGIC_CMD_GET_ACS_RESULT = 162,
HGIC_CMD_GET_WIFI_STATUS_CODE = 163,
HGIC_CMD_GET_WIFI_REASON_CODE = 164,
HGIC_CMD_SET_WATCHDOG = 165,
HGIC_CMD_SET_RETRY_FALLBACK_CNT = 166,
HGIC_CMD_SET_FALLBACK_MCS = 167,
HGIC_CMD_GET_XOSC_VALUE = 168,
HGIC_CMD_SET_XOSC_VALUE = 169,
HGIC_CMD_GET_FREQ_OFFSET = 170,
HGIC_CMD_SET_CALI_PERIOD = 171,
HGIC_CMD_SET_BLENC_ADVFILTER = 172,
HGIC_CMD_SET_MAX_TX_DELAY = 173,
HGIC_CMD_GET_STA_INFO = 174,
HGIC_CMD_SEND_MGMTFRAME = 175,
HGIC_CMD_SET_POOL_MAXUSAGE = 176,
HGIC_CMD_SET_ICMP_MNTR = 177,
HGIC_CMD_SET_WIFI_PASSWD = 178,
HGIC_CMD_SET_WIFI_RPASSWD = 179,
HGIC_CMD_GET_CHIP_UUID = 180,
HGIC_CMD_SET_COEXIST_EN = 181,
HGIC_CMD_SET_THROUGHPUT_EN = 182,
HGIC_CMD_SET_PS_HBDATA_MASK = 183,
HGIC_CMD_SET_MEM_RECYCLE = 184,
HGIC_CMD_SET_HOST_MONITOR = 185,
HGIC_CMD_SET_DMA_SCATTER = 186,
HGIC_CMD_SET_BLE_LL_LENGTH = 187,
HGIC_CMD_SET_SLEEP_ROAMING = 188,
HGIC_CMD_SET_EDCA_LIMIT_MAX = 189,
HGIC_CMD_SET_EDCA_SLOT_TIME = 190,
HGIC_CMD_SET_EDCA_LIMIT_MIN = 191,
HGIC_CMD_SET_SIGNAL_THRESHOLD = 192,
HGIC_CMD_SET_ROAMING_BSSID = 193,
HGIC_CMD_GET_LINK_QUALITY = 194,
HGIC_CMD_SET_NAV_LIMIT_MAX = 195,
HGIC_CMD_SET_TXPOWER_MODE = 196,
HGIC_CMD_SET_DISABLE_BSS = 197,
HGIC_CMD_SET_RESP_IND = 198,
HGIC_CMD_SET_SHORT_GI = 199,
HGIC_CMD_SET_NDP_PROBE = 200,
HGIC_CMD_SET_CTRL_RESP_1M = 201,
HGIC_CMD_SET_AMPDU_EN = 202,
HGIC_CMD_SET_DUP_1M = 203,
};
enum hgic_event {
HGIC_EVENT_STATE_CHG = 1,
HGIC_EVENT_CH_SWICH = 2,
HGIC_EVENT_DISCONNECT_REASON = 3,
HGIC_EVENT_ASSOC_STATUS = 4,
HGIC_EVENT_SCANNING = 5,
HGIC_EVENT_SCAN_DONE = 6,
HGIC_EVENT_TX_BITRATE = 7,
HGIC_EVENT_PAIR_START = 8,
HGIC_EVENT_PAIR_SUCCESS = 9,
HGIC_EVENT_PAIR_DONE = 10,
HGIC_EVENT_CONECT_START = 11,
HGIC_EVENT_CONECTED = 12,
HGIC_EVENT_DISCONECTED = 13,
HGIC_EVENT_SIGNAL = 14,
HGIC_EVENT_DISCONNET_LOG = 15,
HGIC_EVENT_REQUEST_PARAM = 16,
HGIC_EVENT_TESTMODE_STATE = 17,
HGIC_EVENT_FWDBG_INFO = 18,
HGIC_EVENT_CUSTOMER_MGMT = 19,
HGIC_EVENT_SLEEP_FAIL = 20,
HGIC_EVENT_DHCPC_DONE = 21,
HGIC_EVENT_CONNECT_FAIL = 22,
HGIC_EVENT_CUST_DRIVER_DATA = 23,
HGIC_EVENT_UNPAIR_STA = 24,
HGIC_EVENT_BLENC_DATA = 25,
HGIC_EVENT_HWSCAN_RESULT = 26,
HGIC_EVENT_EXCEPTION_INFO = 27,
HGIC_EVENT_DSLEEP_WAKEUP = 28,
HGIC_EVENT_STA_MIC_ERROR = 29,
HGIC_EVENT_ACS_DONE = 30,
HGIC_EVENT_FW_INIT_DONE = 31,
HGIC_EVENT_ROAM_CONECTED = 32,
HGIC_EVENT_MGMT_FRAME = 33,
HGIC_EVENT_UNKNOWN_STA = 34,
HGIC_EVENT_ROAM_FAIL = 35,
HGIC_EVENT_BEACON_TX_DONE = 36,
HGIC_EVENT_WIFI_FATAL_ERR = 37,
};
enum HGIC_EXCEPTION_NUM {
HGIC_EXCEPTION_CPU_USED_OVERTOP = 1,
HGIC_EXCEPTION_HEAP_USED_OVERTOP = 2,
HGIC_EXCEPTION_WIFI_BUFFER_USED_OVERTOP = 3,
HGIC_EXCEPTION_TX_BLOCKED = 4,
HGIC_EXCEPTION_TXDELAY_TOOLONG = 5,
HGIC_EXCEPTION_STRONG_BGRSSI = 6,
HGIC_EXCEPTION_TEMPERATURE_OVERTOP = 7,
HGIC_EXCEPTION_WRONG_PASSWORD = 8,
};
struct hgic_exception_info {
int32 num;
union {
struct {
int32 max, avg, min;
} txdelay;
struct {
int32 max, avg, min;
} bgrssi;
struct {
int32 total, used;
} buffer_usage;
struct {
int32 total, used;
} heap_usage;
struct {
int32 temp;
} temperature;
} info;
};
enum hgic_testbox_cmd {
HGIC_TESTBOX_CMD_DEV_INIT = 1,
HGIC_TESTBOX_CMD_GD_TEST_START = 2,
HGIC_TESTBOX_CMD_GD_TX_FRM_TYPE = 3,
HGIC_TESTBOX_CMD_GD_TX_MCS = 4,
HGIC_TESTBOX_CMD_GD_TX_DELAY = 5,
HGIC_TESTBOX_CMD_GD_TX_START = 6,
HGIC_TESTBOX_CMD_GET_RSSI = 7,
HGIC_TESTBOX_CMD_GET_EVM = 8,
HGIC_TESTBOX_CMD_GET_BGRSSI = 9,
HGIC_TESTBOX_CMD_GET_FREQ_OFFSET = 10,
HGIC_TESTBOX_CMD_GET_DUT_MAC = 11,
HGIC_TESTBOX_CMD_SET_RSSI_RANGE = 12,
HGIC_TESTBOX_CMD_SET_FREQ_OFFSET_TH = 13,
HGIC_TESTBOX_CMD_SET_FREQ_CALI_EN = 14,
HGIC_TESTBOX_CMD_SET_WRITE_EFUSE_EN = 15,
HGIC_TESTBOX_CMD_DEV_OPEN = 16,
};
enum hgic_hdr_type {
HGIC_HDR_TYPE_ACK = 1,
HGIC_HDR_TYPE_FRM = 2,
HGIC_HDR_TYPE_CMD = 3,
HGIC_HDR_TYPE_EVENT = 4,
HGIC_HDR_TYPE_FIRMWARE = 5,
HGIC_HDR_TYPE_NLMSG = 6,
HGIC_HDR_TYPE_BOOTDL = 7,
HGIC_HDR_TYPE_TEST = 8,
HGIC_HDR_TYPE_FRM2 = 9,
HGIC_HDR_TYPE_TEST2 = 10,
HGIC_HDR_TYPE_SOFTFC = 11,
HGIC_HDR_TYPE_OTA = 12,
HGIC_HDR_TYPE_CMD2 = 13,
HGIC_HDR_TYPE_EVENT2 = 14,
HGIC_HDR_TYPE_BOOTDL_DATA = 15,
HGIC_HDR_TYPE_IFBR = 16,
HGIC_HDR_TYPE_BEACON = 17,
HGIC_HDR_TYPE_AGGFRM = 18,
HGIC_HDR_TYPE_BLUETOOTH = 19,
HGIC_HDR_TYPE_TESTBOX = 20,
HGIC_HDR_TYPE_MAX,
};
enum hgic_hdr_flags2 {
HGIC_HDR_FLAGS2_AFT_BEACON = BIT(0),
HGIC_HDR_FLAGS2_MGMT_ACK = BIT(1),
};
/*data packet header*/
struct hgic_hdr {
unsigned short magic;
unsigned char type;
unsigned char ifidx: 4, flags: 4;
unsigned short length;
unsigned short cookie;
} __packed;
struct hgic_rx_info {
uint8 band;
uint8 mcs: 4, bw: 4;
int8 evm;
int8 signal;
uint16 freq;
int16 freq_off;
uint8 rx_flags;
uint8 antenna: 4, moredata: 1, rev: 3;
uint8 vht_nss : 4, s1g_nss : 4;
uint8 vht_flag : 3, s1g_flag : 5;
};
struct hgic_tx_info {
uint8 band;
uint8 tx_bw;
uint8 tx_mcs;
uint8 freq_idx: 5, antenna: 3;
uint32 tx_flags;
uint16 tx_flags2;
uint8 priority;
uint8 tx_power;
};
#ifndef CONFIG_UMAC
enum ieee80211_key_flags {
IEEE80211_KEY_FLAG_GENERATE_IV_MGMT = BIT(0),
IEEE80211_KEY_FLAG_GENERATE_IV = 1 << 1,
IEEE80211_KEY_FLAG_GENERATE_MMIC = 1 << 2,
IEEE80211_KEY_FLAG_PAIRWISE = 1 << 3,
IEEE80211_KEY_FLAG_SW_MGMT_TX = 1 << 4,
IEEE80211_KEY_FLAG_PUT_IV_SPACE = 1 << 5,
IEEE80211_KEY_FLAG_RX_MGMT = 1 << 6,
IEEE80211_KEY_FLAG_GROUP_TX = BIT(7),
IEEE80211_KEY_FLAG_GROUP_RX = BIT(8),
};
#endif
struct hgic_key_conf {
unsigned int cipher;
unsigned int flags;
unsigned char keyidx;
unsigned char keylen;
unsigned char key[0];
};
struct hgic_sta_info {
unsigned char aid;
unsigned char ps: 1, rev: 7;
unsigned char addr[6];
signed char rssi;
signed char evm;
signed char tx_snr;
signed char rx_snr;
};
//当前链路质量
struct hgic_link_quality {
char bgrssi;
char rssi;
char evm;
char per;
int obss_stas;
int cca_busy[8]; // 1M,2M,4M,8M
};
struct hgic_frm_hdr {
struct hgic_hdr hdr;
union {
struct hgic_rx_info rx_info;
struct hgic_tx_info tx_info;
uint8 rev[24];
};
} __packed;
struct hgic_frm_hdr2 {
struct hgic_hdr hdr;
} __packed;
struct hgic_acs_ctl {
uint32 enable: 1, scan_ms: 8, chn_bitmap: 23;
};
struct hgic_acs_result{
uint32 freq;//KHz
uint8 sync_cnt;
int8 min;
int8 max;
int8 avg;
};
#define HDR_CMDID(ctl) ((ctl)->hdr.type==HGIC_HDR_TYPE_CMD2?(ctl)->cmd2.cmd_id:(ctl)->cmd.cmd_id)
#define HDR_CMDRESP(ctl) ((ctl)->hdr.type==HGIC_HDR_TYPE_CMD2?(ctl)->cmd2.status:(ctl)->cmd.status)
#define HDR_EVTID(ctl) ((ctl)->hdr.type==HGIC_HDR_TYPE_EVENT2?(ctl)->event2.event_id:(ctl)->event.event_id)
#define HDR_CMDID_SET(ctl, id) if(id>255){\
(ctl)->hdr.type =HGIC_HDR_TYPE_CMD2;\
(ctl)->cmd2.cmd_id = id;\
}else{\
(ctl)->hdr.type =HGIC_HDR_TYPE_CMD;\
(ctl)->cmd.cmd_id = id;\
}
#define HDR_EVTID_SET(ctl, id) if(id>255){\
(ctl)->hdr.type =HGIC_HDR_TYPE_EVENT2;\
(ctl)->event2.event_id = id;\
}else{\
(ctl)->hdr.type =HGIC_HDR_TYPE_EVENT;\
(ctl)->event.event_id = id;\
}
/*contro pakcet header*/
struct hgic_ctrl_hdr {
struct hgic_hdr hdr;
union {
struct {
unsigned char cmd_id;
short status;
} cmd;
struct {
unsigned short cmd_id;
short status;
} cmd2;
struct {
unsigned char event_id;
} event;
struct {
unsigned short event_id;
} event2;
struct {
unsigned char type;
} hci;
unsigned char info[4];
};
} __packed;
#define HGIC_CTRL_HDR_LEN (sizeof(struct hgic_ctrl_hdr))
//ack packet
struct hgic_dack_hdr {
struct hgic_hdr hdr;
uint16_t cookies[0];
} __packed;
struct hgic_bootdl_cmd_hdr {
struct hgic_hdr hdr;
unsigned char cmd;
unsigned char cmd_len;
unsigned char cmd_flag;
unsigned char addr[4];
unsigned char len[4];
unsigned char check;
} __packed;
struct hgic_bootdl_resp_hdr {
struct hgic_hdr hdr;
unsigned char cmd;
unsigned char rsp;
unsigned char rsp_data[4];
unsigned char reserved;
unsigned char check;
} __packed;
struct hgic_fw_info {
uint32 version;
uint32 svn_version;
uint16 chip_id;
uint16 cpuid;
uint8 mac[6];
uint8 resv[2]; //align 4 for app_version
uint32 app_version;
uint32 smt_dat;
} __packed;
struct hgic_bss_info {
uint8 bssid[6];
uint8 ssid[32];
uint8 encrypt;
int8 signal;
uint16 freq;
};
struct hgic_freqinfo {
uint8 bss_bw, chan_cnt;
uint16 freq_start, freq_end;
uint16 chan_list[16];
};
struct hgic_module_hwinfo {
union {
struct {
uint8 type;
uint8 saw: 1, rev: 7;
};
unsigned short v;
};
};
#endif

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#ifndef IEEE802_11_AH_DEFS_H
#define IEEE802_11_AH_DEFS_H
#ifdef __cplusplus
extern "C" {
#endif
#include <typesdef.h>
#include "ieee802_11_defs.h"
#define GET_FC(addr) get_unaligned_le16(addr)
#define GET_PV(addr) ((*(uint8 *)addr) & 0x03)
static const uint8 broadcast_addr[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
//#define GET_TYPE_SUBTYPE(fc) (((fc) & 0x00fc) >> 2)
/* control */
#define WLAN_FC_STYPE_CTRL_WRAP 7
#define WLAN_FC_STYPE_BA_REQ 8
#define WLAN_FC_STYPE_BA 9
#define ACK_RXED_FLAG -1
#define BA_RXED_FLAG -2
#define WLAN_INVALID_SEQ_NUM 0xFFFF
#define WLAN_EID_EXT_QA_OPERATION (128)
#define MAC_ADDR_SIZE 6
#define COMPRESSED_S1G_SSID_MAX_LEN 4
#define SHORT_ID_MASK 0x00001fff
#define IEEE80211_QOS_CTL_TID_MASK 0x000f
#define IEEE80211_MORE_DATA_MASK 0x2000
enum _NDP_BW {
NDP_NONE = 0,
NDP_1MHZ = 1,
NDP_2MHZ = 2,
};
enum _DUP_EN {
DUP_DISABLE = 0,
DUP_ENABLE = 1,
};
/*
* same as struct ieee80211_rts, to be delete
*/
struct pv0_ctrl_rts {
union {
uint16 val;
IEEE80211_FRAME_CONTROL fc;
};
uint16 duration;
uint8 ra[MAC_ADDR_SIZE];
uint8 ta[MAC_ADDR_SIZE];
};
struct short_id {
uint16 aid : 13,
a3p : 1,
a4p : 1,
amsdu : 1;
};
struct sid_mac {
struct short_id sid;
uint8 mac[MAC_ADDR_SIZE];
};
struct fromds0_addr {
uint8 a1[MAC_ADDR_SIZE];
struct short_id a2;
};
struct fromds1_addr {
struct short_id a1;
uint8 a2[MAC_ADDR_SIZE];
};
struct ieee80211_pv1_qos_data1 {
union {
uint16 frame_control;
IEEE80211_FRAME_CONTROL frm_ctrl;
} fc;
union {
struct fromds0_addr sta2ap;
struct fromds1_addr ap2sta;
} addr;
uint16 seq_ctrl;
};
struct ieee80211_pv1_ctrl_action {
union {
uint16 frame_control;
IEEE80211_FRAME_CONTROL frm_ctrl;
} fc;
union {
struct fromds0_addr sta2ap;
struct fromds1_addr ap2sta;
} addr;
uint16 seq_ctrl;
};
struct ieee80211_pv1_qos_data2 {
union {
uint16 val;
IEEE80211_FRAME_CONTROL frm_ctrl;
};
uint8 a1[MAC_ADDR_SIZE];
uint8 a2[MAC_ADDR_SIZE];
uint16 seq_ctrl;
};
// =====================================================================================
// NDP, D8, p.223, to be handled by PHY
//0 NDP CTS (control frame) 9.9.2.1 (NDP CTS)
//0 NDP CF-End (control frame) 9.9.2.2 (NDP CF-End)
//1 NDP PS-Poll (control frame) 9.9.2.3 (NDP PS-Poll)
//2 NDP Ack (control frame) 9.9.2.4 (NDP Ack)
//3 NDP PS-Poll-Ack (control frame) 9.9.2.5 (NDP PS-Poll-Ack)
//4 NDP BlockAck (control frame) 9.9.2.6 (NDP BlockAck)
//5 NDP Beamforming Report Poll (control frame)9.9.2.7 (NDP Beamforming Report Poll)
//6 NDP Paging (control frame) 9.9.2.8 (NDP Paging)
//7 NDP Probe Request (management frame)9.9.3.1 (NDP Probe Request)
//D8, p.276, p.278
// BSSID[39:47]mod(2^9-1) + 1
//(AID[0:8] + 2^5 * BSSID[44:47] (+) BSSID[40:43])mod 2^9
// D8, p.223
struct ndp_cmac_cts1m {
uint32 ndp_type : 3, // B0
cts_cfend_ind : 1, // B3, 0 = CTS, 1 = CF-END or RTS
addr_ind : 1, // B4, 0 = CTS resp to RTS, 1 = AP broadcast
ra_bssid : 9, // B5
duration : 10, //B14 in units of OFDM symbol duration (40 us)
early_sec_ind : 1, //B24, No BF = 0
unused : 7; // make it 32 bit;
};
struct ndp_cmac_cts2m {
uint64 ndp_type : 3, // B0
cts_cfend_ind : 1, // B3, 0 = CTS, 1 = CF-END or RTS
addr_ind : 1, // B4, 0 = CTS resp to RTS, 1 = AP broadcast
ra_bssid : 9, // B5, partial AID for receiving non-ap sta, partial
//bssid for receiving ap
duration : 15, //B14 microseconds nc ? 15 bits?
early_sec_ind : 1, //B29, No BF = 0
bw_ind : 3, //B30, 0=1MHz, 1=2MHz, 2=4MHz, 3=8MHz, 4=16MHz
rsvd : 4, //B33
unused : 27; // make it 64 bit
};
struct ndp_cmac_ack1m { // 2
uint32 ndp_type : 3, // B0
ack_id : 9, // B3
more_data : 1, //B12
idle_ind : 1, //B13
duration : 10, //B14 //idle_ind = 0: in units of 40us, =1:in milliseconds
relay_frame : 1, //B24
unused : 7; // make it 32 bit;
};
struct ndp_cmac_ack2m { // 2
uint64 ndp_type : 3, // B0
ack_id : 16, // B3
more_data : 1, //B19
idle_ind : 1, //B20
duration : 14, //B21
relay_frame : 1, //B35
reserved : 1, //B36
unused : 27; // make it 64 bit;
};
//D8, p.232
struct ndp_cmac_ba1m { // 4
uint32 ndp_type : 3, // B0
id : 2, // B3
start_sn : 12, // B5
bitmap : 8, //B17
unused : 7; // make it 32 bit;
};
struct ndp_cmac_ba2m { // 4
uint64 type : 3, // B0
id : 6, // B3
start_sn : 12, // B9
bitmap : 16, //B21
unused : 27; // make it 64 bit;
};
struct ndp_cmac_psp2m {
uint64 type : 3, // B0
ra : 9, // B3
ta : 9, // B12
preferred_mcs : 4, // B21
udi : 12;// B25, duration in units of 40us
};
struct ndp_cmac_pspack2m {
uint64 type : 3, // B0
ack_id : 16,// B3
more_data : 1, // B19
idle_ind : 1, // B20
duration : 16;// B21, duration in units of us
};
//D8, p.232
struct ndp_probe_req_1m { // 4
uint32 type : 3, // B0
cssid_ano_present : 1, // B3
cssid_ano : 16, // B4
probe_resp_type : 1, // B20
reserved : 4, // B24
unused : 7; // make it 32 bit;
};
struct ndp_probe_req_2m { // 4
uint64 type : 3, // B0
cssid_ano_present : 1, // B3
cssid_ano : 32, // B9
probe_resp_type : 1, //B21
unused : 27; // make it 64 bit;
};
struct ndp_cmac {
union {
struct ndp_cmac_cts1m cts1m;
struct ndp_cmac_cts2m cts2m;
struct ndp_cmac_ack1m ack1m;
struct ndp_cmac_ack2m ack2m;
struct ndp_cmac_ba1m ba1m;
struct ndp_cmac_ba2m ba2m;
struct ndp_cmac_psp2m psp2m;
struct ndp_cmac_pspack2m pspack2m;
//mgmt
struct ndp_probe_req_1m prob_req1m;
struct ndp_probe_req_2m prob_req2m;
uint64 frm_body; // NDP_1M = 25 bits, NDP_2M = 37 bits
};
} ;
enum _ndp_type {
NDP_CTS_CFEND = 0,
NDP_PS_POLL = 1,
NDP_ACK = 2,
NDP_PS_POLL_ACK = 3,
NDP_BA = 4,
NDP_BRP = 5,
NDP_PAGING = 6,
NDP_PROBE_REQ = 7,
};
struct key_iv {
uint8 rsvd : 5, // b0-4
ext_iv: 1, // b5 always 1 for ccmp
key_id: 2; // b6-8, key index, default = 0;
};
struct pv0_ccmp_hdr {
uint8 pn0;
uint8 pn1;
uint8 rsvd;
struct key_iv key_iv;
uint8 pn2;
uint8 pn3;
uint8 pn4;
uint8 pn5;
};
struct ccmp_aad_pv0 {
IEEE80211_FRAME_CONTROL fc;
uint8 a1[MAC_ADDR_SIZE];
uint8 a2[MAC_ADDR_SIZE];
uint8 a3[MAC_ADDR_SIZE];
int16 seq_ctrl;
uint8 options[8]; // a4 qos Optional
};
struct ccmp_aad_pv1 {
IEEE80211_FRAME_CONTROL fc;
uint8 a1[MAC_ADDR_SIZE];
uint8 a2[MAC_ADDR_SIZE];
int16 seq_ctrl;
uint8 options[12]; // a3 a4 Optional
};
struct nonce_flags {
uint8 priority : 4,
mgmt : 1,
pv1 : 1, //pv1 flag
zeros : 2;
};
struct ccmp_nonce {
struct nonce_flags flags; // b0-b3, b4-b7=0;
uint8 a2[MAC_ADDR_SIZE];
uint8 pn[6]; //pn0..5
};
static inline uint8 ieee80211_is_pv0(uint16 fc)
{
return ((fc & WLAN_FC_PVER) == 0x00);
}
/**
* 9.2.4.6.2 HT variant
**/
struct ht_control{
uint32 vht : 1,//b0
trq : 1,//b1 transmit a sounding PPDU
mai : 4,//b2~b5
mfsi : 3,//b6~b8
mfb_aselc : 7,//b9~b15
cali_pos : 2,//b16~b17
cali_seq : 2,//b18~b19
reserved1 : 2,//b20~b21
csi_steering : 2,//b22~b23
ndp_announce : 1,//b24
reserved2 : 4,//b25~b28
dei : 1,//b29
ac_constrain : 1,//b30
rdg : 1;//b31
};
/**
* reference 2016 9.2.4.6.3 VHT variant
* Figure 9-14a—MFB subfield in the VHT variant HT Control field when carried in S1G PPDU
* bw: Set to 0 for 1 MHz, 1 for 2 MHz, 2 for 4 MHz, 3 for 8 MHz
**/
struct vht_control{
uint32 vht : 1,//b0 VHT
reserved : 1,//b1 fix 0
mrq : 1,//b2 mcs req
msi_stbc : 3,//b3~b5
mfsi_gidl : 3,//b6~b8
num_sts : 2,//b9~b10
vht_mcs : 4,//b11~b14
bw : 3,//b15~b17
snr : 6,//b18~b23
gid_h : 3,//b24~b26
coding_type : 1,//b27
fb_tx_type : 1,//b28
unsolicited_mfb : 1,//b29
ac_constraint : 1,//b30
rdg_more_ppdu : 1;//b31
};
struct vs_qa_resp{
int8 rssi;
int8 evm;
int8 freq_dev;//KHz
uint8 agc; //last two
int8 bgrssi;
uint16 svn_version;
uint8 uni_test : 1,
sdk_bver : 4,
sdk_pver : 3;
}STRUCT_PACKED;
struct vs_qa_resp2{
int8 temperature;
uint8 vcc_meas : 6,
resv : 2;
};
struct pv0_ctrl_ba {
union {
uint16 val;
IEEE80211_FRAME_CONTROL fc;
};
uint16 duration; //in microseconds(us)
uint8 ra[MAC_ADDR_SIZE];
uint8 ta[MAC_ADDR_SIZE];
uint16 ba_ack_policy : 1,
multi_tid : 1,
compressed_bitmap : 1,
gcr : 1,
reserved : 8,
tid_info : 4;
uint16 frag_num : 4,
start_seq : 12;
union{
uint64 bitmap;
struct vs_qa_resp qa_resp;
};
}STRUCT_PACKED;
struct pv0_wrapper_ctrl {
union {
uint16 val;
IEEE80211_FRAME_CONTROL fc;
};
uint16 duration;
uint8 ra[MAC_ADDR_SIZE];
union {
uint16 cfc_val;
IEEE80211_FRAME_CONTROL carried_fc;
};
struct vht_control vht_ctrl;
}STRUCT_PACKED;
struct pv0_wrapper_ba {
struct pv0_wrapper_ctrl wp;
uint8 ta[MAC_ADDR_SIZE];
uint16 ba_ack_policy : 1,
multi_tid : 1,
compressed_bitmap : 1,
gcr : 1,
reserved : 8,
tid_info : 4;
uint16 frag_num : 4,
start_seq : 12;
union{
uint64 bitmap;
struct vs_qa_resp qa_resp;
};
}STRUCT_PACKED;
struct pv0_ctrl_wrapper_ba {
union {
uint16 val;
IEEE80211_FRAME_CONTROL fc;
};
uint16 duration;
uint8 ra[MAC_ADDR_SIZE];
union {
uint16 cfc_val;
IEEE80211_FRAME_CONTROL carried_fc;
};
struct vht_control vht_ctrl;
uint8 ta[MAC_ADDR_SIZE];
uint16 ba_ack_policy : 1,
multi_tid : 1,
compressed_bitmap : 1,
gcr : 1,
reserved : 8,
tid_info : 4;
uint16 frag_num : 4,
start_seq : 12;
uint64 bitmap;
}STRUCT_PACKED;
//WLAN_FC_STYPE_QOS_DATA_CFPOLL
struct pv0_data_cf_poll{
union {
uint16 val;
IEEE80211_FRAME_CONTROL fc;
};
uint16 duration; //in microseconds(us)
uint8 ra[MAC_ADDR_SIZE];
uint8 ta[MAC_ADDR_SIZE];
uint8 a3[MAC_ADDR_SIZE];
uint16 seq_ctrl;
uint16 tid:4, //qos control
eosp:1,
ack_policy:2,
reserved:1,
txop_limit:8;
struct vht_control vht_ctrl;
};
struct pv0_ctrl_cf_end{
union {
uint16 val;
IEEE80211_FRAME_CONTROL fc;
};
uint16 duration; //in microseconds(us)
uint8 ra[MAC_ADDR_SIZE];//broad-cast
uint8 ta[MAC_ADDR_SIZE];//bssid
};
//qos null
struct pv0_data_qos_null{
union {
uint16 val;
IEEE80211_FRAME_CONTROL fc;
};
uint16 duration; //in microseconds(us)
uint8 ra[MAC_ADDR_SIZE];//broad-cast
uint8 ta[MAC_ADDR_SIZE];//bssid
uint8 bssid[MAC_ADDR_SIZE];//bssid
uint16 seq_ctrl;
uint16 tid:4, //qos control
eosp:1,
ack_policy:2,
reserved:1,
txop_limit:8;
}STRUCT_PACKED;
//ps-poll
struct pv0_ctrl_pspoll{
union {
uint16 val;
IEEE80211_FRAME_CONTROL fc;
};
uint16 id; //associate ID
uint8 ra[MAC_ADDR_SIZE];//broad-cast
uint8 ta[MAC_ADDR_SIZE];//bssid
}STRUCT_PACKED;
struct pv0_ctrl_ack {
uint16 fc;
uint16 duration;
uint8 ra[MAC_ADDR_SIZE];
}__attribute__ ((__packed__));
/**
* struct ieee80211_channel_sw_ie
* This structure refers to "Channel Switch Announcement information element"
*/
struct ieee80211_channel_sw_ie {
uint8 eid;
uint8 len;
uint8 mode;
uint8 new_ch_num;
uint8 count;
} STRUCT_PACKED;
/**
* This structure refers to 9.4.2.5 CF Parameter Set element
*/
struct ieee80211_cf_parameter_set_ie {
uint8 eid;
uint8 len;
uint8 cfp_count;
uint8 cfp_period;
uint8 cfp_maxdur[2];//TU
uint8 cfp_durremain[2];
} STRUCT_PACKED;
/**
* This structure refers to 9.4.2.6 TIM element
*/
struct ieee80211_tim_ie {
uint8 dtim_count;
uint8 dtim_period;
uint8 bitmap_control;
uint8 partial_virtual_bitmap[1];
} STRUCT_PACKED;
struct ieee80211_s1g_tim_ie{
uint8 dtim_count;
uint8 dtim_period;
uint8 group_traffic_ind : 1,
page_slice_num : 5,
page_idx : 2;
uint8 block_control : 3,
block_offset : 5;
uint8 buff[0];
} STRUCT_PACKED;
struct noise_hist_req{
union{
uint16 freq; //hgic private
uint16 operating_class : 8,
channel_number : 8;
};
uint16 rand_interval;
uint16 meas_duration;
}STRUCT_PACKED;
/**
* reference: Figure 9-147--Measurement Request element format
**/
struct ieee80211_measure_req_ie {
uint8 eid;
uint8 len;
uint8 token;
uint8 parallel : 1,
enable : 1,
request : 1,
report : 1,
dur_mandatory : 1,
reserved : 3;
uint8 type;
} STRUCT_PACKED;
struct bgrssi_report_info {
uint8 freq[4];
int8 bgrssi_avg;
};
struct noise_hist_report{
union{
uint16 freq; //hgic private
uint8 operating_class : 8,
channel_number : 8;
};
uint8 actual_meas_start_time[8];
uint16 meas_dur;
uint8 antenna_id;
uint8 anpi;
uint8 ipi_density[11];
}STRUCT_PACKED;
/**
* reference: Figure 9-191--Measurement Report element format
**/
struct ieee80211_measure_report_ie {
uint8 eid;
uint8 len;
uint8 token;
uint8 late : 1,
incapable : 1,
refused : 1,
reserved : 3;
uint8 type;
//uint8 report[0];//variable
} STRUCT_PACKED;
/**
* struct ieee80211_ext_chansw_ie
*
* This structure represents the "Extended Channel Switch Announcement element"
*/
struct ieee80211_ext_chansw_ie {
uint8 eid;
uint8 len;
uint8 mode;
uint8 new_operating_class;
uint8 new_ch_num;
uint8 count;
} STRUCT_PACKED;
/**
* struct ieee80211_wide_bw_chansw_ie - wide bandwidth channel switch IE
*/
struct ieee80211_wide_bw_chansw_ie {
uint8 new_channel_width;
uint8 new_center_freq_seg0;
uint8 new_center_freq_seg1;
} STRUCT_PACKED;
struct pv0_mgmt_s1g_beacon{
struct {
uint16 protol_version : 2,
type : 2,
subtype : 4,
next_tbtt : 1,
comp_ssid : 1,
ano : 1,
bss_bw : 3,
security : 1,
ap_pm : 1;
};//oct 0~1
uint16 duration;//oct 2~3
uint8 sa[MAC_ADDR_SIZE];////oct 4~9
uint8 timestamp[4];//oct 10~13
uint8 change_sequence; //oct 14
uint8 next_target_beacon_trans_time[3]; //0ct 15~17
uint8 compressed_ssid[4];//0ct 18~21
uint8 access_network_opt;//0ct 22
}STRUCT_PACKED;
struct s1g_beacon_compatibility{
union {
uint16 compat_info;
uint16 ess : 1,
ibss : 1,
cf_pollable : 1,
cf_poll_req : 1,
privacy : 1,
short_preamble:1,
rsvd1 : 1,
rsvd2 : 1,
spectrum_mgmt:1,
qos : 1,
short_slot_time:1,
apsd : 1,
radio_measure:1,
rsvd3 : 1,
delay_ba : 1,
immediate_ba: 1;
};
uint16 interval; //TU= 1024us
uint32 tsf_completion;
}STRUCT_PACKED;
struct vs_bss_announcement_ie{
int32 bss_freq;
int8 pri_chan;
int8 bss_bw;
int8 bg_rssi;//reserved: TODO: add bgrssi
int8 sta_num;
//uint8 ssid[32 + 4];
}STRUCT_PACKED;
#ifdef __cplusplus
}
#endif
#endif

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sdk/include/lib/lmac/lmac.h Normal file
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#ifndef _HGIC_LMAC_H_
#define _HGIC_LMAC_H_
#ifdef __cplusplus
extern "C" {
#endif
/************************************ for lmac rate ************************************/
#define LMAC_RATE_MCS_MASK 0xFF
#define LMAC_RATE_MCS_SHIFT 0
#define LMAC_RATE_NSS_MASK 0x0F
#define LMAC_RATE_NSS_SHIFT 8
#define LMAC_RATE_PHY_TYPE_MASK 0x3F
#define LMAC_RATE_PHY_TYPE_SHIFT 12
//PHY TYPE
#define LMAC_PHY_S1G 0
#define LMAC_PHY_DSSS_CCK 1
#define LMAC_PHY_NON_HT 2
#define LMAC_PHY_HT 3
//flags
#define LMAC_RATE_SHORT_PREAMBLE (1 << 24)
#define LMAC_RATE_SHORT_GI (1 << 24)
#define LMAC_RATE_GREEN_FILED (1 << 25)
//lmac rate define
#define LMAC_RATE_DEF(phy_type, nss, mcs, flags) ((((phy_type) & LMAC_RATE_PHY_TYPE_MASK) << LMAC_RATE_PHY_TYPE_SHIFT) | \
(((nss) & LMAC_RATE_NSS_MASK) << LMAC_RATE_NSS_SHIFT) | \
(((mcs) & LMAC_RATE_MCS_MASK) << LMAC_RATE_MCS_SHIFT) | (flags))
/***************************************************************************************/
//FEM chip support
#define LMAC_FEM_POWER_5V BIT(16) //FEM uses 5V power supply
#define LMAC_FEM_NONE 0
#define LMAC_FEM_GSR2401C 1
#define LMAC_FEM_GSR2701 2
#define LMAC_FEM_GSR2701_3_3V LMAC_FEM_GSR2701
#define LMAC_FEM_GSR2701_5V (LMAC_FEM_GSR2701_3_3V | LMAC_FEM_POWER_5V)
#define LMAC_FEM_KCT8227D_1_SWITCH 3
#define LMAC_FEM_KCT8227D_1_SWITCH_3_3V LMAC_FEM_KCT8227D_1_SWITCH
#define LMAC_FEM_KCT8227D_1_SWITCH_5V (LMAC_FEM_KCT8227D_1_SWITCH | LMAC_FEM_POWER_5V)
#define LMAC_FEM_KCT8227D_NON_SWITCH 4
#define LMAC_FEM_KCT8227D_NON_SWITCH_3_3V LMAC_FEM_KCT8227D_NON_SWITCH
#define LMAC_FEM_KCT8227D_NON_SWITCH_5V (LMAC_FEM_KCT8227D_NON_SWITCH | LMAC_FEM_POWER_5V)
#define LMAC_FEM_KCT8227D_ADD_SWITCH 5
#define LMAC_FEM_KCT8227D_ADD_SWITCH_3_3V LMAC_FEM_KCT8227D_ADD_SWITCH
#define LMAC_FEM_KCT8227D_ADD_SWITCH_5V (LMAC_FEM_KCT8227D_ADD_SWITCH | LMAC_FEM_POWER_5V)
//FREQ offset tracking mode
#define LMAC_FREQ_OFFSET_TRACK_ALWAYS_ON 0
#define LMAC_FREQ_OFFSET_TRACK_ALWAYS_OFF 1
#define LMAC_FREQ_OFFSET_TRACK_ONLY_STA_ON 2
struct lmac_txq_param {
uint16 txop;
uint16 cw_min;
uint16 cw_max;
uint8 aifs;
uint8 acm;
};
struct lmac_init_param {
uint32 rxbuf, rxbuf_size;
uint32 tdma_buff, tdma_buff_size;
uint32 uart0_sel : 1;
};
struct lmac_acs_ctl {
uint32 enable: 1, scan_ms: 8, chn_bitmap: 23;
};
struct lmac_csa_scan_ctl {
uint32 chn_bitmap;
uint8 mode;
uint8 rounds; //The number of rounds to scan before switching channels.
uint8 scan_time; //Scan time per channel, in ms. Allowed range: 10~32.
uint8 period; //The number of beacons to pass before performing a channel scan.
uint8 csa_cnt; //CSA element count
uint8 debug_en; //enable debug print
};
struct lmac_cca_ctl {
int8 start_th;
int8 mid_th;
int8 ed_th;
/* CCA auto adjustment.
* When the cca automatic adjustment takes effect, the
* above three parameters are invalid.
*/
uint8 auto_en : 1;
};
struct lmac_wifi_ble_switch_ctl {
struct {
uint8 chan; //for ble
uint32 type; //for ble
} ble_priv;
/* only work for ap */
struct {
uint8 switch_time; //Switch time per beacon, in ms. Allowed range: 0~32.
uint8 period; //The number of beacons to pass before switching. 0 means no switching will take place.
/* User-defined content that will be passed as a parameter to the hdl function pointer. */
void *arg;
void (*hdl)(void *lmac_ops, void *arg);
} ap_ctl;
};
struct lmac_fallback_type {
uint8 type;
uint8 mcs;
uint8 gi; //for HT: 0 for LGI, 1 for SGI
uint8 bw; //0 for 20M, 1 for 40M
};
struct lmac_fallback_ctl {
struct lmac_fallback_type original;
struct lmac_fallback_type fallback;
};
enum LMAC_IOCTL_CMD {
/*Set CMDs*/
LMAC_IOCTL_SET_AGGCNT = 0x1,
LMAC_IOCTL_SET_BSS_BW,
LMAC_IOCTL_SET_TX_BW,
LMAC_IOCTL_SET_TX_MCS,
LMAC_IOCTL_SET_RTS_TH,
LMAC_IOCTL_SET_TXPOWER,
LMAC_IOCTL_SET_BSS_MAX_IDLE,
LMAC_IOCTL_SET_TX_ORDERED,
LMAC_IOCTL_SET_AUTO_CHAN_SWITCH,
LMAC_IOCTL_SET_PRI_CHAN,
LMAC_IOCTL_SET_RADIO_ONOFF,
LMAC_IOCTL_SET_PS_HEARBEAT,
LMAC_IOCTL_SET_PS_HEARBEAT_RESP,
LMAC_IOCTL_SET_PS_WAKEUP_DATA,
LMAC_IOCTL_SET_PS_HEARBEAT_PERIOD,
LMAC_IOCTL_SET_SSID,
LMAC_IOCTL_SET_WAKEUPIO_MODE,
LMAC_IOCTL_SET_PS_MODE,
LMAC_IOCTL_SET_SLEEP_APLOST_TIME,
LMAC_IOCTL_SET_SLEEP_WAKEIUP_IO,
LMAC_IOCTL_SET_SUPER_PWR,
LMAC_IOCTL_SET_PA_PWR_CTRL,
LMAC_IOCTL_SET_STA_ROAMING,
LMAC_IOCTL_SET_HW_SCAN,
LMAC_IOCTL_SET_COMPRESSED_SSID,
LMAC_IOCTL_SET_VDD13,
LMAC_IOCTL_SET_ACK_TIMEOUT_EXTRA,
LMAC_IOCTL_SET_TX_CNT_MAX,
LMAC_IOCTL_SET_SLEEP_GPIOA_RESV,
LMAC_IOCTL_SET_SLEEP_GPIOB_RESV,
LMAC_IOCTL_SET_SLEEP_GPIOC_RESV,
LMAC_IOCTL_SET_ENTER_SLEEP_CB,
LMAC_IOCTL_SET_KEEP_ALIVE_CB,
LMAC_IOCTL_SET_WAKE_UP_CB,
LMAC_IOCTL_SET_PSCONNECT_PERIOD,
LMAC_IOCTL_SET_MCAST_TX_RATE,
LMAC_IOCTL_SET_MCAST_TXBW,
LMAC_IOCTL_SET_MCAST_TXPOWER,
LMAC_IOCTL_SET_MCAST_DUP_TXCNT,
LMAC_IOCTL_SET_MCAST_CLEAR_CHN,
LMAC_IOCTL_SET_ANT_CTRL_PIN,
LMAC_IOCTL_SET_ANT_DUAL_EN,
LMAC_IOCTL_SET_ANT_AUTO_EN,
LMAC_IOCTL_SET_ANT_SEL,
LMAC_IOCTL_SET_REASSOCIATION,
LMAC_IOCTL_SET_APSLEEP_RC,
LMAC_IOCTL_SET_BSSID,
LMAC_IOCTL_SET_AP_PSMODE_EN,
LMAC_IOCTL_SET_WKSRC_DETECT,
LMAC_IOCTL_SET_RTC,
LMAC_IOCTL_SET_STANDBY,
LMAC_IOCTL_SET_WAIT_PSMODE,
LMAC_IOCTL_SET_CCA_FOR_CE,
LMAC_IOCTL_SET_RXG_OFFEST,
LMAC_IOCTL_SET_OBSS_EN,
LMAC_IOCTL_SET_OBSS_TH,
LMAC_IOCTL_SET_OBSS_PER,
LMAC_IOCTL_SET_BKN_TMO,
LMAC_IOCTL_SET_AID,
LMAC_IOCTL_SET_TXQ_PARAM,
LMAC_IOCTL_SET_MAC_ADDR,
LMAC_IOCTL_SET_MCAST_KEY,
LMAC_IOCTL_DEL_MCAST_KEY,
LMAC_IOCTL_SET_PROMISC_MODE,
LMAC_IOCTL_SET_STA_SUPP_RATE,
LMAC_IOCTL_SET_SUPP_RATE,
LMAC_IOCTL_SET_MAX_STA_CNT,
LMAC_IOCTL_SET_MAX_PS_FRAME,
LMAC_IOCTL_SET_TX_DUTY_CYCLE,
LMAC_IOCTL_SET_SSID_FILTER,
LMAC_IOCTL_SET_WPHY_DPD,
LMAC_IOCTL_SET_PREVENT_PS_MODE,
LMAC_IOCTL_SET_CSA_SCAN_CFG,
LMAC_IOCTL_SET_CSA_SCAN_START,
LMAC_IOCTL_SET_CSA_CHN_SWITCH_NOW,
LMAC_IOCTL_SET_TX_MODULATION_GAIN,
LMAC_IOCTL_SET_TX_EDCA_SLOT_TIME,
LMAC_IOCTL_SET_DBG_LEVEL,
LMAC_IOCTL_SET_FIX_TX_RATE,
LMAC_IOCTL_SET_NAV_MAX,
LMAC_IOCTL_CLR_NAV,
LMAC_IOCTL_SET_CCA,
LMAC_IOCTL_SET_FRAG_TH,
LMAC_IOCTL_SET_BEACON,
LMAC_IOCTL_SET_RTS_FIX_DURATION,
LMAC_IOCTL_SET_DSLEEP_BSS_MAX_IDLE,
LMAC_IOCTL_SET_DSLEEP_WKIO_PIN,
LMAC_IOCTL_SET_DSLEEP_WKIO_EDGE,
LMAC_IOCTL_SET_DSLEEP_APLOST_TIME,
LMAC_IOCTL_SET_DSLEEP_SENS_LEVEL,
LMAC_IOCTL_SET_DSLEEP_PWM_SEL,
LMAC_IOCTL_SET_DSLEEP_PWM_MODE,
LMAC_IOCTL_SET_WIFI_BLE_SWITCH_CFG,
LMAC_IOCTL_SET_WIFI_SWITCH_BLE,
LMAC_IOCTL_SET_BLE_SWITCH_WIFI,
LMAC_IOCTL_SET_RX_AGGCNT,
LMAC_IOCTL_SET_APEP_PADDING,
LMAC_IOCTL_SET_RETRY_FALLBACK_CNT,
LMAC_IOCTL_SET_FALLBACK_MCS,
LMAC_IOCTL_SET_XOSC,
LMAC_IOCTL_SET_FREQ_CALI_PERIOD,
LMAC_IOCTL_SET_MAX_TX_DELAY,
LMAC_IOCTL_SET_RX_DUP_FILTER,
LMAC_IOCTL_SET_RX_REORDER,
LMAC_IOCTL_SET_RF_PWR_LEVEL,
LMAC_IOCTL_SET_RC_MCS_MASK,
LMAC_IOCTL_SET_RC_TYPE,
LMAC_IOCTL_SET_PSRAM_USED,
LMAC_IOCTL_SET_HW_HT_CAP,
LMAC_IOCTL_SET_FEM,
LMAC_SETCFG_SET_SLEEP_ROAMING,
LMAC_IOCTL_SET_TX_DMA_WAIT_EMPTY,
LMAC_IOCTL_SET_PWRLIMIT_MAX_LIMIT,
LMAC_IOCTL_SET_PWRLIMIT_EN,
LMAC_IOCTL_SET_PWRLIMIT_ACTUAL_PWR,
LMAC_IOCTL_SET_PWRLIMIT_GAIN,
LMAC_IOCTL_SET_PWRLIMIT_GAIN_TABLE,
LMAC_IOCTL_SET_EDCA_MAX,
LMAC_IOCTL_SET_TEMPERATURE_COMPESATE_TYPE,
LMAC_IOCTL_SET_RX_DMA_KICK_THRESHOLD,
LMAC_IOCTL_SET_RF_TX_DIGITAL_GAIN,
LMAC_IOCTL_SET_STA_CONNECTED,
LMAC_IOCTL_SET_FREQ_OFFSET_TRACK_MODE,
LMAC_IOCTL_SET_TEMPERATURE_COMPESATE_EN,
LMAC_IOCTL_SET_EDCA_MIN,
LMAC_IOCTL_SET_HEARTBEAT_DATA,
LMAC_IOCTL_SET_START_ASYNC_ACS,
LMAC_IOCTL_SET_TEMP_COMPENSATION_TABLE,
LMAC_IOCTL_SET_PS_NO_FRM_LOSS_EN,
LMAC_IOCTL_SET_STA_CAPABILITES,
LMAC_IOCTL_SET_UPDATE_FEM_VOLTAGE,
LMAC_IOCTL_SET_TX_AGG_TID_BITMAP,
LMAC_IOCTL_SET_BEACON_MODULATION,
LMAC_IOCTL_SET_AFH_PERIOD,
/*Get CMDs*/
LMAC_IOCTL_GET_AGGCNT = 0x20000000,
LMAC_IOCTL_GET_BSS_BW,
LMAC_IOCTL_GET_TX_BW,
LMAC_IOCTL_GET_TX_MCS,
LMAC_IOCTL_GET_RTS_TH,
LMAC_IOCTL_GET_TXPOWER,
LMAC_IOCTL_GET_BSS_MAX_IDLE,
LMAC_IOCTL_GET_TX_ORDERED,
LMAC_IOCTL_GET_LO_FREQ,
LMAC_IOCTL_GET_QA_BW,
LMAC_IOCTL_GET_QA_MCS,
LMAC_IOCTL_GET_QA_PER,
LMAC_IOCTL_GET_AID,
LMAC_IOCTL_GET_PRI_CHAN,
LMAC_IOCTL_GET_MAC_ADDR,
LMAC_IOCTL_GET_BSS_ID,
LMAC_IOCTL_GET_BKN_INTERVAL,
LMAC_IOCTL_GET_DTIM_PERIOD,
LMAC_IOCTL_GET_SLEEP_USER_DATA_ADDR,
LMAC_IOCTL_GET_SLEEP_USER_DATA_LEN,
LMAC_IOCTL_GET_ANT_SEL,
LMAC_IOCTL_GET_BSS_LOAD,
LMAC_IOCTL_GET_RTC,
LMAC_IOCTL_GET_BKN_TMO,
LMAC_IOCTL_GET_SNR,
LMAC_IOCTL_GET_BGR,
LMAC_IOCTL_GET_PROMISC_MODE,
LMAC_IOCTL_GET_STA_SUPP_RATE,
LMAC_IOCTL_GET_SUPP_RATE,
LMAC_IOCTL_GET_MAX_STA_CNT,
LMAC_IOCTL_GET_BG_RSSI,
LMAC_IOCTL_GET_TXQ_PARAM,
LMAC_IOCTL_GET_STA_TX_MCS,
LMAC_IOCTL_GET_NAV,
LMAC_IOCTL_GET_STALIST,
LMAC_IOCTL_GET_RTCC,
LMAC_IOCTL_GET_RX_AGGCNT,
LMAC_IOCTL_GET_ACS_RESULT,
LMAC_IOCTL_GET_XOSC,
LMAC_IOCTL_GET_FREQ_OFFSET,
LMAC_IOCTL_GET_RF_DRV_CHECK,
LMAC_IOCTL_GET_RC_MCS_MASK,
LMAC_IOCTL_GET_RC_TYPE,
LMAC_IOCTL_GET_MODULE_TYPE,
LMAC_IOCTL_GET_ASYNC_ACS_RET,
LMAC_IOCTL_GET_STA_PER,
LMAC_IOCTL_GET_STA_TX_DELAY,
LMAC_IOCTL_GET_STA_TX_DATARATE,
};
enum LMAC_RATE {
/*** for AH ***/
LMAC_RATE_S1G_1_NSS_MCS0 = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 0, 0),
LMAC_RATE_S1G_1_NSS_MCS1 = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 1, 0),
LMAC_RATE_S1G_1_NSS_MCS2 = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 2, 0),
LMAC_RATE_S1G_1_NSS_MCS3 = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 3, 0),
LMAC_RATE_S1G_1_NSS_MCS4 = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 4, 0),
LMAC_RATE_S1G_1_NSS_MCS5 = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 5, 0),
LMAC_RATE_S1G_1_NSS_MCS6 = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 6, 0),
LMAC_RATE_S1G_1_NSS_MCS7 = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 7, 0),
LMAC_RATE_S1G_1_NSS_MCS10 = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 10, 0),
LMAC_RATE_S1G_1_NSS_MCS0_SGI = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 0, LMAC_RATE_SHORT_GI),
LMAC_RATE_S1G_1_NSS_MCS1_SGI = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 1, LMAC_RATE_SHORT_GI),
LMAC_RATE_S1G_1_NSS_MCS2_SGI = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 2, LMAC_RATE_SHORT_GI),
LMAC_RATE_S1G_1_NSS_MCS3_SGI = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 3, LMAC_RATE_SHORT_GI),
LMAC_RATE_S1G_1_NSS_MCS4_SGI = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 4, LMAC_RATE_SHORT_GI),
LMAC_RATE_S1G_1_NSS_MCS5_SGI = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 5, LMAC_RATE_SHORT_GI),
LMAC_RATE_S1G_1_NSS_MCS6_SGI = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 6, LMAC_RATE_SHORT_GI),
LMAC_RATE_S1G_1_NSS_MCS7_SGI = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 7, LMAC_RATE_SHORT_GI),
LMAC_RATE_S1G_1_NSS_MCS10_SGI = LMAC_RATE_DEF(LMAC_PHY_S1G, 1, 10, LMAC_RATE_SHORT_GI),
/*** for BGN ***/
//DSSS/CCK long preamble
LMAC_RATE_DSSS_CCK_RATE0 = LMAC_RATE_DEF(LMAC_PHY_DSSS_CCK, 1, 0, 0), //RATE=1Mbps
LMAC_RATE_DSSS_CCK_RATE1 = LMAC_RATE_DEF(LMAC_PHY_DSSS_CCK, 1, 1, 0), //RATE=2Mbps
LMAC_RATE_DSSS_CCK_RATE2 = LMAC_RATE_DEF(LMAC_PHY_DSSS_CCK, 1, 2, 0), //RATE=5.5Mbps
LMAC_RATE_DSSS_CCK_RATE3 = LMAC_RATE_DEF(LMAC_PHY_DSSS_CCK, 1, 3, 0), //RATE=11Mbps
//DSSS/CCK short preamble
LMAC_RATE_DSSS_CCK_RATE0_SHORT = LMAC_RATE_DEF(LMAC_PHY_DSSS_CCK, 1, 1, LMAC_RATE_SHORT_PREAMBLE), //RATE=2Mbps
LMAC_RATE_DSSS_CCK_RATE1_SHORT = LMAC_RATE_DEF(LMAC_PHY_DSSS_CCK, 1, 2, LMAC_RATE_SHORT_PREAMBLE), //RATE=5.5Mbps
LMAC_RATE_DSSS_CCK_RATE2_SHORT = LMAC_RATE_DEF(LMAC_PHY_DSSS_CCK, 1, 3, LMAC_RATE_SHORT_PREAMBLE), //RATE=11Mbps
//NON HT
LMAC_RATE_NON_HT_RATE0 = LMAC_RATE_DEF(LMAC_PHY_NON_HT, 1, 0, 0),
LMAC_RATE_NON_HT_RATE1 = LMAC_RATE_DEF(LMAC_PHY_NON_HT, 1, 1, 0),
LMAC_RATE_NON_HT_RATE2 = LMAC_RATE_DEF(LMAC_PHY_NON_HT, 1, 2, 0),
LMAC_RATE_NON_HT_RATE3 = LMAC_RATE_DEF(LMAC_PHY_NON_HT, 1, 3, 0),
LMAC_RATE_NON_HT_RATE4 = LMAC_RATE_DEF(LMAC_PHY_NON_HT, 1, 4, 0),
LMAC_RATE_NON_HT_RATE5 = LMAC_RATE_DEF(LMAC_PHY_NON_HT, 1, 5, 0),
LMAC_RATE_NON_HT_RATE6 = LMAC_RATE_DEF(LMAC_PHY_NON_HT, 1, 6, 0),
LMAC_RATE_NON_HT_RATE7 = LMAC_RATE_DEF(LMAC_PHY_NON_HT, 1, 7, 0),
//HT MF long GI
LMAC_RATE_HT_MF_1_NSS_MCS0 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 0, 0),
LMAC_RATE_HT_MF_1_NSS_MCS1 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 1, 0),
LMAC_RATE_HT_MF_1_NSS_MCS2 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 2, 0),
LMAC_RATE_HT_MF_1_NSS_MCS3 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 3, 0),
LMAC_RATE_HT_MF_1_NSS_MCS4 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 4, 0),
LMAC_RATE_HT_MF_1_NSS_MCS5 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 5, 0),
LMAC_RATE_HT_MF_1_NSS_MCS6 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 6, 0),
LMAC_RATE_HT_MF_1_NSS_MCS7 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 7, 0),
//HT MF short GI
LMAC_RATE_HT_MF_1_NSS_MCS0_SGI = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 0, LMAC_RATE_SHORT_GI),
LMAC_RATE_HT_MF_1_NSS_MCS1_SGI = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 1, LMAC_RATE_SHORT_GI),
LMAC_RATE_HT_MF_1_NSS_MCS2_SGI = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 2, LMAC_RATE_SHORT_GI),
LMAC_RATE_HT_MF_1_NSS_MCS3_SGI = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 3, LMAC_RATE_SHORT_GI),
LMAC_RATE_HT_MF_1_NSS_MCS4_SGI = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 4, LMAC_RATE_SHORT_GI),
LMAC_RATE_HT_MF_1_NSS_MCS5_SGI = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 5, LMAC_RATE_SHORT_GI),
LMAC_RATE_HT_MF_1_NSS_MCS6_SGI = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 6, LMAC_RATE_SHORT_GI),
LMAC_RATE_HT_MF_1_NSS_MCS7_SGI = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 7, LMAC_RATE_SHORT_GI),
//HT GF
LMAC_RATE_HT_GF_1_NSS_MCS0 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 0, LMAC_RATE_GREEN_FILED),
LMAC_RATE_HT_GF_1_NSS_MCS1 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 1, LMAC_RATE_GREEN_FILED),
LMAC_RATE_HT_GF_1_NSS_MCS2 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 2, LMAC_RATE_GREEN_FILED),
LMAC_RATE_HT_GF_1_NSS_MCS3 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 3, LMAC_RATE_GREEN_FILED),
LMAC_RATE_HT_GF_1_NSS_MCS4 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 4, LMAC_RATE_GREEN_FILED),
LMAC_RATE_HT_GF_1_NSS_MCS5 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 5, LMAC_RATE_GREEN_FILED),
LMAC_RATE_HT_GF_1_NSS_MCS6 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 6, LMAC_RATE_GREEN_FILED),
LMAC_RATE_HT_GF_1_NSS_MCS7 = LMAC_RATE_DEF(LMAC_PHY_HT, 1, 7, LMAC_RATE_GREEN_FILED),
};
enum {
LMAC_CSA_MODE_MANUAL = 0, //Active scanning with automatic frequency switching.
LMAC_CSA_MODE_SEMI_AUTO = 1, //Active scanning, but no automatic frequency switching.
LMAC_CSA_MODE_AUTO = 2, //Neither active scanning nor automatic frequency switching.
};
#define lmac_set_aggcnt(ops, aggcnt) lmac_ioctl(ops, LMAC_IOCTL_SET_AGGCNT, (uint32)(aggcnt), 0)
#define lmac_get_aggcnt(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_AGGCNT, 0, 0)
#define lmac_set_rx_aggcnt(ops, aggcnt) lmac_ioctl(ops, LMAC_IOCTL_SET_RX_AGGCNT, (uint32)(aggcnt), 0)
#define lmac_get_rx_aggcnt(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_RX_AGGCNT, 0, 0)
#define lmac_set_bss_bw(ops, bss_bw) lmac_ioctl(ops, LMAC_IOCTL_SET_BSS_BW, (uint32)(bss_bw), 0)
#define lmac_get_bss_bw(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_BSS_BW, 0, 0)
#define lmac_set_tx_bw(ops, tx_bw) lmac_ioctl(ops, LMAC_IOCTL_SET_TX_BW, (uint32)(tx_bw), 0)
#define lmac_get_tx_bw(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_TX_BW, 0, 0)
#define lmac_set_tx_mcs(ops, tx_mcs, type) lmac_ioctl(ops, LMAC_IOCTL_SET_TX_MCS, (uint32)(tx_mcs), type)
#define lmac_get_tx_mcs(ops, addr, aid) lmac_ioctl(ops, LMAC_IOCTL_GET_TX_MCS, addr, aid)
#define lmac_set_rts(ops, rts_th) lmac_ioctl(ops, LMAC_IOCTL_SET_RTS_TH, (uint32)(rts_th), 0)
#define lmac_get_rts(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_RTS_TH, 0, 0)
#define lmac_set_txpower(ops, txpower) lmac_ioctl(ops, LMAC_IOCTL_SET_TXPOWER, (uint32)(txpower), 0)
#define lmac_get_txpower(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_TXPOWER, 0, 0)
#define lmac_set_bss_max_idle(ops, max_idle_tu) lmac_ioctl(ops, LMAC_IOCTL_SET_BSS_MAX_IDLE, (uint32)(max_idle_tu), 0)
#define lmac_get_bss_max_idle(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_BSS_MAX_IDLE, 0, 0)
#define lmac_set_strictly_ordered(ops, enable) lmac_ioctl(ops, LMAC_IOCTL_SET_TX_ORDERED, (uint32)(enable), 0)
#define lmac_get_strictly_ordered(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_TX_ORDERED, 0, 0)
#define lmac_get_lo_freq(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_LO_FREQ, 0, 0)
#define lmac_set_pri_chan(ops, prichan) lmac_ioctl(ops, LMAC_IOCTL_SET_PRI_CHAN, (uint32)(prichan), 0)
#define lmac_get_pri_chan(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_PRI_CHAN, 0, 0)
#define lmac_set_aid(ops, ifidx, aid) lmac_ioctl(ops, LMAC_IOCTL_SET_AID, (uint32)(ifidx), (uint32)(aid))
#define lmac_get_aid(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_AID, 0, 0)
#define lmac_set_ssid(ops, ssid) lmac_ioctl(ops, LMAC_IOCTL_SET_SSID, (uint32)(ssid), 32)
#define lmac_set_wkio_mode(ops, mode) lmac_ioctl(ops, LMAC_IOCTL_SET_WAKEUPIO_MODE, (uint32)(mode), 0)
#define lmac_set_ps_mode(ops, mode) lmac_ioctl(ops, LMAC_IOCTL_SET_PS_MODE, (uint32)(mode), 0)
#define lmac_set_sleep_aplost_time(ops, time) lmac_ioctl(ops, LMAC_IOCTL_SET_SLEEP_APLOST_TIME, (uint32)(time), 0)
#define lmac_set_auto_chan_switch(ops, disable) lmac_ioctl(ops, LMAC_IOCTL_SET_AUTO_CHAN_SWITCH, (uint32)(disable), 0)
#define lmac_set_wakeup_io(ops, io, edge) lmac_ioctl(ops, LMAC_IOCTL_SET_SLEEP_WAKEIUP_IO, (uint32)(io), (uint32)(edge))
#define lmac_set_super_pwr(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_SUPER_PWR, (uint32)(en), 0)
#define lmac_set_pa_pwr_ctrl(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_PA_PWR_CTRL, (uint32)(en), 0)
#define lmac_set_sta_roaming(ops, addr, en) lmac_ioctl(ops, LMAC_IOCTL_SET_STA_ROAMING, (uint32)(addr), (en))
#define lmac_set_hw_scan(ops, period, chan) lmac_ioctl(ops, LMAC_IOCTL_SET_HW_SCAN, (uint32)(period), (chan))
#define lmac_set_vdd13(ops, mode) lmac_ioctl(ops, LMAC_IOCTL_SET_VDD13, (uint32)(mode), 0)
#define lmac_set_ack_timeout_extra(ops, val) lmac_ioctl(ops, LMAC_IOCTL_SET_ACK_TIMEOUT_EXTRA, (uint32)(val), 0)
#define lmac_set_retry_cnt(ops, frm_max, rts_max) lmac_ioctl(ops, LMAC_IOCTL_SET_TX_CNT_MAX, (uint32)(frm_max), (uint32)(rts_max))
#define lmac_set_psconnect_period(ops, period) lmac_ioctl(ops, LMAC_IOCTL_SET_PSCONNECT_PERIOD, (uint32)(period), 0)
#define lmac_set_mcast_txmcs(ops, rate) lmac_ioctl(ops, LMAC_IOCTL_SET_MCAST_TX_RATE, (uint32)(rate), 0)
#define lmac_set_mcast_txbw(ops, txbw) lmac_ioctl(ops, LMAC_IOCTL_SET_MCAST_TXBW, (uint32)(txbw), 0)
#define lmac_set_mcast_txpower(ops, txpwr) lmac_ioctl(ops, LMAC_IOCTL_SET_MCAST_TXPOWER, (uint32)(txpwr), 0)
#define lmac_set_mcast_dup_txcnt(ops, dupcnt) lmac_ioctl(ops, LMAC_IOCTL_SET_MCAST_DUP_TXCNT, (uint32)(dupcnt), 0)
#define lmac_set_mcast_clear_chn(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_MCAST_CLEAR_CHN, (uint32)(en), 0)
#define lmac_set_ant_dual_en(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_ANT_DUAL_EN, (uint32)(en), 0)
#define lmac_set_ant_ctrl_pin(ops, pin) lmac_ioctl(ops, LMAC_IOCTL_SET_ANT_CTRL_PIN, (uint32)(pin),0)
#define lmac_set_ant_auto_en(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_ANT_AUTO_EN, (uint32)(en), 0)
#define lmac_set_ant_sel(ops, sel) lmac_ioctl(ops, LMAC_IOCTL_SET_ANT_SEL, (uint32)(sel), 0)
#define lmac_get_ant_sel(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_ANT_SEL, 0, 0)
#define lmac_set_bssid(ops, bssid) lmac_ioctl(ops, LMAC_IOCTL_SET_BSSID, (uint32)(bssid), 0)
#define lmac_set_ap_psmode_en(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_AP_PSMODE_EN, (uint32)(en), 0)
#define lmac_set_wksrc_detect(ops, io, level) lmac_ioctl(ops, LMAC_IOCTL_SET_WKSRC_DETECT, (uint32)(io), (uint32)(level))
#define lmac_set_rtc(ops, rtc) lmac_ioctl(ops, LMAC_IOCTL_SET_RTC, (uint32)(rtc), 0)
#define lmac_get_rtc(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_RTC, 0, 0)
#define lmac_set_bkn_tmo(ops, val) lmac_ioctl(ops, LMAC_IOCTL_SET_BKN_TMO, (val), 0)
#define lmac_get_bkn_tmo(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_BKN_TMO, 0, 0)
#define lmac_get_sta_snr(ops, aid, snr) lmac_ioctl(ops, LMAC_IOCTL_GET_SNR, (aid), (snr))
#define lmac_set_reassociation(ops, aid, addr) lmac_ioctl(ops, LMAC_IOCTL_SET_REASSOCIATION, (uint32)(aid), (uint32)(addr))
#define lmac_get_bss_load(ops, bss_load) lmac_ioctl(ops, LMAC_IOCTL_GET_BSS_LOAD, (uint32)(bss_load), 0)
#define lmac_set_sleep_gpioa_resv(ops, resv) lmac_ioctl(ops, LMAC_IOCTL_SET_SLEEP_GPIOA_RESV, (uint32)(resv), 0)
#define lmac_set_sleep_gpiob_resv(ops, resv) lmac_ioctl(ops, LMAC_IOCTL_SET_SLEEP_GPIOB_RESV, (uint32)(resv), 0)
#define lmac_set_sleep_gpioc_resv(ops, resv) lmac_ioctl(ops, LMAC_IOCTL_SET_SLEEP_GPIOC_RESV, (uint32)(resv), 0)
#define lmac_get_sleep_user_data_addr(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_SLEEP_USER_DATA_ADDR, 0, 0)
#define lmac_get_sleep_user_data_len(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_SLEEP_USER_DATA_LEN, 0, 0)
#define lmac_set_enter_sleep_cb(ops, func) lmac_ioctl(ops, LMAC_IOCTL_SET_ENTER_SLEEP_CB, (uint32)(func), 0)
#define lmac_set_keep_alive_cb(ops, func) lmac_ioctl(ops, LMAC_IOCTL_SET_KEEP_ALIVE_CB, (uint32)(func), 0)
#define lmac_set_wake_up_cb(ops, func) lmac_ioctl(ops, LMAC_IOCTL_SET_WAKE_UP_CB, (uint32)(func), 0)
#define lmac_radio_onoff(ops, onoff) lmac_ioctl(ops, LMAC_IOCTL_SET_RADIO_ONOFF, (uint32)(onoff), 0)
#define lmac_get_qa_bw(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_QA_BW, 0, 0)
#define lmac_get_qa_mcs(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_QA_MCS, 0, 0)
#define lmac_get_qa_per(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_QA_PER, 0, 0)
#define lmac_set_ps_heartbeat(ops, ip, port) lmac_ioctl(ops, LMAC_IOCTL_SET_PS_HEARBEAT, (uint32)(ip), (uint32)(port))
#define lmac_set_ps_heartbeat_resp(ops, data, size) lmac_ioctl(ops, LMAC_IOCTL_SET_PS_HEARBEAT_RESP, (uint32)(data), (size))
#define lmac_set_ps_wakeup_data(ops, data, size) lmac_ioctl(ops, LMAC_IOCTL_SET_PS_WAKEUP_DATA, (uint32)(data), (size))
#define lmac_set_ps_heartbeat_period(ops, period) lmac_ioctl(ops, LMAC_IOCTL_SET_PS_HEARBEAT_PERIOD, (uint32)(period), 0)
#define lmac_set_mcast_key(ops, key, key_len) lmac_ioctl(ops, LMAC_IOCTL_SET_MCAST_KEY, (uint32)(key), (key_len))
#define lmac_set_txq_param(ops, ifidx, txq, param) lmac_ioctl(ops, LMAC_IOCTL_SET_TXQ_PARAM, (uint32)((ifidx)<<16|(txq)), (uint32)(param))
#define lmac_get_txq_param(ops, ifidx, txq, param) lmac_ioctl(ops, LMAC_IOCTL_GET_TXQ_PARAM, (uint32)((ifidx)<<16|(txq)), (uint32)(param))
#define lmac_set_mac_addr(ops, ifidx, addr) lmac_ioctl(ops, LMAC_IOCTL_SET_MAC_ADDR, (uint32)(ifidx), (uint32)(addr))
#define lmac_set_promisc_mode(ops, enable) lmac_ioctl(ops, LMAC_IOCTL_SET_PROMISC_MODE, (enable), 0)
#define lmac_get_promisc_mode(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_PROMISC_MODE, 0, 0)
#define lmac_set_sta_supp_rate(ops, addr, supp_rate) lmac_ioctl(ops, LMAC_IOCTL_SET_STA_SUPP_RATE, (uint32)(addr), (supp_rate))
#define lmac_get_sta_supp_rate(ops, addr) lmac_ioctl(ops, LMAC_IOCTL_GET_STA_SUPP_RATE, (uint32 *)(addr), 0)
#define lmac_set_supp_rate(ops, supp_rate) lmac_ioctl(ops, LMAC_IOCTL_SET_SUPP_RATE, (supp_rate), 0)
#define lmac_get_supp_rate(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_SUPP_RATE, 0, 0)
#define lmac_set_max_sta_cnt(ops, cnt) lmac_ioctl(ops, LMAC_IOCTL_SET_MAX_STA_CNT, (cnt), 0)
#define lmac_get_max_sta_cnt(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_MAX_STA_CNT, 0, 0)
#define lmac_set_max_ps_frame(ops, cnt) lmac_ioctl(ops, LMAC_IOCTL_SET_MAX_PS_FRAME, (cnt), 0)
#define lmac_set_tx_duty_cycle(ops, duty) lmac_ioctl(ops, LMAC_IOCTL_SET_TX_DUTY_CYCLE, (duty), 0)
#define lmac_set_ssid_filter(ops, ssid, len) lmac_ioctl(ops, LMAC_IOCTL_SET_SSID_FILTER, (ssid), (len))
#define lmac_get_bg_rssi(ops, chn, bgr) lmac_ioctl(ops, LMAC_IOCTL_GET_BG_RSSI, (chn), (uint32)(bgr))
#define lmac_set_wphy_dpd(ops, param1) lmac_ioctl(ops, LMAC_IOCTL_SET_WPHY_DPD, (param1), 0)
#define lmac_set_prevent_ps_mode(ops, enable) lmac_ioctl(ops, LMAC_IOCTL_SET_PREVENT_PS_MODE, (enable), 0)
#define lmac_set_csa_scan_cfg(ops, cfg) lmac_ioctl(ops, LMAC_IOCTL_SET_CSA_SCAN_CFG, (uint32)(cfg), 0)
#define lmac_set_csa_chn_switch_now(ops) lmac_ioctl(ops, LMAC_IOCTL_SET_CSA_CHN_SWITCH_NOW, 0, 0)
#define lmac_set_csa_scan_start(ops) lmac_ioctl(ops, LMAC_IOCTL_SET_CSA_SCAN_START, 1, 0)
#define lmac_set_csa_scan_stop(ops) lmac_ioctl(ops, LMAC_IOCTL_SET_CSA_SCAN_START, 0, 0)
#define lmac_set_tx_modulation_gain(ops, table, size) lmac_ioctl(ops, LMAC_IOCTL_SET_TX_MODULATION_GAIN, (uint32)(table), (size))
#define lmac_set_tx_edca_slot_time(ops, slot_us) lmac_ioctl(ops, LMAC_IOCTL_SET_TX_EDCA_SLOT_TIME, (uint32)(slot_us), 0)
#define lmac_get_sta_txmcs(ops, addr) lmac_ioctl(ops, LMAC_IOCTL_GET_STA_TX_MCS, (uint32)(addr), 0)
#define lmac_set_dbg_levle(ops, level) lmac_ioctl(ops, LMAC_IOCTL_SET_DBG_LEVEL, (uint32)(level), 0)
#define lmac_set_fix_tx_rate(ops, rate) lmac_ioctl(ops, LMAC_IOCTL_SET_FIX_TX_RATE, (uint32)(rate), 0)
#define lmac_set_nav_max(ops, max) lmac_ioctl(ops, LMAC_IOCTL_SET_NAV_MAX, (uint32)(max), 0)
#define lmac_clr_nav(ops) lmac_ioctl(ops, LMAC_IOCTL_CLR_NAV, 0, 0)
#define lmac_get_nav(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_NAV, 0, 0)
#define lmac_set_cca(ops, p_cca_ctl) lmac_ioctl(ops, LMAC_IOCTL_SET_CCA, (uint32)(p_cca_ctl), 0)
#define lmac_set_frag_threshold(ops, frag) lmac_ioctl(ops, LMAC_IOCTL_SET_FRAG_TH, (uint32)(frag), 0)
#define lmac_set_beacon_start(ops, start) lmac_ioctl(ops, LMAC_IOCTL_SET_BEACON, (uint32)(start), 0)
#define lmac_get_sta_list(ops, stas, count) lmac_ioctl(ops, LMAC_IOCTL_GET_STALIST, (uint32)(stas), (count))
#define lmac_set_rts_fix_duration(ops, duration_us) lmac_ioctl(ops, LMAC_IOCTL_SET_RTS_FIX_DURATION, (int32)(duration_us), 0)
#define lmac_set_dsleep_max_idle(ops, max_idle_sec) lmac_ioctl(ops, LMAC_IOCTL_SET_DSLEEP_BSS_MAX_IDLE, (uint32)(max_idle_sec), 0)
#define lmac_set_dsleep_wkio_pin(ops, pin_idx, pin_num) lmac_ioctl(ops, LMAC_IOCTL_SET_DSLEEP_WKIO_PIN, (uint32)(pin_idx), (uint32)(pin_num))
#define lmac_set_dsleep_wkio_edge(ops, pin_idx, neg_edge) lmac_ioctl(ops, LMAC_IOCTL_SET_DSLEEP_WKIO_EDGE, (uint32)(pin_idx), (uint32)(neg_edge))
#define lmac_set_dsleep_aplost_time(ops, t_sec) lmac_ioctl(ops, LMAC_IOCTL_SET_DSLEEP_APLOST_TIME, (uint32)(t_sec), 0)
#define lmac_set_dsleep_sens_level(ops, sens_level) lmac_ioctl(ops, LMAC_IOCTL_SET_DSLEEP_SENS_LEVEL, (uint32)(sens_level), 0)
#define lmac_set_dsleep_pwm_sel(ops, pwm_idx, pin_num) lmac_ioctl(ops, LMAC_IOCTL_SET_DSLEEP_PWM_SEL, (uint32)(pwm_idx), (pin_num))
#define lmac_set_dsleep_pwm_mode(ops, pwm_idx, mode) lmac_ioctl(ops, LMAC_IOCTL_SET_DSLEEP_PWM_MODE, (uint32)(pwm_idx), (mode))
#define lmac_set_wifi_ble_switch_cfg(ops, cfg) lmac_ioctl(ops, LMAC_IOCTL_SET_WIFI_BLE_SWITCH_CFG, (uint32)(cfg), 0)
#define lmac_wifi_switch_ble(ops) lmac_ioctl(ops, LMAC_IOCTL_SET_WIFI_SWITCH_BLE, 0, 0)
#define lmac_ble_switch_wifi(ops) lmac_ioctl(ops, LMAC_IOCTL_SET_BLE_SWITCH_WIFI, 0, 0)
#define lmac_get_rtcc(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_RTCC, 0, 0)
#define lmac_set_apep_padding(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_APEP_PADDING, (int32)(en), 0)
#define lmac_set_standby(ops, chn, time) lmac_ioctl(ops, LMAC_IOCTL_SET_STANDBY, (chn), (time))
#define lmac_set_wait_psmode(ops, mode) lmac_ioctl(ops, LMAC_IOCTL_SET_WAIT_PSMODE, (mode), 0)
#define lmac_set_cca_for_ce(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_CCA_FOR_CE, (en), 0)
#define lmac_set_rxg_offest(ops, offset) lmac_ioctl(ops, LMAC_IOCTL_SET_RXG_OFFEST, (offset), 0)
#define lmac_set_obss_en(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_OBSS_EN, (en), 0)
#define lmac_set_obss_th(ops, th) lmac_ioctl(ops, LMAC_IOCTL_SET_OBSS_TH, (th), 0)
#define lmac_set_obss_per(ops, per) lmac_ioctl(ops, LMAC_IOCTL_SET_OBSS_PER, (per), 0)
#define lmac_get_acs_result(ops, result) lmac_ioctl(ops, LMAC_IOCTL_GET_ACS_RESULT, (uint32)(result), 0)
#define lmac_set_retry_fallback_cnt(ops, cnt) lmac_ioctl(ops, LMAC_IOCTL_SET_RETRY_FALLBACK_CNT, (uint32)(cnt), 0)
#define lmac_set_fallback_mcs(ops, p_fb_ctl) lmac_ioctl(ops, LMAC_IOCTL_SET_FALLBACK_MCS, (uint32)(p_fb_ctl), 0)
#define lmac_get_xosc(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_XOSC, 0, 0)
#define lmac_get_freq_offset(ops, addr) lmac_ioctl(ops, LMAC_IOCTL_GET_FREQ_OFFSET, (uint32)(addr), 0)
#define lmac_set_xosc(ops, xosc) lmac_ioctl(ops, LMAC_IOCTL_SET_XOSC, (uint32)(xosc), 0)
#define lmac_set_freq_cali_period(ops, period) lmac_ioctl(ops, LMAC_IOCTL_SET_FREQ_CALI_PERIOD, (uint32)(period), 0)
#define lmac_set_max_tx_delay(ops, time_ms) lmac_ioctl(ops, LMAC_IOCTL_SET_MAX_TX_DELAY, (uint32)(time_ms), 0)
#define lmac_set_rx_dup_filter(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_RX_DUP_FILTER, (uint32)(en), 0)
#define lmac_set_rx_reorder(ops, en, tmo_ms) lmac_ioctl(ops, LMAC_IOCTL_SET_RX_REORDER, (uint32)(en), (uint32)(tmo_ms))
#define lmac_set_rf_pwr_level(ops, level) lmac_ioctl(ops, LMAC_IOCTL_SET_RF_PWR_LEVEL, (uint32)(level), 0)
#define lmac_rf_drv_check(ops, id_ptr) lmac_ioctl(ops, LMAC_IOCTL_GET_RF_DRV_CHECK, (uint32)(id_ptr), 0)
#define lmac_rate_ctrl_mcs_mask(ops, mcs_mask) lmac_ioctl(ops, LMAC_IOCTL_SET_RC_MCS_MASK, (uint32)(mcs_mask), 0)
#define lmac_rate_ctrl_type(ops, type) lmac_ioctl(ops, LMAC_IOCTL_SET_RC_TYPE, (uint32)(type), 0)
#define lmac_set_psram_used(ops, tx_used, rx_used) lmac_ioctl(ops, LMAC_IOCTL_SET_PSRAM_USED, (uint32)((tx_used) | ((rx_used) << 16)), 0)
#define lmac_set_hw_ht_cap(ops, ht_cap) lmac_ioctl(ops, LMAC_IOCTL_SET_HW_HT_CAP, (uint32)(ht_cap), 0)
#define lmac_set_fem(ops, fem_chip) lmac_ioctl(ops, LMAC_IOCTL_SET_FEM, (uint32)(fem_chip), 0)
#define lmac_get_module_type(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_MODULE_TYPE, 0, 0)
#define lmac_set_sleep_roaming(ops, en, rssi) lmac_ioctl(ops, LMAC_SETCFG_SET_SLEEP_ROAMING, en, rssi)
#define lmac_set_tx_dma_wait_empty(ops, wait_empty) lmac_ioctl(ops, LMAC_IOCTL_SET_TX_DMA_WAIT_EMPTY, (uint32)(wait_empty), 0)
#define lmac_set_pwrlimit_max_limit(ops, max_mdbm) lmac_ioctl(ops, LMAC_IOCTL_SET_PWRLIMIT_MAX_LIMIT, (uint32)(max_mdbm), 0)
#define lmac_set_pwrlimit_en(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_PWRLIMIT_EN, (uint32)(en), 0)
#define lmac_set_pwrlimit_actual_pwr(ops, type, mcs, mdbm) lmac_ioctl(ops, LMAC_IOCTL_SET_PWRLIMIT_ACTUAL_PWR, (uint32)(((type)<<16)|(mcs)), (uint32)(mdbm))
#define lmac_set_pwrlimit_gain(ops, type, mcs, gain) lmac_ioctl(ops, LMAC_IOCTL_SET_PWRLIMIT_GAIN, (uint32)(((type)<<16)|(mcs)), (uint32)(gain))
#define lmac_set_pwrlimit_gain_table(ops, gain_table, size) lmac_ioctl(ops, LMAC_IOCTL_SET_PWRLIMIT_GAIN_TABLE, (uint32)(gain_table), (uint32)(size))
#define lmac_set_edca_max(ops, p_txq_param) lmac_ioctl(ops, LMAC_IOCTL_SET_EDCA_MAX, (uint32)(p_txq_param), 0)
#define lmac_set_temperature_compesate_type(ops, type) lmac_ioctl(ops, LMAC_IOCTL_SET_TEMPERATURE_COMPESATE_TYPE, (uint32)(type), 0)
#define lmac_set_rx_dma_kick_threshold(ops, size_th) lmac_ioctl(ops, LMAC_IOCTL_SET_RX_DMA_KICK_THRESHOLD, (uint32)(size_th), 0)
#define lmac_set_rf_tx_digital_gain(ops, gain) lmac_ioctl(ops, LMAC_IOCTL_SET_RF_TX_DIGITAL_GAIN, (uint32)(gain), 0)
#define lmac_set_sta_connected(ops, addr, connected) lmac_ioctl(ops, LMAC_IOCTL_SET_STA_CONNECTED, (uint32)(addr), connected)
#define lmac_set_freq_offset_track_mode(ops, mode) lmac_ioctl(ops, LMAC_IOCTL_SET_FREQ_OFFSET_TRACK_MODE, (uint32)(mode), 0)
#define lmac_set_temperature_compesate_en(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_TEMPERATURE_COMPESATE_EN, (uint32)(en), 0)
#define lmac_set_edca_min(ops, p_txq_param) lmac_ioctl(ops, LMAC_IOCTL_SET_EDCA_MIN, (uint32)(p_txq_param), 0)
#define lmac_set_heartbeat_data(ops, addr, retry) lmac_ioctl(ops, LMAC_IOCTL_SET_HEARTBEAT_DATA, (uint32)(addr), retry)
#define lmac_start_async_acs(ops, p_ctl) lmac_ioctl(ops, LMAC_IOCTL_SET_START_ASYNC_ACS, (uint32)(p_ctl), 0)
#define lmac_get_async_acs_ret(ops) lmac_ioctl(ops, LMAC_IOCTL_GET_ASYNC_ACS_RET, 0, 0)
#define lmac_set_temp_compensation_table(ops, table, size) lmac_ioctl(ops, LMAC_IOCTL_SET_TEMP_COMPENSATION_TABLE, (uint32)(table), size)
#define lmac_set_ps_no_frm_loss(ops, en) lmac_ioctl(ops, LMAC_IOCTL_SET_PS_NO_FRM_LOSS_EN, (uint32)(en), 0)
#define lmac_get_per(ops, mac) lmac_ioctl(ops, LMAC_IOCTL_GET_STA_PER, (uint32)mac, 0)
#define lmac_get_tx_delay(ops, mac) lmac_ioctl(ops, LMAC_IOCTL_GET_STA_TX_DELAY, (uint32)mac, 0)
#define lmac_get_tx_datarate(ops, mac) lmac_ioctl(ops, LMAC_IOCTL_GET_STA_TX_DATARATE, (uint32)mac, 0)
#define lmac_set_sta_capabilites(ops, cap, len) lmac_ioctl(ops, LMAC_IOCTL_SET_STA_CAPABILITES, (uint32)cap, len)
#define lmac_update_fem_voltage(ops, voltage) lmac_ioctl(ops, LMAC_IOCTL_SET_UPDATE_FEM_VOLTAGE, (uint32)(voltage), 0)
#define lmac_set_tx_agg_tid_bitmap(ops, bitmap) lmac_ioctl(ops, LMAC_IOCTL_SET_TX_AGG_TID_BITMAP, (uint32)bitmap, 0)
#define lmac_set_beacon_modulation(ops, rate) lmac_ioctl(ops, LMAC_IOCTL_SET_BEACON_MODULATION, (uint32)rate, 0)
int32 lmac_ioctl(void *ops, uint32 cmd, uint32 param1, uint32 param2);
int32 lmac_start_acs(void *lops, struct lmac_acs_ctl *p_ctl, uint32 sync);
int32 lmac_set_chan_list(void *lops, uint16 *chan_list, uint16 count);
void *lmac_ah_init(struct lmac_init_param *param);
void *lmac_bgn_init(struct lmac_init_param *param);
//bgn module
int32 lmac_bgn_module_80211w_init(void *ops);
int32 lmac_bgn_module_csa_init(void *ops);
int32 lmac_bgn_module_multi_mac_init(void *ops);
int32 lmac_bgn_module_pwr_limit_init(void *ops);
int32 lmac_bgn_module_rx_reorder_init(void *ops);
void *dsleep_lmac_bgn_init(void);
void lmac_afh_init(void *ops);
#ifdef __cplusplus
}
#endif
#endif

100
sdk/include/lib/lmac/lmac_def.h Normal file
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@@ -0,0 +1,100 @@
#ifndef _HGIC_LMAC_DEF_H_
#define _HGIC_LMAC_DEF_H_
#include "typesdef.h"
#include "list.h"
#include "lmac.h"
#include "lib/skb/skb.h"
#include "lib/lmac/hgic.h"
#ifdef __cplusplus
extern "C" {
#endif
struct lmac_acs_ctl;
struct lmac_ops {
void *priv;
void *btops;
uint8 headroom, tailroom;
uint16 radio_on : 1,
bbm_mode : 1,
dsleep_init : 1; //flags
int32(*open)(struct lmac_ops *ops);
int32(*close)(struct lmac_ops *ops);
int32(*tx)(struct lmac_ops *ops, struct sk_buff *skb);
int32(*test_tx)(struct lmac_ops *ops, struct sk_buff *skb);
int32(*tx_status)(struct lmac_ops *ops, struct sk_buff *skb);
int32(*rx)(struct lmac_ops *ops, struct hgic_rx_info *info, uint8 *data, uint32 len);
int32(*notify)(struct lmac_ops *ops, uint8 evt_id, uint8 *data, uint32 len);
int32(*set_chan_list)(struct lmac_ops *ops, uint16 *chan_list, uint16 count);
int32(*set_freq_range)(struct lmac_ops *ops, uint16 freq_start, uint16 freq_end, uint8 chan_bw);
int32(*set_freq)(struct lmac_ops *ops, uint32 center_freq);
int32(*start_acs)(struct lmac_ops *ops, struct lmac_acs_ctl *p_ctl, uint32 sync);
int32(*add_sta)(struct lmac_ops *ops, uint8 ifidx, uint16 aid, uint8 *addr);
int32(*del_sta)(struct lmac_ops *ops, uint8 ifidx, uint8 *addr);
int32(*set_key)(struct lmac_ops *ops, uint8 cmd, uint8 *addr, uint8 *key, uint32 len);
int32(*sleep)(struct lmac_ops *ops, uint32 sleep_en, uint32 sleep_tm, uint32 flags);
int32(*ioctl)(struct lmac_ops *ops, uint32 cmd, uint32 param1, uint32 param2);
struct sk_buff *(*test_cmd)(struct lmac_ops *ops, struct sk_buff *skb);
};
//////////////////////////////////////////////////////////////////////////////////
static inline int32 lmac_open(struct lmac_ops *ops)
{
return ops->open(ops);
}
static inline int32 lmac_close(struct lmac_ops *ops)
{
return ops->close(ops);
}
static inline struct sk_buff *lmac_do_test_cmd(struct lmac_ops *ops, struct sk_buff *skb)
{
return ops->test_cmd(ops, skb);
}
static inline int32 lmac_tx(struct lmac_ops *ops, struct sk_buff *skb)
{
return ops->tx(ops, skb);
}
static inline int32 lmac_test_tx(struct lmac_ops *ops, struct sk_buff *skb)
{
return ops->test_tx(ops, skb);
}
//static inline int32 lmac_set_chan_list(struct lmac_ops *ops, uint16 *chan_list, uint32 chan_cnt)
//{
// if(ops->set_chan_list)
// return ops->set_chan_list(ops, chan_list, chan_cnt);
// return RET_ERR;
//}
static inline int32 lmac_set_freq_range(struct lmac_ops *ops, uint32 freq_start, uint32 freq_end, uint8 chan_bw)
{
if(ops->set_freq_range)
return ops->set_freq_range(ops, freq_start, freq_end, chan_bw);
return RET_ERR;
}
static inline int32 lmac_add_sta(struct lmac_ops *ops, uint8 ifidx, uint16 aid, uint8 *addr)
{
return ops->add_sta(ops, ifidx, aid, addr);
}
static inline int32 lmac_del_sta(struct lmac_ops *ops, uint8 ifidx, uint8 *addr)
{
return ops->del_sta(ops, ifidx, addr);
}
static inline int32 lmac_set_key(struct lmac_ops *ops, uint8 cmd, uint8 *addr, uint8 *key, uint32 len)
{
return ops->set_key(ops, cmd, addr, key, len);
}
static inline int32 lmac_sleep(struct lmac_ops *ops, uint32 sleep_en, uint32 sleep_tm, uint32 flags)
{
return ops->sleep(ops, sleep_en, sleep_tm, flags);
}
static inline int32 lmac_set_freq(struct lmac_ops *ops, uint32 center_freq)
{
return ops->set_freq(ops, center_freq);
}
#ifdef __cplusplus
}
#endif
#endif

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sdk/include/lib/lmac/lmac_dsleep.h Normal file
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// * @file dsleep.h
// * @author hushifei
// * @version V1.0.0
// * @date 08/25/2020
// * @brief This file contains all the dsleep defines.
// Revision History
// (1) V1.0.0 05/16/2022 First Release
#ifndef __BGN_DSLEEP_H__
#define __BGN_DSLEEP_H__
#ifdef __cplusplus
extern "C" {
#endif
#include "osal/sleep.h"
#include "osal/timer.h"
#include "osal/msgqueue.h"
/*****************************************************
* SDK相关宏定义设置
******************************************************/
#define CONFIG_SYSTICK_HZ_DSLEEP 1000
#define OS_SYSTICK_HZ_DSLEEP 1000
#define SYS_CACHE_ENABLE_DSLEEP 1
//----------------------------------------------------
#ifndef BIT
#define BIT(nr) (1UL << (nr))
#endif
#define SBIT(n) (1UL<<(n))
#define CBIT(n) ~(1UL<<(n))
#define TS_WIN_MAX 8000//us
#define RX_IDLE_TMO 10//ms
#define WKDATA_TMO 20//ms
#define BKN_TIMEOUT 6
#define BKN_TIMEOUT_ADD 2
#define BKN_TIMEOUT_MAX 20//(2*BKN_TIMEOUT)
#define BEACON_LOST_LIMIT 3
#define DSLEEP_VAR_WIN 10
#define TS_VEC_MAX 20
#define RC_WK_INIT_DEFAULT 1200 //measured val
#define RC_RF_INIT_DEFAULT 331 //measured each time
#define LOST_VAR_MS 2
#define DSLEEP_MAGIC_NUM 0x12344321
#define DEBUG_IO_ENABLE 0
#define LMAC_DBG0 PA_9
#define LMAC_DBG1 PA_8
#define DSLEEP_DBG_EN_PRINT BIT(0)
#define DSLEEP_DBG_NO_WAKEUP BIT(1)
#define DSLEEP_DBG_AUTO_SLEEP BIT(2)
#define DSLEEP_DBG_IO_MASK (0xff<<8)
#define DSLEEP_core_pd_pnd BIT(0)
#define DSLEEP_TrimPend BIT(1)
#define DSLEEP_wk_mclr_rst_pnd BIT(2)
#define DSLEEP_lp_wkup_pnd BIT(3)
#define DSLEEP_ALR0F BIT(4)
#define DSLEEP_CoreTmrPnd BIT(5)
#define DSLEEP_CoreTmrPnd2 BIT(6)
#define DSLEEP_second_pnding BIT(7)
#define DSLEEP_LVD_PND BIT(8)
#define DSLEEP_WATCHDOG_PND BIT(9)
#ifndef LMAC_WKDATA_SIZE
#define LMAC_WKDATA_SIZE (64)
#endif
#ifndef LMAC_WKDATA_COUNT
#define LMAC_WKDATA_COUNT (1)
#endif
struct lmac_wkdata_param {
uint8 count; //must equal to LMAC_WKDATA_COUNT
uint8 wkdata_size; //must equal to LMAC_WKDATA_SIZE
uint8 r1, r2;
struct {
uint32 sip; //source IP address. can be set 0.
uint8 offset; //wkdata's offset start from ether hdr.
uint8 wkdata_len; //wkdata's length
uint8 r1, r2;
uint8 mask[LMAC_WKDATA_SIZE / 8]; //match mask.
uint8 wkdata[LMAC_WKDATA_SIZE]; //wkdata used to match.
} data[LMAC_WKDATA_COUNT];
};
static inline uint32 LMAC_WKDATA_SIP(struct lmac_wkdata_param *wkdata, uint8 idx)
{
uint8 *ptr = (uint8 *)wkdata + 4 + idx * (8 + wkdata->wkdata_size + wkdata->wkdata_size / 8);
return (idx < wkdata->count) ? *(uint32 *)ptr : 0;
}
static inline uint8 LMAC_WKDATA_OFFSET(struct lmac_wkdata_param *wkdata, uint8 idx)
{
uint8 *ptr = (uint8 *)wkdata + 4 + idx * (8 + wkdata->wkdata_size + wkdata->wkdata_size / 8) + 4;
return (idx < wkdata->count) ? *ptr : 0;
}
static inline uint8 LMAC_WKDATA_LEN(struct lmac_wkdata_param *wkdata, uint8 idx)
{
uint8 *ptr = (uint8 *)wkdata + 4 + idx * (8 + wkdata->wkdata_size + wkdata->wkdata_size / 8) + 5;
return (idx < wkdata->count) ? *ptr : 0;
}
static inline uint8 *LMAC_WKDATA_MASK(struct lmac_wkdata_param *wkdata, uint8 idx)
{
uint8 *ptr = (uint8 *)wkdata + 4 + idx * (8 + wkdata->wkdata_size + wkdata->wkdata_size / 8) + 8;
return (idx < wkdata->count) ? ptr : NULL;
}
static inline uint8 *LMAC_WKDATA_DATA(struct lmac_wkdata_param *wkdata, uint8 idx)
{
uint8 *ptr = (uint8 *)wkdata + 4 + idx * (8 + wkdata->wkdata_size + wkdata->wkdata_size / 8) + 8 + wkdata->wkdata_size / 8;
return (idx < wkdata->count) ? ptr : NULL;
}
#define PSALIVE_HEARTBEAT_SIZE 256
#define PSALIVE_HEARTBEAT_RESP_SIZE 128
#define PSALIVE_WAKEUP_DATA_SIZE 128
#define SLEEP_USER_DATA_LEN 512
struct dsleep_psdata {
uint32 ip;
uint16 port, period, hb_tmo, aplost_time, wkdata_off;
uint8 hbdata_len, hbresp_len, wkdata_len;
uint8 psmode: 3, ap_err: 1, wkio_mode: 1, paired: 1;
uint8 conn_try;
uint8 hb_data[PSALIVE_HEARTBEAT_SIZE];
uint8 hb_resp[PSALIVE_HEARTBEAT_RESP_SIZE];
uint8 wk_data[PSALIVE_WAKEUP_DATA_SIZE];
uint8 arp_reply[64];
uint8 wk_reason;
uint8 wk_io: 7, wkio_edge: 1;
uint8 detect_io: 7, detect_level: 1;
uint8 pa_ctrl: 1, pa_ctrl_io: 7; //todo
uint8 vdd13_ctrl: 2, ssid_set: 1, gpiob_en: 1, wkdata_save: 1, io_level_wk: 1, wait_psmode: 2;
uint8 ssid[32], psk[32], bssid[6];
uint8 wkdata_mask[16];
//system_sleep_config parameter
uint32 user_gpioa_resv;
uint32 user_gpiob_resv;
uint32 sleep_us;
uint32 boot_mode : 4, dsleep_en : 1;
uint32 dhcpc_ip;
uint64 rtc_local;
uint64 last_timestamp_local;
uint64 rtc_remote;
uint64 last_timestamp_remote;
};
#define GPIOA_REG_LEN (0x0080/4 + 1)
#define GPIOB_REG_LEN (0x0080/4 + 1)
#define GPIOC_REG_LEN (0x0080/4 + 1)
struct dsleep_cfg{
uint32 magic;
uint8 aplost_time;
uint8 wk_reason;
uint8 encrypt : 1;
uint8 ap_err : 1,
alg_sel : 2,
txic_en : 1,
txic_wakeup : 1,
wdt_close : 1,
clk_switch_dis : 1,
use_old_libflash: 1;
uint8 fake_tim_fadeout;
uint8 usr_fadeout_en : 1,
usr_fadeout_val : 7;
uint8 dtim_cnt;
uint8 dtim_period;
uint8 dtim_test; //used for at+ test
uint8 debounce;
uint32 bkn_int_tu;
uint32 dtim_period_us;
uint8 tim_valid : 1,//1
bc_valid : 1,//2
psm_enter : 1,//3
auto_dsleep : 1,//4
buck_mode : 1,//5
gpiob_hold : 1,//6
dbg_en : 1,//7
fem_used : 1;//8
uint8 ext_dcdc : 1,
assert_hold : 1;
uint8 auto_dsleep_tmo;
uint8 pwm_pin[4]; //[0-3 valid]
uint8 pwm_mode;//2bit
uint8 wkio_pin[6];//[0-5 vaild]
uint8 wkio_edge;
int8 sen_level;//0-2 valid
uint16 listen_interval;
uint16 max_idle_period;//sec
uint16 ap_lost_cnt;
uint16 margin_ms;
uint32 default_sys_clk;
uint32 sleep_type;
struct system_sleep_param sleep_args;
uint32 sleep_dbg_cfg;
int16 rx_lead_margin;
int16 rx_tmo_margin;
//---------user define functions--------------
int32(*usr_kalive_cb)(void *usr_kalive_priv);
void * usr_kalive_priv;
int32(*usr_wkdet_cb)(void *usr_wkdet_priv, uint8 *data, uint32 len);
void * usr_wkdet_priv;
struct lmac_wkdata_param *wkdata;
uint16 aid;
uint8 mac_addr[6];
uint8 bssid[6];
uint32 ip_addr;
uint32 user_gpioa_resv;
uint32 user_gpiob_resv;
uint32 user_gpioc_resv;
uint32 gpioa_regs[GPIOA_REG_LEN];
uint32 gpiob_regs[GPIOB_REG_LEN];
uint32 gpioc_regs[GPIOC_REG_LEN];
uint32 pmu_regs[0x100/4];
uint32 sys_wdt_ms;
uint32 lp_wdt_ms;
uint32 rtc_wkio;
};
enum DSLEEP_MODE {
DSLEEP_MODE_NONE,
DSLEEP_MODE_STA_ALIVE,
DSLEEP_MODE_AP_ALIVE,
DSLEEP_MODE_UCASTWK,
DSLEEP_MODE_APWK,
DSLEEP_MODE_IOWK_ONLY = 6, //之前用了6，后续如果有新增先添加一个5
DSLEEP_MODE_NUM,
};
enum DSLEEP_WAIT_MODE {
DSLEEP_WAIT_MODE_PS_CONNECT,
DSLEEP_WAIT_MODE_STANDBY,
DSLEEP_WAIT_MODE_NUM,
};
#if 0
enum DSLEEP_IOCTL_CMD {
/*Set CMDs*/
DSLEEP_IOCTL_SET_ENTER_SLEEP_CB = 0x1,
DSLEEP_IOCTL_SET_KEEP_ALIVE_CB,
DSLEEP_IOCTL_SET_USR_WKDET_CB,
DSLEEP_IOCTL_SET_DSLEEP_BSS_MAX_IDLE,
DSLEEP_IOCTL_SET_DSLEEP_WKIO_PIN,
DSLEEP_IOCTL_SET_DSLEEP_WKIO_EDGE,
DSLEEP_IOCTL_SET_DSLEEP_APLOST_TIME,
DSLEEP_IOCTL_SET_DSLEEP_SENS_LEVEL,
DSLEEP_IOCTL_SET_DSLEEP_PWM_SEL,
DSLEEP_IOCTL_SET_DSLEEP_PWM_MODE,
DSLEEP_IOCTL_SET_IP_ADDR,
DSLEEP_IOCTL_SET_GPIOA_RESV,
DSLEEP_IOCTL_SET_GPIOB_RESV,
DSLEEP_IOCTL_SET_GPIOC_RESV,
/*Get CMDs*/
DSLEEP_IOCTL_GET_IP_ADDR = 0x20000000,
};
//ioctrl: set_cfg
#define dsleep_set_enter_sleep_cb(func) dsleep_ioctl(DSLEEP_IOCTL_SET_ENTER_SLEEP_CB, (uint32)(func), 0)
#define dsleep_set_keep_alive_cb(func) dsleep_ioctl(DSLEEP_IOCTL_SET_KEEP_ALIVE_CB, (uint32)(func), 0)
#define dsleep_set_usr_wkdet_cb(priv, func) dsleep_ioctl(DSLEEP_IOCTL_SET_USR_WKDET_CB, (uint32)priv, (uint32)(func))
#define dsleep_set_max_idle(max_idle_sec) dsleep_ioctl(DSLEEP_IOCTL_SET_DSLEEP_BSS_MAX_IDLE, (uint32)(max_idle_sec), 0)
#define dsleep_set_wkio_pin(pin_idx, pin_num) dsleep_ioctl(DSLEEP_IOCTL_SET_DSLEEP_WKIO_PIN, (uint32)(pin_idx), (uint32)(pin_num))
#define dsleep_set_wkio_edge(pin_idx, neg_edge) dsleep_ioctl(DSLEEP_IOCTL_SET_DSLEEP_WKIO_EDGE, (uint32)(pin_idx), (uint32)(neg_edge))
#define dsleep_set_aplost_time(t_sec) dsleep_ioctl(DSLEEP_IOCTL_SET_DSLEEP_APLOST_TIME, (uint32)(t_sec), 0)
#define dsleep_set_sens_level(sens_level) dsleep_ioctl(DSLEEP_IOCTL_SET_DSLEEP_SENS_LEVEL, (uint32)(sens_level), 0)
#define dsleep_set_pwm_sel(pwm_idx, pin_num) dsleep_ioctl(DSLEEP_IOCTL_SET_DSLEEP_PWM_SEL, (uint32)(pwm_idx), (pin_num))
#define dsleep_set_pwm_mode(pwm_idx, mode) dsleep_ioctl(DSLEEP_IOCTL_SET_DSLEEP_PWM_MODE, (uint32)(pwm_idx), (mode))
#define dsleep_set_ip_addr(ip_addr) dsleep_ioctl(DSLEEP_IOCTL_SET_IP_ADDR, (uint32)ip_addr, 0)
#define dsleep_set_user_gioa(user_gioa) dsleep_ioctl(DSLEEP_IOCTL_SET_GPIOA_RESV, (uint32)user_gioa, 0)
#define dsleep_set_user_giob(user_giob) dsleep_ioctl(DSLEEP_IOCTL_SET_GPIOB_RESV, (uint32)user_giob, 0)
#define dsleep_set_user_gioc(user_gioc) dsleep_ioctl(DSLEEP_IOCTL_SET_GPIOC_RESV, (uint32)user_gioc, 0)
//ioctrl: get_cfg
#define dsleep_get_ip_addr() dsleep_ioctl(DSLEEP_IOCTL_GET_IP_ADDR, 0, 0)
#endif
union DSLEEP_LO_CFG
{
struct {
uint16 freq; // unit: MHz
uint8 vco_band;
uint8 int_part;
uint32 fract_part;
}lo_cfg;
uint32 word_buf[2];
};
typedef struct {
uint8 hour ;
uint8 minute;
uint8 second;
uint16 tsssv;
float ssv;
uint8 year ;
uint8 month ;
uint8 day ;
uint8 week ;
} RTC_TIMER_TYPEDEF;
struct dsleep_priv {
uint32 flags;
uint32 dsleep_mode : 1,
beacon_rxed : 1,
no_rf_tx_cali : 1,
dsleep_wakeup_flag : 1,//use to indicate dsleep wakeup to inite driver
no_sleep_wakeup : 1;
uint32 wkup_cnt;
uint32 bkn_lost;
uint32 bkn_lost_cont: 8,
stat_wkup_cnt : 8,
stat_lost_cnt :8;
int8 rx_rssi;
int8 rsvd[3];
struct lmac_bgn_priv *lmac_bgn;
struct hggpio_v4_hw *gpioa;
struct hggpio_v4_hw *gpiob;
struct hggpio_v4_hw *gpioc;
struct hggpio_v4_hw *gpiod;
struct hggpio_v4_hw *gpioe;
struct hggpio_v4_hw *gpiof;
struct hguart_v2_hw *p_uart;
struct hguart_v2 *dev_uart;
struct dev_obj *dev_xip;
struct dev_obj *dev_xspi;
uint32 sys_con14_bak;//vdd18
uint32 clk_con1_bak;//clk_div
PMU_TypeDef pmu_bak;
union DSLEEP_LO_CFG freq_table;
uint32 dsleep_rst;
uint32 pmu_con;
//uint32 magic_num;
uint32 sleep_cnt;
uint32 rx_cnt_tmp;
uint32 tmrpr_err;
uint32 reg_tmrpr;
uint32 reg_tmrtrim;
uint32 rc_period_us;
uint32 t_rx_start;
uint32 rc_ms;
uint32 rc_cycle_sleep;
uint32 rc_elapse;
uint16 bkn_len_us;
uint8 bkn_timestamp;
uint32 tbtt_pre;
int32 drift_acc;
//add from other .h
struct sk_buff *null_psm;
struct sk_buff *ps_poll;//todo: del
struct sk_buff *ps_arp;
uint8 null_fail_cnt;
uint16 null_sn;
//pending should be clear
uint16 skb_null_psm_used : 1,
skb_null_psm_acked : 1,
skb_ps_poll_used : 1,
dsleep_loop_test : 1,
wkdata_waiting : 1,
ts_idx : 8,
ts_valid : 1,
dsleep_rdy : 1;
union{
uint32 val; //todo move all clear pending here
}todo_rsvd;
uint64 last_rx;
uint64 last_rx_init;
uint32 key_updata_tmo;
uint32 dsleep_tmr_cnt;
struct os_timer dsleep_tmr;
struct os_semaphore dsleep_sem;
//move from dcfg
uint32 bkn_trim_rc;
uint32 bkn_dtim_rc;//updata if hw trum
uint32 bkn_intv_rc : 30,
rc_init : 1;
uint32 bkn_intv_rc_pre;
uint32 rc_pr_delt;
uint8 rc_var;
int32 bkn_dly;
uint32 bkto;
uint16 bkn_dur;
uint32 rc_wk_init;//如果初始化需要设置
uint32 rc_rf_init;
int32 ts_op_avg;
int32 ts_op_min;
int32 ts_op_max;
int32 ts_op_bkn;
int32 ts_win;
uint64 timestamp_pre;
uint32 ts_vec[TS_VEC_MAX];
int32 ts_rem[TS_VEC_MAX]; //must int32
uint8 rx_buff[512];
uint32 ap_lost_det : 1,
wkdata_det : 1,
txnull_fail : 1,
wkio_pending: 6;
//no clear area
struct dsleep_cfg dcfg;
RTC_TIMER_TYPEDEF rtc_timer;
struct os_task dsleep_task;
struct os_mutex null_tx_mutex;
uint32 wkcon_bak[3];
};
//#define ETH_P_ARP 0x0806 /* Address Resolution packet */
//#define ETH_P_IP 0x0800 /* Internet Protocol packet */
struct dsleep_eth_hdr{
uint8 dsap;
uint8 ssap;
uint8 control_field;
uint8 oui[3];
uint8 type[2];//ARP= 0x0806 //IP= 0x0800
};
struct dsleep_arp_hdr{
uint8 hw_type[2];// Ethernet 0x0001
uint8 proto_type[2];//IPv4= 0x0800
uint8 hw_size;// MAC_addr: 6
uint8 porto_size;//IP_size: 4
uint8 op_code[2];//1: ARP request; 2: ARP Reply; 3: RRAP Request; 4: RRAP Reply
uint8 sender_mac[6];
uint8 sender_ip[4];
uint8 target_mac[6];
uint8 target_ip[4];
uint8 resv[18];//dump 18B tenda->Tp yes, TP->tenda no,
};
//IP header: 20Bytes
struct dsleep_ip_hdr{
uint8 version_hdr_len;//version; header length//0x45:ver4 20B
uint8 service_filed;//Differentiated Services Filed//0x00
uint16 total_len;//total length
uint16 id;//identification
uint16 flags;//Flags: 3bits, Fragment Offset:13 bits
uint8 ttl;//Time To Live
uint8 protocol;//0x01=ICMP 0x02=IGMP 0x06=TCP6 0x11=UDP //42B
uint16 hdr_check_sum;//44B
uint32 src_ip;
uint32 dst_ip; //52B
};
//tcp header: 20Bytes
struct dsleep_tcp_hdr{
uint16 src_port;
uint16 dst_port;//56B
uint32 seq_num;
uint32 ack_num;
uint16 hdr_len : 4,
rsvd : 6,
urg : 1,
ack : 1,
psh : 1,
rst : 1,
syn : 1,
fin : 1;
uint16 win_size;
uint16 checksum;
uint16 urgentpointer;
};
//tcp header: 20Bytes
struct dsleep_udp_hdr{
uint16 src_port;
uint16 dst_port;//56B
uint16 length;
uint16 checksum;
};
extern struct dsleep_priv *bgn_dsleep;
void *bgn_dsleep_init(void *ops);
void dsleep_wakeup(void);
void debug_config(void);
int32 dsleep_bgn_resume_hdl(void *ops, uint32 wake_reason, uint32 param2);
int32 dsleep_cfg_init(uint16 sleep_type);
int32 dsleep_wkdata_check(uint8* data, uint32 len);
int32 dsleep_arp_req_check(uint8 *data, int32 len);
int32 dsleep_arp_data_send(uint8 *target_mac, uint8 *target_ip, uint8 pm, uint16 seq_num);
//void lmac_bgn_send_ps_poll(struct lmac_ops *ops, uint8 pm, uint16 sn);
int32 lmac_bgn_send_null_psm(void *ops, uint8 pm);
/*---------------------------- RTC Private define --------------------------------*/
/***** RTC_WPR(for RTC) Register *****/
#define RTC_WPR_KEY(n) ((n) & 0xFF) // 写保护,依次写入0x15和0x5c, 0x0：未解除, 0x1：已解除
/***** RTC_CTR(for RTC) Register *****/
#define RTC_CTR_ALR0WKE(n) (((n) & 0x00000001) << 31) //
#define RTC_CTR_WUTWKE(n) (((n) & 0x00000001) << 30) //
#define RTC_CTR_TAMPM(n) (((n) & 0x00000001) << 29) // 入侵检测引脚复用,0x0：PE12,0x1：TMR1_INC_PIN
#define RTC_CTR_CALOE(n) (((n) & 0x00000001) << 28) // 校准输出使能 0x0：禁止，0x1：使能 Note：输出校准脉冲和1Hz
#define RTC_CTR_BPSR(n) (((n) & 0x00000001) << 27) // Bypass影子寄存器，0x0：日历值取自影子寄存器，0x1：日历值取自日历计数器
#define RTC_CTR_SUB1H_EN (0x00000001 << 26) // 减少1小时 0x0：无作用, 0x1：减少1小时
#define RTC_CTR_ADD1H_EN (0x00000001 << 25) // 增加1小时 0x0：无作用, 0x1：减少1小时
#define RTC_CTR_HF(n) (((n) & 0x00000001) << 24) // 小时格式，0x0:24小时制, 0x1:12小时制
#define RTC_CTR_TAMPPUEN(n) (((n) & 0x00000001) << 23) // 入侵检测上拉电阻使能 0x0：禁止，0x1：使能
#define RTC_CTR_TAMPPCH(n) (((n) & 0x00000003) << 21) // 入侵检测预充电时间,0x0：1个RCLK周期,0x1：2个RCLK周期,0x2：4个RCLK周期,0x3：8个RCLK周期,Note：每次采样之前激活上拉电阻的时间
#define RTC_CTR_TAMPFLT(n) (((n) & 0x00000003) << 19) // 入侵检测滤波 0x0：检测到有效边沿后激活入侵，0x1：连续检测到2次有效电平激活入侵，0x2：连续检测到4次有效电平激活入侵，0x3：连续检测到8次有效电平激活入侵
#define RTC_CTR_TAMPSF(n) (((n) & 0x00000007) << 16) // 入侵检测采样频率 RCLK/(256*(2^ TAMPSF))
#define RTC_CTR_TAMPTRG(n) (((n) & 0x00000001) << 15) // 入侵检测触发；当TAMPFLT = 0时：0x0：下降沿, 0x1：上升沿。当TAMPFLT ！= 0时：0x0：低电平, 0x1：高电平
#define RTC_CTR_TAMPTS(n) (((n) & 0x00000001) << 14) // 入侵检测激活时间戳0x0：禁止, 0x1：使能
#define RTC_CTR_TSTRG(n) (((n) & 0x00000001) << 13) // 时间戳触发0x0：上升沿, 0x1：下降沿
#define RTC_CTR_TAMPIE(n) (((n) & 0x00000001) << 12) // 入侵检测中断使能 0x0：禁止, 0x1：使能
#define RTC_CTR_TSIE(n) (((n) & 0x00000001) << 11) // 时间戳中断使能 0x0：禁止, 0x1：使能
#define RTC_CTR_ALR0IE(n) (((n) & 0x00000001) << 9) // 闹钟0中断使能 0x0：禁止, 0x1：使能
#define RTC_CTR_WUTIE(n) (((n) & 0x00000001) << 8) // 唤醒定时器中断使能 0x0：禁止, 0x1：使能
#define RTC_CTR_TAMPE(n) (((n) & 0x00000001) << 7) // 入侵检测使能 0x0：禁止, 0x1：使能
#define RTC_CTR_TSE(n) (((n) & 0x00000001) << 6) // 时间戳使能 0x0：禁止, 0x1：使能
#define RTC_CTR_ALR0E(n) (((n) & 0x00000001) << 4) // 闹钟0使能 0x0：禁止, 0x1：使能
#define RTC_CTR_WUTE(n) (((n) & 0x00000001) << 3) // 唤醒定时器使能 0x0：禁止,0x1：使能
#define RTC_CTR_WUCKSEL(n) (((n) & 0x00000007) << 0) // 唤醒定时器时钟选择,0x0：RCLK/2,0x1：RCLK/4,0x2：RCLK/8,0x3：RCLK/16,0x4，0x5：ck_spre，定时器为16位,0x6，0x7：ck_spre，定时器为17位
/***** RTC_PDR(for RTC) Register *****/
#define RTC_PDR_PREDIV_A(n) (((n) & 0x0000007F) << 16) // 异步分频系数F（ck_apre=F(RCLK)/(PREDIV_A+1)
#define RTC_PDR_PREDIV_S(n) (((n) & 0x00007FFF) << 0) // 同步分频系数F（ck_spre=F( ck_apre )/(PREDIV_S+1)
/***** RTC_ISR(for RTC) Register *****/
#define RTC_ISR_SSSPF(n) (((n) & 0x0001) << 15) // 亚秒平移挂起标志 0：亚秒平移寄存器可写， 1：亚秒平移寄存器不可写（硬件校准中）
#define RTC_ISR_RECALPF(n) (((n) & 0x0001) << 14) // 重新校准挂起标志 0：校准寄存器可写，1：校准寄存器不可写（硬件校准中）
#define RTC_ISR_TAMPF(n) (((n) & 0x0001) << 13) // 入侵检测标志 0x0：未触发，0x1：已触发
#define RTC_ISR_TSOVF(n) (((n) & 0x0001) << 12) // 时间戳溢出标志 0x0：未溢出，0x1：已溢出
#define RTC_ISR_TSF(n) (((n) & 0x0001) << 11) // 时间戳标志 0x0：未触发，0x1：已触发
#define RTC_ISR_ALR0F(n) (((n) & 0x0001) << 9) // 闹钟0标志 0x0：未触发，0x1：已触发
#define RTC_ISR_WUTF(n) (((n) & 0x0001) << 8) // 唤醒定时器标志 0x0：未触发，0x1：已触发
#define RTC_ISR_TAMPWF(n) (((n) & 0x0001) << 7) // 入侵检测写标志 0x0：不允许更新入侵检测，0x1：允许更新入侵检测
#define RTC_ISR_ALR0WF(n) (((n) & 0x0001) << 5) // 闹钟0写标志 0x0：不允许更新闹钟0，0x1：允许更新闹钟0
#define RTC_ISR_WUTWF(n) (((n) & 0x0001) << 4) // 唤醒定时器写标志 0x0：不允许更新唤醒定时器，0x1：允许更新唤醒定时器
#define RTC_ISR_INITM(n) (((n) & 0x0001) << 3) // 初始化模式 0x0：自由运行模式，该位由1->0时，计数器重新开始计数，0x1：初始化模式，用于编程RTC_TMR，RTC_DAR和RTC_PDR。当该位置1，计数器停止计数
#define RTC_ISR_INITMF(n) (((n) & 0x0001) << 2) // 初始化模式标志 0x0：不允许更新日历寄存器，0x1：允许更新日历寄存器
#define RTC_ISR_INITS(n) (((n) & 0x0001) << 1) // 初始化状态，当日历年份字段不为0时由硬件置1 0x0：未初始化，0x1：已初始化
#define RTC_ISR_RSF(n) (((n) & 0x0001) << 0) // 影子寄存器同步标志 0x0：未同步，0x1：已同步
/***** RTC_SSR(for RTC) Register *****/
#define RTC_SSR_SSV(n) (((n) & 0xFF) << 0)
/***** RTC_TMR(for RTC) Register *****/
#define RTC_TMR_PM(n) (((n) & 0x00000001) << 24)
#define RTC_TMR_HT(n) (((n) & 0x00000003) << 20) // 小时的十位（BCD格式）
#define RTC_TMR_HU(n) (((n) & 0x0000000F) << 16) // 小时的个位（BCD格式）
#define RTC_TMR_MNT(n) (((n) & 0x00000007) << 12) // 分钟的十位（BCD格式）
#define RTC_TMR_MNU(n) (((n) & 0x0000000F) << 8)
#define RTC_TMR_ST(n) (((n) & 0x00000007) << 4) // 秒的十位（BCD格式）
#define RTC_TMR_SU(n) (((n) & 0x0000000F) << 0)
/***** RTC_DAR(for RTC) Register *****/
#define RTC_DAR_YT(n) (((n) & 0x0000000F) << 28) // 年份的十位（BCD格式）
#define RTC_DAR_YU(n) (((n) & 0x0000000F) << 24) // 年份的个位（BCD格式）
#define RTC_DAR_MT(n) (((n) & 0x00000001) << 20) // 月份的十位（BCD格式）
#define RTC_DAR_MU(n) (((n) & 0x0000000F) << 16) // 月份的个位（BCD格式）
#define RTC_DAR_DT(n) (((n) & 0x00000003) << 12) // 日的十位（BCD格式）
#define RTC_DAR_DU(n) (((n) & 0x0000000F) << 8) // 日的个位（BCD格式）
#define RTC_DAR_WU(n) (((n) & 0x00000007) << 0) // 星期的个位（BCD格式）
/***** RTC_ALR0R(for RTC) Register *****/
#define RTC_ALR0R_MSK4(n) (((n) & 0xFFFFFFFF) << 31) // 星期或日期屏蔽 0x0：不屏蔽，0x1：屏蔽
#define RTC_ALR0R_WDSEL(n) (((n) & 0x00000001) << 30) // 星期或日期选择 0x0：DU[3:0]代表日期，0x1：DU[2:0]代表星期。DT[1:0]和DU[3]忽略
#define RTC_ALR0R_DT(n) (((n) & 0x00000003) << 28) // 日期的十位（BCD格式）
#define RTC_ALR0R_DU(n) (((n) & 0x0000000F) << 24) // 星期或日期的个位（BCD格式）
#define RTC_ALR0R_MSK3(n) (((n) & 0xFFFFFFFF) << 23) // 小时屏蔽 0x0：不屏蔽，0x1：屏蔽
#define RTC_ALR0R_PM(n) (((n) & 0x00000001) << 22) // AM/PM符号 0x0：AM或24小时制，0x1：PM
#define RTC_ALR0R_HT(n) (((n) & 0x00000003) << 20) // 小时的十位（BCD格式）
#define RTC_ALR0R_HU(n) (((n) & 0x0000000F) << 16) // 小时的个位（BCD格式）
#define RTC_ALR0R_MSK2(n) (((n) & 0xFFFFFFFF) << 15) // 分钟屏蔽 0x0：不屏蔽，0x1：屏蔽
#define RTC_ALR0R_MNT(n) (((n) & 0x00000007) << 12) // 分钟的十位（BCD格式）
#define RTC_ALR0R_MNU(n) (((n) & 0x0000000F) << 8) // 分钟的个位（BCD格式）
#define RTC_ALR0R_MSK1(n) (((n) & 0xFFFFFFFF) << 7) // 秒钟屏蔽 0x0：不屏蔽，0x1：屏蔽
#define RTC_ALR0R_ST(n) (((n) & 0x00000007) << 4) // 秒钟的十位（BCD格式）
#define RTC_ALR0R_SU(n) (((n) & 0x0000000F) << 0) // 秒钟的个位（BCD格式）
/***** RTC_WUTR(for RTC) Register *****/
#define RTC_WUTR_ARV(n) ((n) & 0xFFFF) // 自动重载值
/***** RTC_TSSSR(for RTC) Register *****/
#define RTC_TSSSR_SSV(n) ((n) & 0xFF) // 亚秒值
/***** RTC_TSTMR(for RTC) Register *****/
#define RTC_TSTMR_PM(n) (((n) & 0x00000001) << 31) // AM/PM符号 0x0：AM或24小时制，0x1：PM
#define RTC_TSTMR_HT(n) (((n) & 0x00000003) << 20) // 小时的十位（BCD格式）
#define RTC_TSTMR_HU(n) (((n) & 0x0000000F) << 16) // 小时的个位（BCD格式）
#define RTC_TSTMR_MNT(n) (((n) & 0x00000007) << 12) // 分钟的十位（BCD格式）
#define RTC_TSTMR_MNU(n) (((n) & 0x0000000F) << 8) // 分钟的个位（BCD格式）
#define RTC_TSTMR_ST(n) (((n) & 0x00000001) << 4) // 秒钟的十位（BCD格式）
#define RTC_TSTMR_SU(n) (((n) & 0x00000001) << 0) // 秒钟的个位（BCD格式）
/***** RTC_TSDAR(for RTC) Register *****/
#define RTC_TSDAR_YT(n) (((n) & 0x0000000F) << 28) // 年份的十位（BCD格式）
#define RTC_TSDAR_YU(n) (((n) & 0x0000000F) << 24) // 年份的个位（BCD格式）
#define RTC_TSDAR_MT(n) (((n) & 0x00000001) << 20) // 月份的十位（BCD格式）
#define RTC_TSDAR_MU(n) (((n) & 0x0000000F) << 16) // 月份的个位（BCD格式）
#define RTC_TSDAR_DT(n) (((n) & 0x00000003) << 12) // 日的十位（BCD格式）
#define RTC_TSDAR_DU(n) (((n) & 0x0000000F) << 8) // 日的个位（BCD格式）
#define RTC_TSDAR_WU(n) (((n) & 0x00000007) << 0) // 星期的个位（BCD格式）
/***** RTC_CALR(for RTC) Register *****/
#define RTC_CALR_CALP(n) (((n) & 0x0001) << 14) // 正/负校准（校准周期为32秒） 0x0：负校准，0x1：正校准
#define RTC_CALR_CALP16(n) (((n) & 0x0001) << 13) // 每2^11个RCLK屏蔽/增加1个RCLK，校准周期为16s
#define RTC_CALR_CALP8(n) (((n) & 0x0001) << 12) // 每2^10个RCLK屏蔽/增加1个RCLK，校准周期为8s
#define RTC_CALR_CEV(n) (((n) & 0x01FF) << 0) // 每2^9个RCLK屏蔽 /增加1个RCLK，校准期望值
/***** RTC_SSSR(for RTC) Register *****/
#define RTC_SSSR_ASS(n) (((n) & 0x0001) << 16) // 提前/延迟亚秒 0x0：延迟亚秒 0x1：提前亚秒
#define RTC_SSSR_SSEV(n) (((n) & 0x00003FFF) << 0) // 亚秒期望值
/* Private typedef -----------------------------------------------------------*/
// 设置时间格式：12小时制、24小时制
typedef enum
{
SET_12_HOURS = 0x1,
SET_24_HOURS = 0x0,
SET_AM = 0x0,
SET_PM = 0x1
}TYPE_ENUM_TIMER_FORMAT;
/* 夏令时操作 */
typedef enum
{
DST_SUB1H = 0x0,
DST_ADD1H = 0x1
}TYPE_ENUM_DST;
/* 时间戳触发 */
typedef enum
{
TSE_FALL_EDGE_TRIG = 0x0,
TSE_RISING_EDGE_TRIG = 0x1
}TYPE_ENUM_TIME_STAMP_TRIG;
/* 入侵检测引脚复用 */
typedef enum
{
PIN_PA8 = 0x0,
LP_WKUP_PIN = 0x1
}TYPE_ENUM_TAMPM;
/* 入侵检测触发 */
typedef enum
{
FALLING_EDGE_TRIG = 0x0,
RISING_EDGE_TRIG = 0x1,
LOW_LEV = 0x0,
HIGH_LEV = 0x1
}TYPE_ENUM_INTR_DET_TRIG;
/* Intrusion detection filtering */
typedef enum
{
EDGE_EFFE = 0x0,
TWICE_EFFE_LEV = 0x1,
FOUR_EFFE_LEV = 0x2,
EIGHT_EFFE_LEV = 0x3
}TYPE_ENUM_EFFE_LEV;
/* Intrusion detection precharge time */
typedef enum
{
// 入侵检测预充电时间
RCLK1_PRE_TIME = 0x0,
RCLK2_PRE_TIME = 0x1,
RCLK4_PRE_TIME = 0x2,
RCLK8_PRE_TIME = 0x3
}TYPE_ENUM_PRECHARGE_TIME;
/* 唤醒定时器时钟选择 */
typedef enum
{
RCLK_2PRES = 0x0, // 0x0：RCLK/2
RCLK_4PRES = 0x1, // 0x1：RCLK/4
RCLK_8PRES = 0x2, // 0x2：RCLK/8
RCLK_16PRES = 0x3, // 0x3：RCLK/16
CK_SPRE_16BIT = 0x4, // 0x4，0x5：ck_spre，定时器为16位
CK_SPRE_17BIT = 0x7 // 0x6，0x7：ck_spre，定时器为17位
}TYPE_ENUM_RCLK_PRES;
#define RTC_FLAG_USE_EXTERN_LXOSC32K BIT(0)
void dsleep_rtc_calendar_init(uint32 time, uint32 date, uint32 flags);
void dsleep_rtc_alarm_cfg(uint32 time, uint8 msk);
void dsleep_rtc_calendar_read(RTC_TIMER_TYPEDEF *rtc_time);
void dsleep_bssid_set(void *ops, uint8 *bssid);
void dsleep_tim_tx_hdl(uint8 *element);
int32 dsleep_crc_valid(void);
//----------------------------------------------------------------------------------
#ifdef __cplusplus
}
#endif
#endif //__IRTCC_H__
/******************* (C) COPYRIGHT 2017 HUGE-IC *****END OF FILE****/

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#ifndef _HGIC_LMAC_HOST_H_
#define _HGIC_LMAC_HOST_H_
#ifdef __cplusplus
extern "C" {
#endif
struct lmachost_param {
uint8 bus_type;
uint8 task_priority;
uint16 stack_size;
struct lmac_ops *lops;
struct bt_ops *btops;
uint32 rxwrite: 1, rev: 31;
uint32 dma_scatter;
};
struct lmac_host {
uint16 stop: 1, req_txwnd: 1, bleraw: 1, user_edca: 1, init_report: 1,
icmp_mntr: 1, rxwrite: 1, throughput_en: 3,
dup_filter:1, sta_mode:1;
uint16 cookie, last_cookie;
uint16 aggbuff_len, agg_len;
uint8 if_monitor; //interface monitor.
atomic8_t if_alive; //interface alive.
uint32 dma_scatter;
struct mac_bus *bus;
struct lmac_ops *ops;
struct bt_ops *btops;
struct skb_list iftest_list;
struct skb_list cmd_list;
struct skb_list up2host;
//struct skb_list txstatus_list;
struct skb_list rx_list;
os_semaphore_t sema;
os_task_t task;
uint8 *agg_buff;
struct sk_buff *cmdskb;
uint16 sn_head[9];
uint64 sn_bitmap[9];
uint16 stats_invalid_frm, stats_cookie_err;
uint16 stats_unsupport_frm, stats_rx_loop;
uint32 stats_recv_nomem;
uint32 rx_bytes, tx_bytes;
uint64 throughput_jiff;
};
void lmac_host_report_init_done(struct lmac_host *lmachost);
int32 lmac_host_init(struct lmachost_param *l_param, struct macbus_param *m_param);
int32 host_event_new(uint32 evt_id, uint8 *data, uint32 data_len);
int32 host_data_send(uint8 *data, uint32 data_len);
void lmac_host_status(void);
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _LMAC_RXQ_H_
#define _LMAC_RXQ_H_
#include <typesdef.h>
#ifdef __cplusplus
extern "C" {
#endif
struct lmac_frm_info {
uint8 *addr;
uint32 len;
};
struct lmac_rxq {
os_semaphore_t sem;
struct lmac_frm_info *rxq;
uint16 wpos;
uint16 rpos;
uint32 size;
};
int32 lmac_rxq_init(struct lmac_rxq *rxq, uint8 *qbuf, int32 qsize);
int32 lmac_rxq_put(struct lmac_rxq *rxq, struct lmac_frm_info *frm_info, int32 count);
int32 lmac_rxq_get(struct lmac_rxq *rxq, struct lmac_frm_info *frm_info, int32 count, int32 tmo);
int32 lmac_rxq_free(struct lmac_rxq *rxq);
int32 lmac_rxq_count(struct lmac_rxq *rxq);
#ifdef __cplusplus
}
#endif
#endif

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/**
* @file drivercmd.h
* @author HUGE-IC Application Team
* @brief Module driver command function
* @version 1.0.0
* @date 2021-8-31
*
* @copyright Copyright (c) 2021 HUGE-IC
*/
#ifndef _DRIVER_CMD_H_
#define _DRIVER_CMD_H_
#include "typesdef.h"
struct driver_cmd_param {
uint32 cmd;
uint8 *data;
uint32 data_len;
uint8 **resp;
uint32 *resp_len;
};
typedef int32(*driver_cmd_hdl)(uint32 priv, struct driver_cmd_param *param);
int32 driver_cmd_hdl_register(driver_cmd_hdl hdl, uint32 data);
int32 driver_cmd_hdl_unregister(driver_cmd_hdl hdl);
int32 driver_cmd_hdl_proc(struct driver_cmd_param *param);
#endif // _DRIVER_CMD_H_

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#ifndef _MCU_UTIL_H_
#define _MCU_UTIL_H_
int32 mcu_init(void);
int32 mcu_pir_sensor_set(uint8 level);
uint8 mcu_pir_sensor_get(void);
uint8 mcu_battery_soc_get(void);
#endif

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2015-06-15 hichard first version
*/
#ifndef __MMC_H__
#define __MMC_H__
#include "lib/mmc/mmcsd_host.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
* EXT_CSD fields
*/
#define EXT_CSD_FLUSH_CACHE 32 /* W */
#define EXT_CSD_CACHE_CTRL 33 /* R/W */
#define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */
#define EXT_CSD_PACKED_FAILURE_INDEX 35 /* RO */
#define EXT_CSD_PACKED_CMD_STATUS 36 /* RO */
#define EXT_CSD_EXP_EVENTS_STATUS 54 /* RO, 2 bytes */
#define EXT_CSD_EXP_EVENTS_CTRL 56 /* R/W, 2 bytes */
#define EXT_CSD_DATA_SECTOR_SIZE 61 /* R */
#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */
#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */
#define EXT_CSD_HPI_MGMT 161 /* R/W */
#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
#define EXT_CSD_BKOPS_EN 163 /* R/W */
#define EXT_CSD_BKOPS_START 164 /* W */
#define EXT_CSD_SANITIZE_START 165 /* W */
#define EXT_CSD_WR_REL_PARAM 166 /* RO */
#define EXT_CSD_RPMB_MULT 168 /* RO */
#define EXT_CSD_BOOT_WP 173 /* R/W */
#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
#define EXT_CSD_PART_CONFIG 179 /* R/W */
#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */
#define EXT_CSD_BUS_WIDTH 183 /* R/W */
#define EXT_CSD_HS_TIMING 185 /* R/W */
#define EXT_CSD_POWER_CLASS 187 /* R/W */
#define EXT_CSD_REV 192 /* RO */
#define EXT_CSD_STRUCTURE 194 /* RO */
#define EXT_CSD_CARD_TYPE 196 /* RO */
#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */
#define EXT_CSD_PART_SWITCH_TIME 199 /* RO */
#define EXT_CSD_PWR_CL_52_195 200 /* RO */
#define EXT_CSD_PWR_CL_26_195 201 /* RO */
#define EXT_CSD_PWR_CL_52_360 202 /* RO */
#define EXT_CSD_PWR_CL_26_360 203 /* RO */
#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
#define EXT_CSD_S_A_TIMEOUT 217 /* RO */
#define EXT_CSD_REL_WR_SEC_C 222 /* RO */
#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
#define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */
#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
#define EXT_CSD_BOOT_MULT 226 /* RO */
#define EXT_CSD_SEC_TRIM_MULT 229 /* RO */
#define EXT_CSD_SEC_ERASE_MULT 230 /* RO */
#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */
#define EXT_CSD_TRIM_MULT 232 /* RO */
#define EXT_CSD_PWR_CL_200_195 236 /* RO */
#define EXT_CSD_PWR_CL_200_360 237 /* RO */
#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */
#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */
#define EXT_CSD_BKOPS_STATUS 246 /* RO */
#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */
#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */
#define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */
#define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */
#define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */
#define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */
#define EXT_CSD_MAX_PACKED_READS 501 /* RO */
#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
#define EXT_CSD_HPI_FEATURES 503 /* RO */
/*
* EXT_CSD field definitions
*/
#define EXT_CSD_WR_REL_PARAM_EN (1<<2)
#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40)
#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10)
#define EXT_CSD_BOOT_WP_B_PERM_WP_EN (0x04)
#define EXT_CSD_BOOT_WP_B_PWR_WP_EN (0x01)
#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7)
#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
#define EXT_CSD_PART_CONFIG_ACC_RPMB (0x3)
#define EXT_CSD_PART_CONFIG_ACC_GP0 (0x4)
#define EXT_CSD_PART_SUPPORT_PART_EN (0x1)
#define EXT_CSD_CMD_SET_NORMAL (1<<0)
#define EXT_CSD_CMD_SET_SECURE (1<<1)
#define EXT_CSD_CMD_SET_CPSECURE (1<<2)
#define EXT_CSD_CARD_TYPE_HS_26 (1<<0) /* Card can run at 26MHz */
#define EXT_CSD_CARD_TYPE_HS_52 (1<<1) /* Card can run at 52MHz */
#define EXT_CSD_CARD_TYPE_HS (EXT_CSD_CARD_TYPE_HS_26 | \
EXT_CSD_CARD_TYPE_HS_52)
#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */
/* DDR mode @1.8V or 3V I/O */
#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */
/* DDR mode @1.2V I/O */
#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
| EXT_CSD_CARD_TYPE_DDR_1_2V)
#define EXT_CSD_CARD_TYPE_HS200_1_8V (1<<4) /* Card can run at 200MHz */
#define EXT_CSD_CARD_TYPE_HS200_1_2V (1<<5) /* Card can run at 200MHz */
/* SDR mode @1.2V I/O */
#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
EXT_CSD_CARD_TYPE_HS200_1_2V)
#define EXT_CSD_CARD_TYPE_HS400_1_8V (1<<6) /* Card can run at 200MHz DDR, 1.8V */
#define EXT_CSD_CARD_TYPE_HS400_1_2V (1<<7) /* Card can run at 200MHz DDR, 1.2V */
#define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \
EXT_CSD_CARD_TYPE_HS400_1_2V)
#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */
#define EXT_CSD_TIMING_HS 1 /* High speed */
#define EXT_CSD_TIMING_HS200 2 /* HS200 */
#define EXT_CSD_TIMING_HS400 3 /* HS400 */
#define EXT_CSD_SEC_ER_EN BIT(0)
#define EXT_CSD_SEC_BD_BLK_EN BIT(2)
#define EXT_CSD_SEC_GB_CL_EN BIT(4)
#define EXT_CSD_SEC_SANITIZE BIT(6) /* v4.5 only */
#define EXT_CSD_RST_N_EN_MASK 0x3
#define EXT_CSD_RST_N_ENABLED 1 /* RST_n is enabled on card */
#define EXT_CSD_NO_POWER_NOTIFICATION 0
#define EXT_CSD_POWER_ON 1
#define EXT_CSD_POWER_OFF_SHORT 2
#define EXT_CSD_POWER_OFF_LONG 3
#define EXT_CSD_PWR_CL_8BIT_MASK 0xF0 /* 8 bit PWR CLS */
#define EXT_CSD_PWR_CL_4BIT_MASK 0x0F /* 8 bit PWR CLS */
#define EXT_CSD_PWR_CL_8BIT_SHIFT 4
#define EXT_CSD_PWR_CL_4BIT_SHIFT 0
#define EXT_CSD_PACKED_EVENT_EN BIT(3)
/*
* EXCEPTION_EVENT_STATUS field
*/
#define EXT_CSD_URGENT_BKOPS BIT(0)
#define EXT_CSD_DYNCAP_NEEDED BIT(1)
#define EXT_CSD_SYSPOOL_EXHAUSTED BIT(2)
#define EXT_CSD_PACKED_FAILURE BIT(3)
#define EXT_CSD_PACKED_GENERIC_ERROR BIT(0)
#define EXT_CSD_PACKED_INDEXED_ERROR BIT(1)
/*
* BKOPS status level
*/
#define EXT_CSD_BKOPS_LEVEL_2 0x2
/*
* MMC_SWITCH access modes
*/
#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */
#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */
#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
/*
* extern function
*/
int32 mmc_send_op_cond(struct mmcsd_host *host, uint32 ocr, uint32 *rocr);
uint32 mmc_card_detect(struct mmcsd_host *host, uint32 ocr);
#ifdef __cplusplus
}
#endif
#endif

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2011-07-25 weety first version
*/
#ifndef __MMCSD_CARD_H__
#define __MMCSD_CARD_H__
#include "lib/mmc/mmcsd_host.h"
#ifdef __cplusplus
extern "C" {
#endif
#define SD_SCR_BUS_WIDTH_1 (1 << 0)
#define SD_SCR_BUS_WIDTH_4 (1 << 2)
struct mmcsd_cid {
uint8 mid; /* ManufacturerID */
uint8 prv; /* Product Revision */
uint16 oid; /* OEM/Application ID */
uint32 psn; /* Product Serial Number */
uint8 pnm[5]; /* Product Name */
uint8 reserved1;/* reserved */
uint16 mdt; /* Manufacturing Date */
uint8 crc; /* CID CRC */
uint8 reserved2;/* not used, always 1 */
};
struct mmcsd_csd {
uint8 csd_structure; /* CSD register version */
uint8 taac;
uint8 nsac;
uint8 tran_speed; /* max data transfer rate */
uint16 card_cmd_class; /* card command classes */
uint8 rd_blk_len; /* max read data block length */
uint8 rd_blk_part;
uint8 wr_blk_misalign;
uint8 rd_blk_misalign;
uint8 dsr_imp; /* DSR implemented */
uint8 c_size_mult; /* CSD 1.0 , device size multiplier */
uint32 c_size; /* device size */
uint8 r2w_factor;
uint8 wr_blk_len; /* max wtire data block length */
uint8 wr_blk_partial;
uint8 csd_crc;
};
struct sd_scr {
uint8 sd_version;
uint8 sd_bus_widths;
};
struct sdio_cccr {
uint8 sdio_version;
uint8 sd_version;
uint8 direct_cmd: 1, /* Card Supports Direct Commands during data transfer
only SD mode, not used for SPI mode */
multi_block: 1, /* Card Supports Multi-Block */
read_wait: 1, /* Card Supports Read Wait
only SD mode, not used for SPI mode */
suspend_resume: 1, /* Card supports Suspend/Resume
only SD mode, not used for SPI mode */
s4mi: 1, /* generate interrupts during a 4-bit
multi-block data transfer */
e4mi: 1, /* Enable the multi-block IRQ during
4-bit transfer for the SDIO card */
low_speed: 1, /* Card is a Low-Speed card */
low_speed_4: 1; /* 4-bit support for Low-Speed cards */
uint8 bus_width: 1, /* Support SDIO bus width, 1:4bit, 0:1bit */
cd_disable: 1, /* Connect[0]/Disconnect[1] the 10K-90K ohm pull-up
resistor on CD/DAT[3] (pin 1) of the card */
power_ctrl: 1, /* Support Master Power Control */
high_speed: 1; /* Support High-Speed */
};
struct sdio_cis {
uint16 manufacturer;
uint16 product;
uint16 func0_blk_size;
uint32 max_tran_speed;
};
/*
* SDIO function CIS tuple (unknown to the core)
*/
struct sdio_function_tuple {
struct sdio_function_tuple *next;
uint8 code;
uint8 size;
uint8 *data;
};
struct sdio_function;
typedef void (*sdio_irq_handler_t)(struct sdio_function *func);
/*
* SDIO function devices
*/
struct sdio_function {
struct mmcsd_card *card; /* the card this device belongs to */
sdio_irq_handler_t irq_handler; /* IRQ callback */
uint8 num; /* function number */
uint8 func_code; /* Standard SDIO Function interface code */
uint16 manufacturer; /* manufacturer id */
uint16 product; /* product id */
uint32 max_blk_size; /* maximum block size */
uint32 cur_blk_size; /* current block size */
uint64 enable_timeout_val; /* max enable timeout in msec */
struct sdio_function_tuple *tuples;
void *priv;
};
#define SDIO_MAX_FUNCTIONS 2
struct mmcsd_card {
struct list_head list;
struct mmcsd_host *host;
uint32 rca; /* card addr */
uint32 resp_cid[4]; /* card CID register */
uint32 resp_csd[4]; /* card CSD register */
uint32 resp_scr[2]; /* card SCR register */
uint16 tacc_clks; /* data access time by ns */
uint32 tacc_ns; /* data access time by clk cycles */
uint32 max_data_rate; /* max data transfer rate */
uint32 card_capacity; /* card capacity, unit:KB */
uint32 card_blksize; /* card block size */
uint32 erase_size; /* erase size in sectors */
uint16 card_type;
#define CARD_TYPE_MMC 0 /* MMC card */
#define CARD_TYPE_SD 1 /* SD card */
#define CARD_TYPE_SDIO 2 /* SDIO card */
#define CARD_TYPE_SDIO_COMBO 3 /* SD combo (IO+mem) card */
uint16 flags;
#define CARD_FLAG_HIGHSPEED (1 << 0) /* SDIO bus speed 50MHz */
#define CARD_FLAG_SDHC (1 << 1) /* SDHC card */
#define CARD_FLAG_SDXC (1 << 2) /* SDXC card */
struct sd_scr scr;
struct mmcsd_csd csd;
uint32 hs_max_data_rate; /* max data transfer rate in high speed mode */
uint8 sdio_function_num; /* totol number of SDIO functions */
struct sdio_cccr cccr; /* common card info */
struct sdio_cis cis; /* common tuple info */
struct sdio_function *sdio_function[SDIO_MAX_FUNCTIONS + 1]; /* SDIO functions (devices) */
struct list_head blk_devices; /* for block device list */
};
#ifdef __cplusplus
}
#endif
#endif

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2011-07-25 weety first version
*/
#ifndef __CMD_H__
#define __CMD_H__
#ifdef __cplusplus
extern "C" {
#endif
/* class 1 */
#define GO_IDLE_STATE 0 /* bc */
#define SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
#define ALL_SEND_CID 2 /* bcr R2 */
#define SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
#define SET_DSR 4 /* bc [31:16] RCA */
#define SWITCH 6 /* ac [31:0] See below R1b */
#define SELECT_CARD 7 /* ac [31:16] RCA R1 */
#define SEND_EXT_CSD 8 /* adtc R1 */
#define SEND_CSD 9 /* ac [31:16] RCA R2 */
#define SEND_CID 10 /* ac [31:16] RCA R2 */
#define READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
#define STOP_TRANSMISSION 12 /* ac R1b */
#define SEND_STATUS 13 /* ac [31:16] RCA R1 */
#define GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
#define SPI_READ_OCR 58 /* spi spi_R3 */
#define SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */
/* class 2 */
#define SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
#define READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
#define READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
/* class 3 */
#define WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
/* class 4 */
#define SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
#define WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
#define WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
#define PROGRAM_CID 26 /* adtc R1 */
#define PROGRAM_CSD 27 /* adtc R1 */
/* class 6 */
#define SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
#define CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
#define SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
/* class 5 */
#define ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
#define ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
#define ERASE 38 /* ac R1b */
/* class 9 */
#define FAST_IO 39 /* ac <Complex> R4 */
#define GO_IRQ_STATE 40 /* bcr R5 */
/* class 7 */
#define LOCK_UNLOCK 42 /* adtc R1b */
/* class 8 */
#define APP_CMD 55 /* ac [31:16] RCA R1 */
#define GEN_CMD 56 /* adtc [0] RD/WR R1 */
/* SD commands type argument response */
/* class 0 */
/* This is basically the same command as for MMC with some quirks. */
#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */
/* class 10 */
#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
/* Application commands */
#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */
#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
#define SD_APP_SEND_SCR 51 /* adtc R1 */
#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00 */
/* SDIO commands type argument response */
#define SD_IO_SEND_OP_COND 5 /* bcr [23:0] OCR R4 */
#define SD_IO_RW_DIRECT 52 /* ac [31:0] See below R5 */
#define SD_IO_RW_EXTENDED 53 /* adtc [31:0] See below R5 */
/* CMD52 arguments */
#define SDIO_ARG_CMD52_READ (0<<31)
#define SDIO_ARG_CMD52_WRITE (1u<<31)
#define SDIO_ARG_CMD52_FUNC_SHIFT 28
#define SDIO_ARG_CMD52_FUNC_MASK 0x7
#define SDIO_ARG_CMD52_RAW_FLAG (1u<<27)
#define SDIO_ARG_CMD52_REG_SHIFT 9
#define SDIO_ARG_CMD52_REG_MASK 0x1ffff
#define SDIO_ARG_CMD52_DATA_SHIFT 0
#define SDIO_ARG_CMD52_DATA_MASK 0xff
#define SDIO_R5_DATA(resp) ((resp)[0] & 0xff)
/* CMD53 arguments */
#define SDIO_ARG_CMD53_READ (0<<31)
#define SDIO_ARG_CMD53_WRITE (1u<<31)
#define SDIO_ARG_CMD53_FUNC_SHIFT 28
#define SDIO_ARG_CMD53_FUNC_MASK 0x7
#define SDIO_ARG_CMD53_BLOCK_MODE (1u<<27)
#define SDIO_ARG_CMD53_INCREMENT (1u<<26)
#define SDIO_ARG_CMD53_REG_SHIFT 9
#define SDIO_ARG_CMD53_REG_MASK 0x1ffff
#define SDIO_ARG_CMD53_LENGTH_SHIFT 0
#define SDIO_ARG_CMD53_LENGTH_MASK 0x1ff
#define SDIO_ARG_CMD53_LENGTH_MAX 511
#ifdef __cplusplus
}
#endif
#endif

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2011-07-25 weety first version
*/
#ifndef __CORE_H__
#define __CORE_H__
#include "lib/mmc/mmcsd_host.h"
#include "lib/mmc/mmcsd_card.h"
#include "lib/mmc/mmcsd_cmd.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifdef RT_MMCSD_DBG
#define mmcsd_dbg(fmt, ...) printf(fmt, ##__VA_ARGS__)
#else
#define mmcsd_dbg(fmt, ...)
#endif
struct mmcsd_data {
uint32 blksize;
uint32 blks;
uint32 *buf;
int32 err;
uint32 flags;
#define DATA_DIR_WRITE (1 << 0)
#define DATA_DIR_READ (1 << 1)
#define DATA_STREAM (1 << 2)
unsigned int bytes_xfered;
struct mmcsd_cmd *stop; /* stop command */
struct mmcsd_req *mrq; /* associated request */
uint32 timeout_ns;
uint32 timeout_clks;
};
struct mmcsd_cmd {
uint32 cmd_code;
uint32 arg;
uint32 resp[4];
uint32 flags;
/*rsponse types
*bits:0~3
*/
#define RESP_MASK (0xF)
#define RESP_NONE (0)
#define RESP_R1 (1 << 0)
#define RESP_R1B (2 << 0)
#define RESP_R2 (3 << 0)
#define RESP_R3 (4 << 0)
#define RESP_R4 (5 << 0)
#define RESP_R6 (6 << 0)
#define RESP_R7 (7 << 0)
#define RESP_R5 (8 << 0) /*SDIO command response type*/
/*command types
*bits:4~5
*/
#define CMD_MASK (3 << 4) /* command type */
#define CMD_AC (0 << 4)
#define CMD_ADTC (1 << 4)
#define CMD_BC (2 << 4)
#define CMD_BCR (3 << 4)
#define resp_type(cmd) ((cmd)->flags & RESP_MASK)
/*spi rsponse types
*bits:6~8
*/
#define RESP_SPI_MASK (0x7 << 6)
#define RESP_SPI_R1 (1 << 6)
#define RESP_SPI_R1B (2 << 6)
#define RESP_SPI_R2 (3 << 6)
#define RESP_SPI_R3 (4 << 6)
#define RESP_SPI_R4 (5 << 6)
#define RESP_SPI_R5 (6 << 6)
#define RESP_SPI_R7 (7 << 6)
#define spi_resp_type(cmd) ((cmd)->flags & RESP_SPI_MASK)
/*
* These are the command types.
*/
#define cmd_type(cmd) ((cmd)->flags & CMD_MASK)
int32 retries; /* max number of retries */
int32 err;
struct mmcsd_data *data;
struct mmcsd_req *mrq; /* associated request */
};
struct mmcsd_req {
struct mmcsd_data *data;
struct mmcsd_cmd *cmd;
struct mmcsd_cmd *stop;
};
/*the following is response bit*/
#define R1_OUT_OF_RANGE (1 << 31) /* er, c */
#define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
#define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
#define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
#define R1_ERASE_PARAM (1 << 27) /* ex, c */
#define R1_WP_VIOLATION (1 << 26) /* erx, c */
#define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */
#define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */
#define R1_COM_CRC_ERROR (1 << 23) /* er, b */
#define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */
#define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */
#define R1_CC_ERROR (1 << 20) /* erx, c */
#define R1_ERROR (1 << 19) /* erx, c */
#define R1_UNDERRUN (1 << 18) /* ex, c */
#define R1_OVERRUN (1 << 17) /* ex, c */
#define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */
#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
#define R1_ERASE_RESET (1 << 13) /* sr, c */
#define R1_STATUS(x) (x & 0xFFFFE000)
#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
#define R1_APP_CMD (1 << 5) /* sr, c */
#define R1_SPI_IDLE (1 << 0)
#define R1_SPI_ERASE_RESET (1 << 1)
#define R1_SPI_ILLEGAL_COMMAND (1 << 2)
#define R1_SPI_COM_CRC (1 << 3)
#define R1_SPI_ERASE_SEQ (1 << 4)
#define R1_SPI_ADDRESS (1 << 5)
#define R1_SPI_PARAMETER (1 << 6)
/* R1 bit 7 is always zero */
#define R2_SPI_CARD_LOCKED (1 << 8)
#define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */
#define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP
#define R2_SPI_ERROR (1 << 10)
#define R2_SPI_CC_ERROR (1 << 11)
#define R2_SPI_CARD_ECC_ERROR (1 << 12)
#define R2_SPI_WP_VIOLATION (1 << 13)
#define R2_SPI_ERASE_PARAM (1 << 14)
#define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */
#define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE
#define CARD_BUSY 0x80000000 /* Card Power up status bit */
/* R5 response bits */
#define R5_COM_CRC_ERROR (1 << 15)
#define R5_ILLEGAL_COMMAND (1 << 14)
#define R5_ERROR (1 << 11)
#define R5_FUNCTION_NUMBER (1 << 9)
#define R5_OUT_OF_RANGE (1 << 8)
#define R5_STATUS(x) (x & 0xCB00)
#define R5_IO_CURRENT_STATE(x) ((x & 0x3000) >> 12)
#define MMCSD_HOST_PLUGED 0
#define MMCSD_HOST_UNPLUGED 1
int mmcsd_wait_cd_changed(uint32 timeout);
void mmcsd_host_lock(struct mmcsd_host *host);
void mmcsd_host_unlock(struct mmcsd_host *host);
void mmcsd_req_complete(struct mmcsd_host *host);
void mmcsd_send_request(struct mmcsd_host *host, struct mmcsd_req *req);
int32 mmcsd_send_cmd(struct mmcsd_host *host, struct mmcsd_cmd *cmd, int retries);
int32 mmcsd_go_idle(struct mmcsd_host *host);
int32 mmcsd_spi_read_ocr(struct mmcsd_host *host, uint32 high_capacity, uint32 *ocr);
int32 mmcsd_all_get_cid(struct mmcsd_host *host, uint32 *cid);
int32 mmcsd_get_cid(struct mmcsd_host *host, uint32 *cid);
int32 mmcsd_get_csd(struct mmcsd_card *card, uint32 *csd);
int32 mmcsd_select_card(struct mmcsd_card *card);
int32 mmcsd_deselect_cards(struct mmcsd_card *host);
int32 mmcsd_spi_use_crc(struct mmcsd_host *host, uint32 use_crc);
void mmcsd_set_chip_select(struct mmcsd_host *host, uint32 mode);
void mmcsd_set_clock(struct mmcsd_host *host, uint32 clk);
void mmcsd_set_bus_mode(struct mmcsd_host *host, uint32 mode);
void mmcsd_set_bus_width(struct mmcsd_host *host, uint32 width);
void mmcsd_set_data_timeout(struct mmcsd_data *data, const struct mmcsd_card *card);
uint32 mmcsd_select_voltage(struct mmcsd_host *host, uint32 ocr);
void mmcsd_power_up(struct mmcsd_host *host);
void mmcsd_power_off(struct mmcsd_host *host);
void mmcsd_change(struct mmcsd_host *host);
struct mmcsd_host *mmcsd_alloc_host(void);
void mmcsd_free_host(struct mmcsd_host *host);
int mmcsd_core_init(void);
int32 mmcsd_blk_probe(struct mmcsd_card *card);
void mmcsd_blk_remove(struct mmcsd_card *card);
#ifdef __cplusplus
}
#endif
#endif

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2011-07-25 weety first version
*/
#ifndef __HOST_H__
#define __HOST_H__
#ifdef __cplusplus
extern "C" {
#endif
struct mmcsd_io_cfg {
uint32 clock; /* clock rate */
uint16 vdd;
/* vdd stores the bit number of the selected voltage range from below. */
uint8 bus_mode; /* command output mode */
#define MMCSD_BUSMODE_OPENDRAIN 1
#define MMCSD_BUSMODE_PUSHPULL 2
uint8 chip_select; /* SPI chip select */
#define MMCSD_CS_IGNORE 0
#define MMCSD_CS_HIGH 1
#define MMCSD_CS_LOW 2
uint8 power_mode; /* power supply mode */
#define MMCSD_POWER_OFF 0
#define MMCSD_POWER_UP 1
#define MMCSD_POWER_ON 2
uint8 bus_width; /* data bus width */
#define MMCSD_BUS_WIDTH_1 0
#define MMCSD_BUS_WIDTH_4 2
#define MMCSD_BUS_WIDTH_8 3
};
struct mmcsd_host;
struct mmcsd_req;
struct mmcsd_host_ops {
void (*request)(struct mmcsd_host *host, struct mmcsd_req *req);
void (*set_iocfg)(struct mmcsd_host *host, struct mmcsd_io_cfg *io_cfg);
uint32(*get_card_status)(struct mmcsd_host *host);
void (*enable_sdio_irq)(struct mmcsd_host *host, uint32 en);
};
struct mmcsd_host {
struct dev_obj dev;
uint32 hw;
uint32 irq_num;
struct mmcsd_card *card;
struct mmcsd_host_ops *ops;
uint32 freq_min;
uint32 freq_max;
struct mmcsd_io_cfg io_cfg;
uint32 valid_ocr; /* current valid OCR */
#define VDD_165_195 (1 << 7) /* VDD voltage 1.65 - 1.95 */
#define VDD_20_21 (1 << 8) /* VDD voltage 2.0 ~ 2.1 */
#define VDD_21_22 (1 << 9) /* VDD voltage 2.1 ~ 2.2 */
#define VDD_22_23 (1 << 10) /* VDD voltage 2.2 ~ 2.3 */
#define VDD_23_24 (1 << 11) /* VDD voltage 2.3 ~ 2.4 */
#define VDD_24_25 (1 << 12) /* VDD voltage 2.4 ~ 2.5 */
#define VDD_25_26 (1 << 13) /* VDD voltage 2.5 ~ 2.6 */
#define VDD_26_27 (1 << 14) /* VDD voltage 2.6 ~ 2.7 */
#define VDD_27_28 (1 << 15) /* VDD voltage 2.7 ~ 2.8 */
#define VDD_28_29 (1 << 16) /* VDD voltage 2.8 ~ 2.9 */
#define VDD_29_30 (1 << 17) /* VDD voltage 2.9 ~ 3.0 */
#define VDD_30_31 (1 << 18) /* VDD voltage 3.0 ~ 3.1 */
#define VDD_31_32 (1 << 19) /* VDD voltage 3.1 ~ 3.2 */
#define VDD_32_33 (1 << 20) /* VDD voltage 3.2 ~ 3.3 */
#define VDD_33_34 (1 << 21) /* VDD voltage 3.3 ~ 3.4 */
#define VDD_34_35 (1 << 22) /* VDD voltage 3.4 ~ 3.5 */
#define VDD_35_36 (1 << 23) /* VDD voltage 3.5 ~ 3.6 */
uint32 flags; /* define device capabilities */
#define MMCSD_BUSWIDTH_4 (1 << 0)
#define MMCSD_BUSWIDTH_8 (1 << 1)
#define MMCSD_MUTBLKWRITE (1 << 2)
#define MMCSD_HOST_IS_SPI (1 << 3)
#define controller_is_spi(host) (host->flags & MMCSD_HOST_IS_SPI)
#define MMCSD_SUP_SDIO_IRQ (1 << 4) /* support signal pending SDIO IRQs */
#define MMCSD_SUP_HIGHSPEED (1 << 5) /* support high speed */
uint32 max_seg_size; /* maximum size of one dma segment */
uint32 max_dma_segs; /* maximum number of dma segments in one request */
uint32 max_blk_size; /* maximum block size */
uint32 max_blk_count; /* maximum block count */
uint8 id;
uint8 spi_use_crc;
uint8 sdio_irq_init;
os_mutex_t lock;
os_semaphore_t complete;
os_semaphore_t sdio_irq_sem;
os_task_t irq_thread;
void *private_data;
};
#ifdef __cplusplus
}
#endif
#endif

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2011-07-25 weety first version
*/
#ifndef __SD_H__
#define __SD_H__
#include "lib/mmc/mmcsd_host.h"
#ifdef __cplusplus
extern "C" {
#endif
int32 mmcsd_send_if_cond(struct mmcsd_host *host, uint32 ocr);
int32 mmcsd_send_app_op_cond(struct mmcsd_host *host, uint32 ocr, uint32 *rocr);
int32 mmcsd_get_card_addr(struct mmcsd_host *host, uint32 *rca);
int32 mmcsd_get_scr(struct mmcsd_card *card, uint32 *scr);
int32 sd_card_detect(struct mmcsd_host *host, uint32 ocr);
#ifdef __cplusplus
}
#endif
#endif

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2012-01-15 weety first version
*/
#ifndef __SDIO_H__
#define __SDIO_H__
#include "lib/mmc/mmcsd_host.h"
#include "lib/mmc/mmcsd_card.h"
#include "lib/mmc/sdio_func_ids.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
* Card Common Control Registers (CCCR)
*/
#define SDIO_REG_CCCR_CCCR_REV 0x00
#define SDIO_CCCR_REV_1_00 0 /* CCCR/FBR Version 1.00 */
#define SDIO_CCCR_REV_1_10 1 /* CCCR/FBR Version 1.10 */
#define SDIO_CCCR_REV_1_20 2 /* CCCR/FBR Version 1.20 */
#define SDIO_CCCR_REV_3_00 3 /* CCCR/FBR Version 2.00 */
#define SDIO_SDIO_REV_1_00 0 /* SDIO Spec Version 1.00 */
#define SDIO_SDIO_REV_1_10 1 /* SDIO Spec Version 1.10 */
#define SDIO_SDIO_REV_1_20 2 /* SDIO Spec Version 1.20 */
#define SDIO_SDIO_REV_2_00 3 /* SDIO Spec Version 2.00 */
#define SDIO_REG_CCCR_SD_REV 0x01
#define SDIO_SD_REV_1_01 0 /* SD Physical Spec Version 1.01 */
#define SDIO_SD_REV_1_10 1 /* SD Physical Spec Version 1.10 */
#define SDIO_SD_REV_2_00 2 /* SD Physical Spec Version 2.00 */
#define SDIO_REG_CCCR_IO_EN 0x02
#define SDIO_REG_CCCR_IO_RDY 0x03
#define SDIO_REG_CCCR_INT_EN 0x04 /* Function/Master Interrupt Enable */
#define SDIO_REG_CCCR_INT_PEND 0x05 /* Function Interrupt Pending */
#define SDIO_REG_CCCR_IO_ABORT 0x06 /* function abort/card reset */
#define SDIO_REG_CCCR_BUS_IF 0x07 /* bus interface controls */
#define SDIO_BUS_WIDTH_1BIT 0x00
#define SDIO_BUS_WIDTH_4BIT 0x02
#define SDIO_BUS_ECSI 0x20 /* Enable continuous SPI interrupt */
#define SDIO_BUS_SCSI 0x40 /* Support continuous SPI interrupt */
#define SDIO_BUS_ASYNC_INT 0x20
#define SDIO_BUS_CD_DISABLE 0x80 /* disable pull-up on DAT3 (pin 1) */
#define SDIO_REG_CCCR_CARD_CAPS 0x08
#define SDIO_CCCR_CAP_SDC 0x01 /* can do CMD52 while data transfer */
#define SDIO_CCCR_CAP_SMB 0x02 /* can do multi-block xfers (CMD53) */
#define SDIO_CCCR_CAP_SRW 0x04 /* supports read-wait protocol */
#define SDIO_CCCR_CAP_SBS 0x08 /* supports suspend/resume */
#define SDIO_CCCR_CAP_S4MI 0x10 /* interrupt during 4-bit CMD53 */
#define SDIO_CCCR_CAP_E4MI 0x20 /* enable ints during 4-bit CMD53 */
#define SDIO_CCCR_CAP_LSC 0x40 /* low speed card */
#define SDIO_CCCR_CAP_4BLS 0x80 /* 4 bit low speed card */
#define SDIO_REG_CCCR_CIS_PTR 0x09 /* common CIS pointer (3 bytes) */
/* Following 4 regs are valid only if SBS is set */
#define SDIO_REG_CCCR_BUS_SUSPEND 0x0c
#define SDIO_REG_CCCR_FUNC_SEL 0x0d
#define SDIO_REG_CCCR_EXEC_FLAG 0x0e
#define SDIO_REG_CCCR_READY_FLAG 0x0f
#define SDIO_REG_CCCR_FN0_BLKSIZE 0x10 /* 2bytes, 0x10~0x11 */
#define SDIO_REG_CCCR_POWER_CTRL 0x12
#define SDIO_POWER_SMPC 0x01 /* Supports Master Power Control */
#define SDIO_POWER_EMPC 0x02 /* Enable Master Power Control */
#define SDIO_REG_CCCR_SPEED 0x13
#define SDIO_SPEED_SHS 0x01 /* Supports High-Speed mode */
#define SDIO_SPEED_EHS 0x02 /* Enable High-Speed mode */
/*
* Function Basic Registers (FBR)
*/
#define SDIO_REG_FBR_BASE(f) ((f) * 0x100) /* base of function f's FBRs */
#define SDIO_REG_FBR_STD_FUNC_IF 0x00
#define SDIO_FBR_SUPPORTS_CSA 0x40 /* supports Code Storage Area */
#define SDIO_FBR_ENABLE_CSA 0x80 /* enable Code Storage Area */
#define SDIO_REG_FBR_STD_IF_EXT 0x01
#define SDIO_REG_FBR_POWER 0x02
#define SDIO_FBR_POWER_SPS 0x01 /* Supports Power Selection */
#define SDIO_FBR_POWER_EPS 0x02 /* Enable (low) Power Selection */
#define SDIO_REG_FBR_CIS 0x09 /* CIS pointer (3 bytes) */
#define SDIO_REG_FBR_CSA 0x0C /* CSA pointer (3 bytes) */
#define SDIO_REG_FBR_CSA_DATA 0x0F
#define SDIO_REG_FBR_BLKSIZE 0x10 /* block size (2 bytes) */
/* SDIO CIS Tuple code */
#define CISTPL_NULL 0x00
#define CISTPL_CHECKSUM 0x10
#define CISTPL_VERS_1 0x15
#define CISTPL_ALTSTR 0x16
#define CISTPL_MANFID 0x20
#define CISTPL_FUNCID 0x21
#define CISTPL_FUNCE 0x22
#define CISTPL_SDIO_STD 0x91
#define CISTPL_SDIO_EXT 0x92
#define CISTPL_END 0xff
/* SDIO device id */
#define SDIO_ANY_FUNC_ID 0xff
#define SDIO_ANY_MAN_ID 0xffff
#define SDIO_ANY_PROD_ID 0xffff
struct sdio_device_id {
uint8 func_code;
uint16 manufacturer;
uint16 product;
};
struct sdio_device_driver {
char *name;
struct list_head list;
uint32(*probe)(struct mmcsd_card *card);
uint32(*remove)(struct mmcsd_card *card);
struct sdio_device_id *id;
};
int32 sdio_io_send_op_cond(struct mmcsd_host *host,
uint32 ocr,
uint32 *cmd5_resp);
int32 sdio_io_rw_direct(struct mmcsd_card *card,
uint32 rw,
uint32 fn,
uint32 reg_addr,
uint8 *pdata,
uint8 raw);
int32 sdio_io_rw_extended(struct mmcsd_card *card,
uint32 rw,
uint32 fn,
uint32 addr,
uint32 op_code,
uint8 *buf,
uint32 blocks,
uint32 blksize);
int32 sdio_io_rw_extended_block(struct sdio_function *func,
uint32 rw,
uint32 addr,
uint32 op_code,
uint8 *buf,
uint32 len);
uint8 sdio_io_readb(struct sdio_function *func,
uint32 reg,
int32 *err);
int32 sdio_io_writeb(struct sdio_function *func,
uint32 reg,
uint8 data);
uint16 sdio_io_readw(struct sdio_function *func,
uint32 addr,
int32 *err);
int32 sdio_io_writew(struct sdio_function *func,
uint16 data,
uint32 addr);
uint32 sdio_io_readl(struct sdio_function *func,
uint32 addr,
int32 *err);
int32 sdio_io_writel(struct sdio_function *func,
uint32 data,
uint32 addr);
int32 sdio_io_read_multi_fifo_b(struct sdio_function *func,
uint32 addr,
uint8 *buf,
uint32 len);
int32 sdio_io_write_multi_fifo_b(struct sdio_function *func,
uint32 addr,
uint8 *buf,
uint32 len);
int32 sdio_io_read_multi_incr_b(struct sdio_function *func,
uint32 addr,
uint8 *buf,
uint32 len);
int32 sdio_io_write_multi_incr_b(struct sdio_function *func,
uint32 addr,
uint8 *buf,
uint32 len);
int32 sdio_card_detect(struct mmcsd_host *host, uint32 ocr);
int32 sdio_attach_irq(struct sdio_function *func, sdio_irq_handler_t handler);
int32 sdio_detach_irq(struct sdio_function *func);
void sdio_irq_wakeup(struct mmcsd_host *host);
int32 sdio_enable_func(struct sdio_function *func);
int32 sdio_disable_func(struct sdio_function *func);
void sdio_set_drvdata(struct sdio_function *func, void *data);
void *sdio_get_drvdata(struct sdio_function *func);
int32 sdio_set_block_size(struct sdio_function *func, uint32 blksize);
int32 sdio_register_driver(struct sdio_device_driver *driver);
int32 sdio_unregister_driver(struct sdio_device_driver *driver);
uint32 sdio_unregister_card(struct mmcsd_card *card);
void sdio_free_cis(struct sdio_function *func);
void mmcsd_sdio_init(void);
#ifdef __cplusplus
}
#endif
#endif

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2012-02-26 weety first version
*/
#ifndef __SDIO_FUNC_IDS_H__
#define __SDIO_FUNC_IDS_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Standard SDIO Function Interfaces */
#define SDIO_FUNC_CODE_NONE 0x00 /* Not a SDIO standard interface */
#define SDIO_FUNC_CODE_UART 0x01 /* SDIO Standard UART */
#define SDIO_FUNC_CODE_BT_A 0x02 /* SDIO Type-A for Bluetooth standard interface */
#define SDIO_FUNC_CODE_BT_B 0x03 /* SDIO Type-B for Bluetooth standard interface */
#define SDIO_FUNC_CODE_GPS 0x04 /* SDIO GPS standard interface */
#define SDIO_FUNC_CODE_CAMERA 0x05 /* SDIO Camera standard interface */
#define SDIO_FUNC_CODE_PHS 0x06 /* SDIO PHS standard interface */
#define SDIO_FUNC_CODE_WLAN 0x07 /* SDIO WLAN interface */
#define SDIO_FUNC_CODE_ATA 0x08 /* Embedded SDIO-ATA standard interface */
/* manufacturer id, product io */
#define SDIO_MANUFACTURER_ID_MARVELL 0x02df
#define SDIO_PRODUCT_ID_MARVELL_88W8686 0x9103
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _TXSEMI_FRAMEBUFF_H_
#define _TXSEMI_FRAMEBUFF_H_
#include "media_types.h"
#ifdef __cplusplus
extern "C" {
#endif
#define FB_ALLOC(size) os_malloc(size)
#define FB_FREE(fb) os_free(fb)
enum FRAMEBUFF_MTYPE {
F_NONE = 0, //无类型
F_YUV, //YUV数据
F_JPG_NODE, //jpeg
F_JPG, //jpeg
F_JPG_DECODE_MSG, //jpeg
F_THUMB_JPG, //jpeg
F_H264, //h264
F_AUDIO, //音频
F_RGB, //未压缩的rgb
F_ERGB, //压缩后的rgb
F_FILE_T, //文件类型(一般用于文件保存,仅仅支持普通模式:fb->data+fb->len)
};
//设定framebuff的子类型,用uint16_t去定义吧
enum FRAMEBUFF_STYPE
{
FSTYPE_NONE = 0, //无类型
FSTYPE_NORMAL_THUMB_JPG,
FSTYPE_NORMAL_THUMB_JPG_USB,
FSTYPE_OVER_DPI_THUMB_JPG,
FSTYPE_OVER_DPI_JPG,
FSTYPE_VIDEO_VPP_DATA0,
FSTYPE_VIDEO_VPP_DATA1,
FSTYPE_VIDEO_PRC_DATA,
FSTYPE_VIDEO_SCALER_DATA,
FSTYPE_VIDEO_GEN420_DATA,
FSTYPE_VIDEO_SOFT_DATA,
FSTYPE_YUV_P0,
FSTYPE_YUV_P1,
FSTYPE_YUV_P2,
FSTYPE_YUV_SIM_P0,
FSTYPE_YUV_SIM_P1,
FSTYPE_YUV_OTHER,
FSTYPE_YUV_TAKEPHOTO,
FSTYPE_JPG_CAMERA0,
FSTYPE_JPG_CAMERA1,
FSTYPE_JPG_CAMERA2,
FSTYPE_JPG_FILE,
FSTYPE_JPG_GEN420_0,
FSTYPE_JPG_GEN420_REJPG,
FSTYPE_USB_CAM0,
FSTYPE_USB_CAM1,
FSTYPE_AUDIO_ADC,
FSTYPE_AUDIO_AAC,
FSTYPE_AUDIO_MP3,
FSTYPE_AUDIO_OPUS,
FSTYPE_AUDIO_ALAW,
FSTYPE_AUDIO_ULAW,
FSTYPE_AUDIO_AMRNB,
FSTYPE_AUDIO_AMRWB,
FSTYPE_AUDIO_PCM,
FSTYPE_AUDIO_USB_MIC,
//h264,硬件产生
FSTYPE_H264_VPP_DATA0,
FSTYPE_H264_VPP_DATA1,
FSTYPE_H264_PRC_DATA,
FSTYPE_H264_SCALER_DATA,
FSTYPE_H264_GEN420_DATA,
FSTYPE_H264_SOFT_DATA,
FSTYPE_SCALE1_DATA,//scale1自行添加类型,这里添加一个demo去实现大分辨率拍照
//h264软件(比如读取文件)
FSTYPE_H264_FILE,
FSYPTE_INVALID = 0x80, //无效的stype,用于特殊值,由应用去特殊使用
FSTYPE_GEN420_720P,
};
enum FRAMEBUFF_SOURCE{
FRAMEBUFF_SOURCE_NONE,
FRAMEBUFF_SOURCE_JPG_GEN420, //特殊,标记从gen420编码
FRAMEBUFF_SOURCE_JPG_SCALER, //特殊,标记从scaler编码
FRAMEBUFF_SOURCE_FILE,
FRAMEBUFF_SOURCE_USB,
FRAMEBUFF_SOURCE_CAMERA0,
FRAMEBUFF_SOURCE_CAMERA1,
FRAMEBUFF_SOURCE_CAMERA2,
FRAMEBUFF_SOURCE_OSD_ENC,
FRAMEBUFF_SOURCE_CSC,
};
struct msi;
/*结构体Size控制在32Byte以内，满足DMA 16 对齐的要求*/
struct framebuff {
// framebuff片段链表，用于多个framebuff组成一个完整的帧
struct framebuff *next;
uint8 *data; //数据地址: 可以是外部地址，也可以是framebuff自己分配的地址
uint32 len; //数据长度
uint32 time; //数据时间戳：存差值
void *priv; //私有数据
uint8 mtype, stype; //数据类型：main_type + sub_type
uint8 srcID; //来源ID : enum FRAMEBUFF_SOURCE
uint8 datatag; //数据标签，应用自定义
atomic8_t users; //引用计数
uint8 index; //fbpool使用
uint8 used: 1, pool: 1, clone:1, keyfrm:1, rev: 4; //flags
struct msi *msi; //产生此fb的MSI组件
};
/* framebuff 队列 */
struct fbqueue {
struct os_semaphore sema;
uint16 reader_max;
uint16 init: 1, alloc: 1, rev: 14;
uint32 *readers;
RBUFFER_DEF_R(rbQ, struct framebuff *);
};
/* framebuff 预分配池
预分配的framebuff必须处理 MSI_CMD_FREE_FB：
在MSI_CMD_FREE_FB处理后需要调用 fbpool_put API，而且返回值为 1.
*/
struct fbpool {
uint8 size, rev1;
uint16 inited: 1, rev: 15;
struct framebuff *pool;
};
//创建framebuff
//data != NULL: 表示framebuff关联外部数据，自己不分配数据空间
//data == NULL && size > 0: 表示framebuff需要自己分配数据空间
//data == NULL && size = 0: 表示framebuff不需要数据空间
extern struct framebuff *fb_alloc(uint8 *data, int32 size, uint16 type, struct msi *msi);
//MSI组件接收framebuff后，需要执行fb_get操作，fb计数加1
extern void fb_get(struct framebuff *fb);
//使用新的framebuff引用关联另1个framebuff，组成framebuff链表；fb_old引用计数会加1
extern void fb_ref(struct framebuff *fb_new, struct framebuff *fb_old);
//获取framebuff链表中指定type的数据的第1个节点
extern struct framebuff *fb_find(struct framebuff *fb, uint8 mtype, uint8 stype);
//获取framebuff链表中指定type的数据的总长度
extern uint32 fb_len(struct framebuff *fb, uint8 mtype, uint8 stype);
//framebuff put操作，引用计数减至0时会释放framebuff资源
extern void fb_put(struct framebuff *fb);
//framebuff 队列初始化，需要指定队列的buffer和大小
extern int32 fbq_init(struct fbqueue *q, uint8 *qbuff, int32 qsize);
//销毁framebuff队列，并释放队列中存放的framebuff
extern int32 fbq_destory(struct fbqueue *q);
//向framebuff队列存入1个framebuff，返回值表示存入是否成功
extern int32 fbq_enqueue(struct fbqueue *q, struct framebuff *fb);
//在framebuff队列中查找或丢弃指定的framebuff
extern int32 fbq_trace(struct fbqueue *q, struct framebuff *fb, int8 discard);
//从framebuff队列中取出1个framebuff
extern struct framebuff *fbq_dequeue(struct fbqueue *q, uint32 tmo_ms);
extern struct framebuff *fbq_dequeue_r(struct fbqueue *q, uint8 reader);
//framebuff预分配池初始化，需要指定预分配池的大小
extern int32 fbpool_init(struct fbpool *pool, uint8 size);
//从预分配池中取出一个framebuff
extern struct framebuff *fbpool_get(struct fbpool *pool, uint16 type, struct msi *msi);
//向预分配池释放一个framebuff
extern int32 fbpool_put(struct fbpool *pool, struct framebuff *fb);
//销毁framebuff预分配池，同时通知各个模块丢弃指定的framebuff
extern int32 fbpool_destroy(struct fbpool *pool);
//framebuff克隆操作，克隆的framebuff会关联原framebuff的大部分信息(但是type会重新修改)
extern struct framebuff *fb_clone(struct framebuff *fb, uint16 type, struct msi *msi);
//根据fb->mtype 识别fb携带的数据为 视频，音频，图片，字幕
extern MEDIA_DATA_CATEGORY fb_category(struct framebuff *fb);
//初始化预分配的framebuff信息，仅在初始化时调用。
// fbpool : framebuff 预分配池：struct fbpool* 类型
// index : framebuffer的索引，不能超过pool的size
// buff_addr: framebuffer 预分配的buffer地址
// buff_size: framebuffer 预分配的buffer大小
// priv_data: framebuffer 的私有数据
#define FBPOOL_SET_INFO(fbpool, index, buff_addr, buff_size, priv_data) do { \
(fbpool)->pool[index].data = buff_addr; \
(fbpool)->pool[index].len = buff_size; \
(fbpool)->pool[index].priv = priv_data; \
}while(0)
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _TXSEMI_MEDIATYPES_H_
#define _TXSEMI_MEDIATYPES_H_
#ifdef __cplusplus
extern "C" {
#endif
//媒体数据类别： 根据fb主类型 识别数据类别
typedef enum {
MEDIA_DATA_VIDEO, //视频数据
MEDIA_DATA_AUDIO, //音频数据
MEDIA_DATA_PICTURE, //图片数据
MEDIA_DATA_TEXT, //字幕数据
MEDIA_DATA_MAX,
} MEDIA_DATA_CATEGORY;
//媒体数据的编码类型：用于查找decoder
typedef enum {
//视频编码
MEDIA_CODEC_H264,
MEDIA_CODEC_H265,
//音频编码
MEDIA_CODEC_MP3 = 32,
MEDIA_CODEC_AAC,
MEDIA_CODEC_OPUS,
MEDIA_CODEC_FLAC,
MEDIA_CODEC_WAV,
//图片编码
MEDIA_CODEC_JPEG = 64,
MEDIA_CODEC_PNG,
MEDIA_CODEC_GIF,
MEDIA_CODEC_WebP,
MEDIA_CODEC_HEIF,
//字幕，起始 96
//自定义类型: 起始 128
} MEDIA_CODECID;
//媒体数据的封装类型： 用于查找container
typedef enum {
MEDIA_DTYPE_PIC_JPG,
MEDIA_DTYPE_PIC_PNG,
MEDIA_DTYPE_PIC_BMP,
MEDIA_DTYPE_PIC_GIF,
MEDIA_DTYPE_PIC_WEBP,
MEDIA_DTYPE_PIC_TIFF,
MEDIA_DTYPE_PIC_HEIF,
MEDIA_DTYPE_PIC_SVG,
MEDIA_DTYPE_AUDIO_MP3,
MEDIA_DTYPE_AUDIO_AAC,
MEDIA_DTYPE_AUDIO_WAV,
MEDIA_DTYPE_AUDIO_FLAC,
MEDIA_DTYPE_AUDIO_OGG,
MEDIA_DTYPE_AUDIO_WMA,
MEDIA_DTYPE_AUDIO_APE,
MEDIA_DTYPE_AUDIO_M4A,
MEDIA_DTYPE_VIDEO_MP4,
MEDIA_DTYPE_VIDEO_MKV,
MEDIA_DTYPE_VIDEO_AVI,
MEDIA_DTYPE_VIDEO_TS,
MEDIA_DTYPE_VIDEO_FLV,
MEDIA_DTYPE_VIDEO_MOV,
MEDIA_DTYPE_VIDEO_WEBM,
MEDIA_DTYPE_VIDEO_WMV,
MEDIA_DTYPE_VIDEO_M2TS,
//自定义：裸视频编码帧类型
MEDIA_DTYPE_RAW_H264,
MEDIA_DTYPE_RAW_H265,
MEDIA_DTYPE_RAW_AV1,
MEDIA_DTYPE_RAW_VP9,
MEDIA_DTYPE_RAW_VP8,
MEDIA_DTYPE_RAW_MPEG2,
MEDIA_DTYPE_RAW_MPEG4,
MEDIA_DTYPE_MAX,
} MEDIA_DATA_TYPE;
typedef enum {
MEDIA_PLAY_FORWARD_SPEED_1X = 1, //向前播放，1倍速
MEDIA_PLAY_FORWARD_SPEED_2X = 2, //向前播放，2倍速
MEDIA_PLAY_FORWARD_SPEED_4X = 4, //向前播放，4倍速
MEDIA_PLAY_BACKWARD_SPEED_1X = -1, //向后播放，1倍速
MEDIA_PLAY_BACKWARD_SPEED_2X = -2, //向后播放，2倍速
MEDIA_PLAY_BACKWARD_SPEED_4X = -4, //向后播放，4倍速
} MEDIA_PLAY_SPEED;
#ifdef __cplusplus
}
#endif
#endif

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#include "framebuff.h"
#ifndef _TXSEMI_MSI_H_
#define _TXSEMI_MSI_H_
#ifdef __cplusplus
extern "C" {
#endif
//最多支持4个输出接口
#ifndef MSI_OUTIF_MAX
#define MSI_OUTIF_MAX 4
#endif
//媒体流组件的命令列表
enum MSI_CMDs {
MSI_CMD_PRE_DESTROY, //通知组件MSI接口即将开始销毁
MSI_CMD_POST_DESTROY, //通知组件MSI接口即将完成销毁，组件需要释放自己的资源
MSI_CMD_FREE_FB, //通知组件即将释放framebuff，组件可以对framebuff进行特殊处理
MSI_CMD_SET_DATATAG,
MSI_CMD_GET_RUNNING,
MSI_CMD_SET_SPEED, //设置播放倍速
MSI_CMD_TRANS_FB,
MSI_CMD_TRANS_FB_END,
MSI_CMD_OSD_ENCODE,
MSI_CMD_SCALE1,
MSI_CMD_SCALE2,
MSI_CMD_SCALE3,
MSI_CMD_TAKEPHOTO_SCALE3,
MSI_CMD_SCALE3_NORMAL,
MSI_CMD_JPEG,
MSI_CMD_DECODE_JPEG_MSG,
MSI_CMD_JPEG_CONCAT,
MSI_CMD_HARDWARE_JPEG,
MSI_CMD_AUTO_JPG,
MSI_CMD_AUTO_H264,
MSI_CMD_JPG_RECODE,
MSI_CMD_JPG_THUMB,
MSI_CMD_LCD_VIDEO,
MSI_CMD_DECODE,
MSI_CMD_PLAYER,
MSI_CMD_VIDEO_DEMUX_CTRL,
MSI_CMD_MEDIA_PLAYER,
MSI_CMD_MEDIA_CTRL,
MSI_CMD_AUDAC,
MSI_CMD_AUTPC,
MSI_CMD_AUCODER,
MSI_CMD_CSC,
MSI_CMD_LCD_OSD,
};
enum MSI_AUDIO_CTRL_CMD
{
// audac使用
MSI_AUDAC_SET_FILTER_TRACK,
MSI_AUDAC_GET_FILTER_TRACK,
MSI_AUDAC_SET_CALL_VOLUME,
MSI_AUDAC_GET_CALL_VOLUME,
MSI_AUDAC_SET_MEDIA_VOLUME,
MSI_AUDAC_GET_MEDIA_VOLUME,
MSI_AUDAC_SET_BELL_VOLUME,
MSI_AUDAC_GET_BELL_VOLUME,
MSI_AUDAC_CLEAR_STREAM,
MSI_AUDAC_END_STREAM,
MSI_AUDAC_DELETE_MODE,
MSI_AUDAC_GET_EMPTY,
MSI_AUDAC_HOLD_EMPTY,
MSI_AUDAC_TEST_MODE,
// 音频变速变调组件使用
MSI_AUTPC_SET_SPEED,
MSI_AUTPC_GET_SPEED,
MSI_AUTPC_SET_PITCH,
MSI_AUTPC_GET_PITCH,
MSI_AUTPC_END_STREAM,
MSI_AUCODER_PAUSE,
MSI_AUCODER_CONTINUE,
MSI_AUCODER_GET_STATUS,
MSI_AUCODER_SET_SPEED,
MSI_AUCODER_GET_SPEED,
MSI_AUCODER_SET_PITCH,
MSI_AUCODER_GET_PITCH,
MSI_AUCODER_SET_BITRATE,
MSI_AUCODER_CLEAR_STREAM,
MSI_AUCODER_SET_SRCMSI,
MSI_AUCODER_SET_CODER,
MSI_AUCODER_CODER_NUM,
MSI_AUCODER_DIRECT_TO_DAC,
MSI_AUCODER_DEINIT,
};
struct msi;
typedef int (*msi_action)(struct msi *msi, uint32 cmd_id, uint32 param1, uint32 param2);
//媒体流组件接口
//media stream interface
struct msi {
struct msi *next; //单链表
const char *name; //组件ID：唯一
msi_action action; //组件接口的执行函数
struct msi *output_list[MSI_OUTIF_MAX]; //输出组件列表
void *priv; //私有数据，用于关联组件的另一半数据
uint8 enable: 1, deleted: 1, rev: 6; //状态标识
atomic_t users; //组件引用计数
atomic_t bound; //组件绑定计数
atomic_t inited; //组件init计数，msi_new 和 msi_destroy 需要匹配调用
struct fbqueue fbQ; //组件接收framebuff的队列
};
////////////////////////////////////////////////////////////////////////
//以下API 适合应用代码直接使用
//媒流体组件库初始化
extern int32 msi_core_init(void);
//设置该组件的输出组件：为 参数msi 或 参数lname 指定的组件设置输出 组件oname。
extern int32 msi_add_output(struct msi *msi, const char *lname, const char *oname);
//删除该组件的输出组件：删除 参数msi 或 参数lname 指定组件 的输出 组件oname。
extern int32 msi_del_output(struct msi *msi, const char *lname, const char *oname);
//指定从某个组件开始执行cmd
extern void msi_cmd(const char *name, uint32 cmd, uint32 param1, uint32 param2);
///////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////
// 以下 API 只在MSI组件内部代码中使用，不适合应用代码使用。
//创建媒流体组件，创建时自动加入组件列表。和 msi_destroy 成对使用
extern struct msi *msi_new(const char *name, uint32 qsize, uint8 *isnew);
//销毁媒流体组件，销毁时自动从组件列表中删除
extern void msi_destroy(struct msi *msi);
extern void msi_put(struct msi *msi);
extern void msi_get(struct msi *msi);
//根据name查找该组件，计数为加1。需要和 msi_put 成对使用
// inited: 用于表示只查找已经被初始化的模块
extern struct msi *msi_find(const char *name, uint8 inited);
//组件输出cmd: 遍历自己的输出组件列表
extern int32 msi_output_cmd(struct msi *msi, uint32 cmd, uint32 param1, uint32 param2);
//组件输出framebuff: 遍历自己的输出组件列表
//注意：fb参数只能是 framebuff链表的第1个节点，不能是中间节点
extern int32 msi_output_fb(struct msi *msi, struct framebuff *fb);
//组件判断不输出framebuff时，需要删除framebuff
//注意：fb参数只能是 framebuff链表的第1个节点，不能是中间节点
extern int32 msi_delete_fb(struct msi *msi, struct framebuff *fb);
//MSI组件从队列中读取framebuff
extern struct framebuff *msi_get_fb(struct msi *msi, uint32 tmo_ms);
//MSI组件从队列中读取framebuff: 队列支持多个reader，需要指定reader ID
extern struct framebuff *msi_get_fb_r(struct msi *msi, uint32 reader);
//通知通路中的各个模块，丢弃指定的framebuff
extern int32 msi_discard_fb(struct msi *msi, struct framebuff *fb);
//追踪framebuff：查看指定的framebuff当前在被哪些模块处理
extern int32 msi_trace_fb(struct msi *msi, struct framebuff *fb);
//组件notify：可以 向上/向下 执行cmd
extern void msi_notify(struct msi *msi, uint32 cmd, uint32 param1, uint32 param2);
//组件执行自己的action（不会向下输出cmd）
extern int32 msi_do_cmd(struct msi *msi, uint32 cmd, uint32 param1, uint32 param2);
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _HUGEIC_DHCPD_H_
#define _HUGEIC_DHCPD_H_
#ifdef __cplusplus
extern "C" {
#endif
struct dhcpd_param {
uint32 lease_time; /*unit: seconds*/
uint32 start_ip, end_ip; /*network byteorder*/
uint32 netmask; /*network byteorder*/
uint32 router; /*network byteorder*/
uint32 dns1; /*network byteorder*/
uint32 dns2; /*network byteorder*/
};
struct dhcpd_leaseinfo {
uint32 ip;
uint8 mac[6];
};
int32 dhcpd_get_lease_list(struct dhcpd_leaseinfo *leaseslist, int32 list_size);
uint32 dhcpd_get_lease_ip(uint8 *mac);
void dhcpd_ip_inactive(uint8 *mac);
int32 dhcpd_start(char *ifname, struct dhcpd_param *param);
void dhcpd_stop(void);
void dhcpd_flush(void);
void dhcpd_set_dns(uint32 dns1, uint32 dns2);
void dhcpd_dump_ippool(void);
#ifdef __cplusplus
}
#endif
#endif

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sdk/include/lib/net/eloop/eloop.h Normal file
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/**@file eloop.h
* @author 何凱帆
* @brief 基於socket的event loop服務
* @details 提供基於socket的event loop服務
*/
#ifndef _ELOOP_H_
#define _ELOOP_H_
#include "list.h"
#include "lwip/api.h"
#include "lwip/sockets.h"
#define EVT_HDL void *
#ifndef SOCK_HDL
#define SOCK_HDL int
#endif
#define EVENT_READ 0
#define EVENT_WRITE 1
#define EVENT_F_DISABLED 0
#define EVENT_F_NOACTION 0
#define EVENT_F_ENABLED 1
#define EVENT_F_REMOVE 2
#define EVENT_F_ONESHOT 4
#define EVENT_F_RUNNING 8
#define ELOOP_WAKEUP_BY_LOOPBACK 1
#define EVENT_TIME 1
#define EVENT_FD 2
#define EVENT_ALWAYS 3
#define EVENT_SOFT_QUEUE 4
struct eloop_timeval {
long tv_sec; /* seconds */
long tv_usec; /* and microseconds */
};
typedef struct timeval time_ref;
typedef unsigned int eloop_time_ref;
typedef void (*event_callback)(EVT_HDL e, void* d);
struct time_event {
eloop_time_ref fire;
int ival;
};
struct fd_event {
SOCK_HDL fd;
int write; // 0 = read, 1 = write
};
struct eloop_state {
struct list_head times;
struct list_head fds;
struct list_head always;
struct list_head wait;
int end_loop;
};
struct event {
struct list_head list;
event_callback func;
void* data;
int type;
int flags;
union {
struct time_event time;
struct fd_event fd;
} ev;
};
//#include "linux_ktime.h"
void eloop_resched_event(EVT_HDL ev, eloop_time_ref* tr);
void eloop_remove_event(EVT_HDL ev);
void eloop_set_event_interval(EVT_HDL ev, int msec);
void eloop_set_event_enabled(EVT_HDL ev, int enabled);
int eloop_get_event_enabled(EVT_HDL ev);
EVT_HDL eloop_add_timer(int msec, unsigned int flags, event_callback f, void* d);
EVT_HDL eloop_add_alarm(eloop_time_ref t, unsigned int flags, event_callback f, void* d);
EVT_HDL eloop_add_fd(SOCK_HDL fd, int write, unsigned int flags, event_callback f, void* d);
EVT_HDL eloop_add_always(unsigned int flags, event_callback f, void* d);
void set_event_time(void *d,int msec);
void eloop_exit(void);
void eloop_init(void);
void user_eloop_run();
static void eloop_wakeup(void);
void time_now(eloop_time_ref* tr);
unsigned int get_time_now();
//int gettimeofday(struct timeval *tv,void *ignore);
#endif /* _ELOOP_H_ */

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sdk/include/lib/net/ethphy/eth_mdio_bus.h Normal file
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#ifndef __ETH_MDIO_BUS_H_
#define __ETH_MDIO_BUS_H_
struct netdev;
/*
* The Bus class for PHYs. Devices which provide access to
* PHYs should register using this structure
*/
struct ethernet_mdio_bus {
struct dev_obj dev;
void *priv;
int (*read)(void *priv, uint16 phy_addr, uint16 regnum);
int (*write)(void *priv, uint16 phy_addr, uint16 regnum, uint16 val);
/*
* A lock to ensure that only one thing can read/write
* the MDIO bus at a time
*/
// struct mutex mdio_lock;
};
int32 eth_mdio_bus_attach(uint32 dev_id, struct ethernet_mdio_bus *p_mii_bus);
int32 eth_mdio_bus_open(struct ethernet_mdio_bus *p_mii_bus, struct netdev *p_netdev);
int32 eth_mdio_bus_close(struct ethernet_mdio_bus *p_mii_bus);
int32 eth_mdio_bus_write(struct ethernet_mdio_bus *p_mii_bus, uint16 phy_addr, uint16 reg_addr, uint16 data);
int32 eth_mdio_bus_read(struct ethernet_mdio_bus *p_mii_bus, uint16 phy_addr, uint16 reg_addr);
#endif

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sdk/include/lib/net/ethphy/eth_phy.h Normal file
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/**
******************************************************************************
* @file sdk/include/lib/ethernet_phy/eth_phy.h
* @author HUGE-IC Application Team
* @version V1.0.0
* @date 10-10-2018
* @brief Framework and drivers for configuring and reading different PHYs
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2018 HUGE-IC</center></h2>
*
*
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __ETH_PHY_H__
#define __ETH_PHY_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "ethtool.h"
#include "mii.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @weakgroup NETWORK_PHY
* @{
*/
/** @defgroup NETWORK_PHY_Exported_Constants Exported Constants
* @{
*/
#define PHY_ADAPTIVE_ADDR -1
#define PHY_INIT_TIMEOUT 100000
#define PHY_STATE_TIME 1
#define PHY_FORCE_TIMEOUT 10
#define PHY_AN_TIMEOUT 10
#define PHY_MAX_ADDR 32
#define PHY_BASIC_FEATURES (SUPPORTED_10baseT_Half | \
SUPPORTED_10baseT_Full | \
SUPPORTED_100baseT_Half | \
SUPPORTED_100baseT_Full | \
SUPPORTED_Autoneg | \
SUPPORTED_TP | \
SUPPORTED_MII)
#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
SUPPORTED_1000baseT_Half | \
SUPPORTED_1000baseT_Full)
/**
* @}
*/
/** @defgroup NETWORK_PHY_Exported_Typedefs Exported Typedefs
* @{
*/
struct netdev;
struct ethernet_phy_device;
/* PHY state machine states:
*
* DOWN: PHY device and driver are not ready for anything. probe
* should be called if and only if the PHY is in this state,
* given that the PHY device exists.
* - PHY driver probe function will, depending on the PHY, set
* the state to STARTING or READY
*
* STARTING: PHY device is coming up, and the ethernet driver is
* not ready. PHY drivers may set this in the probe function.
* If they do, they are responsible for making sure the state is
* eventually set to indicate whether the PHY is UP or READY,
* depending on the state when the PHY is done starting up.
* - PHY driver will set the state to READY
* - start will set the state to PENDING
*
* READY: PHY is ready to send and receive packets, but the
* controller is not. By default, PHYs which do not implement
* probe will be set to this state by phy_probe(). If the PHY
* driver knows the PHY is ready, and the PHY state is STARTING,
* then it sets this STATE.
* - start will set the state to UP
*
* PENDING: PHY device is coming up, but the ethernet driver is
* ready. phy_start will set this state if the PHY state is
* STARTING.
* - PHY driver will set the state to UP when the PHY is ready
*
* UP: The PHY and attached device are ready to do work.
* Interrupts should be started here.
* - timer moves to AN
*
* AN: The PHY is currently negotiating the link state. Link is
* therefore down for now. phy_timer will set this state when it
* detects the state is UP. config_aneg will set this state
* whenever called with phydev->autoneg set to AUTONEG_ENABLE.
* - If autonegotiation finishes, but there's no link, it sets
* the state to NOLINK.
* - If aneg finishes with link, it sets the state to RUNNING,
* and calls adjust_link
* - If autonegotiation did not finish after an arbitrary amount
* of time, autonegotiation should be tried again if the PHY
* supports "magic" autonegotiation (back to AN)
* - If it didn't finish, and no magic_aneg, move to FORCING.
*
* NOLINK: PHY is up, but not currently plugged in.
* - If the timer notes that the link comes back, we move to RUNNING
* - config_aneg moves to AN
* - phy_stop moves to HALTED
*
* FORCING: PHY is being configured with forced settings
* - if link is up, move to RUNNING
* - If link is down, we drop to the next highest setting, and
* retry (FORCING) after a timeout
* - phy_stop moves to HALTED
*
* RUNNING: PHY is currently up, running, and possibly sending
* and/or receiving packets
* - timer will set CHANGELINK if we're polling (this ensures the
* link state is polled every other cycle of this state machine,
* which makes it every other second)
* - irq will set CHANGELINK
* - config_aneg will set AN
* - phy_stop moves to HALTED
*
* CHANGELINK: PHY experienced a change in link state
* - timer moves to RUNNING if link
* - timer moves to NOLINK if the link is down
* - phy_stop moves to HALTED
*
* HALTED: PHY is up, but no polling or interrupts are done. Or
* PHY is in an error state.
*
* - phy_start moves to RESUMING
*
* RESUMING: PHY was halted, but now wants to run again.
* - If we are forcing, or aneg is done, timer moves to RUNNING
* - If aneg is not done, timer moves to AN
* - phy_stop moves to HALTED
*/
enum ethernet_phy_state {
ETH_PHY_DOWN = 0,
ETH_PHY_STARTING,
ETH_PHY_READY,
ETH_PHY_PENDING,
ETH_PHY_UP,
ETH_PHY_AN,
ETH_PHY_RUNNING,
ETH_PHY_NOLINK,
ETH_PHY_FORCING,
ETH_PHY_CHANGELINK,
ETH_PHY_HALTED,
ETH_PHY_RESUMING
};
/* struct phy_driver: Driver structure for a particular PHY type
*
* phy_id: The result of reading the UID registers of this PHY
* type, and ANDing them with the phy_id_mask. This driver
* only works for PHYs with IDs which match this field
* name: The friendly name of this PHY type
* phy_id_mask: Defines the important bits of the phy_id
* features: A list of features (speed, duplex, etc) supported
* by this PHY
* flags: A bitfield defining certain other features this PHY
* supports (like interrupts)
*
* The drivers must implement config_aneg and read_status. All
* other functions are optional. Note that none of these
* functions should be called from interrupt time. The goal is
* for the bus read/write functions to be able to block when the
* bus transaction is happening, and be freed up by an interrupt
* (The MPC85xx has this ability, though it is not currently
* supported in the driver).
*/
struct ethernet_phy_driver {
uint32 features;
/*
* Called to initialize the PHY,
* including after a reset
*/
int (*config_init)(struct ethernet_phy_device *phydev);
/*
* Called during discovery. Used to set
* up device-specific structures, if any
*/
// int (*probe)(struct ethernet_phy_device *phydev);
/* PHY Power Management */
// int (*suspend)(struct ethernet_phy_device *phydev);
// int (*resume)(struct ethernet_phy_device *phydev);
/*
* Configures the advertisement and resets
* autonegotiation if phydev->autoneg is on,
* forces the speed to the current settings in phydev
* if phydev->autoneg is off
*/
int (*config_aneg)(struct ethernet_phy_device *phydev);
/* Determines the negotiated speed and duplex */
int (*read_status)(struct ethernet_phy_device *phydev);
/* Clears any pending interrupts */
// int (*ack_interrupt)(struct ethernet_phy_device *phydev);
/* Enables or disables interrupts */
// int (*config_intr)(struct ethernet_phy_device *phydev);
/*
* Checks if the PHY generated an interrupt.
* For multi-PHY devices with shared PHY interrupt pin
*/
// int (*did_interrupt)(struct ethernet_phy_device *phydev);
/* Clears up any memory if needed */
// void (*remove)(struct ethernet_phy_device *phydev);
/* Returns true if this is a suitable driver for the given
* phydev. If NULL, matching is based on phy_id and
* phy_id_mask.
*/
// int (*match_phy_device)(struct ethernet_phy_device *phydev);
/* Handles ethtool queries for hardware time stamping. */
// int (*ts_info)(struct ethernet_phy_device *phydev, struct ethtool_ts_info *ti);
/* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
// int (*hwtstamp)(struct ethernet_phy_device *phydev, struct ifreq *ifr);
/*
* Requests a Rx timestamp for 'skb'. If the skb is accepted,
* the phy driver promises to deliver it using netif_rx() as
* soon as a timestamp becomes available. One of the
* PTP_CLASS_ values is passed in 'type'. The function must
* return true if the skb is accepted for delivery.
*/
// bool (*rxtstamp)(struct ethernet_phy_device *dev, struct sk_buff *skb, int type);
/*
* Requests a Tx timestamp for 'skb'. The phy driver promises
* to deliver it using skb_complete_tx_timestamp() as soon as a
* timestamp becomes available. One of the PTP_CLASS_ values
* is passed in 'type'.
*/
// void (*txtstamp)(struct ethernet_phy_device *dev, struct sk_buff *skb, int type);
/* Some devices (e.g. qnap TS-119P II) require PHY register changes to
* enable Wake on LAN, so set_wol is provided to be called in the
* ethernet driver's set_wol function. */
// int (*set_wol)(struct ethernet_phy_device *dev, struct ethtool_wolinfo *wol);
/* See set_wol, but for checking whether Wake on LAN is enabled. */
// void (*get_wol)(struct ethernet_phy_device *dev, struct ethtool_wolinfo *wol);
};
/* phy_device: An instance of a PHY
*
* p_emac_dev: Pointer to the bus this PHY is on
* phy_id: UID for this device found during discovery
* state: state of the PHY for management purposes
* addr: Bus address of PHY
* link_timeout: The number of timer firings to wait before the
* giving up on the current attempt at acquiring a link
* adjust_link: Callback for the enet controller to respond to
* changes in the link state.
* adjust_state: Callback for the enet driver to respond to
* changes in the state machine.
*
* speed, duplex, pause, supported, advertising, and
* autoneg are used like in mii_if_info
*
* interrupts currently only supports enabled or disabled,
* but could be changed in the future to support enabling
* and disabling specific interrupts
*
* Contains some infrastructure for polling and interrupt
* handling, as well as handling shifts in PHY hardware state
*/
struct ethernet_phy_device {
struct dev_obj dev;
/* Bus address of the PHY (0-31) */
int16 addr;
/* phy driver pointer */
struct ethernet_phy_driver *drv;
struct ethernet_mdio_bus *bus;
struct netdev *ndev;
uint32 phy_id;
enum ethernet_phy_state state;
/*
* forced speed & duplex (no autoneg)
* partner speed & duplex & pause (autoneg)
*/
int16 speed;
int16 duplex;
int16 pause;
int16 asym_pause;
/* The most recently read link state */
int16 link;
/* Union of PHY and Attached devices' supported modes */
/* See mii.h for more info */
uint32 supported;
uint32 advertising;
uint32 autoneg;
uint32 link_timeout;
/* last state */
int16 last_speed;
int16 last_duplex;
int16 last_link;
//os_task_t task;
};
/**
* @}
*/
/** @defgroup NETWORK_PHY_Exported_Functions Exported Functions
* @{
*/
extern struct ethernet_phy_driver genphy_driver;
uint16 phy_read(struct ethernet_phy_device *phydev, uint16 reg);
void phy_write(struct ethernet_phy_device *phydev, uint16 reg, uint16 val);
void eth_phy_device_create(struct ethernet_phy_device *dev);
uint8 eth_get_phy_device(struct ethernet_phy_device *dev);
int32 eth_phy_connect_direct(struct ethernet_phy_device *phydev);
uint8 eth_phy_start_aneg(struct ethernet_phy_device *phydev);
int genphy_config_init(struct ethernet_phy_device *phydev);
int genphy_restart_aneg(struct ethernet_phy_device *phydev);
int genphy_config_aneg(struct ethernet_phy_device *phydev);
int genphy_update_link(struct ethernet_phy_device *phydev);
int genphy_read_status(struct ethernet_phy_device *phydev);
void eth_phy_state_machine(struct ethernet_phy_device *phydev);
void eth_phy_start_machine(struct ethernet_phy_device *phydev);
int32 eth_phy_open(struct ethernet_phy_device *phydev, struct ethernet_mdio_bus *mdio_bus, struct netdev *ndev);
void eth_phy_close(struct ethernet_phy_device *phydev);
void eth_phy_attach(uint32 dev_id, struct ethernet_phy_device *phydev);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif //__ETH_PHY_H__
/*************************** (C) COPYRIGHT 2018 HUGE-IC ***** END OF FILE *****/

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/**
******************************************************************************
* @file sdk/include/lib/ethernet_phy/ethtool.h
* @author HUGE-IC Application Team
* @version V1.0.0
* @date 10-10-2018
* @brief Defines for Linux ethtool
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2018 HUGE-IC</center></h2>
*
*
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __ETHTOOL_H__
#define __ETHTOOL_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @weakgroup NETWORK
* @{
*/
/** @defgroup NETWORK_ETHTOOL Ethtool
* @brief Defines for Linux ethtool
* @{
*/
/** @defgroup NETWORK_ETHTOOL_Exported_Constants Exported Constants
* @{
*/
/* Indicates what features are supported by the interface. */
#define SUPPORTED_10baseT_Half (1 << 0)
#define SUPPORTED_10baseT_Full (1 << 1)
#define SUPPORTED_100baseT_Half (1 << 2)
#define SUPPORTED_100baseT_Full (1 << 3)
#define SUPPORTED_1000baseT_Half (1 << 4)
#define SUPPORTED_1000baseT_Full (1 << 5)
#define SUPPORTED_Autoneg (1 << 6)
#define SUPPORTED_TP (1 << 7)
#define SUPPORTED_AUI (1 << 8)
#define SUPPORTED_MII (1 << 9)
#define SUPPORTED_FIBRE (1 << 10)
#define SUPPORTED_BNC (1 << 11)
#define SUPPORTED_10000baseT_Full (1 << 12)
#define SUPPORTED_Pause (1 << 13)
#define SUPPORTED_Asym_Pause (1 << 14)
#define SUPPORTED_2500baseX_Full (1 << 15)
#define SUPPORTED_Backplane (1 << 16)
#define SUPPORTED_1000baseKX_Full (1 << 17)
#define SUPPORTED_10000baseKX4_Full (1 << 18)
#define SUPPORTED_10000baseKR_Full (1 << 19)
#define SUPPORTED_10000baseR_FEC (1 << 20)
#define SUPPORTED_20000baseMLD2_Full (1 << 21)
#define SUPPORTED_20000baseKR2_Full (1 << 22)
#define SUPPORTED_40000baseKR4_Full (1 << 23)
#define SUPPORTED_40000baseCR4_Full (1 << 24)
#define SUPPORTED_40000baseSR4_Full (1 << 25)
#define SUPPORTED_40000baseLR4_Full (1 << 26)
/* Indicates what features are advertised by the interface. */
#define ADVERTISED_10baseT_Half (1 << 0)
#define ADVERTISED_10baseT_Full (1 << 1)
#define ADVERTISED_100baseT_Half (1 << 2)
#define ADVERTISED_100baseT_Full (1 << 3)
#define ADVERTISED_1000baseT_Half (1 << 4)
#define ADVERTISED_1000baseT_Full (1 << 5)
#define ADVERTISED_Autoneg (1 << 6)
#define ADVERTISED_TP (1 << 7)
#define ADVERTISED_AUI (1 << 8)
#define ADVERTISED_MII (1 << 9)
#define ADVERTISED_FIBRE (1 << 10)
#define ADVERTISED_BNC (1 << 11)
#define ADVERTISED_10000baseT_Full (1 << 12)
#define ADVERTISED_Pause (1 << 13)
#define ADVERTISED_Asym_Pause (1 << 14)
#define ADVERTISED_2500baseX_Full (1 << 15)
#define ADVERTISED_Backplane (1 << 16)
#define ADVERTISED_1000baseKX_Full (1 << 17)
#define ADVERTISED_10000baseKX4_Full (1 << 18)
#define ADVERTISED_10000baseKR_Full (1 << 19)
#define ADVERTISED_10000baseR_FEC (1 << 20)
#define ADVERTISED_20000baseMLD2_Full (1 << 21)
#define ADVERTISED_20000baseKR2_Full (1 << 22)
#define ADVERTISED_40000baseKR4_Full (1 << 23)
#define ADVERTISED_40000baseCR4_Full (1 << 24)
#define ADVERTISED_40000baseSR4_Full (1 << 25)
#define ADVERTISED_40000baseLR4_Full (1 << 26)
/* The following are all involved in forcing a particular link mode for the
* device for setting things. When getting the devices settings, these
* indicate the current mode and whether it was forced up into this mode or
* autonegotiated.
*/
/* The forced speed, 10Mb, 100Mb, gigabit, 2.5Gb, 10GbE. */
#define SPEED_10 10
#define SPEED_100 100
#define SPEED_1000 1000
#define SPEED_2500 2500
#define SPEED_10000 10000
#define SPEED_UNKNOWN -1
/* Duplex, half or full. */
#define DUPLEX_HALF 0x00
#define DUPLEX_FULL 0x01
#define DUPLEX_UNKNOWN 0xff
/* Which connector port. */
#define PORT_TP 0x00
#define PORT_AUI 0x01
#define PORT_MII 0x02
#define PORT_FIBRE 0x03
#define PORT_BNC 0x04
#define PORT_DA 0x05
#define PORT_NONE 0xEF
#define PORT_OTHER 0xFF
/* Which transceiver to use. */
#define XCVR_INTERNAL 0x00
#define XCVR_EXTERNAL 0x01
#define XCVR_DUMMY1 0x02
#define XCVR_DUMMY2 0x03
#define XCVR_DUMMY3 0x04
/* Enable or disable autonegotiation. If this is set to enable, the forced
* link modes above are completely ignored.
*/
#define AUTONEG_DISABLE 0x00
#define AUTONEG_ENABLE 0x01
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif //__ETHTOOL_H__
/*************************** (C) COPYRIGHT 2018 HUGE-IC ***** END OF FILE *****/

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/**
******************************************************************************
* @file sdk/include/lib/ethernet_phy/mii.h
* @author HUGE-IC Application Team
* @version V1.0.0
* @date 10-10-2018
* @brief definitions for MII-compatible transceivers
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2018 HUGE-IC</center></h2>
*
*
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MII_H__
#define __MII_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @weakgroup NETWORK
* @{
*/
/** @defgroup NETWORK_MII MII Register
* @brief definitions for MII-compatible transceivers
* @{
*/
/** @defgroup MII_Exported_Constants Exported Constants
* @{
*/
/* Generic MII registers. */
#define MII_BMCR 0x00 /*!< Basic mode control register */
#define MII_BMSR 0x01 /*!< Basic mode status register */
#define MII_PHYSID1 0x02 /*!< PHYS ID 1 */
#define MII_PHYSID2 0x03 /*!< PHYS ID 2 */
#define MII_ADVERTISE 0x04 /*!< Advertisement control reg */
#define MII_LPA 0x05 /*!< Link partner ability reg */
#define MII_EXPANSION 0x06 /*!< Expansion register */
#define MII_CTRL1000 0x09 /*!< 1000BASE-T control */
#define MII_STAT1000 0x0a /*!< 1000BASE-T status */
#define MII_MMD_CTRL 0x0d /*!< MMD Access Control Register */
#define MII_MMD_DATA 0x0e /*!< MMD Access Data Register */
#define MII_ESTATUS 0x0f /*!< Extended Status */
#define MII_DCOUNTER 0x12 /*!< Disconnect counter */
#define MII_FCSCOUNTER 0x13 /*!< False carrier counter */
#define MII_NWAYTEST 0x14 /*!< N-way auto-neg test reg */
#define MII_RERRCOUNTER 0x15 /*!< Receive error counter */
#define MII_SREVISION 0x16 /*!< Silicon revision */
#define MII_RESV1 0x17 /*!< Reserved... */
#define MII_LBRERROR 0x18 /*!< Lpback, rx, bypass error */
#define MII_PHYADDR 0x19 /*!< PHY address */
#define MII_RESV2 0x1a /*!< Reserved... */
#define MII_TPISTATUS 0x1b /*!< TPI status for 10mbps */
#define MII_NCONFIG 0x1c /*!< Network interface config */
/* Basic mode control register. */
#define BMCR_RESV 0x003f /*!< Unused... */
#define BMCR_SPEED1000 0x0040 /*!< MSB of Speed (1000) */
#define BMCR_CTST 0x0080 /*!< Collision test */
#define BMCR_FULLDPLX 0x0100 /*!< Full duplex */
#define BMCR_ANRESTART 0x0200 /*!< Auto negotiation restart */
#define BMCR_ISOLATE 0x0400 /*!< Isolate data paths from MII */
#define BMCR_PDOWN 0x0800 /*!< Enable low power state */
#define BMCR_ANENABLE 0x1000 /*!< Enable auto negotiation */
#define BMCR_SPEED100 0x2000 /*!< Select 100Mbps */
#define BMCR_LOOPBACK 0x4000 /*!< TXD loopback bits */
#define BMCR_RESET 0x8000 /*!< Reset to default state */
/* Basic mode status register. */
#define BMSR_ERCAP 0x0001 /*!< Ext-reg capability */
#define BMSR_JCD 0x0002 /*!< Jabber detected */
#define BMSR_LSTATUS 0x0004 /*!< Link status */
#define BMSR_ANEGCAPABLE 0x0008 /*!< Able to do auto-negotiation */
#define BMSR_RFAULT 0x0010 /*!< Remote fault detected */
#define BMSR_ANEGCOMPLETE 0x0020 /*!< Auto-negotiation complete */
#define BMSR_RESV 0x00c0 /*!< Unused... */
#define BMSR_ESTATEN 0x0100 /*!< Extended Status in R15 */
#define BMSR_100HALF2 0x0200 /*!< Can do 100BASE-T2 HDX */
#define BMSR_100FULL2 0x0400 /*!< Can do 100BASE-T2 FDX */
#define BMSR_10HALF 0x0800 /*!< Can do 10mbps, half-duplex */
#define BMSR_10FULL 0x1000 /*!< Can do 10mbps, full-duplex */
#define BMSR_100HALF 0x2000 /*!< Can do 100mbps, half-duplex */
#define BMSR_100FULL 0x4000 /*!< Can do 100mbps, full-duplex */
#define BMSR_100BASE4 0x8000 /*!< Can do 100mbps, 4k packets */
/* Advertisement control register. */
#define ADVERTISE_SLCT 0x001f /*!< Selector bits */
#define ADVERTISE_CSMA 0x0001 /*!< Only selector supported */
#define ADVERTISE_10HALF 0x0020 /*!< Try for 10mbps half-duplex */
#define ADVERTISE_1000XFULL 0x0020 /*!< Try for 1000BASE-X full-duplex */
#define ADVERTISE_10FULL 0x0040 /*!< Try for 10mbps full-duplex */
#define ADVERTISE_1000XHALF 0x0040 /*!< Try for 1000BASE-X half-duplex */
#define ADVERTISE_100HALF 0x0080 /*!< Try for 100mbps half-duplex */
#define ADVERTISE_1000XPAUSE 0x0080 /*!< Try for 1000BASE-X pause */
#define ADVERTISE_100FULL 0x0100 /*!< Try for 100mbps full-duplex */
#define ADVERTISE_1000XPSE_ASYM 0x0100 /*!< Try for 1000BASE-X asym pause */
#define ADVERTISE_100BASE4 0x0200 /*!< Try for 100mbps 4k packets */
#define ADVERTISE_PAUSE_CAP 0x0400 /*!< Try for pause */
#define ADVERTISE_PAUSE_ASYM 0x0800 /*!< Try for asymetric pause */
#define ADVERTISE_RESV 0x1000 /*!< Unused... */
#define ADVERTISE_RFAULT 0x2000 /*!< Say we can detect faults */
#define ADVERTISE_LPACK 0x4000 /*!< Ack link partners response */
#define ADVERTISE_NPAGE 0x8000 /*!< Next page bit */
#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
ADVERTISE_CSMA)
#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
ADVERTISE_100HALF | ADVERTISE_100FULL)
/* Link partner ability register. */
#define LPA_SLCT 0x001f /*!< Same as advertise selector */
#define LPA_10HALF 0x0020 /*!< Can do 10mbps half-duplex */
#define LPA_1000XFULL 0x0020 /*!< Can do 1000BASE-X full-duplex */
#define LPA_10FULL 0x0040 /*!< Can do 10mbps full-duplex */
#define LPA_1000XHALF 0x0040 /*!< Can do 1000BASE-X half-duplex */
#define LPA_100HALF 0x0080 /*!< Can do 100mbps half-duplex */
#define LPA_1000XPAUSE 0x0080 /*!< Can do 1000BASE-X pause */
#define LPA_100FULL 0x0100 /*!< Can do 100mbps full-duplex */
#define LPA_1000XPAUSE_ASYM 0x0100 /*!< Can do 1000BASE-X pause asym */
#define LPA_100BASE4 0x0200 /*!< Can do 100mbps 4k packets */
#define LPA_PAUSE_CAP 0x0400 /*!< Can pause */
#define LPA_PAUSE_ASYM 0x0800 /*!< Can pause asymetrically */
#define LPA_RESV 0x1000 /*!< Unused... */
#define LPA_RFAULT 0x2000 /*!< Link partner faulted */
#define LPA_LPACK 0x4000 /*!< Link partner acked us */
#define LPA_NPAGE 0x8000 /*!< Next page bit */
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
/* Expansion register for auto-negotiation. */
#define EXPANSION_NWAY 0x0001 /*!< Can do N-way auto-nego */
#define EXPANSION_LCWP 0x0002 /*!< Got new RX page code word */
#define EXPANSION_ENABLENPAGE 0x0004 /*!< This enables npage words */
#define EXPANSION_NPCAPABLE 0x0008 /*!< Link partner supports npage */
#define EXPANSION_MFAULTS 0x0010 /*!< Multiple faults detected */
#define EXPANSION_RESV 0xffe0 /*!< Unused... */
#define ESTATUS_1000_TFULL 0x2000 /*!< Can do 1000BT Full */
#define ESTATUS_1000_THALF 0x1000 /*!< Can do 1000BT Half */
/* N-way test register. */
#define NWAYTEST_RESV1 0x00ff /*!< Unused... */
#define NWAYTEST_LOOPBACK 0x0100 /*!< Enable loopback for N-way */
#define NWAYTEST_RESV2 0xfe00 /*!< Unused... */
/* 1000BASE-T Control register */
#define ADVERTISE_1000FULL 0x0200 /*!< Advertise 1000BASE-T full duplex */
#define ADVERTISE_1000HALF 0x0100 /*!< Advertise 1000BASE-T half duplex */
#define CTL1000_AS_MASTER 0x0800
#define CTL1000_ENABLE_MASTER 0x1000
/* 1000BASE-T Status register */
#define LPA_1000LOCALRXOK 0x2000 /*!< Link partner local receiver status */
#define LPA_1000REMRXOK 0x1000 /*!< Link partner remote receiver status*/
#define LPA_1000FULL 0x0800 /*!< Link partner 1000BASE-T full duplex*/
#define LPA_1000HALF 0x0400 /*!< Link partner 1000BASE-T half duplex*/
/* Flow control flags */
#define FLOW_CTRL_TX 0x01
#define FLOW_CTRL_RX 0x02
/* MMD Access Control register fields */
#define MII_MMD_CTRL_DEVAD_MASK 0x1f /*!< Mask MMD DEVAD */
#define MII_MMD_CTRL_ADDR 0x0000 /*!< Address */
#define MII_MMD_CTRL_NOINCR 0x4000 /*!< no post increment */
#define MII_MMD_CTRL_INCR_RDWT 0x8000 /*!< post increment on reads & writes */
#define MII_MMD_CTRL_INCR_ON_WT 0xC000 /*!< post increment on writes only */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif //__MII_H__
/*************************** (C) COPYRIGHT 2018 HUGE-IC ***** END OF FILE *****/

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sdk/include/lib/net/ethphy/phy/auto_phy.h Normal file
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#ifndef __AUTO_PHY_H_
#define __AUTO_PHY_H_
extern struct ethernet_phy_driver auto_phy_driver;
#endif

7
sdk/include/lib/net/ethphy/phy/ip101g.h Normal file
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#ifndef __IP101G_H_
#define __IP101G_H_
extern struct ethernet_phy_driver ip101g_driver;
#endif

7
sdk/include/lib/net/ethphy/phy/rtl8201f.h Normal file
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#ifndef __RTL8201F_H_
#define __RTL8201F_H_
extern struct ethernet_phy_driver rtl8201f_driver;
#endif

7
sdk/include/lib/net/ethphy/phy/sz18201.h Normal file
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#ifndef __SZ18201_H_
#define __SZ18201_H_
extern struct ethernet_phy_driver sz18201_driver;
#endif

26
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#ifndef _SDK_SKMONITOR_H_
#define _SDK_SKMONITOR_H_
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
SOCK_MONITOR_READ = BIT(0),
SOCK_MONITOR_WRITE = BIT(1),
SOCK_MONITOR_ERROR = BIT(2),
} skmonitor_flags;
typedef void (*skmonitor_cb)(uint16 sock, skmonitor_flags flags, uint32 priv);
int32 sock_monitor_init(void);
void sock_monitor_dump(void);
/* 注册到skmonitor的socket，不能再由模块task自己主动读取，只能由skmonitor触发执行读取 */
int32 sock_monitor_add(uint16 sock, skmonitor_flags flags, skmonitor_cb cb, uint32 priv);
void sock_monitor_del(uint16 sock);
void sock_monitor_disable(uint16 sock, uint8 disable);
#ifdef __cplusplus
}
#endif
#endif

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sdk/include/lib/net/sslsock/ssl_sock.h Normal file
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#ifndef __SSL_SOCKET_ADAPTER_H__
#define __SSL_SOCKET_ADAPTER_H__
typedef struct {
int8 is_server;
int8 verify_cert; // 是否验证客户端证书（0=不验证，1=验证）
int8 debug, r2;
const char *cert; // 服务器证书数据（PEM/DER 自动识别）
const char *key; // 服务器私钥数据（PEM/DER 自动识别）
const char *ca_cert; // CA证书数据（仅verify_cert=1时需传）
uint32 max_session_cache; // 会话缓存最大条目（默认100）
uint32 session_timeout_sec; // 会话超时时间（秒，默认30）
} ssl_sock_init_param;
typedef struct {
/**
* @brief 初始化SSL全局上下文
* @param param 初始化参数
* @return void * 全局上下文指针
*/
void *(*global_init)(const ssl_sock_init_param *param);
/**
* @brief 全局资源销毁
* @param global_ctx 全局上下文指针
*/
void (*global_destroy)(void *global_ctx);
/**
* @brief 创建连接上下文
* @param global_ctx 全局上下文指针
* @return void * 连接上下文指针
*/
void *(*conn_create)(void *global_ctx);
/**
* @brief 连接上下文销毁
* @param conn_ctx 连接上下文指针
*/
void (*conn_destroy)(void *conn_ctx);
/**
* @brief TLS握手
* @param conn_ctx 连接上下文指针
* @param sockfd 套接字文件描述符
* @param step 是否由外部代码控制握手过程
* @return int 0成功，-1失败
*/
int (*handshake)(void *conn_ctx, int sockfd, int step);
/**
* @brief 加密发送
* @param conn_ctx 连接上下文指针
* @param data 数据指针
* @param len 数据长度
* @return int32 发送字节数
*/
int32(*send)(void *conn_ctx, const uint8 *data, uint32 len);
/**
* @brief 加密接收
* @param conn_ctx 连接上下文指针
* @param buf 接收缓冲区指针
* @param buf_len 接收缓冲区长度
* @return int32 接收字节数
*/
int32(*recv)(void *conn_ctx, uint8 *buf, uint32 buf_len);
/**
* @brief 优雅关闭
* @param conn_ctx 连接上下文指针
*/
void (*shutdown)(void *conn_ctx);
/**
* @brief 获取错误信息
* @param conn_ctx 连接上下文指针
* @return const char* 错误信息指针
*/
const char *(*get_error)(void *conn_ctx);
} sslsock_ops;
extern const sslsock_ops sslsock_mbedtls_ops;
#endif // __UHTTPD_SSL_ADAPTER_H__

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sdk/include/lib/net/uhttpd/uhttpd.h Normal file
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#ifndef _TX_UHTTPD_H_
#define _TX_UHTTPD_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "lib/net/sslsock/ssl_sock.h"
#define uhttpd_dbg(fmt, ...) //os_printf(KERN_ERR fmt, ##__VA_ARGS__)
#define uhttpd_err(fmt, ...) os_printf(KERN_ERR fmt, ##__VA_ARGS__)
#define UHTTPD_RXBUF_SIZE (1536)
enum UHTTPD_VALUE_TYPE {
UHTTPD_VALUE_TYPE_UINT32,
UHTTPD_VALUE_TYPE_UINT8,
UHTTPD_VALUE_TYPE_UINT16,
UHTTPD_VALUE_TYPE_STRING,
UHTTPD_VALUE_TYPE_UINT32_BIT,
UHTTPD_VALUE_TYPE_UINT8_BIT,
UHTTPD_VALUE_TYPE_UINT16_BIT,
UHTTPD_VALUE_TYPE_IPV4,
UHTTPD_VALUE_TYPE_MACV4,
UHTTPD_VALUE_TYPE_CMD,
UHTTPD_VALUE_TYPE_SARRAY,
UHTTPD_VALUE_TYPE_RET_INT8,
UHTTPD_VALUE_TYPE_RET_UINT8,
UHTTPD_VALUE_TYPE_RET_INT16,
UHTTPD_VALUE_TYPE_RET_UINT16,
UHTTPD_VALUE_TYPE_RET_INT32,
UHTTPD_VALUE_TYPE_RET_UINT32,
UHTTPD_VALUE_TYPE_RET_INT64,
UHTTPD_VALUE_TYPE_RET_UINT64,
UHTTPD_VALUE_TYPE_RET_STRING,
};
enum UHTTPD_VALUE_FLAGS {
UHTTPD_VALUE_FLAGS_READONLY = BIT(0),
};
typedef void(*uhttpd_val_cmdhdl)(int32 sock, char *val, char *resp, int32 size, uint32 *resp_len);
struct uhttpd_value_entry {
char *name;
void *value;
uint32 type: 5, maxlen: 8, bitoff: 5, maskbit: 5, flags: 2, rev: 7;
};
struct uhttpd_html {
const char *name;
const char *html;
uint32 size;
};
typedef void (*uhttpd_action_hdl)(int32 sock, uint32 client_ip, char *buff, uint32 size);
struct uhttpd_action {
char *name;
uhttpd_action_hdl hdl;
};
int32 uhttpd_start(char *ifname, uint32 port, const sslsock_ops *ssl, const ssl_sock_init_param *param);
void uhttpd_stop(void);
////////////////////////////////////////////////////////////////////////////
int32 uhttpd_send_resp(int32 sock, uint32 status, uint8 gzip, char *values, int vlen, uint32 flash);
int32 uhttpd_resp_status(int32 sock, char *resp, uint8 status);
void uhttpd_proc_post(int32 sock, uint32 client_ip, char *buf, uint32 len);
void uhttpd_proc_get(int32 sock, uint32 client_ip, char *buf, uint32 len);
int32 uhttpd_get_flash_data(uint32 addr, uint32 len, uint8 *buff);
const struct uhttpd_html *uhttpd_find_html(char *url);
const struct uhttpd_action *uhttpd_action_find(int32 sock, uint32 client_ip, char *buf, uint32 len);
const struct uhttpd_value_entry *uhttpd_find_value(char *name);
void uhttpd_proc_auth_action(int32 sock, uint32 client_ip, char *buf, uint32 len);
void uhttpd_proc_post_action(int32 sock, uint32 client_ip, char *buf, uint32 len);
void uhttpd_proc_options(int32 sock, uint32 client_ip, char *buff, uint32 len);
void uhttpd_proc_firmware_upg(int32 sock, uint32 client_ip, char *buf, uint32 size);
#ifdef __cplusplus
}
#endif
#endif

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/**
* @file url_file.h
* @brief URL 文件流处理库头文件
*
* 该模块提供了一个统一的接口来处理基于不同协议（如 HTTP, RTSP, FILE 等）的 URL 资源。
* 它抽象了底层的网络套接字操作、数据缓冲、播放列表解析以及断点续传等功能，
* 使得上层应用可以像操作普通文件一样操作网络流。
*/
#ifndef _URL_FILE_H_
#define _URL_FILE_H_
#include "basic_include.h"
#include "lib/common/rbuffer.h"
#include "lib/posix/stdio.h"
#include "lwip/opt.h"
#include "lwip/sockets.h"
#include "lwip/inet_chksum.h"
#include "netif/etharp.h"
#include "netif/ethernetif.h"
#include "lwip/ip.h"
#include "lwip/init.h"
#include "lib/net/skmonitor/skmonitor.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifndef SEEK_SET
#define SEEK_SET 0
#endif
#ifndef SEEK_CUR
#define SEEK_CUR 1
#endif
#ifndef SEEK_END
#define SEEK_END 2
#endif
/** @brief 通用调试打印宏 */
#define UF_DEBUG(f,...) os_printf("%s:%d:"f, __FUNCTION__, __LINE__, ##__VA_ARGS__)
/** @brief 错误日志打印宏 (带内核错误前缀) */
#define UF_ERR(f,...) os_printf(KERN_ERR"%s:%d:"f, __FUNCTION__, __LINE__, ##__VA_ARGS__)
/** @brief 获取读锁 (阻塞直到获取成功) */
#define UF_LOCK_READ(uf) os_mutex_lock(&uf->r_lock, osWaitForever)
/** @brief 释放读锁 */
#define UF_UNLOCK_READ(uf) os_mutex_unlock(&uf->r_lock)
/** @brief 获取写锁 (阻塞直到获取成功) */
#define UF_LOCK_WRITE(uf) os_mutex_lock(&uf->w_lock, osWaitForever)
/** @brief 释放写锁 */
#define UF_UNLOCK_WRITE(uf) os_mutex_unlock(&uf->w_lock)
/** @brief 获取协议保护锁 (阻塞直到获取成功) */
#define UF_LOCK_PROTO(uf) os_mutex_lock(&uf->lock, osWaitForever)
/** @brief 释放协议保护锁 */
#define UF_UNLOCK_PROTO(uf) os_mutex_unlock(&uf->lock)
/** @brief 检查是否处于读模式 */
#define UF_READ(uf) ((uf)->mode & UF_MODE_RD)
/** @brief 检查是否处于写模式 */
#define UF_WRITE(uf) ((uf)->mode & UF_MODE_WR)
/** @brief 检查是否处于 AV (音视频) 模式 */
#define UF_AVMODE(uf) ((uf)->mode & UF_MODE_AV)
/**
* @brief URL 文件处理状态
*/
typedef enum {
UF_CLOSE = -2, /**< 需要关闭，此状态只能由 uf_close 设置 */
UF_ERROR = -1, /**< 发生错误 */
UF_NONE = 0, /**< 初始状态 */
UF_ROPEN = 1, /**< 重新打开中 */
UF_OPEN = 2, /**< 开始打开连接 */
UF_RUN = 3, /**< 数据传输中 */
UF_DONE = 4 /**< 数据传输完成，处于空闲状态 */
} UF_STATE;
/**
* @brief URL 文件操作模式位掩码
*/
typedef enum {
UF_MODE_AV = BIT(0), /**< AV 模式 (音视频流) */
UF_MODE_RD = BIT(1), /**< 支持读取 */
UF_MODE_WR = BIT(2), /**< 支持写入 */
UF_MODE_RECV = BIT(3), /**< 客户自定义接收模式 (通过回调获取数据) */
UF_MODE_MONITOR = BIT(4), /**< 使用 Socket 监控模式 (不创建独立任务) */
UF_MODE_AUTO_RUN = BIT(5), /**< 自动运行模式 (打开后立即启动传输) */
} UF_MODE;
/**
* @brief 支持的播放列表格式类型
*/
typedef enum {
UF_PLAYLIST_NONE = 0, /**< 无播放列表 */
UF_PLAYLIST_CUST, /**< 自定义格式 */
UF_PLAYLIST_HLS, /**< HLS (.m3u8) */
UF_PLAYLIST_ASX, /**< ASX (Windows Media) */
UF_PLAYLIST_MMSREF, /**< MMS Reference */
UF_PLAYLIST_M3U, /**< M3U */
UF_PLAYLIST_PLS, /**< PLS */
UF_PLAYLIST_NSC, /**< NSC (Netshow) */
UF_PLAYLIST_SMIL, /**< SMIL */
UF_PLAYLIST_XSPF, /**< XSPF */
UF_PLAYLIST_MAX, /**< 类型总数 */
} UF_PLAYLIST_TYPE;
/**
* @brief IO 控制命令
*/
typedef enum {
UF_IOCTL_CMD_IDLE, /**< 空闲命令 */
UF_IOCTL_CMD_SOCK_ERROR, /**< 获取/设置 Socket 错误 */
UF_IOCTL_CMD_GET_FILESIZE, /**< 获取文件大小 */
UF_IOCTL_CMD_GET_TOTALTIME, /**< 获取总时长 (媒体文件) */
UF_IOCTL_CMD_SET_EVTCB, /**< 设置事件回调函数 */
UF_IOCTL_CMD_SET_BREAKPOINT_CONTINUALLY,/**< 设置断点续传参数 */
UF_IOCTL_CMD_SET_HTTP_HEADER, /**< 设置自定义 HTTP 头 */
UF_IOCTL_CMD_SET_HTTP_UPSIZE, /**< 设置 HTTP 上传大小 */
} UF_IOCTL_CMD;
/**
* @brief URL 文件事件类型
*/
typedef enum {
UF_EVENT_RECVD_DATA, /**< 接收到数据事件 (用于 UF_MODE_RECV 模式) */
UF_EVENT_TRANS_COMPLETE, /**< 传输完成事件 */
} UF_EVENT;
struct urlfile;
/**
* @brief 协议层操作函数集
*
* 每个支持的协议 (如 http, rtsp, file) 都需要实现此结构体中的函数指针。
*/
struct ufprotocol_ops {
/** @brief 初始化协议上下文 */
int (*do_init)(struct urlfile *file);
/** @brief 释放协议资源 */
int (*do_release)(struct urlfile *file);
/** @brief 执行主传输循环 */
int (*do_run)(struct urlfile *file);
/** @brief seek 操作 (跳转) */
int (*do_seek)(struct urlfile *file, long offset, int whence);
/** @brief 发送数据 */
int (*do_send)(struct urlfile *file, void *data, size_t size);
/** @brief 协议特定的 IO 控制 */
int (*do_ioctl)(struct urlfile *file, uint32 cmd, uint32 param1, uint32 param2);
};
/**
* @brief 协议描述符
*/
struct ufprotocol {
const char *name; /**< 协议名称 (如 "http", "rtsp") */
const struct ufprotocol_ops *ops; /**< 操作函数集指针 */
};
/**
* @brief 事件回调函数类型
*
* @param file URL 文件句柄
* @param evet 事件类型 (@ref UF_EVENT)
* @param param1 参数 1 (取决于事件类型)
* @param param2 参数 2 (取决于事件类型)
* @return int32 处理结果
*/
typedef int32(*uf_evt_cb)(struct urlfile *file, uint32 evet, uint32 param1, uint32 param2);
/**
* @brief 播放列表条目
*/
struct uf_playlist_entry {
struct list_head list; /**< 链表节点 */
char *title; /**< 媒体标题 */
char *url; /**< 媒体 URL */
};
/**
* @brief 播放列表容器
*/
struct uf_playlist {
uint8 *buff_addr; /**< 缓冲区地址 (用于存储原始播放列表数据) */
uint32 buff_size; /**< 缓冲区总大小 */
uint32 buff_len; /**< 当前已填充长度 */
int16 type; /**< 播放列表类型 (@ref UF_PLAYLIST_TYPE) */
uint16 count; /**< 条目数量 */
struct list_head list;/**< 条目链表头 */
};
/**
* @brief URL 文件核心控制结构
*
* 该结构体维护了一个 URL 资源的所有状态，包括网络连接、缓冲、状态机、播放列表等。
*/
struct urlfile {
uint8 mode; /**< 打开模式: 0:AVMODE, BIT0:read; BIT1:write; others:customize */
int8 state; /**< URL 文件当前状态 (@ref UF_STATE) */
uint16 sock; /**< 关联的 Socket 描述符 */
char *url; /**< 当前打开的 URL 字符串 */
off_t size; /**< 文件总大小。初始为 0，连接成功后设置。若未知 (如直播流) 则设为 -1 */
off_t cur_pos; /**< 当前读取位置 */
off_t doffset; /**< 当前下载偏移量 (用于断点续传) */
void *priv; /**< 协议层私有数据指针 */
uf_evt_cb evt_cb; /**< 事件回调函数指针 */
struct os_mutex lock; /**< 全局互斥锁 (保护主要状态) */
struct os_mutex r_lock; /**< 读操作互斥锁 */
struct os_mutex w_lock; /**< 写操作互斥锁 */
uint64 open_tick; /**< 打开时的系统 tick 计数 ，用于统计网络打开延时 */
const struct ufprotocol *proto; /**< 匹配的协议描述符指针 */
struct rbuffer buffer; /**< 接收数据环形缓冲区 */
void *task; /**< 处理任务句柄 (若非监控模式) */
struct uf_playlist playlist; /**< 播放列表信息 */
uint16 playindex; /**< 当前播放的索引 */
uint8 seek_type; /**< Seek 类型标志 */
uint8 rev; /**< 保留字段 */
};
/* ================= 外部API声明 ================= */
/**
* @brief 打开 URL 资源
*
* 根据 URL 协议类型创建相应的处理实例，并初始化资源。
*
* @param url 资源 URL 字符串 (如 "http://...", "rtsp://...")
* @param mode 模式字符串:
* - 'v': AV 模式 (音视频流)
* - 'r': 支持读取
* - 'w': 支持写入
* - 'c': 客户自定义接收模式 (不需要调用 uf_read，数据通过 UF_EVENT_RECVD_DATA 回调输出，需配合 UF_IOCTL_CMD_SET_EVTCB)
* - 'm': 使用 Socket 监控模式 (不为此 urlfile 创建独立任务)
* - 'a': 自动运行模式 (打开后自动开始传输)
* @param flags 额外标志位
* @return void* 成功返回 urlfile 句柄，失败返回 NULL
*/
void *uf_open(char *url, char *mode, uint32 flags);
/**
* @brief 关闭 URL 资源
*
* 释放所有关联资源，断开连接，停止任务。
*
* @param file urlfile 句柄
*/
void uf_close(void *file);
/**
* @brief 从 URL 资源读取数据
*
* 类似于标准 fread，从内部缓冲区拷贝数据到用户缓冲区。
*
* @param ptr 用户缓冲区指针
* @param size 单个元素大小
* @param nmemb 元素个数
* @param file urlfile 句柄
* @return size_t 实际读取的元素个数
*/
size_t uf_read(void *ptr, size_t size, size_t nmemb, void *file);
/**
* @brief 向 URL 资源写入数据
*
* 类似于标准 fwrite，将用户数据发送到远程端。
*
* @param ptr 用户数据指针
* @param size 单个元素大小
* @param nmemb 元素个数
* @param file urlfile 句柄
* @return size_t 实际写入的元素个数
*/
size_t uf_write(void *ptr, size_t size, size_t nmemb, void *file);
/**
* @brief 移动读写指针
*
* @param file urlfile 句柄
* @param offset 偏移量
* @param whence 起始位置 (SEEK_SET, SEEK_CUR, SEEK_END)
* @return int 0: 成功; -1: 失败
*/
int uf_seek(void *file, long offset, int whence);
/**
* @brief 获取当前读写指针位置
*
* @param file urlfile 句柄
* @return off_t 当前位置
*/
off_t uf_tell(void *file);
/**
* @brief 检查是否到达文件末尾
*
* @param file urlfile 句柄
* @return int 1: 到达末尾; 0: 未到达
*/
int uf_eof(void *file);
/**
* @brief IO 控制接口
*
* 用于设置或获取特定参数 (如回调、HTTP 头、文件大小等)。
*
* @param file urlfile 句柄
* @param cmd 控制命令 (@ref UF_IOCTL_CMD)
* @param param1 参数 1
* @param param2 参数 2
* @return int 操作结果
*/
int uf_ioctl(void *file, uint32 cmd, uint32 param1, uint32 param2);
/**
* @brief 获取文件大小
*
* 尝试获取远程文件的总大小。如果当前接收的数据量不足以判断大小，可能返回 0。
*
* @param fp urlfile 句柄
* @param size 触发检查的最小数据阈值
* @return off_t 文件总大小；若未知或条件不满足返回 0
*/
off_t uf_filesize(void *fp, uint32 size);
/**
* @brief 获取 Seek 类型
*
* @param fp urlfile 句柄
* @return int32 Seek 类型标识
*/
int32 uf_seektype(void *fp);
/**
* @brief 获取有效数据大小及缓冲水位
*
* @param fp urlfile 句柄
* @param buffer_level 输出参数：当前缓冲区水位 (百分比)
* @return off_t 有效数据总大小
*/
off_t uf_datasize(void *fp, uint8 *buffer_level);
/**
* @brief 分配内存 -- 具体实现在 app_mem.c
* @param size 请求大小
* @return void* 内存指针
*/
void *uf_alloc(int32 size);
/**
* @brief 释放内存 -- 具体实现在 app_mem.c
* @param ptr 内存指针
*/
void uf_free(void *ptr);
/**
* @brief 复制字符串
* @param s 源字符串
* @return char* 新分配的字符串副本
*/
char *uf_strdup(char *s);
/**
* @brief urlfile状态切换（内部使用）
* @param file urlfile 句柄
* @param state 新状态
*/
void uf_state(struct urlfile *file, UF_STATE state);
/**
* @brief 初始化 URL 文件系统
*
* 注册支持的协议列表。
*
* @param protos 协议描述符数组
* @param count 数组元素个数
*/
void urlfile_init(const struct ufprotocol *protos, int count);
/* ================= 协议内部使用的API ================= */
/**
* @brief 将数据存入内部缓冲区
*
* @param file urlfile 句柄
* @param data 数据指针
* @param len 数据长度
* @return size_t 实际存入的长度
*/
size_t uf_store_data(struct urlfile *file, char *data, size_t len);
/**
* @brief 解析播放列表数据
*
* @param list 播放列表结构
* @param data 原始数据
* @param len 数据长度
* @param tot_size 总大小
* @return int 解析到的条目数
*/
int uf_playlist_recieve(struct uf_playlist *list, char *data, int len, uint32 tot_size);
/**
* @brief 检测播放列表类型
*
* @param list 播放列表结构
* @param data 数据样本
* @param size 样本大小
*/
void uf_playlist_detect(struct uf_playlist *list, void *data, size_t size);
/**
* @brief 构建播放列表
*
* @param list 播放列表结构
* @param urls 包含 URL 的字符串
* @return int32 0: 成功; 负值: 失败
*/
int32 uf_playlist_build(struct uf_playlist *list, char *urls);
/**
* @brief 释放播放列表资源
*
* @param list 播放列表结构
* @return int32 0: 成功
*/
int32 uf_playlist_free(struct uf_playlist *list);
/**
* @brief 向播放列表添加新 URL
*
* @param list 播放列表结构
* @param title 标题
* @param url URL 字符串
* @return int32 0: 成功; 负值: 失败
*/
int32 uf_playlist_new_url(struct uf_playlist *list, char *title, char *url);
/**
* @brief 获取播放列表中指定索引的 URL
*
* @param list 播放列表结构
* @param index 索引
* @return char* URL 字符串
*/
char *uf_playlist_get_url(struct uf_playlist *list, uint16 index);
/**
* @brief 从缓冲区获取下一行文本
*
* @param buf 缓冲区
* @param line 输出：行起始指针
* @return char* 下一行的起始位置或 NULL
*/
char *uf_playlist_get_line(char *buf, char **line);
/**
* @brief 根据 URL 查找匹配的协议处理者
*
* @param url URL 字符串
* @return const struct ufprotocol* 匹配的协议描述符，未找到返回 NULL
*/
const struct ufprotocol *uf_findproto(char *url);
/* ================= 外部声明 ================= */
/** @brief 外部声明：CURL HTTP 协议操作集 */
extern const struct ufprotocol_ops uf_curl_http;
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _HGSDK_NETUTILS_H_
#define _HGSDK_NETUTILS_H_
#include "dev.h"
#include "hal/netdev.h"
#ifdef __cplusplus
extern "C" {
#endif
struct udpdata_info {
uint8 *dest, *src;
uint32 dest_ip, dest_port;
uint32 src_ip, src_port;
uint8 *data;
uint32 len;
};
struct icmp_info {
uint8 *dest, *src;
uint32 dest_ip;
uint32 src_ip;
uint8 *data;
uint32 len;
uint8 type;
uint16 sn;
};
uint16 net_checksum(uint16 initcksum, uint8 *data, int32 len);
uint16 net_pseudo_checksum(uint8 proto, uint8 *data, uint16 len, uint32 *srcaddr, uint32 *destaddr);
uint16 net6_pseudo_checksum(uint8 *srcip, uint8 *destip, uint16 nexthdr, uint8 *payload, uint16 plen);
uint16 net_setup_udpdata(struct udpdata_info *data, uint8 *udp);
int32 net_setup_icmp(struct icmp_info *data, uint8 *icmp);
void wnb_ota_init(void);
void net_atcmd_init(void);
void netlog_init(uint16 port);
int32 sntp_client_init(char *ntp_server, uint16 update_interval);
void sntp_client_fresh(void);
void sntp_set_server(char *ntp_server);
void sntp_set_interval(uint16 interval);
void sntp_client_disable(int8 disable);
void sntp_set_sport(uint16 server_port);
int32 dns_redirect_init(void);
int32 dns_redirect_add(const char *domain, const char *ifname);
void icmp_pkt_monitor(const char *prefix, uint8 *data, uint32 len);
void icmp_pkt_monitor_scatter(const char *prefix, scatter_data *data, uint32 count);
int32 icmp_monitor_init(void);
uint32 net_get_dhcp_transID(uint8 *ether_data, uint8 **client_mac);
uint8 net_get_dhcp_msgtype(uint8 *opt, uint32 len);
uint8 net_get_dhcpv6_msgtype(uint8 *opt, uint32 len);
uint8 *net_get_dhcp_option(uint8 *opt, uint32 len, uint8 opcode, uint32 *olen);
const char *dhcpv6_msgtype_str(uint8 type);
const char *dhcp_msgtype_str(uint8 type);
int32 wifi_mcastfw_enable(uint8 enable, uint8 TOTAL_1s, uint8 EACH_1s, uint8 dhcp_only);
void wifi_mcastfw_clear(void);
void auto_wds_init(void);
void auto_wds_update(uint8 ifidx, uint32 valid_ip);
static inline int32 ipv4_is_mcast_addr(uint32 ip)
{
return (ip > 0xE0000000 && ip <= 0xEFFFFFFF) || (ip&0xff) == 0xff;
}
static inline int32 ipv6_is_mcast_addr(uint8 *ip)
{
return ip[0] == 0xff;
}
typedef enum {
SSWITCH_RULE_CHECK_PORT_INPUT,
SSWITCH_RULE_CHECK_LOCAL_INPUT,
SSWITCH_RULE_CHECK_FORWARD,
SSWITCH_RULE_CHECK_LOCAL_OUTPUT,
SSWITCH_RULE_CHECK_LOCAL_OUTPUT_SCATTER,
} SSWITCH_RULE_CHECK;
typedef enum {
SSWITCH_FLAGS_STATIC_ONLY = BIT(0), // Only use static MAC tables, do not dynamically update MAC tables
SSWITCH_FLAGS_FORWARD_UCAST = BIT(1), // Allow forwarding of unicast packets with unknown destinations
SSWITCH_FLAGS_FORWARD_MCAST = BIT(2), // Allow forwarding of multicast packets
} SSWITCH_FLAGS;
void sswitch_dev_status(void);
void sswitch_dev_mactbl_dump(void);
void sswitch_dev_mactbl_delete(uint8 *addr);
void sswitch_dev_mactbl_update(uint8 sport, uint8 *src_mac, uint8 is_static);
int32 sswitch_dev_port_enable(uint8 port_id, uint8 enable);
int32 sswitch_dev_port_config(uint8 port_id, struct netdev *ndev, uint8 mac);
int32 sswitch_dev_rule_check(SSWITCH_RULE_CHECK type, uint8 *data, uint32 len, uint32 port);
int32 sswitch_init(uint8 port_cnt, uint32 mactbl_max, SSWITCH_FLAGS flags);
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _WIFI_ZROAM_H_
#define _WIFI_ZROAM_H_
#include "lib/skb/skb.h"
#include "lib/bus/macbus/mac_bus.h"
#include "lib/skb/skb_list.h"
#include "lib/lmac/lmac_def.h"
#include "lib/lmac/hgic.h"
struct wifi_zroam_config {
uint16 MDID;
uint8 zroam_psk[32];
};
struct lmac_ops *wifi_zroam_init(uint8 master, struct lmac_ops *lops, uint32 bus_type, struct wifi_zroam_config *cfg);
void wifi_zroam_start(uint8 start);
int32 wifi_zroam_recv(uint8 *data, uint32 len);
#endif

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/**
******************************************************************************
* @file User\AppLoader\include\al_typedef.h
* @author TaiXin-Semi Application Team
* @version V1.0.0
* @date 18-08-2025
* @brief This file contains all the loader typedef.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2025 TaiXin-Semi</center></h2>
*
*
*
******************************************************************************
*/
#ifndef __AL_TYPEDEF_H
#define __AL_TYPEDEF_H
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup AL_Typedef
* @{
*/
/**
* @brief 生成设备组ID的宏
* @param from 源设备ID (enum obj_id)
* @param to 目标设备ID (enum obj_id)
* @return 合成的16位组ID (高8位:源设备, 低8位:目标设备)
*
* @note 用于快速生成设备传输组合的标识符
* @warning 设备ID值必须小于256
*
* 使用示例：
* @code
* uint16 group = GROUP_ID(SD, FLASH); // SD卡到Flash的传输组
* @endcode
*/
#define GROUP_ID(from, to) ((from<<8)|(to))
/**
* @brief 存储设备标识枚举
*
* 定义系统支持的各种存储设备类型标识，用于区分不同存储介质。
*/
enum obj_id {
SRAM, /**< 静态随机存储器(SRAM) */
SD, /**< SD卡存储设备 */
NAND, /**< NAND Flash存储器 */
PSRAM, /**< 伪静态随机存储器(PSRAM) */
FLASH, /**< 并行NOR Flash存储器 */
SPIFLASH, /**< SPI接口Flash存储器 */
};
/**
* @brief 操作模式枚举定义
*
* 定义数据传输和存储操作的各种模式标志，可采用位或(|)组合使用。
*/
enum mode {
MODE_NONE = 0, /**< 无特殊模式，默认操作 */
FLS_ENCRYPT = BIT(0), /**< 加密模式：数据在写入/读取时自动加密 */
FLS_ERASE = BIT(1), /**< 擦除模式：写入前自动擦除目标区域 */
UNCOMPRESS = BIT(2), /**< 解压模式：自动解压源数据 */
LOADER_UPDATE = BIT(3), /**< 加载器更新模式标志位 */
};
/**
* @enum verify_mode
* @brief 数据校验模式枚举
*
* 定义支持的各种CRC校验算法类型，
* 用于固件验证和数据完整性检查。
*/
enum verify_mode {
CRC5, /**< 5位CRC校验 */
CRC8, /**< 标准8位CRC校验 */
CRC8ITU, /**< ITU-T标准的8位CRC（X.25）*/
CRC16MODBUS, /**< Modbus协议使用的16位CRC */
CRC32, /**< 32位CRC校验 */
};
/* 固件标志和功能码定义 */
#define SPI_BOOT_VALID_FLAG (0x5a69) /**< 有效的启动标志 */
#define SPI_BOOT_FUNC_SPI_INFOR (0x1) /**< SPI配置功能码 */
#define SPI_BOOT_FUNC_FW_INFOR (0x2) /**< 固件信息功能码 */
#define SPI_BOOT_FUNC_END (0xFF) /**< 结束标志功能码 */
#define XZ_HEADER_MAGIC "ZHTX-XZ-FILE" /**< XZ压缩文件头标志 */
/**
* @struct xz_info
* @brief XZ压缩文件头信息
*/
struct xz_info {
uint8_t magic[12]; /**< 文件标识："ZHTX-XZ-FILE" */
uint32_t bin_header_bytes; /**< Bin文件头信息长度（字节） */
uint32_t file_crc16; /**< 文件CRC16校验值 */
uint32_t compress_bytes; /**< 文件的压缩后的大小，不含xz_info,bin_header */
uint32_t uncompress_bytes; /**< 文件的未压缩的大小，不含xz_info,bin_header */
uint32_t xz_info_crc16; /**< 本结构体的CRC16校验 */
};
/**
* @struct fw_info_header_read_cfg
* @brief SPI Flash读取配置
*/
struct fw_info_header_read_cfg {
uint8 read_cmd; /**< 读命令码 */
uint8 cmd_dummy_cycles : 4, /**< 读命令dummy周期数 */
clock_mode : 2, /**< 时钟模式(CPOL/CPHA) */
spec_sequnce_en : 1, /**< 特殊序列使能 */
quad_wire_en : 1; /**< 四线模式使能 */
uint8 wire_mode_cmd : 2, /**< 命令传输线数 */
wire_mode_addr : 2, /**< 地址传输线数 */
wire_mode_data : 2, /**< 数据传输线数 */
quad_wire_select : 2; /**< 四线模式选择 */
uint8 reserved3; /**< 保留字段 */
uint16 sample_delay; /**< RX采样延迟(0~clk_divor) */
} /** \cond */ __attribute__((packed))/** \endcond */;
/**
* @struct fw_info_header_spi_info
* @brief SPI硬件配置头
*/
struct fw_info_header_spi_info {
uint8 func_code; /**< 功能码(0x1) */
uint8 size; /**< 头部大小 */
struct fw_info_header_read_cfg read_cfg; /**< 读配置 */
uint8 spiflash_spec_sequnce[64]; /**< 特殊命令序列 */
uint16 header_crc16; /**< 本结构体的CRC16校验 */
} /** \cond */ __attribute__((packed))/** \endcond */;
/**
* @struct fw_info_header_fw_info
* @brief 固件版本信息头
*/
struct fw_info_header_fw_info {
uint8 func_code; /**< 功能码(0x2) */
uint8 size; /**< 头部大小 */
uint32 sdk_version; /**< SDK版本号 */
uint32 svn_version; /**< SVN版本号 */
uint32 date; /**< 编译日期 */
uint16 chip_id; /**< 芯片ID */
uint8 cpu_id; /**< CPU ID */
uint32 code_crc32; /**< 代码CRC32校验 */
uint16 param_crc16; /**< 参数CRC16校验 */
uint16 crc16; /**< 本结构体的CRC16校验 */
} /** \cond */ __attribute__((packed))/** \endcond */;
/**
* @struct fw_info_header_boot
* @brief 启动配置头
*/
struct fw_info_header_boot {
uint16 boot_flag; /**< 启动标志(0x5a69) */
uint8 version; /**< 头部版本 */
uint8 size; /**< 头部大小 */
uint32 boot_to_sram_addr; /**< 加载到的地址 */
uint32 run_sram_addr; /**< 代码运行地址 */
uint32 boot_code_offset_addr; /**< 代码偏移地址 */
uint32 boot_from_flash_len; /**< 加载的长度 */
uint16 boot_data_crc; /**< 代码CRC校验 */
uint16 flash_blk_size; /**< Flash块大小(64KB(version > 1), 512B(version == 0)) */
/** SPI时钟配置 */
uint16 boot_baud_mhz : 14, /**< SPI时钟频率(MHz(version > 1), KHz(version == 0)) */
driver_strength : 2; /**< IO驱动强度 */
/** 启动模式配置 */
struct {
uint16 pll_src : 8, /**< PLL源时钟(MHz) */
pll_en : 1, /**< PLL使能 */
debug : 1, /**< 调试输出使能 */
aes_en : 1, /**< AES加密使能 */
crc_en : 1, /**< CRC校验使能 */
reserved: 4; /**< 保留位 */
} mode /** \cond */ __attribute__((packed))/** \endcond */;
uint16 reserved; /**< 保留字段 */
uint16 head_crc16; /**< 本结构体的CRC16校验 */
} /** \cond */ __attribute__((packed))/** \endcond */;
/**
* @struct fw_info_header_func
* @brief 功能头基类
*/
struct fw_info_header_func {
uint8 func_code; /**< 功能码 */
uint8 size; /**< 头部大小 */
} /** \cond */ __attribute__((packed))/** \endcond */;
/**
* @struct fw_info_user
* @brief 用户信息
*/
struct fw_info_user {
uint32 fw_addr[2]; /**< 固件地址[0:主,1:备] */
uint32 fw_version[2]; /**< 固件版本 */
uint32 fw_is_cipher[2]; /**< 是否加密标志 */
uint32 fw_valid_num; /**< 有效固件数量 */
uint32 target_fw_index; /**< 目标固件索引 */
struct xz_info xz_info; /**< XZ压缩信息 */
void *user_data;
};
/**
* @struct fw_info_header
* @brief 完整的固件头信息
*/
struct fw_info_header {
struct fw_info_header_boot header_boot; /**< 启动头 */
struct fw_info_header_spi_info header_spi_info; /**< SPI配置头 */
struct fw_info_header_fw_info header_fw_info; /**< 固件信息头 */
};
/**
* @struct firmware_info
* @brief 完整的固件信息结构
*/
struct firmware_info {
struct fw_info_user user; /**< 用户区信息 */
struct fw_info_header header[2]; /**< 双备份头信息 */
};
typedef struct firmware_info * firmware_info_t;
/**
* @struct system_info
* @brief 系统综合信息结构体
*/
struct system_info {
uint8 firmware_has_run; /**< 固件曾经成功运行过 */
};
struct fls_user_data {
uint32 fw_magic; /**< 固件魔数(0xA5A55A5A) */
uint32 loader_bytes;
uint32 loader_steps;
uint32 spi_density_id;
};
typedef struct fls_user_data* fls_user_data_t;
/**
* @}
*/
#endif //AL_TYPEDEF_H
/*************************** (C) COPYRIGHT 2025 TaiXin-Semi ***** END OF FILE *****/

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#ifndef __FW_H__
#define __FW_H__
#ifdef __cplusplus
extern "C" {
#endif
enum fw_code
{
FW_CODE_OK = 0,
FW_OTA_INIT_ERR, //ota初始化错误
FW_CODE_LEN_TOO_SHORT, // 数据长度太短
FW_ID_CHECKSUM_ERR, //客户id校验错误
FW_HEAD_CHECK_ERR, //头校验错误
FW_OUT_OFF_ORDER_ERR, //ota长度超过配置的长度
FW_VERIFY_ERR, //写入校验错误
FW_END_ERR, //ota结束回写校验码错误
};
#define fw_ota_dbg(fmt, ...) //os_printf(fmt, ##__VA_ARGS__)
/* The OTA marker and marker size are only applicable to huge-ic chips. */
#define OTA_FLASH_MARKER 0x5A69
#define OTA_FLASH_MARKER_SIZE 2
#define OTA_VERIFY_READ_BUF_SIZE 256
/* OTA info */
struct ota_fwinfo {
struct spi_nor_flash *flash0;
uint32 addr0;
struct spi_nor_flash *flash1;
uint32 addr1;
};
/* OTA control */
struct ota_ctrl {
struct ota_fwinfo ota_info;
struct spi_nor_flash *p_flash;
uint32 base_addr;
uint32 local_off;
uint32 marker;
uint32 earse_locate;
uint8 verify_read_buf[OTA_VERIFY_READ_BUF_SIZE];
};
extern int32 libota_write_fw_ah(uint32 tot_len, uint32 off, uint8 *data, uint16 len);
extern int32 libotaV2_write_fw(uint32 tot_len, uint8 is_once_earse, uint8 isSector, uint8 isVerify, uint32 off, uint8 *data, uint16 len);
extern int32 ota_fwinfo_get(struct ota_fwinfo *pinfo);
#ifdef TXW4002ACK803
#define libota_write_fw(tot_len,off,data,len) libota_write_fw_ah(tot_len,off,data,len)
#else
#define libota_write_fw(tot_len,off,data,len) libotaV2_write_fw(tot_len,0,0,0,off,data,len)
#endif
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _HGIC_FWINFO_H_
#define _HGIC_FWINFO_H_
#ifdef __cplusplus
extern "C" {
#endif
#define fwinfo_dbg(fmt, ...) //os_printf("%s:%d::"fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__)
#define fwinfo_err(fmt, ...) os_printf(fmt, ##__VA_ARGS__)
#define FWINFO_BOOT_HDR 0x5a69
#define FWINFO_SPI_HDR 0x1
#define FWINFO_CODE_HDR 0x2
#define FWINFO_ENCRYPT_INFO_HDR 0x3
struct fwinfo_spiflash_header_boot {
uint16 boot_flag; /* 0 : 0x5a69, header boot flag */
uint8 version; /* 2 : version */
uint8 size; /* 3 : Link to Next Header */
uint32 boot_to_sram_addr; /* 4 : spi data load to sram addr */
uint32 run_sram_addr; /* 8 : code execute start addr */
uint32 boot_code_offset_addr; /* 12 : HeaderLen+ParamLen=4096+512 */
uint32 boot_from_flash_len; /* 16 : */
uint16 boot_data_crc; /* 20 : boot data crc check */
uint16 flash_blk_size; /* 22 : flash size in 64KB(version > 1), 512B(version== 0) */
uint16 boot_baud_mhz : 14, /* 24 : spi clk freq in mhz(version > 1), khz(version== 0) */
driver_strength : 2; /* io driver strength */
struct {
uint16 pll_src : 8, /* pll src in Mhz */
pll_en : 1, /* PLL enable */
debug : 1, /* debug info uart output enable */
aes_en : 1, /* AES enable */
crc_en : 1, /* CRC check enable */
reserved : 4;
} mode; /* 26 : boot option */
uint16 reserved; /* 28 : */
uint16 head_crc16; /* (size+4) byte CRC16 check value */
}__packed;
/* format : cmd + dummys_flags + dat_len + dat */
struct fwinfo_spiflash_spec_sequnce {
uint8 cmd_nums;
uint8 cmd;
uint8 dummy;
uint8 dat_len;
uint8 dat;
};
struct fwinfo_spiflash_read_cfg {
uint8 read_cmd; /* read_cmd */
uint8 cmd_dummy_cycles : 4, /* read dummy cycles */
clock_mode : 2, /* clock polarity & phase */
spec_sequnce_en : 1, /* spec sequnce to execute, maybe same with quad_wire_en */
quad_wire_en : 1; /* spi D2/D3 enable */
uint8 wire_mode_cmd : 2,
wire_mode_addr : 2,
wire_mode_data : 2,
quad_wire_select : 2; /* spi D2/D3 group select */
uint8 reserved3;
uint16 sample_delay; /* RX sample dalay time: 0 ~ clk_divor */
}__packed;
struct fwinfo_spiflash_header_spi_info {
uint8 func_code; /* 0 : header function(0x1) */
uint8 size; /* 1: Link to Next Header */
struct fwinfo_spiflash_read_cfg read_cfg;
uint8 fwinfo_spiflash_spec_sequnce[64];
uint16 header_crc16; /* (size+2) byte CRC16 check value */
}__packed;
/* fwinfo_ah_fw_v1.0.1.1_2020.2.20.bin ？*/
struct fwinfo_spiflash_header_firmware_info {
uint8 func_code; /* 0 : header function(0x2) */
uint8 size; /* 1: Link to Next Header */
uint32 sdk_version; /* version */
uint32 svn_version;
uint32 date; /* date */
uint16 chip_id; /* chip_id */
uint8 cpu_id; /* cpu id, fix 0 */
uint32 code_crc32; /* code CRC32 */
uint16 param_crc16; /* param CRC16 */
uint16 crc16; /* (size+2) byte CRC16 check value */
}__packed;
struct spiflash_header_encrypt_info {
unsigned char func_code; /* 0 : header function(0x3) */
unsigned char size; /* 1: Link to Next Header */
unsigned short customer_id; /* customer_id */
unsigned short crc16; /* (size) byte CRC16 check value */
}__packed;
struct fwinfo_hdr {
struct fwinfo_spiflash_header_boot boot;
struct fwinfo_spiflash_header_spi_info spi_infor; /* func1*/
struct fwinfo_spiflash_header_firmware_info fw_infor; /* func2*/
struct spiflash_header_encrypt_info spec_encrypt_infor; /* func3*/
}__packed;
uint16 fwinfo_crc16(const uint8 *data, uint32 length);
uint32 fwinfo_crc32(const uint8 *data, uint32 length);
int32 fwinfo_check_fwinfo_hdr(const uint8 *data);
uint16 fwinfo_get_fw_aes_en(const uint8 *data, int32 *err_code);
uint16 fwinfo_get_fw_crc_en(const uint8 *data, int32 *err_code);
uint32 fwinfo_get_fw_dl_addr(const uint8 *data, int32 *err_code);
uint32 fwinfo_get_fw_run_addr(const uint8 *data, int32 *err_code);
uint32 fwinfo_get_fw_code_offset(const uint8 *data, int32 *err_code);
uint32 fwinfo_get_fw_local_crc32(const uint8 *data, int32 *err_code);
uint32 fwinfo_get_fw_sdk_version(const uint8 *data, int32 *err_code);
uint32 fwinfo_get_fw_svn_version(const uint8 *data, int32 *err_code);
uint16 fwinfo_get_fw_chipid(const uint8 *data, int32 *err_code);
uint8 fwinfo_get_fw_cpuid(const uint8 *data, int32 *err_code);
int32 fwinfo_get_fw_code_checksum(const uint8 *data, int32 len);
uint32 fwinfo_get_fw_lenght(const uint8 *data, int32 *err_code);
int32 fwinfo_check_customer_id(const uint8 *data);
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _HGSDK_OTA_H_
#define _HGSDK_OTA_H_
#ifdef __cplusplus
extern "C" {
#endif
#define ETH_P_OTA (0x4847)
enum ETH_P_OTA_STYPE{
ETH_P_OTA_REBOOT=1,
ETH_P_OTA_SCAN,
ETH_P_OTA_SCAN_REPORT,
ETH_P_OTA_FW_DATA,
ETH_P_OTA_FW_DATA_RESP,
ETH_P_OTA_FW_GET_PARAM,
ETH_P_OTA_FW_GET_PARAM_RESP,
ETH_P_OTA_FW_SET_PARAM,
ETH_P_OTA_FW_SET_PARAM_RESP,
};
enum HGIC_OTA_RESP_ERR_CODE{
HGIC_OTA_RESP_ERR_OK=0,
HGIC_OTA_RESP_ERR_CHECKSUM,
HGIC_OTA_RESP_ERR_WRITE,
};
struct eth_ota_hdr{
uint8 dest[6];
uint8 src[6];
uint16 proto;
uint8 stype, status;
};
struct eth_ota_scan_report{
struct eth_ota_hdr hdr;
uint32 version;
uint16 chipid;
uint8 mode, rev;
uint32 svn_version;
uint32 app_version;
};
struct eth_ota_fw_data{
struct eth_ota_hdr hdr;
uint32 version;
uint32 off, tot_len;
uint16 len, checksum;
uint16 chipid;
uint8 data[0];
};
enum ETH_P_REBOOT_FLAGS{
ETH_P_REBOOT_FLAGS_LOADDEF = BIT(0),
};
struct eth_ota_reboot{
struct eth_ota_hdr hdr;
uint32 flags;
};
struct hgic_ota_hdr{
uint32 version;
uint32 off;
uint32 tot_len;
uint16 len;
uint16 checksum;
uint16 chipid;
uint16 err_code;
uint8 data[0];
};
struct sk_buff *libota_proc(uint8 mode, struct sk_buff *skb);
uint16 libota_check_sum(uint8 *addr, int32 count);
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _HGIC_POSIX_PTHREAD_H_
#define _HGIC_POSIX_PTHREAD_H_
#include "typesdef.h"
#include "osal/timer.h"
#define LIB_PTHREAD_DEF
#ifdef LIB_PTHREAD_DEF
#include <pthread.h>
#endif
#ifdef __cplusplus
extern "C" {
#endif
#define pthread_dbg(fmt, ...) os_printf(KERN_NOTICE fmt, ##__VA_ARGS__)
#define pthread_err(fmt, ...) os_printf(KERN_ERR"%s:%d::"fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__)
#ifndef PTHREAD_CREATE_JOINABLE
#define PTHREAD_CREATE_JOINABLE 0x00
#endif
#ifndef PTHREAD_CREATE_DETACHED
#define PTHREAD_CREATE_DETACHED 0x01
#endif
#ifndef TIMER_ABSTIME
#define TIMER_ABSTIME 0x4
#endif
#ifndef CLOCK_REALTIME
#define CLOCK_REALTIME 0x1
#endif
#ifndef CLOCK_MONOTONIC
#define CLOCK_MONOTONIC 0x4
#endif
#ifndef LIB_PTHREAD_DEF
struct sched_param {
int sched_priority;
};
/* thread attributes */
typedef struct {
int detachstate; // 线程的分离状态
//int schedpolicy; // 线程调度策略
struct sched_param schedparam; // 线程的调度参数
//int inheritsched; // 线程的继承性
//int scope; // 线程的作用域
//size_t guardsize; // 线程栈末尾的警戒缓冲区大小
//int stackaddr_set; // 线程的栈设置
//void* stackaddr; // 线程栈的位置
unsigned int stacksize; // 线程栈的大小
} pthread_attr_t;
#endif
struct mq_attr {
long mq_flags; /**< Message queue flags. */
long mq_maxmsg; /**< Maximum number of messages. */
long mq_msgsize; /**< Maximum message size. */
long mq_curmsgs; /**< Number of messages currently queued. */
};
#ifndef PTHREAD_PROCESS_PRIVATE
#define PTHREAD_PROCESS_PRIVATE 0
#endif
#ifndef PTHREAD_PROCESS_SHARED
#define PTHREAD_PROCESS_SHARED 1
#endif
#ifndef PTHREAD_SCOPE_PROCESS
#define PTHREAD_SCOPE_PROCESS 0
#endif
#ifndef PTHREAD_SCOPE_SYSTEM
#define PTHREAD_SCOPE_SYSTEM 1
#endif
#ifndef LIB_PTHREAD_DEF
enum {
PTHREAD_CANCEL_ASYNCHRONOUS = 0,
PTHREAD_CANCEL_ENABLE,
PTHREAD_CANCEL_DEFERRED,
PTHREAD_CANCEL_DISABLE,
PTHREAD_CANCELED
};
enum {
PTHREAD_MUTEX_NORMAL = 0,
PTHREAD_MUTEX_RECURSIVE = 1,
PTHREAD_MUTEX_ERRORCHECK = 2,
PTHREAD_MUTEX_ERRORCHECK_NP = PTHREAD_MUTEX_ERRORCHECK,
PTHREAD_MUTEX_RECURSIVE_NP = PTHREAD_MUTEX_RECURSIVE,
PTHREAD_MUTEX_DEFAULT = PTHREAD_MUTEX_NORMAL
};
/* init value for pthread_once_t */
#define PTHREAD_ONCE_INIT 0
enum {
PTHREAD_PRIO_INHERIT = 0,
PTHREAD_PRIO_NONE,
PTHREAD_PRIO_PROTECT,
};
#endif
#ifndef PTHREAD_COND_INITIALIZER
#define PTHREAD_COND_INITIALIZER 0
#endif
#ifndef PTHREAD_MUTEX_INITIALIZER
#define PTHREAD_MUTEX_INITIALIZER 0
#endif
#define PTHREAD_RWLOCK_INITIALIZER {-1, 0 }
typedef int pid_t;
#ifndef LIB_PTHREAD_DEF
typedef long pthread_t;
typedef long pthread_condattr_t;
typedef long pthread_mutexattr_t;
typedef int pthread_key_t;
typedef int pthread_once_t;
typedef long pthread_mutex_t;
typedef long pthread_cond_t;
#endif
typedef long pthread_rwlockattr_t;
typedef long pthread_barrierattr_t;
typedef long sem_t;
typedef long mqd_t;
typedef struct {
int count;
pthread_cond_t cond;
pthread_mutex_t mutex;
} pthread_barrier_t;
struct pthread_rwlock {
pthread_rwlockattr_t attr;
pthread_mutex_t rw_mutex; /* basic lock on this struct */
pthread_cond_t rw_condreaders; /* for reader threads waiting */
pthread_cond_t rw_condwriters; /* for writer threads waiting */
int rw_nwaitreaders; /* the number of reader threads waiting */
int rw_nwaitwriters; /* the number of writer threads waiting */
int rw_refcount; /* 0: unlocked, -1: locked by writer, > 0 locked by n readers */
};
typedef struct pthread_rwlock pthread_rwlock_t;
#define pthread_spin_init(s, p) pthread_mutex_init(s, NULL)
#define pthread_spin_destroy(s) pthread_mutex_destroy(s)
#define pthread_spin_lock(s) pthread_mutex_lock(s)
#define pthread_spin_trylock(s) pthread_mutex_trylock(s)
#define pthread_spin_unlock(s) pthread_mutex_unlock(s)
#define PTHREAD_KEY_MAX 8
typedef struct {
int is_used;
void (*destructor)(void *parameter);
} pthread_key_data_t;
#define SIGEV_NONE 0 /**< No asynchronous notification is delivered when the event of interest occurs. */
#define SIGEV_SIGNAL 1 /**< A queued signal, with an application-defined value, is generated when the event of interest occurs. Not supported. */
#define SIGEV_THREAD 2 /**< A notification function is called to perform notification. */
union sigval {
int sival_int; /**< Integer signal value. */
void *sival_ptr; /**< Pointer signal value. */
};
struct sigevent {
int sigev_notify; /**< Notification type. A value of SIGEV_SIGNAL is not supported. */
int sigev_signo; /**< Signal number. This member is ignored. */
union sigval sigev_value; /**< Signal value. Only the sival_ptr member is used. */
void (* sigev_notify_function)(union sigval); /**< Notification function. */
pthread_attr_t *sigev_notify_attributes; /**< Notification attributes. */
};
#define pthread_equal(t1, t2) (t1==t2)
unsigned int pthread_timespec_delta(const struct timespec *abstime);
int pthread_create(pthread_t *thread, const pthread_attr_t *attr, void *(*start)(void *), void *arg);
pthread_t pthread_self(void);
int pthread_join(pthread_t thread, void **value_ptr);
void pthread_exit(void *value_ptr);
int pthread_detach(pthread_t thread);
void *pthread_tls(pthread_t thread, int create, int size);
int pthread_once(pthread_once_t *once_control, void (*init_routine)(void));
#if !defined(LIB_PTHREAD_DEF) || !defined(_POSIX_THREADS)
int pthread_attr_init(pthread_attr_t *attr);
int pthread_attr_destroy(pthread_attr_t *attr);
int pthread_attr_setdetachstate(pthread_attr_t *attr, int state);
int pthread_attr_getdetachstate(pthread_attr_t const *attr, int *state);
int pthread_attr_setschedpolicy(pthread_attr_t *attr, int policy);
int pthread_attr_getschedpolicy(pthread_attr_t const *attr, int *policy);
int pthread_attr_setschedparam(pthread_attr_t *attr, struct sched_param const *param);
int pthread_attr_getschedparam(pthread_attr_t const *attr, struct sched_param *param);
int pthread_attr_setstacksize(pthread_attr_t *attr, size_t stack_size);
int pthread_attr_getstacksize(pthread_attr_t const *attr, size_t *stack_size);
int pthread_attr_setstackaddr(pthread_attr_t *attr, void *stack_addr);
int pthread_attr_getstackaddr(pthread_attr_t const *attr, void **stack_addr);
int pthread_attr_setstack(pthread_attr_t *attr, void *stack_base, size_t stack_size);
int pthread_attr_getstack(pthread_attr_t const *attr, void **stack_base, size_t *stack_size);
int pthread_attr_setguardsize(pthread_attr_t *attr, size_t guard_size);
int pthread_attr_getguardsize(pthread_attr_t const *attr, size_t *guard_size);
int pthread_attr_setscope(pthread_attr_t *attr, int scope);
int pthread_attr_getscope(pthread_attr_t const *attr, int *scope);
#endif
int pthread_barrierattr_destroy(pthread_barrierattr_t *attr);
int pthread_barrierattr_init(pthread_barrierattr_t *attr);
int pthread_barrierattr_getpshared(const pthread_barrierattr_t *attr, int *pshared);
int pthread_barrierattr_setpshared(pthread_barrierattr_t *attr, int pshared);
int pthread_barrier_destroy(pthread_barrier_t *barrier);
int pthread_barrier_init(pthread_barrier_t *barrier, const pthread_barrierattr_t *attr, int count);
int pthread_barrier_wait(pthread_barrier_t *barrier);
#if !defined(LIB_PTHREAD_DEF) || !defined(_POSIX_THREADS)
int pthread_cond_init(pthread_cond_t *cond, const pthread_condattr_t *attr);
int pthread_cond_broadcast(pthread_cond_t *cond);
int pthread_cond_destroy(pthread_cond_t *cond);
int pthread_cond_signal(pthread_cond_t *cond);
int pthread_cond_timedwait(pthread_cond_t *cond, pthread_mutex_t *mutex, const struct timespec *abstime);
int pthread_cond_wait(pthread_cond_t *cond, pthread_mutex_t *mutex);
int pthread_condattr_destroy(pthread_condattr_t *attr);
int pthread_condattr_init(pthread_condattr_t *attr);
int pthread_condattr_getclock(const pthread_condattr_t *attr, clockid_t *clock_id);
int pthread_condattr_setclock(pthread_condattr_t *attr, clockid_t clock_id);
int pthread_condattr_getpshared(const pthread_condattr_t *attr, int *pshared);
int pthread_condattr_setpshared(pthread_condattr_t *attr, int pshared);
int pthread_mutex_destroy(pthread_mutex_t *mutex);
int pthread_mutex_init(pthread_mutex_t *mutex, const pthread_mutexattr_t *attr);
int pthread_mutex_lock(pthread_mutex_t *mutex);
int pthread_mutex_timedlock(pthread_mutex_t *mutex, const struct timespec *abstime);
int pthread_mutex_trylock(pthread_mutex_t *mutex);
int pthread_mutex_unlock(pthread_mutex_t *mutex);
int pthread_mutexattr_destroy(pthread_mutexattr_t *attr);
int pthread_mutexattr_gettype(const pthread_mutexattr_t *attr, int *type);
int pthread_mutexattr_init(pthread_mutexattr_t *attr);
int pthread_mutexattr_settype(pthread_mutexattr_t *attr, int type);
#endif
int pthread_rwlockattr_init(pthread_rwlockattr_t *attr);
int pthread_rwlockattr_destroy(pthread_rwlockattr_t *attr);
int pthread_rwlockattr_getpshared(const pthread_rwlockattr_t *attr, int *pshared);
int pthread_rwlockattr_setpshared(pthread_rwlockattr_t *attr, int pshared);
int pthread_rwlock_init(pthread_rwlock_t *rwlock, const pthread_rwlockattr_t *attr);
int pthread_rwlock_destroy(pthread_rwlock_t *rwlock);
int pthread_rwlock_rdlock(pthread_rwlock_t *rwlock);
int pthread_rwlock_tryrdlock(pthread_rwlock_t *rwlock);
int pthread_rwlock_timedrdlock(pthread_rwlock_t *rwlock, const struct timespec *abstime);
int pthread_rwlock_timedwrlock(pthread_rwlock_t *rwlock, const struct timespec *abstime);
int pthread_rwlock_trywrlock(pthread_rwlock_t *rwlock);
int pthread_rwlock_unlock(pthread_rwlock_t *rwlock);
int pthread_rwlock_wrlock(pthread_rwlock_t *rwlock);
#ifndef LIB_PTHREAD_DEF
int sched_yield(void);
int sched_get_priority_min(int policy);
int sched_get_priority_max(int policy);
int sched_setscheduler(pid_t pid, int policy);
int sched_setscheduler(pid_t pid, int policy, const struct sched_param *param);
#endif
int sem_destroy(sem_t *sem);
int sem_getvalue(sem_t *sem, int *sval);
int sem_init(sem_t *sem, int pshared, unsigned value);
int sem_post(sem_t *sem);
int sem_timedwait(sem_t *sem, const struct timespec *abstime);
int sem_trywait(sem_t *sem);
int sem_wait(sem_t *sem);
int timer_create(clockid_t clockid, struct sigevent *evp, timer_t *timerid);
int timer_delete(timer_t timerid);
int timer_getoverrun(timer_t timerid);
int timer_settime(timer_t timerid, int flags, const struct itimerspec *value, struct itimerspec *ovalue);
int timer_gettime(timer_t timerid, struct itimerspec *value);
int mq_getattr(mqd_t mqdes, struct mq_attr *mqstat);
int mq_close(mqd_t mqdes);
mqd_t mq_open(const char *name, int oflag, int mode, struct mq_attr *attr);
int mq_receive(mqd_t mqdes, char *msg_ptr, size_t msg_len, unsigned int *msg_prio);
int mq_send(mqd_t mqdes, const char *msg_ptr, size_t msg_len, unsigned msg_prio);
int mq_timedreceive(mqd_t mqdes, char *msg_ptr, size_t msg_len, unsigned *msg_prio, const struct timespec *abstime);
int mq_timedsend(mqd_t mqdes, const char *msg_ptr, size_t msg_len, unsigned int msg_prio, const struct timespec *abstime);
int mq_unlink(const char *name);
void pthread_key_destroy(void *tls);
void *pthread_getspecific(pthread_key_t key);
int pthread_setspecific(pthread_key_t key, const void *value);
int pthread_key_create(pthread_key_t *key, void (*destructor)(void *));
int pthread_key_delete(pthread_key_t key);
#ifdef __cplusplus
}
#endif
#endif

102
sdk/include/lib/posix/stdio.h Normal file
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#ifndef _HGIC_POSIX_FS_H_
#define _HGIC_POSIX_FS_H_
#include "typesdef.h"
#include <stdarg.h>
#define _SYS_STAT_H
#ifdef __cplusplus
extern "C" {
#endif
#ifndef O_ACCMODE
#define O_ACCMODE 00000003
#endif
#ifndef O_CREAT
#define O_CREAT 0100
#endif
#define ACC_MODE(x) ((x)&O_ACCMODE)
#ifndef _OFF_T_DECLARED
typedef unsigned long off_t; /* file offset */
#define _OFF_T_DECLARED
#endif
#ifndef _MODE_T_DECLARED
typedef unsigned int mode_t; /* permissions */
#define _MODE_T_DECLARED
#endif
#ifndef F_DUPFD
#define F_DUPFD 0 /* Duplicate fildes */
#endif
#ifndef F_GETFD
#define F_GETFD 1 /* Get fildes flags (close on exec) */
#endif
#ifndef F_SETFD
#define F_SETFD 2 /* Set fildes flags (close on exec) */
#endif
#ifndef F_GETFL
#define F_GETFL 3 /* Get file flags */
#endif
#ifndef F_SETFL
#define F_SETFL 4 /* Set file flags */
#endif
#ifndef O_NONBLOCK
#define O_NONBLOCK 04000
#endif
#ifndef O_NDELAY
#define O_NDELAY O_NONBLOCK
#endif
#ifndef O_RDONLY
#define O_RDONLY 0 /* +1 == FREAD */
#endif
#ifndef O_WRONLY
#define O_WRONLY 1 /* +1 == FWRITE */
#endif
#ifndef O_RDWR
#define O_RDWR 2 /* +1 == FREAD|FWRITE */
#endif
#ifndef S_IFDIR
#define S_IFDIR 0040000
#endif
#ifndef S_IFREG
#define S_IFREG 0100000
#endif
off_t lseek(int fd, off_t offset, int whence);
int fsync(int fd);
struct __stdio_file{
int fd;
};
struct stat {
unsigned int st_size; /* File size */
unsigned int st_mtime; /* Modified date */
unsigned int st_mode; /* File or directory */
unsigned char fattrib; /* File attribute */
char *fname; /* TODO: long file name File name */
};
extern int stat(const char *__file, struct stat *__buf);
extern int fstat(int fd, struct stat *statbuf);
extern int access(const char *pathname, int mode);
extern int fcntl (int __fd, int __cmd, ...);
#define F_OK 0
#define R_OK 1
#define W_OK 2
#define X_OK 3
#ifdef __cplusplus
}
#endif
#endif

23
sdk/include/lib/rpc/cpurpc.h Normal file
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#ifndef _HGIC_CPURPC_H_
#define _HGIC_CPURPC_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 cpu_rpc_init(uint32 mbox_addr, uint32 rx_irq, uint32 tx_irq);
int32 cpu_rpc2_init(uint32 t_box, uint32 r_box, uint32 ctrl_base, uint32 irq);
int32 cpu_rpc_call(uint32 func_id, uint32 *args, uint32 arg_cnt, uint32 sync);
const void *cpu_rpc_func(uint32 func_id);
int32 cpu_splock_init(uint32 addr, uint32 irq_num);
int32 cpu_splock_lock(CPU_SPLOCK_ID lock_id);
int32 cpu_splock_unlock(CPU_SPLOCK_ID lock_id);
#define CPU_RPC_CALL(f) cpu_rpc_call(RPC_FUNCID_##f, args, ARRAY_SIZE(args), 1)
#define CPU_RPC_CALL_ASYNC(f) cpu_rpc_call(RPC_FUNCID_##f, args, ARRAY_SIZE(args), 0)
#define RPC_FUNC_DEF(f) [RPC_FUNCID_##f]=f
#ifdef __cplusplus
}
#endif
#endif

19
sdk/include/lib/scale/scale_dev.h Normal file
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#ifndef _SCALE_DEV_H_
#define _SCALE_DEV_H_
#include "hal/scale.h"
void scale_from_vpp(struct scale_device *scale_dev,uint32 yuvbuf_addr,uint32 s_w,uint32 s_h,uint32 d_w,uint32 d_h);
void scale3_all_frame(struct scale_device *scale_dev,uint32_t in_w,uint32_t in_h,uint32_t out_w,uint32_t out_h,uint8_t input_format,uint8_t output_format,uint32_t src,uint32_t dst);
void scale_from_jpeg_config(struct scale_device *scale_dev,uint8_t dirtolcd,uint32 in_w,uint32 in_h,uint32 out_w,uint32 out_h,uint8_t larger);
void scale2_from_jpeg_config_for_msi(struct scale_device *scale_dev,uint32_t yinsram,uint32_t uinsram,uint32_t vinsram,uint32_t yuvoutbuf,uint32 in_w,uint32 in_h,uint32 out_w,uint32 out_h,uint8_t larger);
void scale_from_h264_config(struct scale_device *scale_dev,uint32 in_w,uint32 in_h,uint32 out_w,uint32 out_h,uint8_t larger);
void scale2_all_frame(struct scale_device *scale_dev,uint8_t type,uint32 in_w,uint32 in_h,uint32 out_w,uint32 out_h,uint32 src_addr,uint32 des_addr);
void scale_to_lcd_config(uint32_t iw,uint32_t ih);
void scale2_mutex_init();
void scale3_to_memory_for_thumb(uint16_t iw,uint16_t ih,uint16_t ow,uint16_t oh,uint32_t outadr,uint32_t yuvsram,uint16_t lanenum);
void scale_soft_from_psram_to_enc(struct scale_device *scale_dev,uint8_t * psram_data,uint32_t w,uint32 h,uint32_t ow,uint32_t oh);
void scale2_from_h264_config_for_msi(struct scale_device *scale_dev,uint32_t yinsram,uint32_t uinsram,uint32_t vinsram,uint32_t yuvoutbuf,uint32 in_w,uint32 in_h,uint32 out_w,uint32 out_h,uint8_t larger);
#endif

211
sdk/include/lib/sdhost/mmc.h Normal file
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2015-06-15 hichard first version
*/
#ifndef __MMC_H__
#define __MMC_H__
#include "sys_config.h"
#include "typesdef.h"
#include "devid.h"
#include "list.h"
#include "dev.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
* EXT_CSD fields
*/
#define EXT_CSD_FLUSH_CACHE 32 /* W */
#define EXT_CSD_CACHE_CTRL 33 /* R/W */
#define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */
#define EXT_CSD_PACKED_FAILURE_INDEX 35 /* RO */
#define EXT_CSD_PACKED_CMD_STATUS 36 /* RO */
#define EXT_CSD_CONTEXT_CONF 37 //emmc
#define EXT_CSD_EXP_EVENTS_STATUS 54 /* RO, 2 bytes */
#define EXT_CSD_EXP_EVENTS_CTRL 56 /* R/W, 2 bytes */
#define EXT_CSD_DATA_SECTOR_SIZE 61 /* R */
#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */
#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */
#define EXT_CSD_HPI_MGMT 161 /* R/W */
#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
#define EXT_CSD_BKOPS_EN 163 /* R/W */
#define EXT_CSD_BKOPS_START 164 /* W */
#define EXT_CSD_SANITIZE_START 165 /* W */
#define EXT_CSD_WR_REL_PARAM 166 /* RO */
#define EXT_CSD_RPMB_MULT 168 /* RO */
#define EXT_CSD_BOOT_WP 173 /* R/W */
#define EXT_CSD_BOOT_WP_STATUS 174 //EMMC
#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
#define EXT_CST_BOOT_BUS_COND 177
#define EXT_CSD_BOOT_CONFIG_WP 178 /* R/W & R/W/C_P*/
#define EXT_CSD_PART_CONFIG 179 /* R/W */
#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */
#define EXT_CSD_BUS_WIDTH 183 /* R/W */
#define EXT_CSD_HS_TIMING 185 /* R/W */
#define EXT_CSD_POWER_CLASS 187 /* R/W */
#define EXT_CSD_REV 192 /* RO */
#define EXT_CSD_STRUCTURE 194 /* RO */
#define EXT_CSD_CARD_TYPE 196 /* RO */
#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */
#define EXT_CSD_PART_SWITCH_TIME 199 /* RO */
#define EXT_CSD_PWR_CL_52_195 200 /* RO */
#define EXT_CSD_PWR_CL_26_195 201 /* RO */
#define EXT_CSD_PWR_CL_52_360 202 /* RO */
#define EXT_CSD_PWR_CL_26_360 203 /* RO */
#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
#define EXT_CSD_S_A_TIMEOUT 217 /* RO */
#define EXT_CSD_REL_WR_SEC_C 222 /* RO */
#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
#define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */
#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
#define EXT_CSD_ACC_SIZE 225 //emmc
#define EXT_CSD_BOOT_MULT 226 /* RO */
#define EXT_CSD_SEC_TRIM_MULT 229 /* RO */
#define EXT_CSD_SEC_ERASE_MULT 230 /* RO */
#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */
#define EXT_CSD_TRIM_MULT 232 /* RO */
#define EXT_CSD_PWR_CL_200_195 236 /* RO */
#define EXT_CSD_PWR_CL_200_360 237 /* RO */
#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */
#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */
#define EXT_CSD_BKOPS_STATUS 246 /* RO */
#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */
#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */
#define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */
#define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */
#define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */
#define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */
#define EXT_CSD_MAX_PACKED_READS 501 /* RO */
#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
#define EXT_CSD_HPI_FEATURES 503 /* RO */
/*
* EXT_CSD field definitions
*/
#define EXT_CSD_WR_REL_PARAM_EN (1<<2)
#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40)
#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10)
#define EXT_CSD_BOOT_WP_B_PERM_WP_EN (0x04)
#define EXT_CSD_BOOT_WP_B_PWR_WP_EN (0x01)
#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7)
#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
#define EXT_CSD_PART_CONFIG_ACC_RPMB (0x3)
#define EXT_CSD_PART_CONFIG_ACC_GP0 (0x4)
#define EXT_CSD_PART_SUPPORT_PART_EN (0x1)
#define EXT_CSD_CMD_SET_NORMAL (1<<0)
#define EXT_CSD_CMD_SET_SECURE (1<<1)
#define EXT_CSD_CMD_SET_CPSECURE (1<<2)
#define EXT_CSD_CARD_TYPE_HS_26 (1<<0) /* Card can run at 26MHz */
#define EXT_CSD_CARD_TYPE_HS_52 (1<<1) /* Card can run at 52MHz */
#define EXT_CSD_CARD_TYPE_HS (EXT_CSD_CARD_TYPE_HS_26 | \
EXT_CSD_CARD_TYPE_HS_52)
#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */
/* DDR mode @1.8V or 3V I/O */
#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */
/* DDR mode @1.2V I/O */
#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
| EXT_CSD_CARD_TYPE_DDR_1_2V)
#define EXT_CSD_CARD_TYPE_HS200_1_8V (1<<4) /* Card can run at 200MHz */
#define EXT_CSD_CARD_TYPE_HS200_1_2V (1<<5) /* Card can run at 200MHz */
/* SDR mode @1.2V I/O */
#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
EXT_CSD_CARD_TYPE_HS200_1_2V)
#define EXT_CSD_CARD_TYPE_HS400_1_8V (1<<6) /* Card can run at 200MHz DDR, 1.8V */
#define EXT_CSD_CARD_TYPE_HS400_1_2V (1<<7) /* Card can run at 200MHz DDR, 1.2V */
#define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \
EXT_CSD_CARD_TYPE_HS400_1_2V)
#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */
#define EXT_CSD_TIMING_HS 1 /* High speed */
#define EXT_CSD_TIMING_HS200 2 /* HS200 */
#define EXT_CSD_TIMING_HS400 3 /* HS400 */
#define EXT_CSD_SEC_ER_EN BIT(0)
#define EXT_CSD_SEC_BD_BLK_EN BIT(2)
#define EXT_CSD_SEC_GB_CL_EN BIT(4)
#define EXT_CSD_SEC_SANITIZE BIT(6) /* v4.5 only */
#define EXT_CSD_RST_N_EN_MASK 0x3
#define EXT_CSD_RST_N_ENABLED 1 /* RST_n is enabled on card */
#define EXT_CSD_NO_POWER_NOTIFICATION 0
#define EXT_CSD_POWER_ON 1
#define EXT_CSD_POWER_OFF_SHORT 2
#define EXT_CSD_POWER_OFF_LONG 3
#define EXT_CSD_PWR_CL_8BIT_MASK 0xF0 /* 8 bit PWR CLS */
#define EXT_CSD_PWR_CL_4BIT_MASK 0x0F /* 8 bit PWR CLS */
#define EXT_CSD_PWR_CL_8BIT_SHIFT 4
#define EXT_CSD_PWR_CL_4BIT_SHIFT 0
#define EXT_CSD_PACKED_EVENT_EN BIT(3)
/*
* EXCEPTION_EVENT_STATUS field
*/
#define EXT_CSD_URGENT_BKOPS BIT(0)
#define EXT_CSD_DYNCAP_NEEDED BIT(1)
#define EXT_CSD_SYSPOOL_EXHAUSTED BIT(2)
#define EXT_CSD_PACKED_FAILURE BIT(3)
#define EXT_CSD_PACKED_GENERIC_ERROR BIT(0)
#define EXT_CSD_PACKED_INDEXED_ERROR BIT(1)
/*
* BKOPS status level
*/
#define EXT_CSD_BKOPS_LEVEL_2 0x2
/*
* MMC_SWITCH access modes
*/
#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */
#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */
#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
//一些函数从sd card那里拷贝过来的
uint32 send_idle(struct sdh_device * host);
uint32 send_all_get_cid(struct sdh_device * host,uint32 *cid);
uint32 send_get_card_addr(struct sdh_device * host,uint32 *rca);
uint32 send_get_csd(struct sdh_device * host,uint32 *csd);
uint32 GET_BITS(uint32 *resp,
uint32 start,
uint32 size);
uint32 send_select_card(struct sdh_device * host);
void sd_set_bus_width(struct sdh_device * host, uint32 width);
void sd_set_sample(struct sdh_device *host, TYPE_LL_SDHC_SMP_CFG type, uint8 cmd_cmp, uint8 dat_cmp);
void sd_delay_config(struct sdh_device *host, TYPE_LL_SDHC_DELAY_SYSCLK dly_cfg, uint8 chain);
/* flags : TYPE_SDHC_INIT_FLAGS */
uint32 sd_init(struct sdh_device * host, uint32 clk, uint32 flags);
int emmc_init(struct sdh_device * host, uint32 clk);
#ifdef __cplusplus
}
#endif
#endif

22
sdk/include/lib/sdhost/mmc_ops.h Normal file
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#ifndef __MMC_OPS_H__
#define __MMC_OPS_H__
#include "sys_config.h"
#include "typesdef.h"
#include "devid.h"
#include "list.h"
#include "dev.h"
int mmc_get_ext_csd(struct sdh_device *host, uint8_t *ext_csd);
int mmc_parse_ext_csd(struct sdh_device *host, uint8_t *ext_csd);
int mmc_switch(struct sdh_device *host, uint8_t set, uint8_t index, uint8_t value);
int mmc_compare_ext_csds(struct sdh_device *host, uint8_t *ext_csd, uint32_t bus_width);
int mmc_select_bus_width(struct sdh_device *host, uint8_t *ext_csd);
int mmc_set_card_addr(struct sdh_device *host, uint32_t rca);
int __send_status(struct sdh_device *host, uint32_t *status, unsigned retries);
int card_busy_detect(struct sdh_device *host, unsigned int timeout_ms, uint32_t *resp_errs);
uint32_t send_op_cond(struct sdh_device *host, uint32_t ocr, uint32_t *rocr);
uint32 send_card_status(struct sdh_device * host);
int mmc_cmdq_switch(struct sdh_device *host, bool enable);
#endif

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sdk/include/lib/sdhost/sdhost.h Normal file
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#ifndef SDHOST_H
#define SDHOST_H
#define SDHC_WARN_PRINTF(fmt, ...) os_printf(KERN_DEBUG""fmt, ##__VA_ARGS__)
#define SDHC_ERR_PRINTF(fmt, ...) os_printf(KERN_ERR""fmt, ##__VA_ARGS__)
enum{
MMCSD_NO_ERR = 0,
MMCSD_CMD_ERR = BIT(0),
MMCSD_DAT_ERR = BIT(1),
MMCSD_STP_ERR = BIT(2),
MMCSD_INT_VLE = BIT(3),
MMCSD_BUF_ERR = BIT(6),
MMCSD_SMP_ERR = BIT(7),
MMCSD_CMP_TIMEOUT = BIT(8),
MMCSD_CMP_DATERR = BIT(9),
}TYPE_ENUM_MMCSD_ERR;
enum{
MMCSD_SMP_SINGLE = 0,
MMCSD_SMP_DELAY_CHAIN,
MMCSD_SMP_DELAY_HALF_CLOCK,
MMCSD_SMP_DELAY_ONE_CLOCK,
}TYPE_ENUM_MMCSD_SAMPLE;
enum {
MMCSD_CARD_STATUS_IDLE = 0,
MMCSD_CARD_STATUS_READY,
MMCSD_CARD_STATUS_IDENT,
MMCSD_CARD_STATUS_STBY,
MMCSD_CARD_STATUS_TRAN,
MMCSD_CARD_STATUS_DATA,
MMCSD_CARD_STATUS_RCV,
MMCSD_CARD_STATUS_PRG,
MMCSD_CARD_STATUS_DIS,
MMCSD_CARD_STATUS_RESERVED,
}TYPE_ENUM_MMCSD_CARD_STATUS;
typedef enum
{
LL_SDHC_DLY_NONE,
LL_SDHC_DLY_CHAIN,
LL_SDHC_DLY_HALF_SYSCLK,
LL_SDHC_DLY_ONE_SYSCLK,
} TYPE_LL_SDHC_DELAY_SYSCLK;
typedef enum
{
LL_SDHC_ALL_SMP_CFG_DIS,
LL_SDHC_CMD_SMP_CFG_EN,
LL_SDHC_DAT_SMP_CFG_EN,
LL_SDHC_ALL_SMP_CFG_EN,
} TYPE_LL_SDHC_SMP_CFG;
typedef enum {
SDHC_SMP_CMD_SUCC = BIT(0),
SDHC_SMP_DAT_SUCC = BIT(1),
SDHC_SMP_WRITE_CRC_SUCC = BIT(2),
SDHC_SMP_ALL_SUCC = 0x7,
} TYPE_LL_SDHC_SMP_FLAG;
typedef enum
{
LL_SDHC_IOCTRL_SET_CLOCK,
LL_SDHC_IOCTRL_SET_BUS_WIDTH,
LL_SDHC_IOCTRL_SET_POWER_MODE,
LL_SDHC_IOCTRL_SET_SMP,
LL_SDHC_IOCTRL_SET_DELAY_TYPE,
LL_SDHC_IOCTRL_SET_DAT_OF_STOP_CLK,
} TYPE_LL_SDHC_IOCTRL;
typedef enum
{
LL_SDHC_SPEED_FULL = 0,
LL_SDHC_SPEED_HIGH,
}TYPE_LL_SDHC_SPEED;
typedef enum
{
LL_SDHC_LINE_ONE = 0,
LL_SDHC_LINE_FOUR,
}TYPE_LL_SDHC_WIDTH;
typedef enum
{
SDHC_INIT_FLAGS_SINGLE_BLK_RW_EN = BIT(0),
SDHC_INIT_FLAGS_BUSY_FILTER_EN = BIT(1),
} TYPE_SDHC_INIT_FLAGS;
enum {
LL_SDHC_RETRY_DEFAULT = 0,
LL_SDHC_RETRY_SELECT_POINT,
LL_SDHC_RETRY_CHECK,
LL_SDHC_RETRY_SUCC,
LL_SDHC_RETRY_ERR,
};
struct rt_mmcsd_csd {
uint8 csd_structure; /* CSD register version */
uint8 taac;
uint8 nsac;
uint8 tran_speed; /* max data transfer rate */
uint16 card_cmd_class; /* card command classes */
uint8 rd_blk_len; /* max read data block length */
uint8 rd_blk_part;
uint8 wr_blk_misalign;
uint8 rd_blk_misalign;
uint8 dsr_imp; /* DSR implemented */
uint8 c_size_mult; /* CSD 1.0 , device size multiplier */
uint32 c_size; /* device size */
uint8 r2w_factor;
uint8 wr_blk_len; /* max wtire data block length */
uint8 wr_blk_partial;
uint8 csd_crc;
};
struct rt_mmcsd_io_cfg {
uint32 clock; /* clock rate */
uint16 vdd;
/* vdd stores the bit number of the selected voltage range from below. */
uint8 bus_mode; /* command output mode */
#define MMCSD_BUSMODE_OPENDRAIN 1
#define MMCSD_BUSMODE_PUSHPULL 2
uint8 chip_select; /* SPI chip select */
#define MMCSD_CS_IGNORE 0
#define MMCSD_CS_HIGH 1
#define MMCSD_CS_LOW 2
uint8 power_mode; /* power supply mode */
#define MMCSD_POWER_OFF 0
#define MMCSD_POWER_UP 1
#define MMCSD_POWER_ON 2
uint8 bus_width; /* data bus width */
#define MMCSD_BUS_WIDTH_1 0
#define MMCSD_BUS_WIDTH_4 2
#define MMCSD_BUS_WIDTH_8 3
uint8 self_adaption_flag : 2,
delay_flag : 1,
dat_overflow_stop_flag : 1,
delay_chain_cnt : 4;
#define MMCSD_SMP_SUCC 2
#define MMCSD_SMP_EN 1
#define MMCSD_SMP_DIS 0
uint8 cmd_crc_sample;
uint8 dat_crc_sample;
uint8 crc_sample_max;
TYPE_LL_SDHC_SMP_CFG smp_type;
TYPE_LL_SDHC_IOCTRL ioctl_type;
TYPE_LL_SDHC_DELAY_SYSCLK delay_type;
};
struct rt_mmcsd_cmd {
uint32 cmd_code;
uint32 arg;
uint32 resp[4];
uint32 flags;
#define MMC_RSP_PRESENT (1 << 0)
#define MMC_RSP_136 (1 << 1) /* 136 bit response */
#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
#define MMC_CMD_MASK (3 << 5) /* non-SPI command type */
#define MMC_CMD_AC (0 << 5)
#define MMC_CMD_ADTC (1 << 5)
#define MMC_CMD_BC (2 << 5)
#define MMC_CMD_BCR (3 << 5)
#define MMC_RSP_SPI_S1 (1 << 7) /* one status byte */
#define MMC_RSP_SPI_S2 (1 << 8) /* second byte */
#define MMC_RSP_SPI_B4 (1 << 9) /* four data bytes */
#define MMC_RSP_SPI_BUSY (1 << 10) /* card may send busy */
/*
* These are the native response types, and correspond to valid bit
* patterns of the above flags. One additional valid pattern
* is all zeros, which means we don't expect a response.
*/
#define MMC_RSP_NONE (0)
#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
#define MMC_RSP_R1B (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)
#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136/*|MMC_RSP_CRC*/)
#define MMC_RSP_R3 (MMC_RSP_PRESENT)
#define MMC_RSP_R4 (MMC_RSP_PRESENT)
#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
/* Can be used by core to poll after switch to MMC HS mode */
#define MMC_RSP_R1_NO_CRC (MMC_RSP_PRESENT|MMC_RSP_OPCODE)
#define mmc_resp_type(cmd) ((cmd)->flags & (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY|MMC_RSP_OPCODE))
/*
* These are the SPI response types for MMC, SD, and SDIO cards.
* Commands return R1, with maybe more info. Zero is an error type;
* callers must always provide the appropriate MMC_RSP_SPI_Rx flags.
*/
#define MMC_RSP_SPI_R1 (MMC_RSP_SPI_S1)
#define MMC_RSP_SPI_R1B (MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY)
#define MMC_RSP_SPI_R2 (MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
#define MMC_RSP_SPI_R3 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
#define MMC_RSP_SPI_R4 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
#define MMC_RSP_SPI_R5 (MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
#define MMC_RSP_SPI_R7 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
#define mmc_spi_resp_type(cmd) ((cmd)->flags & \
(MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY|MMC_RSP_SPI_S2|MMC_RSP_SPI_B4))
/*rsponse types
*bits:0~4
*/
#define RESP_MASK (0x1F)
#define RESP_NONE (MMC_RSP_NONE)
#define RESP_R1 (MMC_RSP_R1)
#define RESP_R1B (MMC_RSP_R1B)
#define RESP_R2 (MMC_RSP_R2)
#define RESP_R3 (MMC_RSP_R3)
#define RESP_R4 (MMC_RSP_R4)
#define RESP_R6 (MMC_RSP_R6)
#define RESP_R7 (MMC_RSP_R7)
#define RESP_R5 (MMC_RSP_R5) /*SDIO command response type*/
/*command types
*bits:5~6
*/
#define CMD_MASK (3 << 5) /* command type */
#define CMD_AC (0 << 5)
#define CMD_ADTC (1 << 5)
#define CMD_BC (2 << 5)
#define CMD_BCR (3 << 5)
#define resp_type(cmd) ((cmd)->flags & RESP_MASK)
/*spi rsponse types
*bits:7~10
*/
#define RESP_SPI_MASK (0xF << 7)
#define RESP_SPI_R1 (MMC_RSP_SPI_R1)
#define RESP_SPI_R1B (MMC_RSP_SPI_R1B)
#define RESP_SPI_R2 (MMC_RSP_SPI_R2)
#define RESP_SPI_R3 (MMC_RSP_SPI_R3)
#define RESP_SPI_R4 (MMC_RSP_SPI_R4)
#define RESP_SPI_R5 (MMC_RSP_SPI_R5)
#define RESP_SPI_R7 (MMC_RSP_SPI_R7)
#define spi_resp_type(cmd) ((cmd)->flags & RESP_SPI_MASK)
/*
* These are the command types.
*/
#define cmd_type(cmd) ((cmd)->flags & CMD_MASK)
int32_t err;
};
typedef enum
{
LL_SDHC_IROF, //Input Rising Ouput Falling for sd ms
LL_SDHC_IROR, //Input Rising Ouput Rising for sd Hi-speed
//E_IFOF, //Input Falling Ouput Falling for ms Hi-speed
//E_IFOR
} TYPE_LL_SDHC_IOE;
typedef enum
{
LL_SDHC_DAT_1BIT,
LL_SDHC_DAT_4BIT,
} TYPE_LL_SDHC_DAT_WIDTH;
typedef enum
{
SD_IDLE,
SD_M_W, //Input Rising Ouput Falling for sd ms
SD_M_R, //Input Rising Ouput Rising for sd Hi-speed
//E_IFOF, //Input Falling Ouput Falling for ms Hi-speed
//E_IFOR
SD_OFF,
} SDHOST_OPT;
typedef struct __ll_sdhc_cfg {
uint32 bus_clk;
TYPE_LL_SDHC_IOE ioe;
TYPE_LL_SDHC_DAT_WIDTH width;
} TYPE_LL_SDHC_CFG;
struct rt_mmcsd_data {
uint32 blksize;
uint32 blks;
int32 err;
uint32 flags;
#define DATA_DIR_WRITE (1 << 0)
#define DATA_DIR_READ (1 << 1)
#define DATA_STREAM (1 << 2)
uint32 timeout_ns;
uint32 timeout_clks;
uint8 *buf;
};
struct rt_sd_scr {
uint8 sd_version;
uint8 sd_bus_widths;
};
struct sdh_device {
struct dev_obj dev;
uint32 *cfg_backup;
void *private_data;
struct os_task state_task;
struct os_semaphore dat_sema;
struct os_mutex lock;
#ifdef CONFIG_SLEEP
struct os_mutex bp_suspend_lock;
struct os_mutex bp_resume_lock;
#endif
uint32 freq_min;
uint32 freq_max;
uint32 valid_ocr; /* current valid OCR */
struct rt_mmcsd_io_cfg io_cfg;
struct rt_mmcsd_data data;
struct rt_sd_scr scr;
#define VDD_165_195 (1 << 7) /* VDD voltage 1.65 - 1.95 */
#define VDD_20_21 (1 << 8) /* VDD voltage 2.0 ~ 2.1 */
#define VDD_21_22 (1 << 9) /* VDD voltage 2.1 ~ 2.2 */
#define VDD_22_23 (1 << 10) /* VDD voltage 2.2 ~ 2.3 */
#define VDD_23_24 (1 << 11) /* VDD voltage 2.3 ~ 2.4 */
#define VDD_24_25 (1 << 12) /* VDD voltage 2.4 ~ 2.5 */
#define VDD_25_26 (1 << 13) /* VDD voltage 2.5 ~ 2.6 */
#define VDD_26_27 (1 << 14) /* VDD voltage 2.6 ~ 2.7 */
#define VDD_27_28 (1 << 15) /* VDD voltage 2.7 ~ 2.8 */
#define VDD_28_29 (1 << 16) /* VDD voltage 2.8 ~ 2.9 */
#define VDD_29_30 (1 << 17) /* VDD voltage 2.9 ~ 3.0 */
#define VDD_30_31 (1 << 18) /* VDD voltage 3.0 ~ 3.1 */
#define VDD_31_32 (1 << 19) /* VDD voltage 3.1 ~ 3.2 */
#define VDD_32_33 (1 << 20) /* VDD voltage 3.2 ~ 3.3 */
#define VDD_33_34 (1 << 21) /* VDD voltage 3.3 ~ 3.4 */
#define VDD_34_35 (1 << 22) /* VDD voltage 3.4 ~ 3.5 */
#define VDD_35_36 (1 << 23) /* VDD voltage 3.5 ~ 3.6 */
uint32 flags; /* define device capabilities */
#define MMCSD_BUSWIDTH_4 (1 << 0)
#define MMCSD_BUSWIDTH_8 (1 << 1)
#define MMCSD_MUTBLKWRITE (1 << 2)
#define MMCSD_HOST_IS_SPI (1 << 3)
#define controller_is_spi(host) (host->flags & MMCSD_HOST_IS_SPI)
#define MMCSD_SUP_SDIO_IRQ (1 << 4) /* support signal pending SDIO IRQs */
#define MMCSD_SUP_HIGHSPEED (1 << 5) /* support high speed */
uint32 max_seg_size; /* maximum size of one dma segment */
uint32 max_dma_segs; /* maximum number of dma segments in one request */
uint32 max_blk_size; /* maximum block size */
uint32 max_blk_count; /* maximum block count */
uint32 new_lba;
struct rt_mmcsd_csd csd;
uint32 rca; /* card addr */
uint32 resp_cid[4]; /* card CID register */
uint32 resp_csd[4]; /* card CSD register */
uint32 resp_scr[2]; /* card SCR register */
uint16 tacc_clks; /* data access time by ns */
uint32 tacc_ns; /* data access time by clk cycles */
uint32 max_data_rate; /* max data transfer rate */
uint32 card_capacity; /* card capacity, unit:KB */
uint32 card_blksize; /* card block size */
uint32 card_max_blk_num; /*card block max number*/
uint32 erase_size; /* erase size in sectors */
uint32 cardflags;
#define CARD_FLAG_HIGHSPEED (1 << 0) /* SDIO bus speed 50MHz */
#define CARD_FLAG_SDHC (1 << 1) /* SDHC card */
#define CARD_FLAG_SDXC (1 << 2) /* SDXC card */
uint8 *sd_read_sample_value;
uint8 *sd_write_sample_value;
uint8 *sd_cmd_sample_value;
uint8 sd_8clk_open : 1, sd_8clk_default : 1, sd_read_retry_flag : 1, sd_write_retry_flag : 1, sd_cmd_retry_flag : 1, sd_stop : 1, single_support : 1, reserved : 1;
uint8 sd_opt;
uint8 sd_clk_io;
uint8 sd_mode_type;
uint8 sd_cmd_sample;
uint8 sd_write_sample;
uint8 sd_read_sample;
uint8 spi_delay_cycle;
uint8 write_crc_pending;
uint8 sd_read_dly_chain;
uint8 sd_write_dly_chain;
uint8 sd_write_retry;
uint8 sd_read_retry;
uint8 sd_write_sample_num;
uint8 sd_read_sample_num ;
uint8 sd_cmd_sample_num ;
uint16 card_type;
uint16 spi_mode_baud;
uint32 init_clk;
uint32 write_last_time_retry;
uint32 read_last_time_retry;
uint16 clk_io_type;
uint16 reserved1;
uint8 opt_timeout; // seconds
uint8 cmd12_timeout; // *100 millisconds
uint8 busy_filter_cnt;
};
struct sdhc_hal_ops{
struct devobj_ops ops;
int32 (*open)(struct sdh_device *sdhost,uint8 bus_w, uint8 mode_type);
int32 (*close)(struct sdh_device *sdhost);
int32 (*iocfg)(struct sdh_device *sdhost,struct rt_mmcsd_io_cfg *io_cfg);
int32 (*cmd)(struct sdh_device *sdhost,struct rt_mmcsd_cmd *cmd);
int32 (*write)(struct sdh_device *sdhost,uint8* buf);
int32 (*read)(struct sdh_device *sdhost,uint8* buf);
int32 (*complete)(struct sdh_device *sdhost);
};
struct hgsdh {
struct sdh_device dev;
//struct hgsdh_hw *hw;
uint32 hw;
uint32 irq_data;
uint32 irq_num;
uint32 opened : 1,
dsleep : 1;
};
#define LL_SDHC_DAT_WIDTH_1BIT (0x0UL << 2)
#define LL_SDHC_DAT_WIDTH_4BIT (0x1UL << 2)
#define LL_SDHC_CLK_OUT_EN (0x1UL << 1)
#define LL_SDHC_EN (0x1UL << 0)
#define LL_SDHC_8CLK_BEFORE_EN (0x1UL << 31)
#define LL_SDHC_DAT_CRC_ERR (0x1UL << 22)
#define LL_SDHC_RSP_TIMEOUT (0x1UL << 21)
#define LL_SDHC_D0_BUSY (0x1UL << 20)
#define LL_SDHC_CRC_STA (0x7UL << 16)
#define LL_SDHC_CMD_INTR_EN (0x1UL << 15)
#define LL_SDHC_DAT_INTR_EN (0x1UL << 14)
#define LL_SDHC_CMD_DONE (0x1UL << 13)
#define LL_SDHC_DAT_DONE (0x1UL << 12)
#define LL_SDHC_CMD_DONE_CLR (0x1UL << 11)
#define LL_SDHC_DAT_DONE_CLR (0x1UL << 10)
#define LL_SDHC_8CLK_AFTER_EN (0x1UL << 9)
#define LL_SDHC_ODAT_FAILING_EDGE (0x0UL << 8)
#define LL_SDHC_ODAT_RISING_EDGE (0x1UL << 8)
#define LL_SDHC_RSP_CRC_ERR (0x1UL << 23)
#define LL_SDHC_CMD_RESP_NONE (0x2UL << 5) /* no resp, busy wait */
#define LL_SDHC_CMD_RESP_R1 (0x1UL << 5) /* 6byte resp */
#define LL_SDHC_CMD_RESP_R1B (0x5UL << 5) /* 6byte resp, busy wait */
#define LL_SDHC_CMD_RESP_R2 (0x3UL << 5) /* 17byte resp */
#define LL_SDHC_CMD_RESP_R3 (0x1UL << 5) /* 6byte resp */
#define LL_SDHC_CMD_RESP_R4 (0x1UL << 5) /* 6byte resp */
#define LL_SDHC_CMD_RESP_R5 (0x1UL << 5) /* 6byte resp */
#define LL_SDHC_CMD_RESP_R6 (0x1UL << 5) /* 6byte resp */
#define LL_SDHC_CMD_RESP_R7 (0x1UL << 5) /* 6byte resp */
#define LL_SDHC_CMD_RESP_MSK (0x7UL << 5)
#define LL_SDHC_DAT_OVERFLOW_STOP_EN (0X1UL << 10)
#define LL_SDHC_DAT_SMP_EN (0X1UL << 9)
#define LL_SDHC_CMD_SMP_EN (0X1UL << 8)
#define LL_SDHC_DELAY_WHOLE_SYSCLK (0X1UL << 7)
#define LL_SDHC_DELAY_HALF_SYSCLK (0X1UL << 6)
#define LL_SDHC_DELAY_CHAIN_EN (0X1UL << 5)
#define LL_SDHC_DAT_SMP_SET(n) ((n) << 16)
#define LL_SDHC_CMD_SMP_SET(n) ((n))
/* class 1 */
#define GO_IDLE_STATE 0 /* bc */
#define SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
#define ALL_SEND_CID 2 /* bcr R2 */
#define SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
#define SET_DSR 4 /* bc [31:16] RCA */
#define SWITCH 6 /* ac [31:0] See below R1b */
#define SELECT_CARD 7 /* ac [31:16] RCA R1 */
#define SEND_EXT_CSD 8 /* adtc R1 */
#define SEND_CSD 9 /* ac [31:16] RCA R2 */
#define SEND_CID 10 /* ac [31:16] RCA R2 */
#define READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
#define STOP_TRANSMISSION 12 /* ac R1b */
#define SEND_STATUS 13 /* ac [31:16] RCA R1 */
#define GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
#define SPI_READ_OCR 58 /* spi spi_R3 */
#define SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */
/* class 2 */
#define SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
#define READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
#define READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
/* class 3 */
#define WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
/* class 4 */
#define SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
#define WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
#define WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
#define PROGRAM_CID 26 /* adtc R1 */
#define PROGRAM_CSD 27 /* adtc R1 */
/* class 6 */
#define SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
#define CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
#define SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
/* class 5 */
#define ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
#define ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
#define ERASE 38 /* ac R1b */
/* class 9 */
#define FAST_IO 39 /* ac <Complex> R4 */
#define GO_IRQ_STATE 40 /* bcr R5 */
/* class 7 */
#define LOCK_UNLOCK 42 /* adtc R1b */
/* class 8 */
#define APP_CMD 55 /* ac [31:16] RCA R1 */
#define GEN_CMD 56 /* adtc [0] RD/WR R1 */
#define MMC_QUE_TASK_PARAMS 44 /* ac [20:16] task id R1 */
#define MMC_QUE_TASK_ADDR 45 /* ac [31:0] data addr R1 */
#define MMC_EXECUTE_READ_TASK 46 /* adtc [20:16] task id R1 */
#define MMC_EXECUTE_WRITE_TASK 47 /* adtc [20:16] task id R1 */
#define MMC_CMDQ_TASK_MGMT 48 /* ac [20:16] task id R1b */
/* SD commands type argument response */
/* class 0 */
/* This is basically the same command as for MMC with some quirks. */
#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */
/* class 10 */
#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
/* Application commands */
#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */
#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
#define SD_APP_SEND_SCR 51 /* adtc R1 */
#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00 */
/* SDIO commands type argument response */
#define SD_IO_SEND_OP_COND 5 /* bcr [23:0] OCR R4 */
#define SD_IO_RW_DIRECT 52 /* ac [31:0] See below R5 */
#define SD_IO_RW_EXTENDED 53 /* adtc [31:0] See below R5 */
/* CMD52 arguments */
#define SDIO_ARG_CMD52_READ (0<<31)
#define SDIO_ARG_CMD52_WRITE (1u<<31)
#define SDIO_ARG_CMD52_FUNC_SHIFT 28
#define SDIO_ARG_CMD52_FUNC_MASK 0x7
#define SDIO_ARG_CMD52_RAW_FLAG (1u<<27)
#define SDIO_ARG_CMD52_REG_SHIFT 9
#define SDIO_ARG_CMD52_REG_MASK 0x1ffff
#define SDIO_ARG_CMD52_DATA_SHIFT 0
#define SDIO_ARG_CMD52_DATA_MASK 0xff
#define SDIO_R5_DATA(resp) ((resp)[0] & 0xff)
/* CMD53 arguments */
#define SDIO_ARG_CMD53_READ (0<<31)
#define SDIO_ARG_CMD53_WRITE (1u<<31)
#define SDIO_ARG_CMD53_FUNC_SHIFT 28
#define SDIO_ARG_CMD53_FUNC_MASK 0x7
#define SDIO_ARG_CMD53_BLOCK_MODE (1u<<27)
#define SDIO_ARG_CMD53_INCREMENT (1u<<26)
#define SDIO_ARG_CMD53_REG_SHIFT 9
#define SDIO_ARG_CMD53_REG_MASK 0x1ffff
#define SDIO_ARG_CMD53_LENGTH_SHIFT 0
#define SDIO_ARG_CMD53_LENGTH_MASK 0x1ff
#define SDIO_ARG_CMD53_LENGTH_MAX 511
#define CARD_TYPE_MMC 0 /* MMC card */
#define CARD_TYPE_SD 1 /* SD card */
#define CARD_TYPE_SDIO 2 /* SDIO card */
#define CARD_TYPE_SDIO_COMBO 3 /* SD combo (IO+mem) card */
#define LL_SDHC_DAT_RCV (0x1UL << 3)
#define LL_SDHC_DAT_SEND (0x2UL << 3)
#define LL_SDHC_DAT_SEND_WAIT_BUSY (0x3UL << 3)
#define LL_SDHC_DAT_RW_MSK (0x3UL << 3)
#define SD_SCR_BUS_WIDTH_1 (1 << 0)
#define SD_SCR_BUS_WIDTH_4 (1 << 2)
#define CARD_BUSY 0x80000000 /* Card Power up status bit */
#define SECTOR_SIZE 512
#define CMD_ISR_EN 0
#define DAT_ISR_EN 1
void hgsdh_attach(uint32 dev_id, struct hgsdh *sdhost);
int sd_multiple_write(struct sdh_device * host,uint32 lba,uint32 len,uint8* buf);
int sd_multiple_read(struct sdh_device * host,uint32 lba,uint32 len,uint8* buf);
uint32 sdhost_init(uint32 clk, uint32 flags);
uint32 sdhost_suspend(struct sdh_device * host);
uint32 sdhost_resume(struct sdh_device * host);
void stop_card();
void sd_open();
uint32 sdhost_deinit_for_sleep();
int usb_sd_scsi_read(uint32 lba, uint32 count, uint8* buf);
int usb_sd_scsi_write(uint32 lba, uint32 count, uint8* buf);
#endif

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#ifndef _HGIC_SKB_H_
#define _HGIC_SKB_H_
#include "lib/skb/skbuff.h"
#include "lib/skb/skbpool.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifdef SKB_TRACE
#define alloc_rx_skb(s) _alloc_rx_skb(s, __FUNCTION__, __LINE__)
#define alloc_tx_skb(s) _alloc_tx_skb(s, __FUNCTION__, __LINE__)
#define alloc_skb(s) _alloc_skb(s, __FUNCTION__, __LINE__)
#define skb_copy(s, f) _skb_copy(s, f, __FUNCTION__, __LINE__)
#define skb_clone(s, f) _skb_clone(s, f, __FUNCTION__, __LINE__)
#else
extern struct sk_buff *alloc_rx_skb(uint32 size);
extern struct sk_buff *alloc_tx_skb(uint32 size);
extern struct sk_buff *alloc_skb(uint32 size);
extern struct sk_buff *skb_copy(const struct sk_buff *skb, int32 flags);
extern struct sk_buff *skb_clone(struct sk_buff *skb, int32 flags);
#endif
extern struct sk_buff *_alloc_rx_skb(uint32 size, char *func, int32 line);
extern struct sk_buff *_alloc_tx_skb(uint32 size, char *func, int32 line);
extern struct sk_buff *_alloc_skb(uint32 size, char *func, int32 line);
extern struct sk_buff *_skb_copy(const struct sk_buff *skb, int32 flags, char *func, int32 line);
extern struct sk_buff *_skb_clone(struct sk_buff *skb, int32 flags, char *func, int32 line);
extern void kfree_skb(struct sk_buff *skb);
extern void copy_skb_header(struct sk_buff *n, const struct sk_buff *old);
extern struct sk_buff *alloc_heapskb(uint32 size);
#ifdef __cplusplus
}
#endif
#endif

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#ifndef __SKB_LIST_H__
#define __SKB_LIST_H__
#include "lib/skb/skb.h"
#ifdef __cplusplus
extern "C" {
#endif
struct skb_list {
struct sk_buff *next, *prev;
uint32 count;
};
extern int32 skb_list_init(struct skb_list *list);
extern int32 skb_list_destroy(struct skb_list *list);
extern uint32 skb_list_count(struct skb_list *list);
extern int32 skb_list_queue(struct skb_list *list, struct sk_buff *skb);
extern struct sk_buff *skb_list_dequeue(struct skb_list *list);
extern struct sk_buff *skb_list_first(struct skb_list *list);
extern struct sk_buff *skb_list_last(struct skb_list *list);
extern int32 skb_list_unlink(struct sk_buff *skb, struct skb_list *list);
extern int32 skb_list_queue_before(struct skb_list *list, struct sk_buff *next, struct sk_buff *newsk);
extern int32 skb_list_queue_after(struct skb_list *list, struct sk_buff *prev, struct sk_buff *newsk);
extern int32 skb_list_move(struct skb_list *to_list, struct skb_list *from_list);
extern int32 _skb_list_queue(struct skb_list *list, struct sk_buff *skb, char *func, int32 line);
extern struct sk_buff *_skb_list_dequeue(struct skb_list *list, char *func, int32 line);
extern struct sk_buff *_skb_list_first(struct skb_list *list, char *func, int32 line);
extern struct sk_buff *_skb_list_last(struct skb_list *list, char *func, int32 line);
extern int32 _skb_list_unlink(struct sk_buff *skb, struct skb_list *list, char *func, int32 line);
extern int32 _skb_list_queue_before(struct skb_list *list, struct sk_buff *next, struct sk_buff *newsk, char *func, int32 line);
extern int32 _skb_list_queue_after(struct skb_list *list, struct sk_buff *prev, struct sk_buff *newsk, char *func, int32 line);
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _HGIC_SKBPOOL_H_
#define _HGIC_SKBPOOL_H_
#ifdef __cplusplus
extern "C" {
#endif
enum SKBPOOL_FLAGS {
SKBPOOL_FLAGS_MGMTFRM_INHEAP = BIT(0),
SKBPOOL_FLAGS_LEAK_TRACE = BIT(1),
SKBPOOL_FLAGS_OVERFLOW_CHECK = BIT(2),
SKBPOOL_FLAGS_ALIGN_16 = BIT(3),
SKBPOOL_FLAGS_ALIGN_32 = BIT(4),
SKBPOOL_FLAGS_TAIL_ALIGN_4 = BIT(5),
SKBPOOL_FLAGS_TAIL_ALIGN_16 = BIT(6),
SKBPOOL_FLAGS_TAIL_ALIGN_32 = BIT(7),
};
extern uint32 skbpool_time(void);
extern int32 skbpool_init(uint32 start_addr, uint32 end_addr, uint32 max, uint8 flags);
extern uint32 skbpool_freesize(int8 tx);
extern uint32 skbpool_tx_used(void);
extern uint32 skbpool_rx_used(void);
extern int32 skbpool_collect_init(void);
extern int32 skbpool_totalsize(void);
extern void skbpool_status(uint32 *status_buf, uint32 size, uint32 mini_size);
extern int32 skbpool_max_usage(uint8 tx_max, uint8 rx_max);
extern int32 skbpool_add_region(uint32 start_addr, uint32 end_addr);
#ifdef __cplusplus
}
#endif
#endif

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#ifndef _HGIC_SKBUFF_H_
#define _HGIC_SKBUFF_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <osal/atomic.h>
#include <osal/string.h>
#include "list.h"
struct sk_buff {
struct sk_buff *next, *prev, *clone;
uint8 cb[12];
uint8 *tail;
uint8 *data;
uint8 *head;
uint8 *end;
/* clear below flags when skb free */
uint16 len;
uint16 priority:4, acked: 1, cloned: 1, lmaced: 1, pkt_type: 3, tx: 1, src_in: 1, unreachable:1, rev:3;
uint64 lifetime;
void *txinfo;
void *sta;
/////////////////////////////////////
atomic_t users;
void (*free)(void *free_priv, struct sk_buff *skb);
void *free_priv;
};
uint8 *skb_put(struct sk_buff *skb, uint32 len);
uint8 *skb_push(struct sk_buff *skb, uint32 len);
uint8 *skb_pull(struct sk_buff *skb, uint32 len);
void skb_reserve(struct sk_buff *skb, int len);
static inline int skb_tailroom(const struct sk_buff *skb)
{
return (skb->end - skb->tail);
}
static inline unsigned int skb_headroom(const struct sk_buff *skb)
{
return skb->data - skb->head;
}
static inline int skb_dataroom(const struct sk_buff *skb)
{
return (skb->end - skb->data);
}
static inline struct sk_buff *skb_get(struct sk_buff *skb)
{
atomic_inc(&skb->users);
return skb;
}
void *skb_put_zero(struct sk_buff *skb, unsigned int len);
void *skb_put_data(struct sk_buff *skb, const void *data, unsigned int len);
#ifdef __cplusplus
}
#endif
#endif

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/*
* Generic binary BCH encoding/decoding library
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 51
* Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Copyright © 2011 Parrot S.A.
*
* Author: Ivan Djelic <ivan.djelic@parrot.com>
*
* Description:
*
* This library provides runtime configurable encoding/decoding of binary
* Bose-Chaudhuri-Hocquenghem (BCH) codes.
*/
#ifndef _BCH_H
#define _BCH_H
#include "typesdef.h"
#include "osal/string.h"
/**
* struct bch_control - BCH control structure
* @m: Galois field order
* @n: maximum codeword size in bits (= 2^m-1)
* @t: error correction capability in bits
* @ecc_bits: ecc exact size in bits, i.e. generator polynomial degree (<=m*t)
* @ecc_bytes: ecc max size (m*t bits) in bytes
* @a_pow_tab: Galois field GF(2^m) exponentiation lookup table
* @a_log_tab: Galois field GF(2^m) log lookup table
* @mod8_tab: remainder generator polynomial lookup tables
* @ecc_buf: ecc parity words buffer
* @ecc_buf2: ecc parity words buffer
* @xi_tab: GF(2^m) base for solving degree 2 polynomial roots
* @syn: syndrome buffer
* @cache: log-based polynomial representation buffer
* @elp: error locator polynomial
* @poly_2t: temporary polynomials of degree 2t
*/
struct bch_control {
unsigned int m;
unsigned int n;
unsigned int t;
unsigned int ecc_bits;
unsigned int ecc_bytes;
/* private: */
uint32_t mem_used;
uint16_t *a_pow_tab;
uint16_t *a_log_tab;
uint32_t *mod8_tab;
uint32_t *ecc_buf;
uint32_t *ecc_buf2;
unsigned int *xi_tab;
unsigned int *syn;
int *cache;
struct gf_poly *elp;
struct gf_poly *poly_2t[4];
};
struct bch_control *init_bch(int m, int t, unsigned int prim_poly);
void free_bch(struct bch_control *bch);
void encode_bch(struct bch_control *bch, const uint8_t *data,
unsigned int len, uint8_t *ecc);
int decode_bch(struct bch_control *bch, const uint8_t *data, unsigned int len,
const uint8_t *recv_ecc, const uint8_t *calc_ecc,
const unsigned int *syn, unsigned int *errloc);
#endif /* _BCH_H */

171
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/*
 * Copyright (c) 2022-2024 Macronix International Co. LTD. All rights reserved.
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
#ifndef _BITOPS_H
#define _BITOPS_H
//#include <asm/types.h>
/*
* ffs: find first bit set. This is defined the same way as
* the libc and compiler builtin ffs routines, therefore
* differs in spirit from the above ffz (man ffs).
*/
static inline int generic_ffs(int x)
{
int r = 1;
if (!x)
return 0;
if (!(x & 0xffff)) {
x >>= 16;
r += 16;
}
if (!(x & 0xff)) {
x >>= 8;
r += 8;
}
if (!(x & 0xf)) {
x >>= 4;
r += 4;
}
if (!(x & 3)) {
x >>= 2;
r += 2;
}
if (!(x & 1)) {
x >>= 1;
r += 1;
}
return r;
}
/**
* fls - find last (most-significant) bit set
* @x: the word to search
*
* This is defined the same way as ffs.
* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
*/
static inline int generic_fls(int x)
{
int r = 32;
if (!x)
return 0;
if (!(x & 0xffff0000u)) {
x <<= 16;
r -= 16;
}
if (!(x & 0xff000000u)) {
x <<= 8;
r -= 8;
}
if (!(x & 0xf0000000u)) {
x <<= 4;
r -= 4;
}
if (!(x & 0xc0000000u)) {
x <<= 2;
r -= 2;
}
if (!(x & 0x80000000u)) {
x <<= 1;
r -= 1;
}
return r;
}
/*
* hweightN: returns the hamming weight (i.e. the number
* of bits set) of a N-bit word
*/
static inline unsigned int generic_hweight32(unsigned int w)
{
unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
}
static inline unsigned int generic_hweight16(unsigned int w)
{
unsigned int res = (w & 0x5555) + ((w >> 1) & 0x5555);
res = (res & 0x3333) + ((res >> 2) & 0x3333);
res = (res & 0x0F0F) + ((res >> 4) & 0x0F0F);
return (res & 0x00FF) + ((res >> 8) & 0x00FF);
}
static inline unsigned int generic_hweight8(unsigned int w)
{
unsigned int res = (w & 0x55) + ((w >> 1) & 0x55);
res = (res & 0x33) + ((res >> 2) & 0x33);
return (res & 0x0F) + ((res >> 4) & 0x0F);
}
//#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
//#define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
//#include <asm/bitops.h>
/* linux/include/asm-generic/bitops/non-atomic.h */
#ifndef PLATFORM__SET_BIT
# define __set_bit generic_set_bit
#endif
#ifndef PLATFORM__CLEAR_BIT
# define __clear_bit generic_clear_bit
#endif
#ifndef PLATFORM_FFS
# define ffs generic_ffs
#endif
#ifndef PLATFORM_FLS
# define fls generic_fls
#endif
/**
* __set_bit - Set a bit in memory
* @nr: the bit to set
* @addr: the address to start counting from
*
* Unlike set_bit(), this function is non-atomic and may be reordered.
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
//static inline void generic_set_bit(int nr, volatile unsigned long *addr)
//{
// unsigned long mask = BIT_MASK(nr);
// unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
//
// *p |= mask;
//}
//
//static inline void generic_clear_bit(int nr, volatile unsigned long *addr)
//{
// unsigned long mask = BIT_MASK(nr);
// unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
//
// *p &= ~mask;
//}
#endif

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/*
* Copyright (C) 2026 ChuangDian, Xu
*
* Author: ChuangDian, Xu <xcdanswer@gmail.com>
*/
#ifndef __NAND_H__
#define __NAND_H__
#include "typesdef.h"
#include "dev.h"
#include "osal/mutex.h"
#define NAND_MAX_CHIPS 5
#define DEV_REG_CNT (4)
#define NAND_MAX_BLOCKS 32768 /**< Max number of Blocks */
#define NAND_MAX_PAGE_SIZE 2048 /**< Max page size of NAND flash */
#define NAND_MAX_OOB_SIZE 64 /**< Max OOB bytes of a NAND flash page */
#define NAND_ECC_SIZE 256 /**< ECC block size */
#define NAND_ECC_BYTES 2 /**< ECC bytes per ECC block */
#define NAND_ERASE_FAIL 0x01
#define NAND_PROGRAM_FAIL 0x02
#define NAND_ECC_ERROR 0X04
struct NandOobFree {
uint32_t Offset;
uint32_t Length;
};
/*
* ECC layout control structure. Exported to user space for
* diagnosis and to allow creation of raw images
*/
struct NandEccLayout {
uint32_t EccBytes;
uint32_t EccPos;
uint32_t OobAvail;
struct NandOobFree OobFree;
};
/*
* This enum contains ECC Mode
*/
typedef enum {
NAND_ECC_NONE,
NAND_ECC_SOFT_BCH,
NAND_ECC_ONDIE /**< On-Die ECC */
} Nand_EccMode;
struct NandEccCtrl {
Nand_EccMode Mode;
uint32_t EccSteps; /**< Number of ECC steps for the flash page */
uint32_t EccSize; /**< ECC size */
uint32_t EccBytes; /**< Number of ECC bytes for a block */
uint32_t EccTotalBytes; /**< Total number of ECC bytes for Page */
uint32_t Strength;
struct NandEccLayout *Layout;
void *Priv;
};
struct NandBuffers {
uint8_t DataBuf[NAND_MAX_PAGE_SIZE];
uint8_t EccCode[NAND_MAX_OOB_SIZE]; /**< Buffer for stored ECC */
uint8_t EccCalc[NAND_MAX_OOB_SIZE]; /**< Buffer for calculated ECC */
uint32_t Rcache;
};
enum nand_ctl_cmd {
NAND_OP_RD_SET,
NAND_OP_WR_SET,
NAND_FREQ_SET,
NAND_IS_BAD_BLOCK,
NAND_READ_OOB,
NAND_WRITE_OOB,
NAND_ECC_STATUS,
NAND_STATUS,
NAND_N_OF_BLKS,
NAND_PG2PG_PAGE,
};
enum nand_req_type {
NAND_READ_PAGE_REQ,
NAND_READ_PAGE_COL_REQ,
NAND_WRITE_PAGE_REQ,
NAND_ERASE_REQ,
NAND_PG2PG_REQ,
NAND_STATUS_REQ,
};
struct nand_req {
uint32 type;
union {
struct _pc {
uint32 page;
uint32 col;
} pc;
struct _p2p {
uint32 src;
uint32 dst;
} p2p;
uint32 page;
uint32 blk;
uint32 ret;
};
uint8 *buf;
uint32 len;
};
struct nand_dev;
struct nand_ops {
int (*init)(struct nand_dev *nd);
int (*rdpg)(struct nand_dev *nd, uint32 page, uint8 *buf, uint32 len);
int (*wrpg)(struct nand_dev *nd, uint32 page, uint8 *buf, uint32 len);
int (*erase)(struct nand_dev *nd, uint32 blk);
int (*ctl)(struct nand_dev *nd, uint32 cmd, uint32 param1, uint32 param2);
};
struct nand_dev {
struct dev_obj dev;
struct spi_nand *sn;
struct nand_ops *ops;
uint8_t *bbt;
uint32_t rd_ofs;
uint32_t status;
int (*pg_rd)(struct nand_dev *nd, uint32 page, uint8 *buf, uint32 len);
int (*pg_wr)(struct nand_dev *nd, uint32 page, uint8 *buf, uint32 len);
struct os_mutex mutex;
uint32_t \
ofs_shift_block : 8,
ofs_shift_page : 8,
ofs_shift_oob : 8,
page_shift_block: 8;
struct NandEccCtrl EccCtrl; /**< ECC configuration parameters */
struct NandBuffers *Buffers;
};
int nand_init(struct nand_dev *nand);
int nand_req(struct nand_dev *nd, struct nand_req *req);
uint8_t bbt_is_bad(struct nand_dev *nand, int block);
void bbt_mark_entry(struct nand_dev *nand, int block);
int nand_dev_register(uint16 dev_id, struct nand_dev *nand);
#endif

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/*
 * Copyright (c) 2022-2024 Macronix International Co. LTD. All rights reserved.
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
#ifndef NAND_BCH_H__
#define NAND_BCH_H__
#include "lib/spi_nand/spi_nand.h"
#include "lib/spi_nand/bitops.h"
struct nand_bch_control;
#define CONFIG_NAND_ECC_BCH
static inline int mtd_nand_has_bch(void) { return 1; }
/*
* Calculate BCH ecc code
*/
int nand_bch_calculate_ecc(struct nand_dev *nand, const unsigned char *dat,
unsigned char *ecc_code);
/*
* Detect and correct bit errors
*/
int nand_bch_correct_data(struct nand_dev *nand, unsigned char *dat, unsigned char *read_ecc,
unsigned char *calc_ecc);
/*
* Initialize BCH encoder/decoder
*/
struct nand_bch_control *
nand_bch_init(struct nand_dev *nand, unsigned int eccsize,
unsigned int eccbytes, struct NandEccLayout **ecclayout);
/*
* Release BCH encoder/decoder resources
*/
void nand_bch_free(struct nand_bch_control *nbc);
int nand_read_ecc(struct nand_dev *nand, uint32_t page, uint8_t *buf, uint32_t len);
int nand_read_ondie(struct nand_dev *nand, uint32_t page, uint8_t *buf, uint32_t len);
int nand_write_ecc(struct nand_dev *nand, uint32_t page, uint8_t *buf, uint32_t len);
int nand_write_ondie(struct nand_dev *nand, uint32_t page, uint8_t *buf, uint32_t len);
/*
* Function: Nand_Ecc_Init
* Arguments: chip, pointer to an mxchip structure of SPI NAND device.
* EccMode, ECC mode.
* Return Value: RET_OK.
* RET_ERR.
* Description: This function initializes the software variables related
* to ECC generation, ECC checking and writing ECC Bytes in spare Bytes.
*/
int Nand_Ecc_Init(struct nand_dev *nd, uint32_t EccMode);
#endif /* __MTD_NAND_BCH_H__ */

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sdk/include/lib/spi_nand/spi_mem.h Normal file
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#ifndef __SPI_MEM_H__
#define __SPI_MEM_H__
#include "typesdef.h"
#include "list.h"
#include "errno.h"
#include "dev.h"
#include "devid.h"
#include "hal/spi.h"
#include "osal/mutex.h"
#define NAND_PRINT_EN 1
#if (NAND_PRINT_EN)
#define NAND_PRINT(fmt, args...) printf(fmt, ##args)
#else
#define NAND_PRINT(...)
#endif
enum spi_mem_line {
OP_ADR_DAT_111,
OP_ADR_DAT_112,
OP_ADR_DAT_114,
OP_ADR_DAT_118,
OP_ADR_DAT_122,
OP_ADR_DAT_144,
OP_ADR_DAT_188,
OP_ADR_DAT_222,
OP_ADR_DAT_444,
OP_ADR_DAT_888,
};
enum spi_mem_dir {
SPI_MEM_OP_NO_DATA,
SPI_MEM_OP_DATA_IN,
SPI_MEM_OP_DATA_OUT,
};
#define SPI_MEM_OP_DETAIL(_naddr, _ndummy, _line, _dir) \
{.naddr = _naddr, .ndummy = _ndummy, .line = _line, .dir = _dir}
#define SPI_MEM_OP_BASIC(_cmd, _detail, _addr, _data) \
{.cmd = _cmd, .detail = _detail, .addr = _addr, .buf = _data}
struct spi_mem_op_detail {
uint16 naddr : 4,
ndummy : 4,
line : 4,
dir : 4;
};
struct spi_mem_op {
uint16 cmd;
struct spi_mem_op_detail detail;
uint32 addr;
uint8 *buf;
uint32 len;
};
struct spic {
struct spi_device *spi;
unsigned int spi_devid;
unsigned int freq;
unsigned int work_mode;
unsigned int wire_mode;
unsigned int clk_mode;
unsigned int ntarget;
unsigned int cur_cs;
};
struct spi_mem {
struct spic spic;
int (*exec)(struct spi_mem *mem, struct spi_mem_op *op);
int (*target)(struct spi_mem *mem, uint32 cs);
};
int spi_mem_init(struct spi_mem *sm);
#endif

102
sdk/include/lib/spi_nand/spi_nand.h Normal file
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/*
* Copyright (C) 2026 ChuangDian, Xu
*
* Author: ChuangDian, Xu <xcdanswer@gmail.com>
*/
#ifndef __NAND_CHIP_H__
#define __NAND_CHIP_H__
#include "typesdef.h"
#include "lib/spi_nand/nand.h"
#include "lib/spi_nand/spi_mem.h"
#define SPI_NAND_CMD_ONLY(__cmd) \
SPI_MEM_OP_BASIC(__cmd, SPI_MEM_OP_DETAIL(0, 0, OP_ADR_DAT_111, SPI_MEM_OP_NO_DATA), 0, 0)
#define SPI_NAND_WITHOUT_DATA30(__cmd, __addr, __line) \
SPI_MEM_OP_BASIC(__cmd, SPI_MEM_OP_DETAIL(3, 0, __line, SPI_MEM_OP_NO_DATA), __addr, 0)
#define SPI_NAND_WITHOUT_DATA20(__cmd, __addr, __line) \
SPI_MEM_OP_BASIC(__cmd, SPI_MEM_OP_DETAIL(2, 0, __line, SPI_MEM_OP_NO_DATA), __addr, 0)
#define SPI_NAND_READ_REG(__addr, __buf) \
SPI_MEM_OP_BASIC(0x0f, \
SPI_MEM_OP_DETAIL(1, 0, OP_ADR_DAT_111, SPI_MEM_OP_DATA_IN), __addr, __buf)
#define SPI_NAND_WRITE_REG(__addr, __buf) \
SPI_MEM_OP_BASIC(0x1f, \
SPI_MEM_OP_DETAIL(1, 0, OP_ADR_DAT_111, SPI_MEM_OP_DATA_OUT), __addr, __buf)
#define SPI_NAND_IN_WITHOUT_ADDR(__cmd, __dummy, __buf) \
SPI_MEM_OP_BASIC(__cmd, \
SPI_MEM_OP_DETAIL(0, __dummy, OP_ADR_DAT_111, SPI_MEM_OP_DATA_IN), 0, __buf)
#define SPI_NAND_READ_CACHE_OP() \
SPI_MEM_OP_BASIC(0x03, \
SPI_MEM_OP_DETAIL(2, 1, OP_ADR_DAT_111, SPI_MEM_OP_DATA_IN), 0, NULL)
#define SPI_NAND_READ_CACHE_OP114() \
SPI_MEM_OP_BASIC(0x6b, \
SPI_MEM_OP_DETAIL(2, 1, OP_ADR_DAT_114, SPI_MEM_OP_DATA_IN), 0, NULL)
#define SPI_NAND_WRITE_CACHE_OP() \
SPI_MEM_OP_BASIC(0x02, \
SPI_MEM_OP_DETAIL(2, 0, OP_ADR_DAT_111, SPI_MEM_OP_DATA_OUT), 0, NULL)
#define SPI_NAND_WRITE_CACHE_OP114() \
SPI_MEM_OP_BASIC(0x32, \
SPI_MEM_OP_DETAIL(2, 0, OP_ADR_DAT_114, SPI_MEM_OP_DATA_OUT), 0, NULL)
struct spi_nand_info {
uint8 id[4];
uint32 blks;
uint32 pgs_per_blk;
uint32 pg_size;
uint32 oob_size;
};
struct spi_nand {
struct nand_dev nand;
struct spi_nand_info info;
struct spi_mem_op *op_rd_cache;
struct spi_mem_op *op_wr_cache;
/*
page : 2^11
block: 2^17
*/
uint8_t reg_adr[DEV_REG_CNT];
uint8_t reg_ini[DEV_REG_CNT];
struct spi_mem *ctrl;
};
int sn_cmd_only(struct spi_nand *sn, uint8 cmd);
int sn_wren(struct spi_nand *sn);
int sn_wrdi(struct spi_nand *sn);
int sn_rd_reg(struct spi_nand *sn, uint32 addr, uint8 *buf);
int sn_wr_reg(struct spi_nand *sn, uint32 addr, uint8 reg);
int sn_read_jedid(struct spi_nand *sn, uint8 *id);
void sn_read_cache(struct spi_nand *sn, uint32 ofs, uint8 *buf, uint32 len);
void sn_write_cache(struct spi_nand *sn, uint32 ofs, uint8 *buf, uint32 len);
int sn_dump_pg(struct spi_nand *sn, uint32 pg);
int sn_prog_pg(struct spi_nand *sn, uint32 pg);
int sn_erase(struct spi_nand *sn, uint32 blk);
int sn_init(struct spi_nand *sn);
int spi_nand_init(struct nand_dev *nd);
#endif

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#ifndef _HGIC_SYSCFG_H_
#define _HGIC_SYSCFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define SYSCFG_MAGIC (0x1234)
#define SYSCFG_NUM (20)
enum SYSCFG_ERASE_MODE{
SYSCFG_ERASE_MODE_SECTOR,
SYSCFG_ERASE_MODE_BLOCK,
SYSCFG_ERASE_MODE_CHIP,
};
struct syscfg_info {
struct spi_nor_flash *flash1, *flash2;
uint32 addr1, addr2;
uint32 size;
uint8 erase_mode;
};
struct syscfg_state {
uint16 state;
uint16 size;
uint16 offset;
uint16 check;
};
int32 syscfg_init(const char *name, void *cfg, uint32 size);
int32 syscfg_read(const char *name, void *cfg, uint32 size);
int32 syscfg_write(const char *name, void *cfg, uint32 size);
int32 syscfg_info_get(struct syscfg_info *pinfo, const char *name);
void syscfg_loaddef(const char *name);
int32 syscfg_save(void);
#ifdef __cplusplus
}
#endif
#endif

14
sdk/include/lib/touch/cst226se.h Normal file
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#ifndef __CST226SE_H_
#define __CST226SE_H_
#include "basic_include.h"
#include "hal/i2c.h"
#include "app_iic/app_iic.h"
#include "lib/touch/hyn_core.h"
#include "lib/touch/touch_pad.h"
void cst226se_init();
void *cst226se_get_multipoint_xy();
uint32_t cst226se_free_multipoint_xy(void *data);
#endif

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#ifndef __HYN_CORE_H_
#define __HYN_CORE_H_
#include "basic_include.h"
#define HYN_ENTER() os_printf("%s %d\n",__func__,__LINE__)
#define HYN_ERROR(fmt, args...) os_printf(KERN_ERR "[HYN][Error]%s:"fmt"\n",__func__,##args)
#define HYN_INFO(fmt, args...) os_printf(KERN_INFO "[HYN][Info]%s:"fmt"\n",__func__,##args)
#define U8TO16(x1,x2) ((((x1)&0xFF)<<8)|((x2)&0xFF))
#define U8TO32(x1,x2,x3,x4) ((((x1)&0xFF)<<24)|(((x2)&0xFF)<<16)|(((x3)&0xFF)<<8)|((x4)&0xFF))
#define U16REV(x) ((((x)<<8)&0xFF00)|(((x)>>8)&0x00FF))
#undef DISABLE
#undef ENABLE
#define DISABLE (0)
#define ENABLE (1)
enum report_typ{
REPORT_NONE = 0,
REPORT_POS = 0x01,
REPORT_KEY = 0x02,
REPORT_GES = 0x04,
REPORT_PROX = 0x08
};
enum work_mode{
NOMAL_MODE = 0,
GESTURE_MODE = 1,
LP_MODE = 2,
DEEPSLEEP = 3,
DIFF_MODE = 4,
RAWDATA_MODE = 5,
BASELINE_MODE = 6,
CALIBRATE_MODE = 7,
FAC_TEST_MODE = 8,
GLOVE_EXIT = 0x10,
GLOVE_ENTER = 0x11,
CHARGE_EXIT = 0x12,
CHARGE_ENTER = 0x13,
ENTER_BOOT_MODE = 0xCA,
};
#define MAX_POINTS_REPORT (10)
struct ts_frame {
uint8_t rep_num;
enum report_typ report_need;
uint8_t key_id;
uint8_t key_state;
struct {
uint8_t pos_id;
uint8_t event;
uint16_t pos_x;
uint16_t pos_y;
uint16_t pres_z;
}pos_info[MAX_POINTS_REPORT];
};
struct tp_info {
uint8_t fw_sensor_txnum;
uint8_t fw_sensor_rxnum;
uint8_t fw_key_num;
uint8_t reserve;
uint16_t fw_res_y;
uint16_t fw_res_x;
uint32_t fw_boot_time;
uint32_t fw_project_id;
uint32_t fw_chip_type;
uint32_t fw_ver;
uint32_t ic_fw_checksum;
uint32_t fw_module_id;
};
struct hyn_plat_data {
uint32_t x_resolution;
uint32_t y_resolution;
int swap_xy;
int reverse_x;
int reverse_y;
};
struct hyn_ts_data {
struct os_work work;
struct os_event event;
struct os_msgqueue msgque;
int app_iic_num;
int gpio_irq;
uint8_t iic_addr;
enum work_mode work_mode;
struct hyn_plat_data plat_data;
int boot_is_pass;
struct tp_info hw_info;
struct ts_frame rp_buf;
uint8_t gesture_id;
uint8_t *iic_trx_buff;
};
int hyn_wr_reg(struct hyn_ts_data *ts_data, uint32_t reg_addr, uint32_t reg_len, uint8_t *rbuf, uint32_t rlen);
void hyn_irq_set(struct hyn_ts_data *ts_data, uint8_t value);
void hyn_esdcheck_switch(struct hyn_ts_data *ts_data, uint8_t enable);
uint32_t hyn_sum32(int val, uint32_t* buf,uint16_t len);
#endif

32
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#ifndef __TOUCH_PAD_H_
#define __TOUCH_PAD_H_
#include "basic_include.h"
#ifdef PIN_FROM_PARAM
#include "pin_param.h"
#endif
/* ------------ Selection of touch chips ------------ */
#define CST226SE_TOUCH_PAD 1
/* ------------------------------------------------- */
#define MAX_POINT_NUM 5
#undef PIN_TP_I2C_SCL
#undef PIN_TP_I2C_SDA
#undef PIN_TP_INT
#undef PIN_TP_RST
struct touch_multipoint_pos {
uint8_t point_num;
uint16_t pos_x[MAX_POINT_NUM];
uint16_t pos_y[MAX_POINT_NUM];
};
typedef struct touch_multipoint_pos touch_multipoint_pos_t;
touch_multipoint_pos_t *touch_pad_get_multipoint_xy();
uint32_t touch_pad_free_multipoint_xy(touch_multipoint_pos_t *data);
void touch_pad_hareware_init();
#endif

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sdk/include/lib/umac/ieee80211.h Normal file
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#ifndef _HGIC_IEEE80211_H_
#define _HGIC_IEEE80211_H_
#include "lib/lmac/hgic.h"
#ifdef __cplusplus
extern "C" {
#endif
#if defined(CONFIG_SAE) || defined(CONFIG_OWE)
#define CONFIG_ECC
#define sae_dbg(fmt, ...) //os_printf("%s:%d:: __SAE:"fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__)
#else
#define sae_dbg(fmt, ...)
#endif
/* IEEE 802.11r */
#define MOBILITY_DOMAIN_ID_LEN 2
#define FT_R0KH_ID_MAX_LEN 48
#define FT_R1KH_ID_LEN 6
#define WPA_PMK_NAME_LEN 16
#define WPA_KEY_MGMT_PSK BIT(1)
#define WPA_KEY_MGMT_NONE BIT(2)
#define WPA_KEY_MGMT_PSK_SHA256 BIT(8)
#define WPA_KEY_MGMT_SAE BIT(10)
#define WPA_KEY_MGMT_OWE BIT(22)
#define WPA_CIPHER_NONE BIT(0)
#define WPA_CIPHER_TKIP BIT(3)
#define WPA_CIPHER_CCMP BIT(4)
#define WPA_CIPHER_CCMP_256 BIT(9)
#define WPA_PROTO_WPA BIT(0)
#define WPA_PROTO_RSN BIT(1)
enum IEEE80211_BAND {
IEEE80211_BAND_2GHZ,
IEEE80211_BAND_5GHZ,
IEEE80211_BAND_60GHZ,
IEEE80211_BAND_S1GHZ,
NUM_IEEE80211_BANDS,
};
enum ieee80211_hwmode {
IEEE80211_HWMODE_NONE,
IEEE80211_HWMODE_11B, // b only
IEEE80211_HWMODE_11G, // bg mix
IEEE80211_HWMODE_11N, // bgn mix
IEEE80211_HWMODE_11AH, // ah only
};
enum country_code {
COUNTRY_US,
COUNTRY_EU,
COUNTRY_JP,
COUNTRY_CN,
COUNTRY_KR,
COUNTRY_SG,
COUNTRY_AU,
COUNTRY_NZ,
NUM_COUNTRIES,
};
enum ieee80211_event {
IEEE80211_EVENT_PAIR_START = 1, // 1 - start pairing, param1:0, param2:0
IEEE80211_EVENT_PAIR_SUCCESS, // 2 - pairing success, param1: pairing peer's MAC, param2:6
IEEE80211_EVENT_PAIR_FAIL, // 3 - pairing fail. param1:1, param2:2
IEEE80211_EVENT_PAIR_DONE, // 4 - paring complete. param1: pairing peer's MAC, param2:6
IEEE80211_EVENT_SCAN_START, // 5 - start scanning. param1:0, param2:0
IEEE80211_EVENT_SCAN_DONE, // 6 - stop scanning. param1:0, param2:0
IEEE80211_EVENT_CONNECT_START, // 7 - start connect. param1:AP's MAC, param2:0
IEEE80211_EVENT_CONNECTED, // 8 - connect success. param1: AP/STA MAC, param2:0
IEEE80211_EVENT_CONNECT_FAIL, // 9 - connect fail. param1: status code, param2:0
IEEE80211_EVENT_DISCONNECTED, // 10 - disconnect. param1: AP/STA MAC, param2: reason code.
IEEE80211_EVENT_RX_FRAME, // 11 - recieve wifi frames. param1: the pointer of frame, type: uint8 *, param2: rx status, type: struct ieee80211_rx_status *
IEEE80211_EVENT_RSSI, // 12 - RSSI changed. param1: new rssi, param2: sta's MAC.
IEEE80211_EVENT_STATE_CHANGE, // 13 - <ignore>.
IEEE80211_EVENT_NEW_BSS, // 14 - find a new BSS. param1: BSS's bssid, param2: BSS's ssid.
IEEE80211_EVENT_UPDATE_BSS, // 15 - <ignore>.
IEEE80211_EVENT_PS_START, // 16 - <ignore>.
IEEE80211_EVENT_PS_END, // 17 - <ignore>.
IEEE80211_EVENT_STA_PS_START, // 18 - STA enter ps mode. param1: STA's MAC, param2:0
IEEE80211_EVENT_STA_PS_END, // 19 - STA exit ps mode. param1: STA's MAC, param2:0
IEEE80211_EVENT_INTERFACE_ENABLE, // 20 - wifi stack interface enabled. param1:0, param2:0
IEEE80211_EVENT_INTERFACE_DISABLE, // 21 - wifi stack interface disabled. param1:0, param2:0
IEEE80211_EVENT_ADD_CUSTOMER_IE, // 22 - notify to add customer IE data. param1: the pointer of wifi frame, param2:customer IE data, output parameter, type: uint8 **, return value: length of customer IE data.
IEEE80211_EVENT_MAC_CHANGE, // 23 - mac changed. param1: new MAC, param2:0
IEEE80211_EVENT_EVM, // 24 - EVM changed. param1: new evm, param2:sta's MAC.
IEEE80211_EVENT_UNKNOWN_STA, // 25 - <ignore>
IEEE80211_EVENT_PRE_AUTH, // 26 - STA request to AUTH, you can check blacklist. param1: sta's MAC, param2:0
IEEE80211_EVENT_PRE_ASSOC, // 27 - STA request to ASSOC, you can check blacklist. param1: sta's MAC, param2:0
IEEE80211_EVENT_UNPAIR_SUCCESS, // 28 - unpaired. param1: peer sta's MAC, param2:0
IEEE80211_EVENT_TX_BITRATE, // 29 - <ignore>.
IEEE80211_EVENT_EXCEPTION_INFO, // 30 - <ignore>.
IEEE80211_EVENT_ACS_DONE, // 31 - <ignore>.
IEEE80211_EVENT_TX_FRAME, // 32 - events before WiFi stack sends data. param1: wifi frame data, param2: 0, return value: 0:contuine tx, else stop tx.
IEEE80211_EVENT_RX_CUSTMGMT, // 33 - received custom management frame, from the peer sta executed the ieee80211_tx_custmgmt API. param1: struct ieee80211_custmgmt_data *, param2:0.
IEEE80211_EVENT_FT_START, // 34
IEEE80211_EVENT_WRONG_KEY, // 35
IEEE80211_EVENT_CHANNEL_CHANGE, // 36
IEEE80211_EVENT_P2P_NGO_DONE, // 37
IEEE80211_EVENT_WSC_DONE, // 38
IEEE80211_EVENT_TX_STATUS, // 39
IEEE80211_EVENT_P2P_FOUND, // 40
IEEE80211_EVENT_AP_CSA_DONE, // 41
IEEE80211_EVENT_SCAN_IDLE, // 42
IEEE80211_EVENT_GEN_BEACON, // 43
IEEE80211_EVENT_BEACON_IDLE, // 44
IEEE80211_EVENT_RELAY_UPDATE, // 45
IEEE80211_EVENT_RELAY_ERROR, // 46
IEEE80211_EVENT_PAIR_NGO, // 47
IEEE80211_EVENT_ROMAING_FAIL, // 48
IEEE80211_EVENT_REQ_PAIR_AID, // 49
};
/* txsemi custom reason code */
enum IEEE80211_TXREASON{
WLAN_REASON_AP_NOT_FOUND = 60000,
WLAN_REASON_ASSOC_TIMEOUT,
WLAN_REASON_PAIR_START,
WLAN_REASON_UNPAIR,
WLAN_REASON_RELAY_DISCONNECT,
};
enum wpa_states {
WPA_DISCONNECTED, //0
WPA_INTERFACE_DISABLED, //1
WPA_INACTIVE, //2
WPA_SCANNING, //3
WPA_AUTHENTICATING, //4
WPA_ASSOCIATING, //5
WPA_ASSOCIATED, //6
WPA_4WAY_HANDSHAKE, //7
WPA_GROUP_HANDSHAKE, //8
WPA_COMPLETED, //9
};
typedef enum {
IEEE80211_PKTHDL_CONTINUE = 0,
IEEE80211_PKTHDL_CONSUMED = 1,
} ieee80211_pkthdl_res;
struct ieee80211_custmgmt_data{
uint8 *from;
uint8 *data;
uint8 len;
};
struct ieee80211_csa_param{
uint8 mode, chan, count;
};
struct ieee80211_hookdata{
uint8 *data;
uint16 len;
uint16 ext: 1, recv: 15;
uint32 hdl;
};
struct ieee80211_pkthook;
typedef ieee80211_pkthdl_res(*ieee80211_pkthdl)(struct ieee80211_pkthook *hook, uint8 ifidx, struct ieee80211_hookdata *data);
struct ieee80211_pkthook_const{
const char *name;
void *priv;
uint16 protocol;
uint16 mcast: 1, ucast:1, rev: 14;
ieee80211_pkthdl tx;
ieee80211_pkthdl rx;
};
struct ieee80211_pkthook {
struct ieee80211_pkthook *next;
uint32 time_max, consume_data;
const struct ieee80211_pkthook_const *c_data;
};
typedef int32(*ieee80211_evt_cb)(uint8 ifidx, uint16 evt, uint32 param1, uint32 param2);
struct ieee80211_initparam {
uint8 vif_maxcnt;
uint8 bss_maxcnt;
uint8 headroom, tailroom;
uint16 sta_maxcnt;
uint16 bss_lifetime;
uint16 stack_size;
uint16 no_rxtask:1, ssid_fuzzy_match:4, rev: 11;
ieee80211_evt_cb evt_cb;
};
struct ieee80211_scandata {
uint32 chan_bitmap; //scan channel bitmap
uint8 ssid[SSID_MAX_LEN+1];
uint8 scan_time, scan_cnt; //scan time & count at every channel
uint8 passive_scan: 1, flush: 1, rev: 6;
};
struct ieee80211_stainfo {
uint16 aid;
uint8 addr[6];
int8 rssi, evm;
uint8 wake_reason;
uint8 ps: 1, connected: 1, wmm: 1;
uint32 tx_mcs, rx_mcs;
uint64 tx_bytes, rx_bytes;
};
struct ieee80211_wmm_param {
uint16 txop;
uint16 cw_min;
uint16 cw_max;
uint8 aifsn;
uint8 acm;
};
struct ieee80211_tx_info {
uint8 band;
uint8 ifidx;
uint16 no_ack: 1, rev:15;
uint32 tag;
};
struct ieee80211_rx_status {
uint32 freq;
uint8 band, ifidx;
int8 rssi, evm;
uint8 mcs;
uint8 rx_flags;
uint16 rxlen;
};
enum ieee80211_rx_flag{
IEEE80211_RX_FLAG_MORE_DATA = BIT(0),
IEEE80211_RX_FLAG_AMSDU = BIT(1),
};
struct ieee80211_roaming_param {
uint8 start: 1, ft_en: 1;
uint8 state;
uint8 old_chan;
int8 rssi_avg, rssi_check;
uint16 roaming_tmo;
int16 rssi_sum;
uint8 bssid_new[6];
uint8 bssid_old[6];
uint8 ssid[SSID_MAX_LEN + 1];
struct ieee80211_bss_info *newbss;
};
struct ieee80211_bss_wpadata {
uint32 proto;
uint32 group_cipher;
uint32 pairwise_cipher;
uint32 key_mgmt;
};
/*MLME frame expand size*/
struct ieee80211_mlme_size{
uint16 probe_req, probe_resp;
uint16 beacon, vendor_spec_action;
uint16 assoc_req, assoc_resp;
uint8 auth, deauth, disassoc, addba_resp;
uint16 p2p_neg;
};
struct ieee80211_linkcost_param{
//各项指标的上限或下限
int8 rssi_min;
int8 evm_min;
uint8 stas_max;
uint8 loading_max;
uint16 txdelay_max;
uint16 datarate_max;
//权重系统：百分比
uint8 rssi_weight;
uint8 evm_weight;
uint8 txdelay_weight;
uint8 loading_weight;
uint8 stas_weight;
uint8 per_weight;
uint8 datarate_weight;
//各项指标的等级划分：差，中等，优，（百分比）
uint8 rssi_poor, rssi_maiginal, rssi_good;
uint8 evm_poor, evm_maiginal, evm_good;
uint8 loading_poor, loading_maiginal, loading_good;
uint8 stas_poor, stas_maiginal, stas_good;
uint8 per_poor, per_maiginal, per_good;
uint8 txdelay_poor, txdelay_maiginal, txdelay_good;
uint8 datarate_poor, datarate_maiginal, datarate_good;
};
extern int32 wpa_passphrase(uint8 *ssid, char *passwd, uint8 psk[32]);
extern int32 ieee80211_init(struct ieee80211_initparam *param);
extern int32 ieee80211_deliver_init(int32 max, uint32 lifetime);
extern int32 ieee80211_support_txw830x(void *ops);
extern int32 ieee80211_support_txw80x(void *ops);
extern int32 ieee80211_support_txw81x(void *ops);
extern int32 ieee80211_iface_create_ap(uint8 ifidx, uint8 band);
extern int32 ieee80211_iface_create_sta(uint8 ifidx, uint8 band);
extern int32 ieee80211_iface_create_p2pdev(uint8 ifidx, uint8 band, uint8 go, uint8 gc);
extern int32 ieee80211_iface_start(uint8 ifidx);
extern int32 ieee80211_iface_stop(uint8 ifidx);
extern int32 ieee80211_pair_enable(uint8 ifidx, uint16 pair_magic);
extern int32 ieee80211_pairing(uint8 ifidx, uint16 pair_magic);
extern int32 ieee80211_unpair(uint8 ifidx, uint8 *mac);
extern void ieee80211_status(uint8 *buff, uint32 size);
extern int32 ieee80211_scan(uint8 index, uint8 start, struct ieee80211_scandata *scan_param);
extern int32 ieee80211_scatter_tx(uint8 ifidx, scatter_data *data, uint32 count);
extern int32 ieee80211_tx(uint8 ifidx, uint8 *data, uint32 len);
extern void ieee80211_input(uint8 ifidx, uint8 *data, uint32 len);
extern int32 ieee80211_tx_mgmt(uint8 ifidx, uint8 *mgmt, uint32 len);
extern int32 ieee80211_tx_custmgmt(uint8 ifidx, uint8 *dest, uint8 *data, uint32 len);
extern int32 ieee80211_tx_ether(uint8 ifidx, uint8 *dest, uint16 proto, uint8 *data, uint32 len);
extern int32 ieee80211_disassoc(uint8 ifidx, uint8 *addr);
extern int32 ieee80211_disassoc_all(uint8 ifidx);
extern int32 ieee80211_register_pkthook(struct ieee80211_pkthook *hook);
extern int32 ieee80211_hook_ext_data(uint8 ifidx, uint8 tx, uint8 *data, uint32 len);
extern ieee80211_evt_cb ieee80211_event_cb(ieee80211_evt_cb cb);
extern void ieee80211_cleanup_bsslist(void);
extern int32 ieee80211_get_bsslist(struct hgic_bss_info *bsslist, int32 list_size, int8 ignore_dis);
extern int32 ieee80211_get_stalist(uint8 ifidx, struct hgic_sta_info *stalist, int32 list_size);
extern int32 ieee80211_conf_stabr_table(uint8 ifidx, uint16 max, int32 lifetime);
extern int32 ieee80211_conf_set_bssbw(uint8 ifidx, uint8 bssbw);
extern int32 ieee80211_conf_get_bssbw(uint8 ifidx);
extern int32 ieee80211_conf_set_chanlist(uint8 ifidx, uint16 *chan_list, uint32 count);
extern int32 ieee80211_conf_set_ssid(uint8 ifidx, uint8 *ssid);
extern int32 ieee80211_conf_get_ssid(uint8 ifidx, uint8 *ssid);
extern int32 ieee80211_conf_set_keymgmt(uint8 ifidx, uint32 keymgmt);
extern int32 ieee80211_conf_get_keymgmt(uint8 ifidx);
extern int32 ieee80211_conf_set_psk(uint8 ifidx, uint8 psk[32]);
extern int32 ieee80211_conf_set_passwd(uint8 ifidx, char *passwd);
extern int32 ieee80211_conf_get_psk(uint8 ifidx, uint8 psk[32]);
extern int32 ieee80211_conf_set_beacon_int(uint8 ifidx, uint32 beacon_int);
extern int32 ieee80211_conf_set_dtim_int(uint8 ifidx, uint16 dtim_int);
extern int32 ieee80211_conf_set_bssid(uint8 ifidx, uint8 *bssid);
extern int32 ieee80211_conf_get_bssid(uint8 ifidx, uint8 *bssid);
extern int32 ieee80211_conf_set_channel(uint8 ifidx, uint8 channel);
extern int32 ieee80211_conf_get_channel(uint8 ifidx);
extern int32 ieee80211_conf_get_mac(uint8 ifidx, uint8 *mac);
extern int32 ieee80211_conf_set_mac(uint8 ifidx, uint8 *mac);
extern int32 ieee80211_conf_set_bss_max_idle(uint8 ifidx, uint16 max_idle_period);
extern int32 ieee80211_conf_get_connstate(uint8 ifidx);
extern uint8 ieee80211_conf_get_wkreason(uint8 ifidx);
extern int32 ieee80211_conf_wakeup_sta(uint8 ifidx, uint8 *addr, uint16 aid, uint32 reason);
extern int32 ieee80211_conf_get_txpower(uint8 ifidx);
extern int32 ieee80211_conf_set_heartbeat_int(uint8 ifidx, uint32 heartbeat_int);
extern int32 ieee80211_conf_set_heartbeat_data(uint8 ifidx, void *data, uint8 retry);
extern int32 ieee80211_conf_set_aplost_time(uint8 ifidx, uint32 time);
extern int32 ieee80211_conf_set_acs(uint8 ifidx, uint8 acs, uint8 tmo);
extern int32 ieee80211_conf_set_wmm_enable(uint8 ifidx, uint8 enable);
extern int32 ieee80211_conf_set_use4addr(uint8 ifidx, uint8 enable);
extern int32 ieee80211_conf_get_use4addr(uint8 ifidx);
extern int32 ieee80211_conf_get_stainfo(uint8 ifidx, uint16 aid, uint8 *mac, struct ieee80211_stainfo *sta);
extern int32 ieee80211_conf_get_stalist(uint8 ifidx, struct ieee80211_stainfo *sta, uint32 count);
extern int32 ieee80211_conf_get_sta_snr(uint8 ifidx, uint8 aid, int8 *snr);
extern int32 ieee80211_conf_get_stacnt(uint8 ifidx);
extern int32 ieee80211_conf_set_aphide(uint8 ifidx, uint8 hide);
extern int32 ieee80211_conf_get_bgrssi(uint8 ifidx, uint8 channel, uint8 *bgr);
extern int32 ieee80211_conf_set_mcast_txrate(uint8 ifidx, uint32 txrate);
extern int32 ieee80211_conf_set_hwmode(uint8 ifidx, enum ieee80211_hwmode mode);
extern int32 ieee80211_conf_set_psdata_cnt(uint8 ifidx, uint8 max_cnt);
extern int32 ieee80211_conf_set_wmm_param(uint8 ifidx, uint8 ac, struct ieee80211_wmm_param *param);
extern int32 ieee80211_conf_get_wmm_param(uint8 ifidx, uint8 ac, struct ieee80211_wmm_param *param);
extern int32 ieee80211_conf_set_wpa_group_rekey(uint8 ifidx, uint32 wpa_group_rekey);
extern int32 ieee80211_deliver_status(uint8 *buff, uint32 size);
extern int32 ieee80211_stabr_status(uint8 ifidx, uint8 *buff, uint32 size);
extern int32 ieee80211_conf_set_datatag(uint8 ifidx, uint32 hdl, uint32 tag);
extern int32 ieee80211_conf_get_ant_sel(uint8 ifidx);
extern int32 ieee80211_conf_get_reason_code(uint8 ifidx);
extern int32 ieee80211_conf_get_status_code(uint8 ifidx);
extern int32 ieee80211_conf_get_rtc(uint8 ifidx);
extern int32 ieee80211_conf_get_acs_result(uint8 ifidx, uint8 *buff);
extern int32 ieee80211_conf_set_rtc(uint8 ifidx, uint8 *data);
extern int32 ieee80211_conf_set_radio_onoff(uint8 ifidx, uint8 en);
extern int32 ieee80211_conf_set_isolate(uint8 ifidx, uint8 isolate);
extern int32 ieee80211_conf_set_ft(uint8 ifidx, void *ft_param);
extern int32 ieee80211_chan_center_freq(uint8 ifidx, uint8 channel);
extern int32 ieee80211_get_bssinfo(struct hgic_bss_info *bss, uint8 band, uint8 *ssid, uint8 *bssid);
extern int32 ieee80211_conf_set_dupfilter(uint8 ifidx, uint8 enable);
extern int32 ieee80211_conf_set_conn_timeout(uint8 ifidx, uint32 auth_tmo, uint32 assoc_tmo, uint32 handshake_tmo);
extern int32 ieee80211_bss_add_manualAP(uint8 *ssid, uint8 *bssid, uint8 channel, uint8 band, struct ieee80211_bss_wpadata *wpa_data);
extern int32 ieee80211_bss_get_wpadata(uint8 *bssid, uint8 band, struct ieee80211_bss_wpadata *wpa_data);
extern int32 ieee80211_expand_mlme_size(uint8 ifidx, struct ieee80211_mlme_size *size);
extern int32 ieee80211_conf_set_csa(uint8 ifidx, struct ieee80211_csa_param *csa);
extern void ieee80211_hook_status(void);
extern int32 ieee80211_conf_set_wpa_cipher(uint8 ifidx, uint32 wpa_proto, uint32 pairwise_cipher, uint32 group_cipher);
extern int32 ieee80211_conf_set_p2p_dev_name(uint8 ifidx, char *dev_name);
extern int32 ieee80211_conf_set_p2p_model_name(uint8 ifidx, char *model_name);
extern int32 ieee80211_conf_set_p2p_model_num(uint8 ifidx, char *model_num);
extern int32 ieee80211_conf_set_p2p_vendor_name(uint8 ifidx, char *vendor_name);
extern int32 ieee80211_conf_set_p2p_serial_number(uint8 ifidx, char *serial_number);
extern int32 ieee80211_conf_set_p2p_uuid(uint8 ifidx, char *uuid);
extern int32 ieee80211_conf_set_p2p_methods(uint8 ifidx, char *methods);
extern int32 ieee80211_conf_set_p2p_dev_type(uint8 ifidx, char *dev_type);
extern int32 ieee80211_conf_set_wfd_element(uint8 ifidx, uint8 id, uint8 *data, uint16 len);
extern int32 ieee80211_conf_set_absolute_beacon(uint8 ifidx, uint8 en);
extern int32 ieee80211_conf_set_auto_assoc(uint8 ifidx, uint8 auto_assoc, uint8 auto_scan);
extern int32 ieee80211_conf_set_relay_mode(uint8 ifidx, uint8 enable, uint8 relay_level, uint8 relay_mcast);
extern int32 ieee80211_conf_get_relay_level(uint8 ifidx);
extern int32 ieee80211_conf_set_listen_interval(uint8 ifidx, uint16 listen_interval);
extern int32 ieee80211_conf_set_scan_max(uint8 ifidx, uint16 scan_max);
extern int32 ieee80211_conf_set_signal_threshold(uint8 ifidx, uint8 rssi_thres, uint8 evm_thres);
extern int32 ieee80211_conf_set_security_policy(uint8 ifidx, uint8 security_policy);
extern int32 ieee80211_conf_set_sae_pwe_loop(uint8 ifidx, uint8 loop);
extern int32 ieee80211_conf_set_ap_psmode_en(uint8 ifidx, uint8 enable);
extern int32 ieee80211_conf_set_pair_ngo(uint8 ifidx, uint8 enable);
extern int32 ieee80211_conf_set_mutl_pair(uint8 ifidx, uint8 enable);
extern int32 ieee80211_conf_set_linkcost_param(uint8 ifidx, struct ieee80211_linkcost_param *param);
extern int32 ieee80211_conf_set_pair_channel(uint8 ifidx, uint8 chan);
extern int32 ieee80211_conf_get_tx_mcs(uint8 ifidx, uint8 *sta_addr, uint32 aid);
extern int32 ieee80211_conf_set_tx_mcs(uint8 ifidx, uint32 mcs, uint32 type);
extern void ieee80211_crypto_ec_support(void);
extern void ieee80211_crypto_ecdh_support(void);
extern void ieee80211_crypto_aes_support(void);
extern void ieee80211_crypto_bignum_support(void);
extern void ieee80211_crypto_dh_support(void);
extern void ieee80211_crypto_sha_support(void);
extern void ieee80211_crypto_hash_support(void);
#ifdef __cplusplus
}
#endif
#endif

871
sdk/include/lib/umac/libwnb.h Normal file
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@@ -0,0 +1,871 @@
#ifndef _HGSDK_WNB_H_
#define _HGSDK_WNB_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "sys_config.h"
#include "lib/common/rbuffer.h"
#include "lib/lmac/hgic.h"
#include "lib/skb/skb_list.h"
#define WNB_SSID_LEN (32)
#define ETH_P_NETAT (0x4848)
#define ETH_P_ATDATA (0x4849)
#define ETH_P_RAWDATA (0x4850)
#define ETH_P_M2UCAST (0x4852)
#define ETH_P_WNBROAM (0x4853)
/* WNB protocol defines */
#define IEEE80211_STYPE_WNB 0x00E0
#define WNB_STYPE_ASSOC 0x01
#define WNB_STYPE_PAIR 0x02
#define WNB_STYPE_DISASSOC 0x03
#define WNB_STYPE_CUSTOMER 0x04
#define WNB_STYPE_CONFIG 0x05
#define WNB_STYPE_OTA 0x06
#define WNB_STYPE_STA_HEARTHBEAT 0x07
#define WNB_STYPE_ROAMING 0x08
#define WNB_STYPE_PROBE_REQUEST 0x09
#define WNB_STYPE_PROBE_RESPONSE 0x0A
#define WNB_STYPE_USER_HEARTBEAT 0x0B
#define WNB_STYPE_USER_HEARTBEAT_RESP 0x0C
#define WNB_STYPE_USER_WAKEUP_DATA 0x0D
#define WNB_STYPE_USER_HEARTBEAT_LOST 0x0E
#define WNB_STYPE_BATTERY_SOC 0x0F
#define WNB_STYPE_MGTM_CONFIG 0x11
#define WNB_FOR_ME(h,wnb) (os_memcmp((h)->addr1, (wnb)->cfg->addr, 6)==0)
#define RSSI_CHANGED(r1,r2) ((r1)>(r2)?((r1)-(r2)>8):((r2)-(r1)>8))
#define EVM_CHANGED(r1,r2) ((r1)>(r2)?((r1)-(r2)>3):((r2)-(r1)>3))
//#define WNB_IS_BCAST_ADDR(a) (((a)[0]&(a)[1]&(a)[2]&(a)[3]&(a)[4]&(a)[5]) == 0xff)
//#define WNB_IS_MCAST_ADDR(a) ((a)[0]&0x01)
//#define WNB_IS_ZERO_ADDR(a) (!((a)[0] | (a)[1] | (a)[2] | (a)[3] | (a)[4] | (a)[5]))
#define WNB_PROTO(fc) (ieee80211_is_mgmt(fc) && ((fc) & 0x00f0) == IEEE80211_STYPE_WNB)
//#define MAC_EQU(a1,a2) (os_memcmp((a1), (a2), 6)==0)
#define WNB_TIM_SET(wnb, aid) ((wnb)->ps_data.tim[(aid) / 8] |= (1 << ((aid) % 8)))
#define WNB_TIM_CLR(wnb, aid) ((wnb)->ps_data.tim[(aid) / 8] &= ~(1 << ((aid) % 8)))
#define FROM_AP(wnb, hdr) (MAC_EQU((wnb)->stas[0].sta->addr, (hdr)->addr2))
#define IS_MYAP(wnb, sta) (((wnb)->cfg->role == WNB_STA_ROLE_SLAVE||(wnb)->cfg->role == WNB_STA_ROLE_REPEATER) && (sta) == &(wnb)->stas[0])
#define MY_SSID(wnb) (((wnb)->cfg->role == WNB_STA_ROLE_REPEATER)?(wnb)->cfg->r_ssid:(wnb)->cfg->ssid)
#define MY_KEY(wnb) (((wnb)->cfg->role == WNB_STA_ROLE_REPEATER)?(wnb)->cfg->r_key:(wnb)->cfg->key)
#define MY_ENC(wnb) (((wnb)->cfg->role == WNB_STA_ROLE_REPEATER)?(wnb)->cfg->r_encrypt:(wnb)->cfg->encrypt)
#define IS_UPPER_AP(wnb, sta) (((wnb)->cfg->role == WNB_STA_ROLE_REPEATER) && (sta) == &(wnb)->stas[0])
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
#define BITS_PER_BYTE (8)
#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
#define WNB_NETLOG_PORT (64320)
enum wnb_frm_type {
WNB_FRM_TYPE_ETHER = 0,
WNB_FRM_TYPE_HGIC,
WNB_FRM_TYPE_RAW,
};
struct wnb_txq_param {
uint8 aifsn : 4,
acm : 1,
aci : 2,
reserved : 1;
uint8 ecwmin : 4,
ecwmax : 4;
uint16 txop_limit;
};
struct wnb_mgmt {
uint8 type: 7, resp: 1;
uint8 cookie;
uint16 center_freq; // current center frequence
};
struct wnb_mgmt_heartbeat {
struct wnb_mgmt hdr;
uint8 aid;
};
struct wnb_mgmt_pair {
struct wnb_mgmt hdr;
uint8 role;
uint8 encrypt;
uint8 key[32];
uint8 dev_id[6];
uint8 ssid[WNB_SSID_LEN];
uint8 aid;
};
struct wnb_mgmt_assoc {
struct wnb_mgmt hdr;
uint8 aid;
uint8 dev_id[6];
uint8 auth[WNB_SSID_LEN];
uint8 ps_mode: 3, roaming:1, newkey:1, p2: 3;
uint8 ssid_set:1, rev:7;
uint8 roam_bssid[6];
uint8 ssid[WNB_SSID_LEN];
};
struct wnb_mgmt_assoc_resp {
struct wnb_mgmt hdr;
uint8 aid;
uint8 dev_id[6];
uint8 assoc_status;
uint16 bss_max_idle;
uint8 wk_reason;
uint8 repeater:1, newkey:1, rev:6;
uint8 p1, p2, p3, p4;
uint8 key[32];
uint16 repeater_level;
};
struct wnb_mgmt_config {
struct wnb_mgmt hdr;
uint16 type, len;
};
enum wnb_mgmt_configtype{
WNB_MGMT_CONFIGTYPE_FREQINFO = 1,
WNB_MGMT_CONFIGTYPE_RESET,
WNB_MGMT_CONFIGTYPE_PSALIVE_CONFIG,
};
struct wnb_mgmt_probe_req {
struct wnb_mgmt hdr;
uint8 ssid[WNB_SSID_LEN];
};
struct wnb_mgmt_probe_resp {
struct wnb_mgmt hdr;
uint8 ssid[WNB_SSID_LEN];
uint8 encrypt: 1;
uint16 repeter;
};
struct wnb_mgmt_disassoc {
struct wnb_mgmt hdr;
uint16 flags;
};
struct wnb_mgmt_roaming {
struct wnb_mgmt hdr;
uint8 request:1, pad:7;
};
struct wnb_bss_info {
struct list_head list;
uint8 ssid[WNB_SSID_LEN + 2];
uint8 bssid[6];
uint8 encrypt: 1, assoc: 1;
int8 signal;
uint16 freq, repeater;
uint32 lifetime;
};
#define WNB_DISASSOC_FLAGS_UNPAIR BIT(0)
/////////////////////////////////////////////////////////////////
/* WNB module defines */
#define WNB_EVTQ_SIZE (32)
#define WNB_NAT_COUNT (256)
#define WNB_CHAN_COUNT (16)
#define WNB_PAIR_DELAY (50)
#define WNB_PAIR_TRY (4)
#define WNB_CONN_DELAY (20)
#define WNB_HEART_INT (500)
#define WNB_CON_CHAN_TRY (2)
#define WNB_SCAN_DELAY (20)
#define WNB_SCAN_TRY (2)
#define WNB_BSS_MAX (32)
#define WNB_PS_BC_SIZE (4)
#define WNB_PS_DATA_SIZE (2)
#define WNB_MAX_IDLE_TU (30*1000) // units: 1.024ms
#define wnb_dbg(fmt, ...) //os_printf(fmt, ##__VA_ARGS__)
#define wnb_err(fmt, ...) os_printf(fmt, ##__VA_ARGS__)
typedef enum{
WNB_FORWARD_TYPE_NONE,
WNB_FORWARD_TYPE_2LOCAL,
WNB_FORWARD_TYPE_2UPPER,
}wnb_forward_type;
typedef enum {
WNB_EVENT_SEND_BEACON = 1,
WNB_EVENT_HEARTBEAT,
WNB_EVENT_PAIR_START,
WNB_EVENT_PAIR_SUCCESS,
WNB_EVENT_PAIR_FAIL,
WNB_EVENT_PAIR_DONE,
WNB_EVENT_CONNECT_START,
WNB_EVENT_CONNECTED,
WNB_EVENT_DISCONNECTED,
WNB_EVENT_RX_DATA,
WNB_EVENT_RSSI,
WNB_EVENT_SCAN_START,
WNB_EVENT_SCAN_DONE,
WNB_EVENT_EVM,
WNB_EVENT_DHCPC_REQ,
WNB_EVENT_DHCPC_DONE,
WNB_EVENT_CONNECT_FAIL,
} wnb_event;
typedef enum {
WNB_STATE_IDLE,
WNB_STATE_PAIR_START,
WNB_STATE_PAIRING,
WNB_STATE_PAIR_DONE,
WNB_STATE_CONNECT_START,
WNB_STATE_CONNECTING,
WNB_STATE_CONNECTED,
WNB_STATE_DISCONNECT,
WNB_STATE_SCAN_START,
WNB_STATE_SCANNING,
WNB_STATE_SCAN_DONE,
WNB_STATE_WAITING_AP,
} wnb_state;
typedef enum {
WNB_STA_ROLE_SLAVE,
WNB_STA_ROLE_MASTER,
WNB_STA_ROLE_GPMEMB,
WNB_STA_ROLE_REPEATER,
WNB_STA_ROLE_MAX,
} wnb_sta_role;
typedef enum {
WNB_ASSOC_SUCCESS = 0,
WNB_ASSOC_REFUSED = 1,
WNB_ASSOC_DENIED_NO_MORE_STAS = 17,
WNB_ASSOC_DENIED_INSUFFICIENT_BANDWIDTH = 33,
WNB_ASSOC_REFUSED_AP_OUT_OF_MEMORY = 93,
WNB_ASSOC_NO_AP = 0xff,
} wnb_assoc_status;
typedef void (*wnb_event_cb)(wnb_event evt, uint32 param1, uint32 param2);
/*saved into flash*/
struct wnb_sta_info {
uint16 paired : 1,
encrypt : 1;
uint8 addr[6];
uint8 key[32];
};
struct wnb_psalive_config{
uint16 wkdata_off;
uint16 wkdata_save:1;
uint8 wkdata_mask[16];
};
struct wnb_sta_psalive {
uint32 ipaddr;
uint16 port;
uint8 hb_period, hb_timeout;
uint8 *heartbeat;
uint8 *heartbeat_resp;
uint8 *wakeup_data;
int16 expired;
uint16 heartbeat_len, heartbeat_resp_len, wakeup_data_len;
uint8 heartbeat_lost, rev;
struct wnb_psalive_config config;
};
/*needn't save*/
struct wnb_sta {
void *wnb;
struct wnb_sta_info *sta;
uint8 id, aid;
uint16 connected : 1,
ps : 1,
ps_poll : 1,
ps_mode : 3,
m2ucast : 1,
roam_out : 2,
roam_in : 1,
rnd_key : 1;
uint32 last_rx;
uint32 last_tx;
uint32 roam_jiff;
int8 rssi, evm, wk_reason, rev;
uint32 ipaddr;
uint16 rxseq_head[4];
uint64 rxseq_bit[4];
uint16 tx_seqno[4];
struct skb_list psdata;
struct skb_list ps_etherdata;
struct wnb_sta_psalive psalive;
uint8 roaming_bssid[6];
uint8 roaming_notify;
uint8 key[32];
};
struct wnb_route_entry {
struct list_head list;
struct wnb_sta *sta;
uint32 lifetime;
uint8 addr[6];
};
struct wnb_route_table {
os_mutex_t lock;
struct list_head list[16];
uint32 count;
};
#define WNB_WKUPHOST_REASONS (32)
struct wnb_config {
uint8 role;
uint8 bss_bw;
uint8 encrypt: 1, forward: 1, key_set: 1, mkey_set: 1, join_group: 1, bssid_set: 1, mcast_filter: 1, reassoc_wkhost: 1;
uint8 chan_cnt;
uint16 freq_start, freq_end;
uint16 chan_list[WNB_CHAN_COUNT];
uint8 ssid[WNB_SSID_LEN];
uint8 key[32];
uint8 addr[6];
uint8 max_sta;
uint8 tx_mcs;
uint8 acs_enable;
uint8 acs_tmo;
uint8 tx_bw;
uint8 tx_power: 5, pri_chan: 3;
uint8 mcast_key[32];
uint8 psconnect_period, psconnect_roundup;
uint8 last_chan, repeater_level;
uint16 wkio_mode: 1, psmode: 3, auto_chsw: 1, auto_role: 1, roaming: 1,
dupfilter: 1, pa_pwrctrl_dis: 1, pair_autostop: 1, supper_pwr_dis: 1,
r_encrypt: 1, not_auto_save: 1, dcdc13: 1, auto_pair:1, dhcpc_en:1;
uint16 bss_max_idle;
uint16 beacon_int, dtim_period;
uint8 group_aid, agg_cnt, wkup_io, wkio_edge;
uint16 aplost_time, auto_sleep_time;
uint16 heartbeat_int, ack_tmo;
int8 roam_rssi_th;
uint8 roam_int, max_txcnt, rev4;
uint8 r_ssid[WNB_SSID_LEN];
uint8 r_key[32];
uint8 dhcpc_hostname[32];
uint8 mcast_txmcs, mcast_txbw, mcast_clearch, mcast_dupcnt;
uint32 dhcpc_update_hbdata:1, wkhost_reasons_set:1, dual_ant:1,ant_auto_dis:1,
ant_sel:1, mac_filter_en:1, roaming_samefreq:1, ap_hide:1, ap_psmode:1,
dis_1v1_m2u:1, psconnect_dis:1, kick_assoc:1;
uint8 wkhost_reasons[WNB_WKUPHOST_REASONS];
//################################################################
uint8 reserve[256]; /*must reduce this array after add new fields */
struct wnb_sta_info stas[WNB_STA_COUNT]; /*keep at bottom*/
};
struct wnb_statistic {
uint32 tot_tx, tot_rx, tot_fw, if_recv, if_write, rx_hook, tx_hook;
uint32 tx_err, rx_err, if_err, fw_err, rx_drop, no_mem, tx_drop, filter;
};
struct wnb_rx_info {
struct wnb_sta *sta;
uint8 *data;
uint16 len;
uint16 fromDS: 1, resv: 15;
};
#define WNB_MAX_TIM_LEN (32)
struct wnb_ps_data {
/* yes, this looks ugly, but guarantees that we can later use bitmap_empty :)
* NB: don't touch this bitmap, use sta_info_{set,clear}_tim_bit */
uint8 tim[WNB_MAX_TIM_LEN];
struct skb_list bc_buf;
uint8 num_sta_ps; /* number of stations in PS mode */
int32 dtim_count;
uint8 dtim_bc_mc;
};
struct wnb_init_param {
uint8 if_type;
uint8 frm_type;
uint8 hook_cnt;
struct lmac_ops *ops;
struct wnb_config *cfg;
wnb_event_cb cb;
};
struct wnb_mgmt_tx {
uint8 *dest;
uint16 len;
uint16 flags;
struct wnb_mgmt *mgmt;
struct hgic_tx_info *txinfo;
};
struct wnb_udp_data{
uint8 *dest;
uint32 dest_ip, dest_port;
uint32 src_ip, src_port;
uint8 *data;
uint32 len;
};
struct wireless_nb;
typedef int32(*wnb_pkt_tx_hdl)(struct wireless_nb *wnb, struct sk_buff *skb);
typedef int32(*wnb_pkt_rx_hdl)(struct wireless_nb *wnb, struct wnb_rx_info *rxinfo);
struct wnb_pkt_hook {
const char *name;
uint16 protocol;
wnb_pkt_tx_hdl tx;
wnb_pkt_rx_hdl rx;
};
typedef enum{
WNB_ROAM_IDLE,
WNB_ROAM_CHECK_RSSI,
WNB_ROAM_REQUEST_BGSCAN,
WNB_ROAM_REQUEST_ROAMING,
WNB_ROAM_REQUEST_CANCLE,
WNB_ROAM_DO_BGSCAN,
WNB_ROAM_DO_ROAMING,
}WNB_ROAM_STATE;
/* WNB sub modules */
struct wnb_module_roam {
WNB_ROAM_STATE state;
uint8 request;
uint8 check;
int16 rssi;
int8 rssi_avg;
uint8 bssid[6];
uint8 ssid[32];
struct wnb_bss_info *newbss;
void (*check_roaming)(struct wireless_nb *wnb, struct hgic_rx_info *rxinfo, uint8 *data, int32 len);
void (*check_scan_result)(struct wireless_nb *wnb);
int32(*forward_data)(struct wireless_nb *wnb, struct wnb_sta *sta, struct sk_buff *skb);
int32(*cache_data)(struct wireless_nb *wnb, struct sk_buff *skb);
void(*roam_in)(struct wireless_nb *wnb, struct wnb_sta *sta, uint8 notify, uint8 *roam_bssid);
void(*proc_mgmt)(struct wireless_nb * wnb, uint8 * data, int32 len);
};
struct wnb_module_ota {
void (*proc_data)(struct wireless_nb *wnb);
};
enum WNB_PSALIVE_ACTION{
WNB_PSALIVE_ACTION_DO_HEARBEAT,
WNB_PSALIVE_ACTION_KEEP_HEARTBEAT,
WNB_PSALIVE_ACTION_SEND_CONFIG,
WNB_PSALIVE_ACTION_UPDATE_HBDATA,
};
struct wnb_module_psalive {
os_timer_t timer;
void (*do_action)(struct wireless_nb *wnb, int32 action);
void (*proc_mgmt)(struct wireless_nb *wnb, uint8 *data, int32 len);
void (*start_sta)(struct wireless_nb *wnb, struct wnb_sta *sta, uint8 start);
};
struct wnb_module_netlog {
uint8 addr[6], cookie[6];
uint32 ip;
uint32 time;
uint16 port;
};
struct wnb_module_netat {
uint8 dest[6];
};
struct wnb_module_dhcpc {
uint32 transID, leasetime;
uint8 svraddr[6], state;
os_timer_t timer;
struct {
uint32 ipaddr, netmask, svrip, router, dns1, dns2;
} result;
void (*reset)(struct wireless_nb *wnb);
void (*request_ip)(struct wireless_nb *wnb);
};
struct wnb_module_atcmd {
struct{
int32 count;
struct hgic_tx_info txinfo;
}txdata_arg;
};
struct wnb_module_drivercmd {
void (*proc_cmd)(struct wireless_nb *wnb);
void (*report_txwnd)(struct wireless_nb *wnb);
};
struct wnb_module_arp {
void (*send_reply)(struct wireless_nb *wnb);
};
struct wireless_nb {
wnb_state state;
struct wnb_config *cfg;
struct wnb_sta *stas;
os_mutex_t lock;
os_semaphore_t sema;
os_semaphore_t sm_sema;
os_semaphore_t cfgsema;
os_task_t task;
os_task_t sm_task;
os_timer_t dly_run;
os_timer_t heart_tm;
os_timer_t beacon_tm;
struct skb_list datalist;
struct skb_list cstlist;
struct skb_list f2upper;
struct skb_list f2local;
struct skb_list cmd_list;
struct skb_list otalist;
struct skb_list loglist;
struct skb_list wkdata_list;
struct list_head bss_list;
os_mutex_t bss_lock;
uint8 bss_cnt;
uint8 waiting_ap;
RBUFFER_DEF(evtq, uint8, WNB_EVTQ_SIZE);
struct mac_bus *bus;
struct lmac_ops *ops;
struct wnb_route_table rt_table;
struct wnb_route_table lp_table;
struct wnb_pkt_hook **hooks;
wnb_event_cb cb;
struct wnb_ps_data ps_data;
struct dsleep_psdata *psalive_data;
uint16 chan_list[WNB_CHAN_COUNT];
uint8 chan_cnt, start_chan, chan_idx;
int8 chan_try;
uint8 assoc_result;
uint8 hooks_cnt;
uint8 sta_num;
uint16 repeater_level;
uint8 mgmt_cookie, last_cookie;
uint16 bus_txcookie;
uint16 bus_rxcookie;
uint16 curr_freq;
uint16 tx_seqno;
uint16 ap_freq;
uint8 frm_type;
uint8 my_aid;
uint8 heartbeat_lost;
int8 rssi, rssi_notify, evm;
uint8 change_sequence, edca_update_cnt;
uint8 conn_fail;
uint16 conn_delay, pair_delay, scan_delay;
uint16 ether_type;
uint8 ps_hb_set: 1, ps_hbresp_set: 1, ps_wkdata_set: 1, ps_config_set:1, sleep_try: 3, detect_ap: 1;
uint8 host_alive, wk_reason;
/*flags*/
uint32 need_save: 1,
ps: 1,
fix_freq: 1,
closed: 1,
testmode: 1,
mcast_copy: 1,
mcu_func: 1,
bg_scan: 1,
repeater_en:1,
req_txwnd:1;
struct {
uint8 role_changed:1, keygen:1, resp_rx:1, resp_tx:1;
uint8 key[32];
uint32 start_jif;
struct wnb_sta *sta;
} pairing;
struct {
uint8 addr[6];
uint8 assoc_status;
uint8 req_param: 1, req_param_dis: 1, req_param_cnt: 6;
} report;
uint32 last_rx, last_tx, last_ps;
struct wnb_statistic statistic;
struct wnb_module_roam roaming;
struct wnb_module_ota ota;
struct wnb_module_netlog netlog;
struct wnb_module_netat netat;
struct wnb_module_dhcpc dhcpc;
struct wnb_module_atcmd atcmd;
struct wnb_module_drivercmd drivercmd;
struct wnb_module_arp arp;
struct wnb_module_psalive psalive;
};
#define WNB_SMRUN(wnb) os_sema_up(&wnb->sm_sema)
#define WNB_SMRUN_DELAY(wnb, tmo) os_timer_start(&wnb->dly_run, tmo)
#define WNB_RUN(wnb) os_sema_up(&wnb->sema)
#define WNB_EVENT(wnb, evt) do{RB_SET(&wnb->evtq, (uint8)evt); WNB_RUN(wnb);}while(0)
#define WNB_CB(evt,p1,p2) if(wnb->cb){ wnb->cb(evt, (uint32)(p1), (uint32)(p2));}
#define WNB_IS_REQ(hdr) (!((hdr)->resp)) /*wnb request packet*/
#define WNB_IS_RESP(hdr) ((hdr)->resp) /*wnb response packet*/
#define WNB_NEXT_CH(wnb, ch) (((ch)+1>=(wnb)->chan_cnt)?(0):((ch)+1))
#define WNB_VALID_BW(bw) ((bw)==1||(bw)==2||(bw)==4||(bw)==8)
#define WNB_VALID_FREQ(f) ((f)>=7300&&(f)<=9300)
#define WNB_VALID_MCS(m) (((m)>=0 && (m)<=7)||((m)==10))
#define WNB_PSDATA_SET2AP(wnb) (wnb->ps_hb_set && wnb->ps_hbresp_set && wnb->ps_wkdata_set && wnb->ps_config_set)
extern const uint8 wnb_bcast_addr[6];
extern const struct wnb_txq_param wnb_edca_params[5][4];
extern uint8 ieee80211_is_data_qos(uint16 frame_control);
int32 wnb_init(struct wnb_init_param *param);
void wnb_open(void);
void wnb_close(void);
void wnb_clear(void);
int32 wnb_cfg_save(void);
void wnb_role(struct wireless_nb *wnb, wnb_sta_role role);
int32 wnb_join_group(struct wireless_nb *wnb, uint8 *group_addr, uint8 aid);
int32 wnb_send_customer_data(struct hgic_tx_info *txinfo, uint8 *dest, uint8 *data, int32 len);
int32 wnb_send_ether_data(struct hgic_tx_info *txinfo, uint8 *data, int32 len);
void wnb_tx_data(struct wireless_nb *wnb, struct sk_buff *skb, wnb_forward_type forward);
int32 wnb_save_cfg(struct wnb_config *cfg, uint8 force);
void wnb_setup_chan_list(struct wireless_nb *wnb);
int32 wnb_freq_to_ch(struct wireless_nb *wnb, uint32 freq);
uint32 wnb_customer_id(void);
int32 wnb_dev_identify(struct wireless_nb *wnb, uint8 *id);
int32 wnb_is_loopback_data(struct wireless_nb *wnb, struct wnb_rx_info *rxinfo);
int32 wnb_ether_filter(struct wireless_nb *wnb, uint8 *data, int32 len);
void wnb_set_edca_param(struct wireless_nb *wnb, struct wnb_txq_param *param);
int32 wnb_macbus_send_data(struct wireless_nb *wnb, uint8 *data, int32 len);
int32 wnb_send_mgmt(struct wireless_nb *wnb, struct wnb_mgmt_tx *tx);
uint8 wnb_cookie(struct wireless_nb *wnb);
uint16 wnb_seqno(struct wireless_nb *wnb, struct wnb_sta *sta, uint8 ac);
int32 wnb_host_notify(void *priv, uint8 event_id, uint8 *args, int32 len);
void wnb_role_changed(struct wireless_nb *wnb);
struct wnb_sta *wnb_get_sta(struct wireless_nb *wnb, uint8 *addr);
struct wnb_sta *wnb_new_sta(struct wireless_nb *wnb);
void wnb_del_sta(struct wireless_nb *wnb, struct wnb_sta *sta);
int32 wnb_get_qos_flags(struct sk_buff *skb, uint8 qos[2]);
void wnb_new_state(struct wireless_nb *wnb, uint8 new_state);
void wnb_statistic_print(void);
void wnb_load_factparam(struct wnb_config *wnbcfg);
void wnb_sta_init(struct wireless_nb *wnb);
void wnb_connect(int32 start);
void wnb_send_assoc_req(struct wireless_nb *wnb);
void wnb_send_disassoc(struct wireless_nb *wnb, uint8 *dest, uint16 flags);
void wnb_rx_assoc(struct wireless_nb *wnb, uint8 *data, int32 len);
void wnb_rx_disassoc(struct wireless_nb *wnb, uint8 *data, int32 len);
void wnb_send_beacon(struct wireless_nb *wnb);
void wnb_send_heartbeat(struct wireless_nb *wnb, uint8 *dest);
void wnb_rx_heartbeat(struct wireless_nb *wnb, uint8 *data, int32 len);
int32 wnb_rx_beacon(struct wireless_nb *wnb, struct hgic_rx_info *rxinfo, uint8 *data, int32 len);
void wnb_delay_next_conn(struct wireless_nb *wnb);
void wnb_pairing(int32 start);
void wnb_rx_pair(struct wireless_nb *wnb, uint8 *data, int len);
void wnb_pairing_hello(struct wireless_nb *wnb);
void wnb_rx_config(struct wireless_nb *wnb, uint8 *data, int32 len);
void wnb_pair_role_changed(struct wireless_nb *wnb);
void wnb_host_event_pair_done(struct wireless_nb *wnb);
void wnb_pairing_prepare(struct wireless_nb *wnb);
void wnb_route_init(struct wireless_nb *wnb);
void wnb_route_update(struct wireless_nb *wnb, uint8 *dest, struct wnb_sta *sta);
struct wnb_sta *wnb_route(struct wireless_nb *wnb, uint8 *dest);
int32 wnb_srcrt_check(struct wireless_nb *wnb, uint8 *src);
void wnb_lptable_update(struct wireless_nb *wnb, uint8 *dest, uint8 *src);
void wnb_route_del(struct wnb_route_table *rt, uint8 *addr);
void wnb_route_print(struct wnb_route_table *rt);
void wnb_scan(struct wireless_nb *wnb, int32 start);
int32 wnb_get_scan_result(struct wireless_nb *wnb, struct sk_buff *skb);
int32 wnb_rx_probe_reponse(struct wireless_nb *wnb, struct hgic_rx_info *rxinfo, uint8 *data, int32 len);
int32 wnb_rx_probe_request(struct wireless_nb *wnb, struct hgic_rx_info *rxinfo, uint8 *data, int32 len);
int32 wnb_tx_probe_request(struct wireless_nb *wnb, uint8 *ssid);
void wnb_bss_flush(struct wireless_nb *wnb);
int32 wnb_bss_info_update(struct wireless_nb *wnb, struct hgic_rx_info *rxinfo, uint8 *data, int32 len);
void wnb_bss_info_update_from_beacon(struct wireless_nb *wnb, struct hgic_rx_info *rxinfo, uint8 *data, int32 len);
struct wnb_bss_info *wnb_roam(struct wireless_nb *wnb, uint8 flags);
uint8 *wnb_get_element(uint8 *ie, int32 ie_len, uint8 id);
int32 wnb_rx(void *priv, struct hgic_rx_info *rxinfo, uint8 *data, int32 len);
int32 wnb_proc_data_rx_hooks(struct wireless_nb *wnb, struct wnb_rx_info *rxinfo);
int32 wnb_proc_data_tx_hooks(struct wireless_nb *wnb, struct sk_buff *skb);
void wnb_sta_ps_end(struct wireless_nb *wnb, struct wnb_sta *sta);
void wnb_sta_ps_start(struct wireless_nb *wnb, struct wnb_sta *sta);
void wnb_free_psdata(struct wireless_nb *wnb, struct wnb_sta *sta);
void wnb_ps_init(struct wireless_nb *wnb);
void wnb_ps_mode(struct wireless_nb *wnb, uint32 start, uint32 time);
int32 wnb_get_sta_list(struct wireless_nb *wnb, struct sk_buff *skb);
int32 wnb_lptable_check(struct wireless_nb *wnb, uint8 *src);
void wnb_reset_beatheart(struct wireless_nb *wnb);
void wnb_disassoc_all(struct wireless_nb *wnb);
void wnb_request_parameter(struct wireless_nb *wnb);
int32 wnb_wakeup_sta(struct wireless_nb *wnb, uint8 *addr);
int8 wnb_get_sta_signal(struct wireless_nb *wnb, int32 index, uint8 *addr);
void wnb_send_nullfunc(struct wireless_nb *wnb, struct wnb_sta *sta, int32 ps);
void wnb_send_pspoll_response(struct wireless_nb *wnb);
struct wnb_sta *wnb_get_sta_ip(struct wireless_nb *wnb, uint32 ipaddr);
void wnb_ps_check_autosleep(struct wireless_nb *wnb);
void wnb_ps_ap_alive(struct wireless_nb *wnb);
void wnb_ps_wakeup_host(struct wireless_nb *wnb);
void wnb_ps_exit(struct wireless_nb *wnb, uint8 wk_reason);
void wnb_ps_check_wkreason(struct wireless_nb *wnb, uint8 wk_reason);
void wnb_opendev(struct wireless_nb *wnb);
void wnb_closedev(struct wireless_nb *wnb);
void wnb_init_lmac(struct wireless_nb *wnb);
int8 wnb_freq_type_match(uint8 ah_module_type, uint32 freq);
int32 wnb_rx_battery_soc(struct wireless_nb *wnb, uint8 *data, int32 len);
int32 mcu_battery_soc_request(struct wireless_nb *wnb);
uint16 wnb_checksum(uint16 initcksum, uint8 *ptr, int32 len);
void wnb_connect_start(struct wireless_nb *wnb);
void wnb_send_data_upper_ap(struct wireless_nb *wnb, uint8 *data, int32 len);
void wnb_check_ps_connect(struct wireless_nb *wnb);
int32 wnb_backgroud_scan(struct wireless_nb *wnb);
void wnb_start_bgscan(struct wireless_nb *wnb);
void wnb_scan_channel(struct wireless_nb *wnb);
void wnb_ps_set_ssid(struct wireless_nb *wnb);
void wnb_ps_get_ssid(struct wireless_nb *wnb);
void wnb_random(uint8 *key, int32 len);
void wnb_auto_pair_check(struct wireless_nb *wnb, int start);
void wnb_scan_dump(struct wireless_nb *wnb);
int32 customer_driver_data_send(uint8 *data, uint32 len);
int32 wnb_config_send_data(struct wireless_nb *wnb, uint8 *dest, uint16 type, uint8 *data, int32 len);
void wnb_config_send(struct wireless_nb *wnb);
void wnb_rx_mgmt_config(struct wireless_nb *wnb, uint8 *data, int32 len);
int32 wnb_set_key(struct wireless_nb *wnb, uint8 cmd, uint8 *addr, uint8 *key, uint8 swap);
int32 wnb_unpair_sta(struct wireless_nb *wnb, uint8 *addr);
int32 wnb_register_hook(struct wnb_pkt_hook *hook);
int32 wnb_ssid_match(struct wireless_nb * wnb, uint8 *ssid, uint8 ssid_len);
void wnb_config_send_psaliveconfig(struct wireless_nb *wnb);
void wnb_check_request_params(struct wireless_nb *wnb);
void wnb_request_params_en(struct wireless_nb *wnb, int32 en);
void wnb_encrypt(uint8 *key, uint8 *in, uint8 *out, uint32 len, uint8 en);
void wnb_module_drivercmd_init(void);
void wnb_module_psalive_init(void);
void wnb_module_ota_init(void);
void wnb_module_dhcpc_init(void);
void wnb_module_netlog_init(void);
void wnb_module_arp_init(void);
void wnb_module_roam_init(void);
void wnb_module_netat_init(void);
void wnb_module_atcmd_init(void);
static inline void wnb_roaming_check(struct wireless_nb *wnb, struct hgic_rx_info *rxinfo, uint8 *data, int32 len)
{
if(wnb->roaming.check_roaming) wnb->roaming.check_roaming(wnb, rxinfo, data, len);
}
static inline void wnb_roaming_check_scan_result(struct wireless_nb *wnb)
{
if(wnb->roaming.check_scan_result) wnb->roaming.check_scan_result(wnb);
}
static inline void wnb_notify_sta_roam_in(struct wireless_nb *wnb, struct wnb_sta *sta, uint8 notify, uint8 *roam_bssid)
{
if(wnb->roaming.roam_in) wnb->roaming.roam_in(wnb, sta, notify, roam_bssid);
}
static inline int32 wnb_roaming_forward(struct wireless_nb *wnb, struct wnb_sta *sta, struct sk_buff *skb)
{
if(wnb->roaming.forward_data)
return wnb->roaming.forward_data(wnb, sta, skb);
return 0;
}
static inline void wnb_rx_roaming_frame(struct wireless_nb * wnb, uint8 * data, int32 len)
{
if(wnb->roaming.proc_mgmt) wnb->roaming.proc_mgmt(wnb, data, len);
}
static inline int32 wnb_roaming_cache_data(struct wireless_nb *wnb, struct sk_buff *skb)
{
if(wnb->roaming.cache_data)
return wnb->roaming.cache_data(wnb, skb);
return 0;
}
static inline void wnb_psalive_action(struct wireless_nb *wnb, int32 action)
{
if(wnb->psalive.do_action) wnb->psalive.do_action(wnb, action);
}
static inline void wnb_psalive_start(struct wireless_nb *wnb, struct wnb_sta *sta, uint8 start)
{
if(wnb->psalive.start_sta) wnb->psalive.start_sta(wnb, sta, start);
}
static inline void wnb_rx_psalive_frame(struct wireless_nb *wnb, uint8 *data, int32 len)
{
if(wnb->psalive.proc_mgmt) wnb->psalive.proc_mgmt(wnb, data, len);
}
static inline void wnb_dhcpc_reset(struct wireless_nb *wnb)
{
if(wnb->dhcpc.reset) wnb->dhcpc.reset(wnb);
}
static inline void wnb_dhcpc_request_ip(struct wireless_nb *wnb)
{
if(wnb->dhcpc.request_ip) wnb->dhcpc.request_ip(wnb);
}
static inline void wnb_proc_driver_cmd(struct wireless_nb *wnb)
{
if(wnb->drivercmd.proc_cmd) wnb->drivercmd.proc_cmd(wnb);
}
static inline void wnb_driver_cmd_report_txwnd(struct wireless_nb *wnb)
{
if(wnb->drivercmd.report_txwnd) wnb->drivercmd.report_txwnd(wnb);
}
static inline void wnb_send_arp_reply(struct wireless_nb *wnb)
{
if(wnb->arp.send_reply) wnb->arp.send_reply(wnb);
}
static inline void wnb_proc_ota_data(struct wireless_nb *wnb)
{
if(wnb->ota.proc_data) wnb->ota.proc_data(wnb);
}
static inline char *WNB_ROLE_STR(int8 role)
{
switch (role) {
case WNB_STA_ROLE_MASTER: return "ap";
case WNB_STA_ROLE_SLAVE: return "sta";
case WNB_STA_ROLE_GPMEMB: return "group";
case WNB_STA_ROLE_REPEATER: return "apsta";
default: return "none";
}
}
#ifdef __cplusplus
}
#endif
#endif

65
sdk/include/lib/umac/umac.h Normal file
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#ifndef _HGIC_UMAC_H_
#define _HGIC_UMAC_H_
#include "lib/lmac/hgic.h"
#ifdef __cplusplus
extern "C" {
#endif
#define WPA_KEY_MGMT_PSK BIT(1)
#define WPA_KEY_MGMT_NONE BIT(2)
#define WPA_KEY_MGMT_SAE BIT(10)
#define WPA_KEY_MGMT_OWE BIT(22)
#define UMAC_CHAN_CNT (16)
enum umac_ops_type {
UMAC_OPS_HOST,
UMAC_OPS_LOCAL,
};
enum umac_ops_local_type {
UMAC_OPS_LOCAL_TYPE_LWIP,
UMAC_OPS_LOCAL_TYPE_GMAC,
};
struct umac_ops {
int type;
void *priv;
int (*recv_data)(struct umac_ops *ops, unsigned char *data, unsigned int len);
};
struct umac_config {
unsigned short freq_start, freq_end;
unsigned short chan_list[UMAC_CHAN_CNT];
unsigned char tx_bw, tx_mcs, acs, acs_tm, primary_chan, bgrssi, bss_bw, chan_cnt;
unsigned char hg0[1024];
unsigned char hg1[1024];
};
extern struct umac_config *sys_get_umaccfg(void);
extern int sys_save_umaccfg(struct umac_config *cfg);
extern int umac_init(void);
extern int umac_config_read(const char *name, char *buff, int size);
extern int umac_config_write(const char *name, char *buff, int size);
extern int32 umac_add_txw80x(void *ops);
extern int wpas_init(void);
extern int wpas_start(char *ifname);
extern int wpas_stop(char *ifname);
extern int wpas_cli(char *ifname, char *cmd, char *reply_buff, int reply_len);
extern int hapd_init(void);
extern int hapd_start(char *ifname);
extern int hapd_stop(char *ifname);
extern int hapd_cli(char *ifname, char *cmd, char *reply_buff, int reply_len);
#ifdef __cplusplus
}
#endif
#endif

174
sdk/include/lib/umac/wifi_cfg.h Normal file
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#ifndef _HGUC_WIFI_CFG_H_
#define _HGUC_WIFI_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 wificfg_save(int8 force);
void syscfg_dump(void);
void wificfg_set_mode(uint8 mode);
int32 wificfg_get_mode();
int32 wificfg_set_bss_bw(uint8 ifidx, uint8 bss_bw);
int32 wificfg_get_bss_bw(uint8 ifidx);
int32 wificfg_set_tx_mcs(uint8 tx_mcs);
int32 wificfg_set_channel(uint8 ifidx, uint8 channel);
int32 wificfg_set_chan_list(uint8 ifidx, uint16 *chan_list, uint8 chan_cnt);
int32 wificfg_set_macaddr(uint8 ifidx, uint8 *addr);
int32 wificfg_set_ssid(uint8 ifidx, uint8 *ssid);
int32 wificfg_set_bssid(uint8 ifidx, uint8 *bssid);
int32 wificfg_set_mcast_key(uint8 ifidx, uint8 *key);
int32 wificfg_set_wpa_psk(uint8 ifidx, uint8 *key);
int32 wificfg_get_psk(uint8 *key);
int32 wificfg_set_key_mgmt(uint8 ifidx, uint32 key_mgmt);
int32 wificfg_get_ssid(uint8 ifidx, uint8 ssid[32]);
int32 wificfg_get_bssid(uint8 ifidx, uint8 *bssid);
int32 wificfg_get_wpa_psk(uint8 ifidx, uint8 psk[32]);
int32 wificfg_get_chan_list(uint8 ifidx, uint16 *chan_list, uint8 chan_cnt);
int32 wificfg_set_acs(uint8 ifidx, uint8 acs, uint8 tmo);
int32 wificfg_set_pri_chan(uint8 pri_chan);
int32 wificfg_set_tx_power(uint8 txpower);
int32 wificfg_get_txpower(uint8 ifidx);
int32 wificfg_set_beacon_int(uint8 ifidx, uint32 beacon_int);
int32 wificfg_set_heartbeat_int(uint8 ifidx, uint32 heartbeat_int);
int32 wificfg_set_bss_maxidle(uint8 ifidx, uint32 max_idle);
int32 wificfg_set_wkio_mode(uint8 ifidx, uint8 mode);
int32 wificfg_set_dtim_period(uint8 ifidx, uint32 dtim_period);
int32 wificfg_set_psmode(uint8 ifidx, uint8 psmode);
int32 wificfg_set_wkdata_save(uint8 ifidx, uint8 wkdata_save);
int32 wificfg_set_autosleep(uint8 ifidx, uint8 autosleep);
int32 wificfg_set_psconnect(uint8 period, uint8 roundup);
int32 wificfg_load_def(uint8 reset);
int32 wificfg_set_sleep_aplost_time(uint8 ifidx, uint32 time);
int32 wificfg_set_agg_cnt(uint8 agg_cnt);
int32 wificfg_get_agg_cnt(uint8 ifidx);
int32 wificfg_set_auto_chan_switch(uint8 disable);
int32 wificfg_set_reassoc_wkhost(uint8 ifidx, uint8 enable);
int32 wificfg_set_wakeup_io(uint8 io, uint8 edge);
const char *wificfg_keymgmt_str(uint8 ifidx);
const char *wificfg_wifimode_str(uint8 ifidx);
int32 wificfg_set_auto_sleep_time(uint8 ifidx, int32 time);
int32 wificfg_set_pair_autostop(uint8 ifidx, uint8 en);
int32 wificfg_set_super_pwr_off(uint8 off);
int32 wificfg_set_repeater_ssid(uint8 ifidx, uint8 *ssid);
int32 wificfg_set_repeater_psk(uint8 ifidx, uint8 *data, uint32 data_len);
int32 wificfg_set_auto_save(uint8 ifidx, uint8 off);
int32 wificfg_set_dcdc13(uint8 en);
int32 wificfg_set_acktmo(uint16 tmo);
int32 wificfg_set_pa_pwrctrl_dis(uint8 dis);
int32 wificfg_set_dhcpc_en(uint8 ifidx, uint8 en);
int32 wificfg_set_mcast_txparam(uint8 ifidx, uint8 *data);
int32 wificfg_set_ant_auto_off(uint8 off);
int32 wificfg_set_ant_sel(uint8 sel);
int32 wificfg_set_wkhost_reasons(uint8 ifidx, uint8 *reasons, uint8 count);
int32 wificfg_set_mac_filter_en(uint8 ifidx, uint8 en);
int32 wificfg_get_use2addr(void);
int32 wificfg_set_ap_hide(uint8 ifidx, uint8 en);
int32 wificfg_set_dual_ant(uint8 en);
int32 wificfg_set_max_txcnt(uint8 frm_max, uint8 rts_max);
int32 wificfg_set_dup_filter_en(uint8 en);
int32 wificfg_set_dis_1v1_m2u(uint8 dis);
int32 wificfg_set_dis_psconnect(uint8 dis);
int32 wificfg_get_freq_range(uint8 ifidx, uint16 *freq_start, uint16 *freq_end, uint8 *chan_bw);
int32 wificfg_get_freq_range(uint8 ifidx, uint16 *freq_start, uint16 *freq_end, uint8 *chan_bw);
int32 wificfg_set_cca_for_ce(uint8 en);
int32 wificfg_set_ap_psmode(uint8 en);
int32 wificfg_set_tx_bw(uint8 tx_bw);
int32 wificfg_set_ap_chan_switch(uint8 ifidx, uint8 chan, uint8 counter);
int32 wificfg_get_curr_freq(uint8 ifidx);
int32 wificfg_set_connect_paironly(uint8 en);
int32 wificfg_set_paired_stas(uint8 ifidx, uint8 *mac_list, uint8 cnt);
int32 wificfg_set_wait_psmode(uint8 mode);
int32 wificfg_set_standby(uint8 channel, uint32 period_ms);
int32 wificfg_set_wkupdata_mask(uint8 ifidx, uint8 offset, uint8 *mask, uint32 mask_len);
int32 wificfg_set_wakeup_data(uint8 ifidx, uint8 *data, uint32 data_len);
int32 wificfg_set_wkdata_svr_ip(uint8 ifidx, uint32 svr_ip);
int32 wificfg_set_passwd(uint8 ifidx, uint8 *passwd);
int32 wificfg_set_rpasswd(uint8 ifidx, uint8 *passwd);
int32 wificfg_set_signal_threshold(uint8 ifidx, uint8 rssi_thres, uint8 evm_thres);
#ifdef __cplusplus
}
#endif
#endif

144
sdk/include/lib/umac/wifi_mgr.h Normal file
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#ifndef HGIC_WIFI_MGR_H_
#define HGIC_WIFI_MGR_H_
#include "sys_config.h"
#include "typesdef.h"
#include "errno.h"
#include "list.h"
#include "dev.h"
#include "devid.h"
#include "list.h"
#include "osal/string.h"
#include "osal/mutex.h"
#include "osal/semaphore.h"
#include "osal/mutex.h"
#include "osal/task.h"
#include "osal/timer.h"
#include "hal/netdev.h"
#include "lib/common/rbuffer.h"
#include "lib/bus/macbus/mac_bus.h"
#include "lib/skb/skb.h"
#include "lib/skb/skb_list.h"
#include "lib/lmac/hgic.h"
#include "lib/net/utils.h"
#include "lib/umac/ieee80211.h"
#ifdef __cplusplus
extern "C" {
#endif
#define ETH_P_WIFIMGR (0x4855)
#define ETH_P_HGRAW (0x4884)
#define WIFIMGR_WORK_CNT (4)
#define WIFIMGR_LOCAL_IDCNT (16)
struct wifi_mgr;
enum wifimgr_frm_type {
WIFIMGR_FRM_TYPE_ETHER = 0,
WIFIMGR_FRM_TYPE_HGIC,
WIFIMGR_FRM_TYPE_RAW,
};
enum wifimgr_stype {
WIFI_MGR_STYPE_NONE = 0,
WIFI_MGR_STYPE_PSALIVE = 1,
WIFI_MGR_STYPE_MGRCMD = 2,
};
enum wifimgr_cmd{
WIFIMGR_CMD_RESET_STA,
WIFIMGR_CMD_SET_STA_FREQINFO,
};
struct wifimgr_hdr {
uint16 magic, len, crc;
uint8 type, r1, r2, r3;
};
typedef int32(*wifimgr_work_cb)(struct wifi_mgr *mgr, uint32 param1, uint32 param2);
struct wifimgr_work {
uint32 param1, param2;
wifimgr_work_cb run;
};
struct wifi_dev {
struct netdev ndev;
netdev_input_cb input_cb;
uint8 addr[6];
uint8 ifidx;
uint8 open:1;
struct wifi_mgr *mgr;
};
struct wifi_mgr {
struct netdev ndev;
netdev_input_cb input_cb;
void *input_priv;
uint8 addr[6];
uint8 frm_type;
uint8 open:1, netif:1, init_report:1, icmp_mntr:1;
uint32 if_recv, if_write, if_err;
uint16 bus_txcookie, bus_rxcookie;
uint16 drv_aggsize;
ieee80211_evt_cb old_cb;
struct list_head smod;
struct mac_bus *bus;
struct skb_list cmdlist;
struct skb_list up2host;
struct skb_list cachedata;
struct os_work work;
os_mutex_t lock;
os_timer_t timer;
uint32 agg_len;
uint8 *agg_buff;
int8 rssi[2];
uint16 host_alive;
struct sk_buff *cmdskb;
struct lmac_ops *lops;
struct bt_ops *btops;
uint32 local_ids[WIFIMGR_LOCAL_IDCNT];
};
struct wifimgr_submod {
struct list_head list;
struct wifi_mgr *mgr;
uint8 type;
const char *name;
int32(*event_proc)(struct wifimgr_submod *smod, uint8 ifidx, uint16 evt, uint32 param1, uint32 param2);
int32(*cmd_proc)(struct wifimgr_submod *smod, struct sk_buff **skb);
int32(*rx_wifimgr)(struct wifimgr_submod *smod, uint8 ifidx, uint8 *data, uint32 len);
};
struct sk_buff *wifi_mgr_alloc_resp(struct sk_buff *skb, int8 *data, int32 len);
void wifi_mgr_print2host(void *priv, char *msg, int len);
int32 wifi_mgr_notify_host(struct wifi_mgr *mgr, uint8 event_id, uint8 *args, int32 len);
int32 wifi_mgr_buswrite_cmdresp(struct wifi_mgr *mgr, struct sk_buff *skb, int status);
int32 wifi_mgr_buswrite_data(struct wifi_mgr *mgr, uint8 *data, uint32 len, uint32 flags);
int32 wifi_mgr_send_wifimgr_data(uint8 *dest, uint8 stype, uint8 *data, uint32 len);
void wifi_mgr_switch(int8 to_host);
void wifi_mgr_add_submod(struct wifimgr_submod *smod);
int32 wifi_mgr_init(enum mac_bus_type bus_type, int8 frm_type, void *ops, void *btops, struct macbus_param *param);
void wifi_mgr_proc_hgic_cmd(struct wifi_mgr *mgr, struct sk_buff *skb);
void wifi_mgr_status(void);
int32 wifi_mgr_reset_sta(struct wifi_mgr *mgr, uint8 *addr);
int32 wifi_mgr_set_sta_freqinfo(struct wifi_mgr *mgr, uint8 *freqinfo, uint32 size);
int32 wifi_mgr_enable_psalive(uint8 ifidx, uint8 wnb_support);
void wifi_mgrcmd_enable(void);
int32 wifi_mgr_enable_psconnect(void);
void wifi_mgr_enable_dhcpc(void);
int32 host_cmd_resp(int16 ret, uint8 *resp, uint32 resp_len, void *hdr);
int32 host_data_send(uint8 *data, uint32 data_len);
int32 host_event_new(uint32 evt_id, uint8 *data, uint32 data_len);
#ifdef __cplusplus
}
#endif
#endif

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