Initial commit: TXW82x FPV v2.7.0.7-42229 SDK + project sources
This commit is contained in:
183
sdk/include/hal/dma2d.h
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183
sdk/include/hal/dma2d.h
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#ifndef _HAL_DMA2D_H_
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#define _HAL_DMA2D_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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enum dma2d_color_type {
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DMA2D_COLOR_TYPE_ARGB8888,
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DMA2D_COLOR_TYPE_RGB888 ,
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DMA2D_COLOR_TYPE_RGB565 ,
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DMA2D_COLOR_TYPE_ARGB1555,
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DMA2D_COLOR_TYPE_ARGB4444,
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DMA2D_COLOR_TYPE_L8 ,
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DMA2D_COLOR_TYPE_AL44 ,
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DMA2D_COLOR_TYPE_AL88 ,
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DMA2D_COLOR_TYPE_L4 ,
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DMA2D_COLOR_TYPE_A8 ,
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DMA2D_COLOR_TYPE_A4 ,
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DMA2D_COLOR_TYPE_RESERVED,
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};
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enum dma2d_ioctl_type {
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DMA2D_IOCTL_CHECK_DONE,
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DMA2D_IOCTL_CHECK_RESULT,
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DMA2D_IOCTL_SUSPEND,
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DMA2D_IOCTL_SUSPEND_CHECK,
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DMA2D_IOCTL_RESUME,
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DMA2D_IOCTL_RESUME_CHECK,
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DMA2D_IOCTL_ABORT,
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DMA2D_IOCTL_WATERMARK,
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DMA2D_IOCTL_CONFIG_FG,
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DMA2D_IOCTL_CONFIG_BG,
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};
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enum dma2d_irq_type {
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DMA2D_IRQ_TYPE_TRANS_ERR,
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DMA2D_IRQ_TYPE_TRANS_DONE,
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DMA2D_IRQ_TYPE_TRANS_WM,
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DMA2D_IRQ_TYPE_CLUT_ERR,
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DMA2D_IRQ_TYPE_CLUT_DONE,
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DMA2D_IRQ_TYPE_CONFIG_ERR,
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};
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enum dma2d_clut_mode_type {
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DMA2D_CLUT_MODE_ARGB8888 = 0,
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DMA2D_CLUT_MODE_RGB888,
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};
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enum dma2d_work_status {
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DMA2D_STATUS_DONE = 0,
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DMA2D_STATUS_WORKING,
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DMA2D_STATUS_SUSPEND,
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DMA2D_STATUS_CLUT_ERR,
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DMA2D_STATUS_CONFIG_ERR,
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DMA2D_STATUS_TRANS_ERR,
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DMA2D_STATUS_TIMEOUT,
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};
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enum dma2d_alpha_type {
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DMA2D_ALPHA_MODE_SAVE = 0,
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DMA2D_ALPHA_MODE_FIXED_VAL,
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DMA2D_ALPHA_MODE_PRESENTAGE,
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DMA2D_ALPHA_MODE_RESERVED,
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};
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struct dma2d_src_param {
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uint32 alpha_val : 8, alpha_mode : 8, alpha_reverse : 1, r_b_swap : 1, clut_mode : 4, reserved : 10;
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};
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struct dma2d_dst_param {
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uint32 r_b_swap : 1, alpha_reverse : 1, byte_swap : 1, reserved : 29;
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};
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struct dma2d_blkcpy_param {
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uint32 color_mode;
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uint32 src_addr;
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uint32 dst_addr;
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uint32 src_pixel_width : 16,
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dst_pixel_width : 16;
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uint32 blk_pixel_width : 16,
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blk_pixel_height : 16;
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uint32 src_pixel_start_width : 16,
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src_pixel_start_height : 16;
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uint32 dst_pixel_start_width : 16,
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dst_pixel_start_height : 16;
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};
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struct dma2d_memcpy_param {
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uint32 color_mode;
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uint32 src_addr;
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uint32 dst_addr;
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uint32 src_pixel_width : 16,
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src_pixel_height : 16;
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};
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struct dma2d_memset_param {
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uint32 color_mode;
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uint32 color_set;
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uint32 dst_addr;
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uint32 dst_pixel_width : 16,
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dst_pixel_height : 16;
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uint32 pixel_start_width : 16,
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pixel_start_height : 16;
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uint32 set_pixel_width : 16,
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set_pixel_height : 16;
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};
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struct dma2d_convert_param {
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uint32 src_addr;
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uint32 dst_addr;
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uint32 photo_pixel_width : 16,
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photo_pixel_height : 16;
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uint32 src_color_mode : 16,
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dst_color_mode : 16;
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struct dma2d_src_param src_param;
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struct dma2d_dst_param dst_param;
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};
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struct dma2d_mixture_param {
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uint32 photo0_addr;
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uint32 photo1_addr;
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uint32 output_addr;
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uint32 photo0_color_val;
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uint32 photo1_color_val;
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uint32 photo_pixel_width : 16,
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photo_pixel_height : 16;
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uint32 photo0_color_mode : 10,
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photo1_color_mode : 10,
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output_color_mode : 10,
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reserved : 2;
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struct dma2d_src_param src_param[2];
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struct dma2d_dst_param dst_param;
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};
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struct dma2d_clut_param {
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uint32 clut_addr;
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uint32 clut_size;
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enum dma2d_clut_mode_type clut_mode;
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};
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/* User interrupt handle */
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typedef void (*dma2d_irq_hdl)(uint32 irq, uint32 irq_data);
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/* DMA2D api for user */
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struct dma2d_device {
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struct dev_obj dev;
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};
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struct dma2d_hal_ops{
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struct devobj_ops ops;
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int32(*blkcpy) (struct dma2d_device *dma2d, struct dma2d_blkcpy_param *p_blkcpy);
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int32(*memcpy) (struct dma2d_device *dma2d, struct dma2d_memcpy_param *p_memcpy);
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int32(*memset) (struct dma2d_device *dma2d, struct dma2d_memset_param *p_memset);
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int32(*convert)(struct dma2d_device *dma2d, struct dma2d_convert_param *p_convert);
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int32(*mixture)(struct dma2d_device *dma2d, struct dma2d_mixture_param *p_mixture);
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int32(*ioctl)(struct dma2d_device *dma2d, uint32 cmd, uint32 param1, uint32 param2);
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int32(*request_irq)(struct dma2d_device *dma2d, uint32 irq_flag, dma2d_irq_hdl irqhdl, uint32 irq_data);
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int32(*release_irq)(struct dma2d_device *dma2d, uint32 irq_flag);
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};
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/* DMA2d API functions */
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int32 dma2d_blkcpy (struct dma2d_device *dma2d, struct dma2d_blkcpy_param *p_blkcpy);
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int32 dma2d_memcpy (struct dma2d_device *dma2d, struct dma2d_memcpy_param *p_memcpy);
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int32 dma2d_memset (struct dma2d_device *dma2d, struct dma2d_memset_param *p_memset);
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int32 dma2d_convert(struct dma2d_device *dam2d, struct dma2d_convert_param *p_convert);
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int32 dma2d_mixture(struct dma2d_device *dma2d, struct dma2d_mixture_param *p_mixture);
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int32 dma2d_clut_init(struct dma2d_device *dam2d);
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int32 dma2d_ioctl(struct dma2d_device *dam2d);
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int32 dma2d_request_irq(struct dma2d_device *dam2d);
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int32 dma2d_release_irq(struct dma2d_device *dam2d);
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int32 dma2d_check_status(struct dma2d_device *dma2d);
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int32 dma2d_abort_trans(struct dma2d_device *dma2d);
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int32 dma2d_suspend_trans(struct dma2d_device *dma2d);
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int32 dma2d_suspend_status(struct dma2d_device *dma2d);
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int32 dma2d_resume_trans(struct dma2d_device *dma2d);
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int32 dma2d_resume_status(struct dma2d_device *dma2d);
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#ifdef __cplusplus
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}
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#endif
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#endif
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