zouhaitao/TAIXIN
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Initial commit: TXW82x FPV v2.7.0.7-42229 SDK + project sources

Browse Source
This commit is contained in:
zouhaitao
2026-07-06 11:30:13 +08:00
commit e76462eeb7
3451 changed files with 1415300 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

131
sdk/include/dev/audio/ausys.h Normal file
View File

@@ -0,0 +1,131 @@
#ifndef _AUSYS_H
#define _AUSYS_H
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------
* AUSYS DA platform APIs
*----------------------------------*/
enum ausys_da_platform {
AUSYS_AUDA,
AUSYS_IIS0,
AUSYS_IIS1,
};
enum ausys_da_msg_type {
//FIFO empty message
AUSYS_DA_MSG_FIFO_FULL = BIT(0),
//FIFO full message
AUSYS_DA_MSG_FIFO_EMPTY = BIT(1),
//DA successfully play once
AUSYS_DA_MSG_PLAY_DONE = BIT(2),
//DA successfully play half
AUSYS_DA_MSG_PLAY_HALF = BIT(3),
};
struct ausys_da_msg_content {
uint32 fifo_next_addr;
uint32 fifo_next_len;
};
struct ausys_da_msg {
enum ausys_da_msg_type type;
struct ausys_da_msg_content da_content;
void *user_content;
};
int32 ausys_da_put(void* buf, uint32 bytes);
int32 ausys_da_play(void);
int32 ausys_da_change_sample_rate(uint32 sample_rate);
int32 ausys_da_change_volume(uint32 percent_0to100);
int32 ausys_da_get_cur_volume(uint32 *percent_0to100);
int32 ausys_da_register_msg(enum ausys_da_msg_type msg_type);
int32 ausys_da_unregister_msg(enum ausys_da_msg_type msg_type);
int32 ausys_da_get_msg(struct ausys_da_msg *msg, uint32 tmo_ms);
int32 ausys_da_ioctl(enum ausys_da_platform platform, uint32 cmd, uint32 arg0, uint32 arg1);
int32 ausys_da_deinit(void);
int32 ausys_da_init(
uint32 sample_rate,
uint32 sample_bits,
uint32 channel,
enum ausys_da_platform platform,
uint32 buf_bytes,
uint32 per_buf_bytes,
uint32 play_null_bytes
);
/*----------------------------------
* AUSYS AD platform APIs
*----------------------------------*/
enum ausys_ad_platform {
AUSYS_AUAD,
AUSYS_PDM,
AUSYS_IIS_SLAVER0,
AUSYS_IIS_SLAVER1,
};
enum ausys_ad_msg_type {
//AD successfully play once
AUSYS_AD_MSG_PLAY_DONE = BIT(0),
//AD successfully play half
AUSYS_AD_MSG_PLAY_HALF = BIT(1),
};
struct ausys_ad_msg_content {
uint32 fifo_next_addr;
uint32 fifo_next_len;
uint32 fifo_cur_addr;
uint32 fifo_cur_len;
};
struct ausys_ad_msg {
enum ausys_ad_msg_type type;
struct ausys_ad_msg_content ad_content;
void *user_content;
};
/*!
* type of user call back handle
*/
typedef void (*type_ausys_ad_user_cb)(void* buf, uint32 bytes, uint32 res);
int32 ausys_ad_record(enum ausys_ad_platform platform);
int32 ausys_ad_register_msg(enum ausys_ad_platform platform, enum ausys_ad_msg_type msg_type);
int32 ausys_ad_unregister_msg(enum ausys_ad_platform platform, enum ausys_ad_msg_type msg_type);
int32 ausys_ad_get_msg(enum ausys_ad_platform platform, struct ausys_ad_msg *msg, uint32 tmo_ms);
int32 ausys_ad_ioctl(enum ausys_ad_platform platform, uint32 cmd, uint32 arg0, uint32 arg1);
int32 ausys_ad_deinit(enum ausys_ad_platform platform);
int32 ausys_ad_init(
enum ausys_ad_platform platform,
uint32 sample_rate,
uint32 sample_bits,
uint32 channel,
uint32 buf_bytes,
uint32 per_buf_bytes,
type_ausys_ad_user_cb user_cb,
uint32 user_data
);
#ifdef __cplusplus
}
#endif
#endif

14
sdk/include/dev/audio/ausys_ad.h Normal file
View File

@@ -0,0 +1,14 @@
#ifndef __AUSYS_AD_H
#define __AUSYS_AD_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif

21
sdk/include/dev/audio/ausys_config.h Normal file
View File

@@ -0,0 +1,21 @@
#ifndef __AUSYS_CONFIG_H
#define __AUSYS_CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
/*!
*
*/
#ifdef __cplusplus
}
#endif
#endif

26
sdk/include/dev/audio/ausys_da.h Normal file
View File

@@ -0,0 +1,26 @@
#ifndef __AUSYS_DA_H
#define __AUSYS_DA_H
#ifdef __cplusplus
extern "C" {
#endif
/*!
* DA platform test mode cmd
*/
enum ausys_da_test {
AUSYS_DA_TEST_OPEN,
AUSYS_DA_TEST_CLOSE,
AUSYS_DA_TEST_PLAY_SINE,
};
int32 ausys_da_test_mode(uint32 cmd, uint32 param1, uint32 param2, uint32 param3);
#ifdef __cplusplus
}
#endif
#endif

49
sdk/include/dev/audio/ausys_debug.h Normal file
View File

@@ -0,0 +1,49 @@
#ifndef __AUSYS_DEBUG_H
#define __AUSYS_DEBUG_H
#ifdef __cplusplus
extern "C" {
#endif
#define AUSYS_DEBUG(fmt, args...) //_os_printf(fmt, ##args)
#define AUSYS_INFO(fmt, ...) \
do{ \
os_printf("ausys info:"fmt,##__VA_ARGS__); \
}while(0);
#define AUSYS_ERR(fmt, ...) \
do{ \
os_printf("ausys err:"fmt,##__VA_ARGS__); \
os_printf("Func:%s Line:%d LR=0x%x\r\n", \
__func__,__LINE__, (uint32)RETURN_ADDR()); \
}while(0);
#define AUSYS_WARNING(fmt, ...) \
do{ \
os_printf("ausys warning:"fmt,##__VA_ARGS__); \
}while(0);
#define AUSYS_ASSERT(expr, info) \
do { \
if (expr) { \
AUSYS_ERR(info); \
return RET_ERR; \
} \
} while(0);
#define AUSYS_PRINT_ARRAY(buf, len) do{\
uint8 *p_print = (uint8 *)buf;\
_os_printf("\r\n");\
for (uint32 __ii=1; __ii<=len; __ii++) {\
_os_printf("%02x ", p_print[__ii-1]);\
if (((__ii)%16 == 0)) _os_printf("\r\n");\
}\
_os_printf("\r\n");\
}while(0);
#ifdef __cplusplus
}
#endif
#endif

17
sdk/include/dev/audio/ausys_eq.h Normal file
View File

@@ -0,0 +1,17 @@
#ifndef __AUSYS_EQ_H
#define __AUSYS_EQ_H
#ifdef __cplusplus
extern "C" {
#endif
#define EQ_COEFF_NUM (50)
extern const int32 eq_coeff_origin[50];
#ifdef __cplusplus
}
#endif
#endif

56
sdk/include/dev/audio/ausys_queue.h Normal file
View File

@@ -0,0 +1,56 @@
#ifndef __AUSYS_QUEUE_H
#define __AUSYS_QUEUE_H
#ifdef __cplusplus
extern "C" {
#endif
struct __ausys_queue_elem {
uint32 addr;
uint32 bytes;
};
typedef struct __ausys_queue_ctrl{
uint32 elem_num;
uint16 head;
uint16 tail;
uint16 per_bytes;
uint16 sta_init:1,
sta_none:1;
void *p_malloc;
void *p_use;
struct __ausys_queue_elem *p_queue;
}TYPE_AUSYS_QUEUE;
int32 ausys_queue_create(TYPE_AUSYS_QUEUE *ausys_queue, uint32 total_bytes, uint32 per_bytes);
int32 ausys_queue_destroy(TYPE_AUSYS_QUEUE *ausys_queue);
int32 ausys_queue_elem_ent(TYPE_AUSYS_QUEUE *ausys_queue, void *buf, uint32 bytes, uint32 need_cpy);
int32 ausys_queue_elem_del(TYPE_AUSYS_QUEUE *ausys_queue);
void *ausys_queue_get_tail_addr(TYPE_AUSYS_QUEUE *ausys_queue);
uint32 ausys_queue_get_tail_len(TYPE_AUSYS_QUEUE *ausys_queue);
void ausys_queue_clr_head_first_half(TYPE_AUSYS_QUEUE *ausys_queue);
void ausys_queue_clr_head_second_half(TYPE_AUSYS_QUEUE *ausys_queue);
void ausys_queue_clr_head_all(TYPE_AUSYS_QUEUE *ausys_queue);
void *ausys_queue_get_head_addr(TYPE_AUSYS_QUEUE *ausys_queue);
uint32 ausys_queue_get_head_len(TYPE_AUSYS_QUEUE *ausys_queue);
void *ausys_queue_get_index_addr(TYPE_AUSYS_QUEUE *ausys_queue, uint32 index);
uint32 ausys_queue_get_index_len(TYPE_AUSYS_QUEUE *ausys_queue, uint32 index);
uint32 ausys_queue_get_head_index(TYPE_AUSYS_QUEUE *ausys_queue);
uint32 ausys_queue_get_tail_index(TYPE_AUSYS_QUEUE *ausys_queue);
void *ausys_queue_get_headnext_addr(TYPE_AUSYS_QUEUE *ausys_queue);
uint32 ausys_queue_get_headnext_len(TYPE_AUSYS_QUEUE *ausys_queue);
int32 ausys_queue_is_empty(TYPE_AUSYS_QUEUE *ausys_queue);
int32 ausys_queue_is_full(TYPE_AUSYS_QUEUE *ausys_queue);
#ifdef __cplusplus
}
#endif
#endif

20
sdk/include/dev/audio/ausys_test.h Normal file
View File

@@ -0,0 +1,20 @@
#ifndef __AUSYS_TEST_H
#define __AUSYS_TEST_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif

208
sdk/include/dev/audio/components/ad/auadc.h Normal file
View File

@@ -0,0 +1,208 @@
#ifndef _AUADC_H
#define _AUADC_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief AUADC sample_rate type
*/
enum auadc_sample_rate {
AUADC_SAMPLE_RATE_8K,
AUADC_SAMPLE_RATE_11_025K,
AUADC_SAMPLE_RATE_16K,
AUADC_SAMPLE_RATE_12K,
AUADC_SAMPLE_RATE_22_05K,
AUADC_SAMPLE_RATE_24K,
AUADC_SAMPLE_RATE_32K,
AUADC_SAMPLE_RATE_44_1K,
AUADC_SAMPLE_RATE_48K,
};
/**
* @brief AUADC irq_flag type
*/
enum auadc_irq_flag {
/*!
* @brief:
*
*/
AUADC_IRQ_FLAG_HALF = BIT(0),
/*!
* @brief:
*
*/
AUADC_IRQ_FLAG_FULL = BIT(1),
};
/**
* @brief AUADC ioctl_cmd type
*/
enum auadc_ioctl_cmd {
/*!
* @brief:
*
*/
AUADC_IOCTL_CMD_SET_SAMPLE_RATE,
/*!
* @brief:
*
*/
AUADC_IOCTL_CMD_SET_SOUND_CHANNEL,
/*!
* @brief: Adjust the power digital gain
*
*/
AUADC_IOCTL_CMD_SET_DIGITAL_GAIN,
/*!
* @brief: Adjust the power analog gain
*
*/
AUADC_IOCTL_CMD_SET_ANALOG_GAIN,
};
/* User interrupt handle */
typedef void (*auadc_irq_hdl)(uint32 irq, uint32 irq_data);
/* AUADCC api for user */
struct auadc_device {
struct dev_obj dev;
};
/* AUADC api for user */
struct auadc_hal_ops {
struct devobj_ops ops;
int32(*open)(struct auadc_device *auadc, enum auadc_sample_rate sample_rate);
int32(*close)(struct auadc_device *auadc);
int32(*read)(struct auadc_device *auadc, void* buf, uint32 bytes);
int32(*ioctl)(struct auadc_device *auadc, enum auadc_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
int32(*request_irq)(struct auadc_device *auadc, enum auadc_irq_flag irq_flag, auadc_irq_hdl irq_hdl, uint32 irq_data);
int32(*release_irq)(struct auadc_device *auadc, enum auadc_irq_flag irq_flag);
};
/* AUADC API functions */
/**
* @brief auadc_open
*
*
* @note .
*
* @param auadc The address of auadc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auadc_open(struct auadc_device *auadc, enum auadc_sample_rate sample_rate);
/**
* @brief auadc_close
*
*
* @note .
*
* @param auadc The address of auadc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auadc_close(struct auadc_device *auadc);
/**
* @brief auadc_read
*
*
* @note .
*
* @param auadc The address of auadc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auadc_read(struct auadc_device *auadc, void* buf, uint32 bytes);
/**
* @brief auadc_ioctl
*
*
* @note .
*
* @param auadc The address of auadc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auadc_ioctl(struct auadc_device *auadc, enum auadc_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
/**
* @brief auadc_request_irq
*
*
* @note .
*
* @param auadc The address of auadc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auadc_request_irq(struct auadc_device *auadc, enum auadc_irq_flag irq_flag, auadc_irq_hdl irq_hdl, uint32 irq_data);
/**
* @brief auadc_release_irq
*
*
* @note .
*
* @param auadc The address of auadc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auadc_release_irq(struct auadc_device *auadc, enum auadc_irq_flag irq_flag);
#ifdef __cplusplus
}
#endif
#endif

21
sdk/include/dev/audio/components/ad/hg_auadc_v0.h Normal file
View File

@@ -0,0 +1,21 @@
#ifndef _HG_AUADC_V0_H_
#define _HG_AUADC_V0_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 hg_auadc_v0_init(struct auadc_device *auadc);
int32 hg_auadc_v0_open(struct auadc_device *auadc, enum auadc_sample_rate sample_rate);
int32 hg_auadc_v0_close(struct auadc_device *auadc);
int32 hg_auadc_v0_read(struct auadc_device *auadc, void* buf, uint32 bytes);
int32 hg_auadc_v0_ioctl(struct auadc_device *auadc, enum auadc_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
int32 hg_auadc_v0_request_irq(struct auadc_device *auadc, enum auadc_irq_flag irq_flag, auadc_irq_hdl irq_hdl, uint32 irq_data);
int32 hg_auadc_v0_release_irq(struct auadc_device *auadc, enum auadc_irq_flag irq_flag);
#ifdef __cplusplus
}
#endif
#endif /* _HGI2S_V0_H_ */

181
sdk/include/dev/audio/components/alaw/aualaw.h Normal file
View File

@@ -0,0 +1,181 @@
#ifndef _AUALAW_H
#define _AUALAW_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief AUALAW irq_flag type
*/
enum aualaw_irq_flag {
/*!
* @brief:
*
*/
AUALAW_IRQ_FLAG_HALF = BIT(0),
/*!
* @brief:
*
*/
AUALAW_IRQ_FLAG_FULL = BIT(1),
};
/**
* @brief AUALAW ioctl_cmd type
*/
enum aualaw_ioctl_cmd {
/*!
* @brief:
*
*/
AUALAW_IOCTL_CMD_NONE,
};
/* User interrupt handle */
typedef void (*aualaw_irq_hdl)(uint32 irq, uint32 irq_data);
/* AUALAW api for user */
struct aualaw_device {
struct dev_obj dev;
};
struct aualaw_hal_ops {
struct devobj_ops ops;
int32(*open)(struct aualaw_device *aualaw);
int32(*close)(struct aualaw_device *aualaw);
int32(*encode)(struct aualaw_device *aualaw, void* dat_buf, uint32 bytes, void* result_buf);
int32(*decode)(struct aualaw_device *aualaw, void* dat_buf, uint32 bytes, void* result_buf);
int32(*ioctl)(struct aualaw_device *aualaw, enum aualaw_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
int32(*request_irq)(struct aualaw_device *aualaw, enum aualaw_irq_flag irq_flag, aualaw_irq_hdl irq_hdl, uint32 irq_data);
int32(*release_irq)(struct aualaw_device *aualaw, enum aualaw_irq_flag irq_flag);
};
/* AUALAW API functions */
/**
* @brief aualaw_open
*
*
* @note .
*
* @param aualaw The address of aualaw device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aualaw_open(struct aualaw_device *aualaw);
/**
* @brief aualaw_close
*
*
* @note .
*
* @param aualaw The address of aualaw device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aualaw_close(struct aualaw_device *aualaw);
/**
* @brief aualaw_encode
*
*
* @note .
*
* @param aualaw The address of aualaw device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aualaw_encode(struct aualaw_device *aualaw, void* dat_buf, uint32 bytes, void* result_buf);
/**
* @brief aualaw_decode
*
*
* @note .
*
* @param aualaw The address of aualaw device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aualaw_decode(struct aualaw_device *aualaw, void* dat_buf, uint32 bytes, void* result_buf);
/**
* @brief aualaw_ioctl
*
*
* @note .
*
* @param aualaw The address of aualaw device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aualaw_ioctl(struct aualaw_device *aualaw, enum aualaw_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
/**
* @brief aualaw_request_irq
*
*
* @note .
*
* @param aualaw The address of aualaw device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aualaw_request_irq(struct aualaw_device *aualaw, enum aualaw_irq_flag irq_flag, aualaw_irq_hdl irq_hdl, uint32 irq_data);
/**
* @brief aualaw_release_irq
*
*
* @note .
*
* @param aualaw The address of aualaw device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aualaw_release_irq(struct aualaw_device *aualaw, enum aualaw_irq_flag irq_flag);
#ifdef __cplusplus
}
#endif
#endif

22
sdk/include/dev/audio/components/alaw/hg_aualaw_v0.h Normal file
View File

@@ -0,0 +1,22 @@
#ifndef _HG_AUALAW_V0_H_
#define _HG_AUALAW_V0_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 hg_aualaw_v0_init(void);
int32 hg_aualaw_v0_open(struct aualaw_device *aualaw);
int32 hg_aualaw_v0_close(struct aualaw_device *aualaw);
int32 hg_aualaw_v0_encode(struct aualaw_device *aualaw, void* dat_buf, uint32 bytes, void* result_buf);
int32 hg_aualaw_v0_decode(struct aualaw_device *aualaw, void* dat_buf, uint32 bytes, void* result_buf);
int32 hg_aualaw_v0_ioctl(struct aualaw_device *aualaw, enum aualaw_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
int32 hg_aualaw_v0_request_irq(struct aualaw_device *aualaw, enum aualaw_irq_flag irq_flag, aualaw_irq_hdl irq_hdl, uint32 irq_data);
int32 hg_aualaw_v0_release_irq(struct aualaw_device *aualaw, enum aualaw_irq_flag irq_flag);
#ifdef __cplusplus
}
#endif
#endif /* _HGI2S_V0_H_ */

112
sdk/include/dev/audio/components/asrc/auasrc.h Normal file
View File

@@ -0,0 +1,112 @@
#ifndef _AUASRC_H
#define _AUASRC_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief AUASRC ioctl_cmd type
*/
enum auasrc_ioctl_cmd {
/*!
* @brief:
*
*/
AUASRC_IOCTL_CMD_NONE,
};
/* AUASRC api for user */
struct auasrc_device {
struct dev_obj dev;
};
struct auasrc_hal_ops {
struct devobj_ops ops;
int32(*open)(struct auasrc_device *auasrc);
int32(*close)(struct auasrc_device *auasrc);
int32(*run)(struct auasrc_device *auasrc, uint32 hz_from, uint32 hz_to);
int32(*ioctl)(struct auasrc_device *auasrc, enum auasrc_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
};
/* AUASRC API functions */
/**
* @brief auasrc_open
*
*
* @note .
*
* @param auasrc The address of auasrc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auasrc_open(struct auasrc_device *auasrc);
/**
* @brief auasrc_close
*
*
* @note .
*
* @param auasrc The address of auasrc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auasrc_close(struct auasrc_device *auasrc);
/**
* @brief auasrc_encode
*
*
* @note .
*
* @param auasrc The address of auasrc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auasrc_run(struct auasrc_device *auasrc, uint32 hz_from, uint32 hz_to);
/**
* @brief auasrc_ioctl
*
*
* @note .
*
* @param auasrc The address of auasrc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auasrc_ioctl(struct auasrc_device *auasrc, enum auasrc_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
#ifdef __cplusplus
}
#endif
#endif

21
sdk/include/dev/audio/components/asrc/hg_auasrc_v0.h Normal file
View File

@@ -0,0 +1,21 @@
#ifndef _HG_AUASRC_V0_H_
#define _HG_AUASRC_V0_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 hg_auasrc_v0_init(void);
int32 hg_auasrc_v0_open(struct auasrc_device *auasrc);
int32 hg_auasrc_v0_close(struct auasrc_device *auasrc);
int32 hg_auasrc_v0_run(struct auasrc_device *auasrc, uint32 hz_from, uint32 hz_to);
int32 hg_auasrc_v0_ioctl(struct auasrc_device *auasrc, enum auasrc_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
void hg_auasrc_v0_adjust_sample_ofs(void);
#ifdef __cplusplus
}
#endif
#endif /* _HG_AUASRC_V0_H_ */

224
sdk/include/dev/audio/components/da/audac.h Normal file
View File

@@ -0,0 +1,224 @@
#ifndef _AUDAC_H
#define _AUDAC_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief AUDAC sample_rate type
*/
enum audac_sample_rate {
AUDAC_SAMPLE_RATE_8K,
AUDAC_SAMPLE_RATE_11_025K,
AUDAC_SAMPLE_RATE_12K,
AUDAC_SAMPLE_RATE_16K,
AUDAC_SAMPLE_RATE_22_05K,
AUDAC_SAMPLE_RATE_24K,
AUDAC_SAMPLE_RATE_32K,
AUDAC_SAMPLE_RATE_44_1K,
AUDAC_SAMPLE_RATE_48K,
};
/**
* @brief AUDAC irq_flag type
*/
enum audac_irq_flag {
/*!
* @brief:
*
*/
AUDAC_IRQ_FLAG_HALF = BIT(0),
/*!
* @brief:
*
*/
AUDAC_IRQ_FLAG_FULL = BIT(1),
};
/**
* @brief AUDAC ioctl_cmd type
*/
enum audac_ioctl_cmd {
/*!
* @brief:
*
*/
AUDAC_IOCTL_CMD_SET_SAMPLE_RATE,
/*!
* @brief:
*
*/
AUDAC_IOCTL_CMD_SET_SOUND_CHANNEL,
/*!
* @brief: Adjust the power digital gain
*
*/
AUDAC_IOCTL_CMD_SET_DIGITAL_GAIN,
/*!
* @brief: Adjust the power analog gain
*
*/
AUDAC_IOCTL_CMD_SET_ANALOG_GAIN,
/*!
* @brief: Soft mute
*
*/
AUDAC_IOCTL_CMD_SOFT_MUTE,
/*!
* @brief: Change sample rate
* @note :
* 1.Ensure DAC is muted by special method
* 2.You should call "audac_write" API after using this cmd
*
*/
AUDAC_IOCTL_CMD_CHANGE_SAMPLE_RATE,
AUDAC_IOCTL_CMD_GET_DIGITAL_GAIN,
};
/* User interrupt handle */
typedef void (*audac_irq_hdl)(uint32 irq, uint32 irq_data);
/* AUDAC api for user */
struct audac_device {
struct dev_obj dev;
};
struct audac_hal_ops {
struct devobj_ops ops;
int32(*open)(struct audac_device *audac, enum audac_sample_rate sample_rate);
int32(*close)(struct audac_device *audac);
int32(*write)(struct audac_device *audac, void* buf, uint32 bytes);
int32(*ioctl)(struct audac_device *audac, enum audac_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
int32(*request_irq)(struct audac_device *audac, enum audac_irq_flag irq_flag, audac_irq_hdl irq_hdl, uint32 irq_data);
int32(*release_irq)(struct audac_device *audac, enum audac_irq_flag irq_flag);
};
/* AUDAC API functions */
/**
* @brief audac_open
*
*
* @note .
*
* @param audac The address of audac device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 audac_open(struct audac_device *audac, enum audac_sample_rate sample_rate);
/**
* @brief audac_close
*
*
* @note .
*
* @param audac The address of audac device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 audac_close(struct audac_device *audac);
/**
* @brief audac_write
*
*
* @note .
*
* @param audac The address of audac device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 audac_write(struct audac_device *audac, void* buf, uint32 bytes);
/**
* @brief audac_ioctl
*
*
* @note .
*
* @param audac The address of audac device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 audac_ioctl(struct audac_device *audac, enum audac_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
/**
* @brief audac_request_irq
*
*
* @note .
*
* @param audac The address of audac device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 audac_request_irq(struct audac_device *audac, enum audac_irq_flag irq_flag, audac_irq_hdl irq_hdl, uint32 irq_data);
/**
* @brief audac_release_irq
*
*
* @note .
*
* @param audac The address of audac device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 audac_release_irq(struct audac_device *audac, enum audac_irq_flag irq_flag);
#ifdef __cplusplus
}
#endif
#endif

22
sdk/include/dev/audio/components/da/hg_audac_v0.h Normal file
View File

@@ -0,0 +1,22 @@
#ifndef _HG_AUDAC_V0_H_
#define _HG_AUDAC_V0_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 hg_audac_v0_init(struct audac_device *audac);
int32 hg_audac_v0_open(struct audac_device *audac, enum audac_sample_rate sample_rate);
int32 hg_audac_v0_close(struct audac_device *audac);
int32 hg_audac_v0_write(struct audac_device *audac, void* buf, uint32 bytes);
int32 hg_audac_v0_ioctl(struct audac_device *audac, enum audac_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
int32 hg_audac_v0_request_irq(struct audac_device *audac, enum audac_irq_flag irq_flag, audac_irq_hdl irq_hdl, uint32 irq_data);
int32 hg_audac_v0_release_irq(struct audac_device *audac, enum audac_irq_flag irq_flag);
#ifdef __cplusplus
}
#endif
#endif /* _HGI2S_V0_H_ */

112
sdk/include/dev/audio/components/drc/audrc.h Normal file
View File

@@ -0,0 +1,112 @@
#ifndef _AUDRC_H
#define _AUDRC_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief AUDRC ioctl_cmd type
*/
enum audrc_ioctl_cmd {
/*!
* @brief:
*
*/
AUDRC_IOCTL_CMD_NONE,
};
/* AUDRC api for user */
struct audrc_device {
struct dev_obj dev;
};
struct audrc_hal_ops {
struct devobj_ops ops;
int32(*open)(struct audrc_device *audrc);
int32(*close)(struct audrc_device *audrc);
int32(*run)(struct audrc_device *audrc, void *p_content, uint32 bytes);
int32(*ioctl)(struct audrc_device *audrc, enum audrc_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
};
/* AUDRC API functions */
/**
* @brief audrc_open
*
*
* @note .
*
* @param audrc The address of audrc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 audrc_open(struct audrc_device *audrc);
/**
* @brief audrc_close
*
*
* @note .
*
* @param audrc The address of audrc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 audrc_close(struct audrc_device *audrc);
/**
* @brief audrc_encode
*
*
* @note .
*
* @param audrc The address of audrc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 audrc_run(struct audrc_device *audrc, void *p_content, uint32 bytes);
/**
* @brief audrc_ioctl
*
*
* @note .
*
* @param audrc The address of audrc device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 audrc_ioctl(struct audrc_device *audrc, enum audrc_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
#ifdef __cplusplus
}
#endif
#endif

19
sdk/include/dev/audio/components/drc/hg_audrc_v0.h Normal file
View File

@@ -0,0 +1,19 @@
#ifndef _HG_AUDRC_V0_H_
#define _HG_AUDRC_V0_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 hg_audrc_v0_init(void);
int32 hg_audrc_v0_open(struct audrc_device *audrc);
int32 hg_audrc_v0_close(struct audrc_device *audrc);
int32 hg_audrc_v0_run(struct audrc_device *audrc, void *p_content, uint32 bytes);
int32 hg_audrc_v0_ioctl(struct audrc_device *audrc, enum audrc_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
#ifdef __cplusplus
}
#endif
#endif /* _HG_AUDRC_V0_H_ */

212
sdk/include/dev/audio/components/dsd1793/dsd1793.h Normal file
View File

@@ -0,0 +1,212 @@
/**
******************************************************************************
* @file E:\work\venus_v2\SW\trunk\verify\test\audio\dsd1793.h
* @author Troy
* @version V1.0.0
* @date 01-31-2023
* @brief This file contains all the dsd1793 firmware functions.
******************************************************************************
* @attention
*
*
*
*
*
******************************************************************************
*/
#ifndef __DSD1793_H
#define __DSD1793_H
#ifdef __cplusplus
extern "C" {
#endif
#if 1
/*!
* IIC config
*/
//PIN ADDR1, PIN ADDR0
//00, 01, 10, 11
#define DSD1793_PIN_ADDR0 (0)
#define DSD1793_PIN_ADDR1 (0)
#define DSD1793_DSD_MODE (1)
#define DSD1793_PCM_MODE (0)
#define DSD1793_IIC (HG_I2C1_DEVID)
#define DSD1793_IIC_DEVICE_ADDR ((0x4<<4) | (0xC | (DSD1793_PIN_ADDR1) | (DSD1793_PIN_ADDR0)))
#define DSD1793_IIC_SCL_PIN (PC_13)
#define DSD1793_IIC_SDA_PIN (PC_14)
#if 0
//#define DSD1793_IIC_SCL_GPIO_PORT (GPIOC)
//#define DSD1793_IIC_SCL_PIN_NUM (13)
//#define DSD1793_IIC_SDA_GPIO_PORT (GPIOC)
//#define DSD1793_IIC_SDA_PIN_NUM (14)
//#define DSD1793_IIC_SCL_PIN_BIT (BIT(DSD1793_IIC_SCL_PIN_NUM))
//#define DSD1793_IIC_SDA_PIN_BIT (BIT(DSD1793_IIC_SDA_PIN_NUM))
#define SMAPLE_FRQUENCY (48000)
#define OVER_SAMPLE_RATE (192)
#define __SYSCLK (SYS_CLK)
#define SCK_IIS (0)
#define SCK_TIMER (0)
#define DSD1793_SCK_GPIO_PORT (GPIOD)
#define DSD1793_SCK_GPIO_PIN_NUM (14)
#define DSD1793_SCK_GPIO_PIN_BIT (BIT(DSD1793_SCK_GPIO_PIN_NUM))
#define __dsd1793_iic_module_init()\
do{\
TYPE_LL_IIC_INIT _init;\
TYPE_LL_IIC_CFG _cfg;\
memset(&_cfg, 0, sizeof(TYPE_LL_IIC_CFG));\
memset(&_init, 0, sizeof(TYPE_LL_IIC_INIT));\
_cfg.presc = 8;\
_cfg.scldel = 15;\
_cfg.sdadel = 15;\
_cfg.scll = 31;\
_cfg.sclh = 31;\
_cfg.work_mode = LL_IIC_MASTER_MODE;\
ll_iic_init(DSD1793_IIC, &_init);\
ll_iic_config(DSD1793_IIC, &_cfg);\
}while(0);
#define __dsd1793_iic_io_init()\
do{\
ll_gpio_iomap_inout_config(DSD1793_IIC_SCL_GPIO_PORT, DSD1793_IIC_SCL_PIN_NUM, LL_GPIO_OUT_SPI2_SCK_OUT,\
LL_GPIO_IN_SPI2_SCK_IN);\
ll_gpio_iomap_inout_config(DSD1793_IIC_SDA_GPIO_PORT, DSD1793_IIC_SDA_PIN_NUM, LL_GPIO_OUT_SPI2_IO0_OUT,\
LL_GPIO_IN_SPI2_IO0_IN);\
ll_gpio_ospeed_config(DSD1793_IIC_SCL_GPIO_PORT , DSD1793_IIC_SCL_PIN_NUM, LL_GPIO_OSPEED_3);\
ll_gpio_ospeed_config(DSD1793_IIC_SDA_GPIO_PORT , DSD1793_IIC_SDA_PIN_NUM, LL_GPIO_OSPEED_3);\
ll_gpio_pull_config(DSD1793_IIC_SCL_GPIO_PORT , DSD1793_IIC_SCL_PIN_NUM, LL_GPIO_OPENDRAIN_PULL_UP, LL_GPIO_PULL_LEVEL_4_7K);\
ll_gpio_pull_config(DSD1793_IIC_SDA_GPIO_PORT , DSD1793_IIC_SDA_PIN_NUM, LL_GPIO_OPENDRAIN_PULL_UP, LL_GPIO_PULL_LEVEL_4_7K);\
ll_gpio_bit_set(DSD1793_IIC_SCL_GPIO_PORT, DSD1793_IIC_SCL_PIN_BIT);\
ll_gpio_bit_set(DSD1793_IIC_SDA_GPIO_PORT,DSD1793_IIC_SDA_PIN_BIT);\
}while(0);
#if (SCK_IIS)
#define __dsd1793_sck_init()\
do{\
TYPE_LL_IIS_INIT _init;\
TYPE_LL_IIS_CFG _cfg;\
memset(&_init, 0, sizeof(TYPE_LL_IIS_INIT));\
memset(&_cfg, 0, sizeof(TYPE_LL_IIS_CFG));\
_cfg.mode = LL_IIS_MASTER_MODE;\
_cfg.work_mode = LL_IIS_SIMPLEX_TX;\
_cfg.channel_mode = LL_IIS_STEREO_MODE;\
_cfg.ws_pol = LL_IIS_LOW_FOR_LEFT_CHANNEL;\
_cfg.bck_pol = LL_IIS_SAMPLE_IN_RISING_EDGE;\
_cfg.data_format = LL_IIS_STANDARD_MODE;\
_cfg.mclk_sel = LL_IIS_MCLK_SEL_SYS_PLL;\
_cfg.mclk_output = LL_IIS_MCLK_OUT_ENABLE;\
_cfg.mclk_div = 16;\
_cfg.baudrate = 29;\
_cfg.ws = 31;\
_cfg.bit = 31;\
ll_gpio_iomap_inout_config(DSD1793_SCK_GPIO_PORT, DSD1793_SCK_GPIO_PIN_NUM, LL_GPIO_OUT_IIS0_MCLK_OUT , LL_GPIO_IN_IIS0_MCLK_IN__LCD_D19_IN_MASK2_6);\
ll_iis_config(IIS0, &_cfg);\
}while(0);
#endif
#if (SCK_TIMER)
#define __dsd1793_sck_init()\
do{\
TYPE_LL_TIMER_CFG _timer_cfg;\
TYPE_LL_TIMER_INIT _timer_init_cfg;\
memset(&_timer_cfg, 0, sizeof(TYPE_LL_TIMER_CFG));\
memset(&_timer_init_cfg, 0, sizeof(TYPE_LL_TIMER_INIT));\
ll_timer_init(TIMER0, &_timer_init_cfg);\
_timer_cfg.work_mode_sel = LL_TIMER_MODE_PWM;\
_timer_cfg.in_src_sel = LL_TIMER_IN_SRC_SYS_CLK;\
_timer_cfg.prescaler_sel = 0;\
_timer_cfg.period_val = (__SYSCLK/(SMAPLE_FRQUENCY*OVER_SAMPLE_RATE)) - 1;\
_timer_cfg.pwm_val = ((__SYSCLK/(SMAPLE_FRQUENCY*OVER_SAMPLE_RATE))/2) - 1;\
_timer_cfg.count_val = 0;\
ll_timer_config(TIMER0, &_timer_cfg);;\
ll_gpio_ospeed_config(DSD1793_SCK_GPIO_PORT, (DSD1793_SCK_GPIO_PIN_NUM), 7);\
ll_gpio_iomap_output_config(DSD1793_SCK_GPIO_PORT, (DSD1793_SCK_GPIO_PIN_NUM), LL_GPIO_OUT_M1_9_LCD_DATA_O_12__TMR0_PWM_OUT);\
ll_timer_start(TIMER0);\
}while(0);
#endif
#define __dsd1793_iic_write_1byte(data)\
do{\
ll_iic_master_tx(DSD1793_IIC, data, LL_IIC_NONE_FLAG);\
}while(0);
#define __dsd1793_iic_read_1byte(data)\
do{\
data = ll_iic_master_rx(DSD1793_IIC, LL_IIC_NONE_FLAG);\
}while(0);
#define __dsd1793_iic_write(reg, p_data, len)\
do{\
uint8 *__p_data = (uint8 *)p_data;\
if(__p_data){\
ll_iic_master_tx(DSD1793_IIC, DSD1793_IIC_DEVICE_ADDR<<1 | 0, LL_IIC_START_FLAG);\
__dsd1793_iic_write_1byte(reg);\
if(len){\
for(uint16 __len=0; __len<len-1; __len++){\
__dsd1793_iic_write_1byte(*__p_data++);\
}\
}\
ll_iic_master_tx(DSD1793_IIC, *__p_data, LL_IIC_STOP_FLAG);\
}\
}while(0);
#define __dsd1793_iic_read(reg, p_data, len)\
do{\
uint8 *__p_data = (uint8 *)p_data;\
if(__p_data){\
ll_iic_master_tx(DSD1793_IIC, DSD1793_IIC_DEVICE_ADDR<<1 | 0, LL_IIC_START_FLAG);\
__dsd1793_iic_write_1byte(reg);\
ll_iic_master_tx(DSD1793_IIC, DSD1793_IIC_DEVICE_ADDR<<1 | 1, LL_IIC_START_FLAG);\
if(len){\
for(uint16 __len=0; __len<len-1; __len++){\
__dsd1793_iic_read_1byte(*__p_data++);\
}\
}\
*__p_data = ll_iic_master_rx(DSD1793_IIC, LL_IIC_STOP_FLAG | LL_IIC_NACK_FLAG);\
}\
}while(0);
#endif
#define __dsd1793_delay_ms(x) os_sleep_ms(x)
/*!
* DSD1793 reg index define
*/
#define DSD1793_REG16 16
#define DSD1793_REG17 17
#define DSD1793_REG18 18
#define DSD1793_REG19 19
#define DSD1793_REG20 20
#define DSD1793_REG21 21
#define DSD1793_REG22 22
void dsd1793_reg_write_l8bit(uint16 reg, uint16 val_l8bit);
void dsd1793_reg_read_l8bit(uint16 reg, uint16 *val_l8bit);
void dsd1793_init(void);
#endif
#ifdef __cplusplus
}
#endif
#endif
/******************************** END OF FILE *****/

112
sdk/include/dev/audio/components/eq/aueq.h Normal file
View File

@@ -0,0 +1,112 @@
#ifndef _AUEQ_H
#define _AUEQ_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief AUEQ ioctl_cmd type
*/
enum aueq_ioctl_cmd {
/*!
* @brief:
*
*/
AUEQ_IOCTL_CMD_NONE,
};
/* AUEQ api for user */
struct aueq_device {
struct dev_obj dev;
};
struct aueq_hal_ops {
struct devobj_ops ops;
int32(*open)(struct aueq_device *aueq, void* p_content, uint32 bytes);
int32(*close)(struct aueq_device *aueq);
int32(*run)(struct aueq_device *aueq, void* p_content, uint32 bytes);
int32(*ioctl)(struct aueq_device *aueq, enum aueq_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
};
/* AUEQ API functions */
/**
* @brief aueq_open
*
*
* @note .
*
* @param aueq The address of aueq device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aueq_open(struct aueq_device *aueq, void* p_content, uint32 bytes);
/**
* @brief aueq_close
*
*
* @note .
*
* @param aueq The address of aueq device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aueq_close(struct aueq_device *aueq);
/**
* @brief aueq_encode
*
*
* @note .
*
* @param aueq The address of aueq device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aueq_run(struct aueq_device *aueq, void* p_content, uint32 bytes);
/**
* @brief aueq_ioctl
*
*
* @note .
*
* @param aueq The address of aueq device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aueq_ioctl(struct aueq_device *aueq, enum aueq_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
#ifdef __cplusplus
}
#endif
#endif

59
sdk/include/dev/audio/components/eq/biquad_filter.h Normal file
View File

@@ -0,0 +1,59 @@
#ifndef BIQUAD_FILTER_H
#define BIQUAD_FILTER_H
typedef int s32, S32;
typedef unsigned int u32, U32, uint;
typedef long long int s64, S64;
typedef unsigned long long u64, U64;
typedef short int s16, S16;
typedef unsigned short int u16, U16;
typedef signed char s8, S8;
typedef unsigned char u8, U8;
//模拟64bit芯片运算
int CLIP_INT24(int in);
int CLIP_INT16(int in);
void ML0(s32 x, s32 y);
void MLA(s32 x, s32 y);
void MSB(s32 x, s32 y);
s32 MLZ(s32 n);
s32 MLZ_QUICK(s32 n);
s32 MLZ_FIX(s32 n);
u32 get_acc_64_high_32(void);
u32 get_acc_64_low_32(void);
typedef struct {
int b[3];
int a[2];
int x[2];
int y[2];
int fixed_point_num;
} TYPE_BIQUAD_FILTER;
int biquad_filter_calc(TYPE_BIQUAD_FILTER *filter_ctl, int x);
//void biquad_filter_ctl_init(TYPE_BIQUAD_FILTER *filter_ctl, int fixed_point_num);
#if 0
void eq_lpf_coeff_calc(TYPE_BIQUAD_FILTER *filter_ctl,
double fs, double f0, double q);
void eq_hpf_coeff_calc(TYPE_BIQUAD_FILTER *filter_ctl,
double fs, double f0, double q);
void eq_bpf_coeff_calc(TYPE_BIQUAD_FILTER *filter_ctl,
double fs, double f0, double q);
void eq_notch_coeff_calc(TYPE_BIQUAD_FILTER *filter_ctl,
double fs, double f0, double q);
void eq_apf_coeff_calc(TYPE_BIQUAD_FILTER *filter_ctl,
double fs, double f0, double q);
void eq_peaking_coeff_calc(TYPE_BIQUAD_FILTER *filter_ctl,
double fs, double f0, double gain, double q);
void eq_low_shelf_coeff_calc(TYPE_BIQUAD_FILTER *filter_ctl,
double fs, double f0, double gain, double q);
void eq_high_shelf_coeff_calc(TYPE_BIQUAD_FILTER *filter_ctl,
double fs, double f0, double gain, double q);
#endif
#endif /* BIQUAD_FILTER_H */

40
sdk/include/dev/audio/components/eq/coeff_type.h Normal file
View File

@@ -0,0 +1,40 @@
#ifndef _COEFF_TYPE_H
#define _COEFF_TYPE_H
#ifdef __cplusplus
extern "C" {
#endif
/*!
* @brief coefficient configuration
* @note
* only for software.
* a example of coefficient for 5 band:
* struct aueq_cfg cfg[5];
* cfg[0].b[0] = 0.1;
* cfg[0].b[1] = 0.3;
* ...
* cfg[1].b[1] = 0.6;
*/
struct aueq_cfg_5band{
double b[3];
double a[2];
};
/*!
* @brief coefficient configuration
* @note
* only for chip.
*/
struct aueq_cfg_10band{
int32 coeff[50];
};
#ifdef __cplusplus
}
#endif
#endif

14
sdk/include/dev/audio/components/eq/eq_coeff.h Normal file
View File

@@ -0,0 +1,14 @@
#ifndef _EQ_COEFF_H
#define _EQ_COEFF_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif

19
sdk/include/dev/audio/components/eq/hg_aueq_v0.h Normal file
View File

@@ -0,0 +1,19 @@
#ifndef _HG_AUEQ_V0_H_
#define _HG_AUEQ_V0_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 hg_aueq_v0_init(void);
int32 hg_aueq_v0_open(struct aueq_device *aueq, void* p_content, uint32 bytes);
int32 hg_aueq_v0_close(struct aueq_device *aueq);
int32 hg_aueq_v0_run(struct aueq_device *aueq, void* p_content, uint32 bytes);
int32 hg_aueq_v0_ioctl(struct aueq_device *aueq, enum aueq_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
#ifdef __cplusplus
}
#endif
#endif /* _HG_AUEQ_V0_H_ */

19
sdk/include/dev/audio/components/eq/hg_aueq_v1.h Normal file
View File

@@ -0,0 +1,19 @@
#ifndef _HG_AUEQ_V1_H_
#define _HG_AUEQ_V1_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 hg_aueq_v1_init(void);
int32 hg_aueq_v1_open(struct aueq_device *aueq, void* p_content, uint32 bytes);
int32 hg_aueq_v1_close(struct aueq_device *aueq);
int32 hg_aueq_v1_run(struct aueq_device *aueq, void* p_content, uint32 bytes);
int32 hg_aueq_v1_ioctl(struct aueq_device *aueq, enum aueq_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
#ifdef __cplusplus
}
#endif
#endif /* _HG_AUEQ_V0_H_ */

173
sdk/include/dev/audio/components/fade/aufade.h Normal file
View File

@@ -0,0 +1,173 @@
#ifndef _AUFADE_H
#define _AUFADE_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief AUFADE calculate mode types
*/
enum aufade_mode {
AUFADE_IN = BIT(0),
AUFADE_OUT = BIT(1),
};
/**
* @brief AUFADE irq_flag type
*/
enum aufade_irq_flag {
/*!
* @brief:
*
*/
AUFADE_IRQ_FLAG_NONE = BIT(0),
};
/**
* @brief AUFADE ioctl_cmd type
*/
enum aufade_ioctl_cmd {
AUFADE_IOCTL_CMD_GET_CURRENT_VOL = BIT(0),
AUFADE_IOCTL_CMD_CHECK_IS_DONE = BIT(1),
};
/* User interrupt handle */
typedef void (*aufade_irq_hdl)(uint32 irq, uint32 irq_data);
/* AUFADE api for user */
struct aufade_device {
struct dev_obj dev;
};
struct aufade_hal_ops {
struct devobj_ops ops;
int32(*open)(struct aufade_device *aufade);
int32(*close)(struct aufade_device *aufade);
int32(*start)(struct aufade_device *aufade, uint32 from, uint32 to);
int32(*ioctl)(struct aufade_device *aufade, enum aufade_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
int32(*request_irq)(struct aufade_device *aufade, enum aufade_irq_flag irq_flag, aufade_irq_hdl irq_hdl, uint32 irq_data);
int32(*release_irq)(struct aufade_device *aufade, enum aufade_irq_flag irq_flag);
};
/* AUFADE API functions */
/**
* @brief aufade_open
*
*
* @note .
*
* @param aufade The address of aufade device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aufade_open(struct aufade_device *aufade);
/**
* @brief aufade_close
*
*
* @note .
*
* @param aufade The address of aufade device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aufade_close(struct aufade_device *aufade);
/**
* @brief aufade_start
*
*
* @note .
*
* @param aufade The address of aufade device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aufade_start(struct aufade_device *aufade, uint32 from, uint32 to);
/**
* @brief aufade_ioctl
*
*
* @note .
*
* @param aufade The address of aufade device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aufade_ioctl(struct aufade_device *aufade, enum aufade_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
/**
* @brief aufade_request_irq
*
*
* @note .
*
* @param aufade The address of aufade device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aufade_request_irq(struct aufade_device *aufade, enum aufade_irq_flag irq_flag, aufade_irq_hdl irq_hdl, uint32 irq_data);
/**
* @brief aufade_release_irq
*
*
* @note .
*
* @param aufade The address of aufade device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 aufade_release_irq(struct aufade_device *aufade, enum aufade_irq_flag irq_flag);
int32 aufade_get_cur_vol(struct aufade_device *aufade, uint32 *vol);
int32 aufade_check_is_done(struct aufade_device *aufade, uint32 *result);
#ifdef __cplusplus
}
#endif
#endif

21
sdk/include/dev/audio/components/fade/hg_aufade_v0.h Normal file
View File

@@ -0,0 +1,21 @@
#ifndef _HG_AUFADE_V0_H_
#define _HG_AUFADE_V0_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 hg_aufade_v0_init(void);
int32 hg_aufade_v0_open(struct aufade_device *aufade);
int32 hg_aufade_v0_close(struct aufade_device *aufade);
int32 hg_aufade_v0_start(struct aufade_device *aufade, uint32 from, uint32 to);
int32 hg_aufade_v0_ioctl(struct aufade_device *aufade, enum aufade_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
int32 hg_aufade_v0_request_irq(struct aufade_device *aufade, enum aufade_irq_flag irq_flag, aufade_irq_hdl irq_hdl, uint32 irq_data);
int32 hg_aufade_v0_release_irq(struct aufade_device *aufade, enum aufade_irq_flag irq_flag);
#ifdef __cplusplus
}
#endif
#endif /* _HG_AUFADE_V0_H_ */

81
sdk/include/dev/audio/components/hg_audio_v0.h Normal file
View File

@@ -0,0 +1,81 @@
#ifndef _HG_AUDIO_V0_H_
#define _HG_AUDIO_V0_H_
#ifdef __cplusplus
extern "C" {
#endif
/*!
* Type of device
*/
#define AUDIO_TYPE_AUADC BIT(0)
#define AUDIO_TYPE_AUDAC BIT(1)
#define AUDIO_TYPE_AUHS BIT(2)
#define AUDIO_TYPE_AUVAD BIT(3)
#define AUDIO_TYPE_AUALAW BIT(4)
#define AUDIO_TYPE_AUFADE BIT(5)
#define AUDIO_TYPE_AUEQ BIT(6)
#define AUDIO_TYPE_AUASRC BIT(7)
#define AUDIO_TYPE_AUDRC BIT(8)
/** @brief AUDIO operating handle structure
* @{
*/
/*!
* Common dat areas struct
*/
union __comm_dat{
uint32 comm;
struct {
uint32 adc_en :1,
dac_en :1,
hs_en :1,
alaw_en :1,
vad_en :1,
aufade_en :1,
eq_en :1,
asrc_en :1,
drc_en :1,
ana_power_on :1,
ana_power_adc_on :1,
ana_power_dac_on :1,
ana_rc_cali_ok :1,
ana_driver_version :2,
ana_rfb_level :2,
ana_rin_level :2;
} comm_bits;
};
struct hg_audio_v0 {
/* Pointer of device */
struct dev_obj dev;
uint32 hw;
/* common areas */
union __comm_dat comm_dat;
/* Pointer of common areas */
void *p_comm;
void *irq_hdl;
uint32 irq_data;
uint16 irq_num;
/* Type of device */
uint16 dev_type;
};
int32 hg_audio_v0_attach(uint32 dev_id, struct hg_audio_v0 *audio);
#ifdef __cplusplus
}
#endif
#endif /* _HGI2S_V0_H_ */

89
sdk/include/dev/audio/components/hw/hg_audio_ana_cfg.h Normal file
View File

@@ -0,0 +1,89 @@
#ifndef __HG_AUDIO_ANA_CFG_H
#define __HG_AUDIO_ANA_CFG_H
#ifdef __cplusplus
extern "C" {
#endif
//DAC+PGA
#define DAC_DRIVER_VERSION0 (0x0)
//1bit PWM
#define DAC_DRIVER_VERSION1 (0x1)
//DAC
#define DAC_DRIVER_VERSION2 (0x2)
#define __AUDIO_ADC_ANA_CFG_SAMPLE_RATE_44_1K (1)
#define __AUDIO_ADC_ANA_CFG_SAMPLE_RATE_48K (2)
#define __AUDIO_ADC_ANA_CFG_SAMPLE_RATE_32K (3)
#define __AUDIO_ADC_ANA_CFG_SAMPLE_RATE_16K (4)
#define __AUDIO_ADC_ANA_CFG_SAMPLE_RATE_8K (5)
#define __AUDIO_ADC_ANA_CFG_SAMPLE_RATE_11_025K (6)
#define __AUDIO_ADC_ANA_CFG_SAMPLE_RATE_22_05K (7)
#define __AUDIO_ADC_ANA_CFG_SAMPLE_RATE_24K (8)
#define __AUDIO_ADC_ANA_CFG_SAMPLE_RATE_12K (10)
/*!
* mic type: difference
*/
#define __AUDIO_ADC_ANA_CFG_MIC_TYPE_DIFF (1)
/*!
* mic type: single ended
*/
#define __AUDIO_ADC_ANA_CFG_MIC_TYPE_SINGE (2)
struct __audio_adc_ana_cfg {
uint16 sample_rate;
uint16 mic_type;
uint8 set_rfb;
uint8 set_rin;
};
struct __audio_dac_ana_cfg {
uint16 driver_version;
};
struct __audio_comm_ana_cfg {
union {
uint32 comm;
struct {
uint32 audio_ref1 :6,
audio_ref2 :6,
audio_c2 :6;
}comm_bits;
};
};
struct __audio_dac_digital_cfg {
uint32 target_vol;
};
struct __audio_dac_digital_cfg dac_digital_cfg;
struct __audio_ana_cfg {
struct __audio_adc_ana_cfg adc;
struct __audio_dac_ana_cfg dac;
struct __audio_comm_ana_cfg comm;
};
void audio_ana_config_power_on(void *cfg);
void audio_ana_config_power_off(void *cfg);
void audio_ana_config_adc_on(void *cfg);
void audio_ana_config_adc_off(void *cfg);
void audio_ana_config_dac_on(void *cfg);
void audio_ana_config_dac_off(void *cfg);
void audio_ana_config_dac_voice_off(void *cfg);
void audio_ana_config_dac_voice_on(void *cfg);
void audio_ana_config_rc_cali(void *cfg);
#ifdef __cplusplus
}
#endif
#endif

605
sdk/include/dev/audio/components/hw/hg_audio_v0_hw.h Normal file
View File

@@ -0,0 +1,605 @@
#ifndef _HG_AUDIO_V0_HW_H
#define _HG_AUDIO_V0_HW_H
#ifdef __cplusplus
extern "C" {
#endif
/*!
*DIGI_PATH_CTL
*/
#define LL_AUDIO_DIGI_PATH_CTL_ADC_MODE(x) (((x)&0x3) << (0x1e))
#define LL_AUDIO_DIGI_PATH_CTL_DAC_MODE(x) (((x)&0x3) << (0x1c))
#define LL_AUDIO_DIGI_PATH_CTL_DRC_DIRECT_EN(x) (((x)&0x1) << (0x1b))
#define LL_AUDIO_DIGI_PATH_CTL_ASRC_DIRECT_EN(x) (((x)&0x1) << (0x1a))
#define LL_AUDIO_DIGI_PATH_CTL_EQ_DIRECT_EN(x) (((x)&0x1) << (0x19))
#define LL_AUDIO_DIGI_PATH_CTL_XU_SET(x) (((x)&0x7) << (0xe ))
#define LL_AUDIO_DIGI_PATH_CTL_ALPHA_SEL(x) (((x)&0x3) << (0xc ))
#define LL_AUDIO_DIGI_PATH_CTL_MXS_DWA_EN(x) (((x)&0x1) << (0xb ))
#define LL_AUDIO_DIGI_PATH_CTL_VOLEN(x) (((x)&0x1) << (0x5 ))
#define LL_AUDIO_DIGI_PATH_CTL_AGCEN(x) (((x)&0x1) << (0x4 ))
#define LL_AUDIO_DIGI_PATH_CTL_ADCHP(x) (((x)&0x1) << (0x3 ))
#define LL_AUDIO_DIGI_PATH_CTL_DACM(x) (((x)&0x1) << (0x2 ))
#define LL_AUDIO_DIGI_PATH_CTL_ADCEN(x) (((x)&0x1) << (0x1 ))
#define LL_AUDIO_DIGI_PATH_CTL_DACEN(x) (((x)&0x1) << (0x0 ))
/*!
*DAC_DMA_CTL
*/
#define LL_AUDIO_DAC_DMA_CTL_TH1(x) (((x)&0xff) << (0x18))
#define LL_AUDIO_DAC_DMA_CTL_TH0(x) (((x)&0xff) << (0x10))
#define LL_AUDIO_DAC_DMA_CTL_SKIPDATA(x) (((x)&0x3) << (0x6 ))
#define LL_AUDIO_DAC_DMA_CTL_RELOAD(x) (((x)&0x1) << (0x4 ))
#define LL_AUDIO_DAC_DMA_CTL_DATAMODE(x) (((x)&0x3) << (0x2 ))
#define LL_AUDIO_DAC_DMA_CTL_DMASTOP(x) (((x)&0x1) << (0x1 ))
#define LL_AUDIO_DAC_DMA_CTL_DMASTART(x) (((x)&0x1) << (0x0 ))
/*!
*DAC_DMA_WCTL
*/
#define LL_AUDIO_DAC_DMA_WCTL_TH1(x) (((x)&0xff) << (0x18))
#define LL_AUDIO_DAC_DMA_WCTL_TH0(x) (((x)&0xff) << (0x10))
#define LL_AUDIO_DAC_DMA_WCTL_RELOAD(x) (((x)&0x1) << (0x4 ))
#define LL_AUDIO_DAC_DMA_WCTL_DMASTOP(x) (((x)&0x1) << (0x1 ))
#define LL_AUDIO_DAC_DMA_WCTL_DMASTART(x) (((x)&0x1) << (0x0 ))
/*!
*ADC_DMA_CTL
*/
#define LL_AUDIO_ADC_DMA_CTL_TH1(x) (((x)&0xff) << (0x18))
#define LL_AUDIO_ADC_DMA_CTL_TH0(x) (((x)&0xff) << (0x10))
#define LL_AUDIO_ADC_DMA_CTL_RELOAD(x) (((x)&0x1) << (0x4 ))
#define LL_AUDIO_ADC_DMA_CTL_DMASTOP(x) (((x)&0x1) << (0x1 ))
#define LL_AUDIO_ADC_DMA_CTL_DMASTART(x) (((x)&0x1) << (0x0 ))
/*!
*DAC_DMA_STADR
*/
#define LL_AUDIO_DAC_DMA_STADR_STADR(x) (((x)&0xffffffff)<< (0x0 ))
/*!
*DAC_DMA_WSTADR
*/
#define LL_AUDIO_DAC_DMA_WSTADR_STADR(x) (((x)&0xffffffff)<< (0x0 ))
/*!
*ADC_DMA_STADR
*/
#define LL_AUDIO_ADC_DMA_STADR_STADR(x) (((x)&0xffffffff)<< (0x0 ))
/*!
*DAC_DMA_LEN
*/
#define LL_AUDIO_DAC_DMA_LEN_LEN(x) (((x)&0xffff) << (0x0 ))
/*!
*DAC_DMA_WLEN
*/
#define LL_AUDIO_DAC_DMA_WLEN_LEN(x) (((x)&0xffff) << (0x0 ))
/*!
*ADC_DMA_LEN
*/
#define LL_AUDIO_ADC_DMA_LEN_LEN(x) (((x)&0xffff) << (0x0 ))
/*!
*DAC_SAMP_IDX
*/
#define LL_AUDIO_DAC_SAMP_IDX_IDX(x) (((x)&0xffff) << (0x0 ))
/*!
*DAC_SAMP_WIDX
*/
#define LL_AUDIO_DAC_SAMP_WIDX_IDX(x) (((x)&0xffff) << (0x0 ))
/*!
*ADC_SAMP_IDX
*/
#define LL_AUDIO_ADC_SAMP_IDX_IDX(x) (((x)&0xffff) << (0x0 ))
/*!
*AUDIO_IP
*/
#define LL_AUDIO_AUDIO_IP_DAC_WR_TH1IP(x) (((x)&0x1) << (0x15))
#define LL_AUDIO_AUDIO_IP_DAC_WR_TH0IP(x) (((x)&0x1) << (0x14))
#define LL_AUDIO_AUDIO_IP_DAC_WR_DONEIP(x) (((x)&0x1) << (0x13))
#define LL_AUDIO_AUDIO_IP_CORDIC_OVIP(x) (((x)&0x1) << (0x12))
#define LL_AUDIO_AUDIO_IP_VOL_OVIP(x) (((x)&0x1) << (0x11))
#define LL_AUDIO_AUDIO_IP_HS_DMAOVIP(x) (((x)&0x1) << (0x10))
#define LL_AUDIO_AUDIO_IP_HS_DMAHFIP(x) (((x)&0x1) << (0xf ))
#define LL_AUDIO_AUDIO_IP_CODEC_DMAOVIP(x) (((x)&0x1) << (0xe ))
#define LL_AUDIO_AUDIO_IP_CODEC_DMAHFIP(x) (((x)&0x1) << (0xd ))
#define LL_AUDIO_AUDIO_IP_VAD_WINOVIP(x) (((x)&0x1) << (0xc ))
#define LL_AUDIO_AUDIO_IP_VAD_DMAOVIP(x) (((x)&0x1) << (0xb ))
#define LL_AUDIO_AUDIO_IP_VAD_DMAHFIP(x) (((x)&0x1) << (0xa ))
#define LL_AUDIO_AUDIO_IP_VAD_ZCRIP(x) (((x)&0x1) << (0x9 ))
#define LL_AUDIO_AUDIO_IP_VAD_POWER1IP(x) (((x)&0x1) << (0x8 ))
#define LL_AUDIO_AUDIO_IP_VAD_POWER0IP(x) (((x)&0x1) << (0x7 ))
#define LL_AUDIO_AUDIO_IP_VADIP(x) (((x)&0x1) << (0x6 ))
#define LL_AUDIO_AUDIO_IP_ADCTH1IP(x) (((x)&0x1) << (0x5 ))
#define LL_AUDIO_AUDIO_IP_ADCTH0IP(x) (((x)&0x1) << (0x4 ))
#define LL_AUDIO_AUDIO_IP_ADCDONEIP(x) (((x)&0x1) << (0x3 ))
#define LL_AUDIO_AUDIO_IP_DACTH1IP(x) (((x)&0x1) << (0x2 ))
#define LL_AUDIO_AUDIO_IP_DACTH0IP(x) (((x)&0x1) << (0x1 ))
#define LL_AUDIO_AUDIO_IP_DACDONEIP(x) (((x)&0x1) << (0x0 ))
/*!
*AUDIO_IE
*/
#define LL_AUDIO_AUDIO_IE_CORDIC_OVIE(x) (((x)&0x1) << (0x12))
#define LL_AUDIO_AUDIO_IE_HS_DMAOVIE(x) (((x)&0x1) << (0x10))
#define LL_AUDIO_AUDIO_IE_HS_DMAHFIE(x) (((x)&0x1) << (0xf ))
#define LL_AUDIO_AUDIO_IE_CODEC_DMAOVIE(x) (((x)&0x1) << (0xe ))
#define LL_AUDIO_AUDIO_IE_CODEC_DMAHFIE(x) (((x)&0x1) << (0xd ))
#define LL_AUDIO_AUDIO_IE_VAD_WINOVIE(x) (((x)&0x1) << (0xc ))
#define LL_AUDIO_AUDIO_IE_VAD_DMAOVIE(x) (((x)&0x1) << (0xb ))
#define LL_AUDIO_AUDIO_IE_VAD_DMAHFIE(x) (((x)&0x1) << (0xa ))
#define LL_AUDIO_AUDIO_IE_VAD_ZCRIE(x) (((x)&0x1) << (0x9 ))
#define LL_AUDIO_AUDIO_IE_VAD_POWER1IE(x) (((x)&0x1) << (0x8 ))
#define LL_AUDIO_AUDIO_IE_VAD_POWER0IE(x) (((x)&0x1) << (0x7 ))
#define LL_AUDIO_AUDIO_IE_VADIE(x) (((x)&0x1) << (0x6 ))
#define LL_AUDIO_AUDIO_IE_ADCTH1IE(x) (((x)&0x1) << (0x5 ))
#define LL_AUDIO_AUDIO_IE_ADCTH0IE(x) (((x)&0x1) << (0x4 ))
#define LL_AUDIO_AUDIO_IE_ADCDONEIE(x) (((x)&0x1) << (0x3 ))
#define LL_AUDIO_AUDIO_IE_DACTH1IE(x) (((x)&0x1) << (0x2 ))
#define LL_AUDIO_AUDIO_IE_DACTH0IE(x) (((x)&0x1) << (0x1 ))
#define LL_AUDIO_AUDIO_IE_DACDONEIE(x) (((x)&0x1) << (0x0 ))
/*!
*DAC_FLT_CTL
*/
#define LL_AUDIO_DAC_FLT_CTL_SDM_DC(x) (((x)&0xff) << (0x18))
#define LL_AUDIO_DAC_FLT_CTL_SDM_GAIN(x) (((x)&0xff) << (0x10))
#define LL_AUDIO_DAC_FLT_CTL_HK_SEL(x) (((x)&0x1) << (0xf ))
#define LL_AUDIO_DAC_FLT_CTL_MASH_SEL(x) (((x)&0x1) << (0xe ))
#define LL_AUDIO_DAC_FLT_CTL_ANA_CLK_SEL(x) (((x)&0x1) << (0xd ))
#define LL_AUDIO_DAC_FLT_CTL_PDM_OUT_EN(x) (((x)&0x1) << (0xc ))
#define LL_AUDIO_DAC_FLT_CTL_NOISE_WIDTH(x) (((x)&0x1f) << (0x7 ))
#define LL_AUDIO_DAC_FLT_CTL_NOSIE_EN(x) (((x)&0x1) << (0x6 ))
#define LL_AUDIO_DAC_FLT_CTL_OSR_SEL(x) (((x)&0x3) << (0x2 ))
#define LL_AUDIO_DAC_FLT_CTL_BAND_SEL(x) (((x)&0x3) << (0x0 ))
/*!
*DAC_MIX_CTL
*/
#define LL_AUDIO_DAC_MIX_CTL_RGAIN(x) (((x)&0xff) << (0x8 ))
#define LL_AUDIO_DAC_MIX_CTL_LGAIN(x) (((x)&0xff) << (0x0 ))
/*!
*DAC_VOL_CTL0
*/
#define LL_AUDIO_DAC_VOL_CTL0_D_VOL(x) (((x)&0x7fff) << (0x11))
#define LL_AUDIO_DAC_VOL_CTL0_S_VOL(x) (((x)&0x7fff) << (0x2 ))
#define LL_AUDIO_DAC_VOL_CTL0_VOL_DIR(x) (((x)&0x1) << (0x1 ))
#define LL_AUDIO_DAC_VOL_CTL0_VOL_KICK(x) (((x)&0x1) << (0x0 ))
/*!
*DAC_VOL_CTL1
*/
#define LL_AUDIO_DAC_VOL_CTL1_DAC_VOL(x) (((x)&0x7fff) << (0x4 ))
#define LL_AUDIO_DAC_VOL_CTL1_VOL_STEP(x) (((x)&0x3) << (0x2 ))
#define LL_AUDIO_DAC_VOL_CTL1_VOL_SAMP(x) (((x)&0x3) << (0x0 ))
/*!
*ADC_FLT_CTL
*/
#define LL_AUDIO_ADC_FLT_CTL_ADCGAIN(x) (((x)&0xff) << (0x18))
#define LL_AUDIO_ADC_FLT_CTL_XU_SET(x) (((x)&0x7) << (0x15))
#define LL_AUDIO_ADC_FLT_CTL_SMP_CYC(x) (((x)&0x3) << (0x13))
#define LL_AUDIO_ADC_FLT_CTL_ANA_CLK_SEL(x) (((x)&0x1) << (0xc ))
#define LL_AUDIO_ADC_FLT_CTL_ALPHA_SET(x) (((x)&0x3) << (0x9 ))
#define LL_AUDIO_ADC_FLT_CTL_MXS_DWA_EN(x) (((x)&0x1) << (0x8 ))
#define LL_AUDIO_ADC_FLT_CTL_MXS_DWA_CLK_EN(x) (((x)&0x1) << (0x7 ))
#define LL_AUDIO_ADC_FLT_CTL_NOSIE_EN(x) (((x)&0x1) << (0x6 ))
#define LL_AUDIO_ADC_FLT_CTL_X2_MODE_EN(x) (((x)&0x1) << (0x4 ))
#define LL_AUDIO_ADC_FLT_CTL_OSR_SEL(x) (((x)&0x3) << (0x2 ))
#define LL_AUDIO_ADC_FLT_CTL_BAND_SEL(x) (((x)&0x3) << (0x0 ))
/*!
*DAC_ANA_CTL
*/
#define LL_AUDIO_DAC_ANA_CTL_TESTEN(x) (((x)&0x1) << (0x1f))
#define LL_AUDIO_DAC_ANA_CTL_SELVCM(x) (((x)&0x7f) << (0x14))
#define LL_AUDIO_DAC_ANA_CTL_DAC_EN(x) (((x)&0x1) << (0x13))
#define LL_AUDIO_DAC_ANA_CTL_DACOUTPD(x) (((x)&0x1) << (0x12))
#define LL_AUDIO_DAC_ANA_CTL_EN_COREOP(x) (((x)&0x1) << (0x11))
#define LL_AUDIO_DAC_ANA_CTL_EN_OUTPUTOP(x) (((x)&0x1) << (0x10))
#define LL_AUDIO_DAC_ANA_CTL_EN_VCM(x) (((x)&0x1) << (0xf ))
#define LL_AUDIO_DAC_ANA_CTL_MUTE(x) (((x)&0x1) << (0xe ))
#define LL_AUDIO_DAC_ANA_CTL_VCMPD(x) (((x)&0x1) << (0xd ))
#define LL_AUDIO_DAC_ANA_CTL_GSET(x) (((x)&0x3) << (0xb ))
#define LL_AUDIO_DAC_ANA_CTL_GSEL(x) (((x)&0x7) << (0x8 ))
#define LL_AUDIO_DAC_ANA_CTL_ISET(x) (((x)&0xff) << (0x0 ))
/*!
*ADC_ANA_CTL0
*/
#define LL_AUDIO_ADC_ANA_CTL0_SEL_REFSOURCE(x) (((x)&0x3) << (0x1e))
#define LL_AUDIO_ADC_ANA_CTL0_EN_VCMLPF(x) (((x)&0x1) << (0x1d))
#define LL_AUDIO_ADC_ANA_CTL0_SW_VCM2PAD(x) (((x)&0x1) << (0x1c))
#define LL_AUDIO_ADC_ANA_CTL0_EN_V2I(x) (((x)&0x1) << (0x1b))
#define LL_AUDIO_ADC_ANA_CTL0_EN_LDO27(x) (((x)&0x1) << (0x1a))
#define LL_AUDIO_ADC_ANA_CTL0_EN_BG(x) (((x)&0x1) << (0x19))
#define LL_AUDIO_ADC_ANA_CTL0_SEL_VCC27AU(x) (((x)&0x7) << (0x16))
#define LL_AUDIO_ADC_ANA_CTL0_SEL_VREF100(x) (((x)&0xf) << (0x12))
#define LL_AUDIO_ADC_ANA_CTL0_SEL_VCMAU(x) (((x)&0xf) << (0xe ))
#define LL_AUDIO_ADC_ANA_CTL0_TEST_KICK_P(x) (((x)&0x1) << (0xd ))
#define LL_AUDIO_ADC_ANA_CTL0_TEST_KICK_N(x) (((x)&0x1) << (0xc ))
#define LL_AUDIO_ADC_ANA_CTL0_SW_PGA2ADC(x) (((x)&0x1) << (0xb ))
#define LL_AUDIO_ADC_ANA_CTL0_SW_PAD2ADC(x) (((x)&0x1) << (0xa ))
#define LL_AUDIO_ADC_ANA_CTL0_EN_AUADC(x) (((x)&0x1) << (0x9 ))
#define LL_AUDIO_ADC_ANA_CTL0_EN_AUADCBIAS(x) (((x)&0x1) << (0x8 ))
#define LL_AUDIO_ADC_ANA_CTL0_SEL_LDO11VOLT(x) (((x)&0xf) << (0x4 ))
#define LL_AUDIO_ADC_ANA_CTL0_SEL_SDDIV(x) (((x)&0x3) << (0x2 ))
#define LL_AUDIO_ADC_ANA_CTL0_SEL_LDO11R1(x) (((x)&0x3) << (0x0 ))
/*!
*ADC_ANA_CTL1
*/
#define LL_AUDIO_ADC_ANA_CTL1_TEST_OK_N(x) (((x)&0x1) << (0x1f))
#define LL_AUDIO_ADC_ANA_CTL1_TEST_OK_P(x) (((x)&0x1) << (0x1e))
#define LL_AUDIO_ADC_ANA_CTL1_TEST_EN(x) (((x)&0x1) << (0x0 ))
/*!
*ADC_ANA_CTL2
*/
#define LL_AUDIO_ADC_ANA_CTL2_RESERVED(x) (((x)&0xffffffff)<< (0x0 ))
/*!
*MIC_ANA_CTL0
*/
#define LL_AUDIO_MIC_ANA_CTL0_EN_PGASEM(x) (((x)&0x1) << (0x8 ))
#define LL_AUDIO_MIC_ANA_CTL0_EN_PGADFM(x) (((x)&0x1) << (0x7 ))
#define LL_AUDIO_MIC_ANA_CTL0_SATOPGA(x) (((x)&0x7) << (0x4 ))
#define LL_AUDIO_MIC_ANA_CTL0_SEL_PGA2RIN(x) (((x)&0x3) << (0x2 ))
#define LL_AUDIO_MIC_ANA_CTL0_SEL_PGA1RIN(x) (((x)&0x3) << (0x0 ))
/*!
*MIC_ANA_CTL1
*/
#define LL_AUDIO_MIC_ANA_CTL1_RESERVED(x) (((x)&0xffffffff)<< (0x0 ))
/*!
*VAD_CTL0
*/
#define LL_AUDIO_VAD_CTL0_SIGN_CALC_EN(x) (((x)&0x1) << (0xf ))
#define LL_AUDIO_VAD_CTL0_AUTO_CLR_EN(x) (((x)&0x1) << (0xe ))
#define LL_AUDIO_VAD_CTL0_WAIT_SPAC_TIME(x) (((x)&0xff) << (0x6 ))
#define LL_AUDIO_VAD_CTL0_ZCR_OV0_EN(x) (((x)&0x1) << (0x5 ))
#define LL_AUDIO_VAD_CTL0_POWER_OV1_EN(x) (((x)&0x1) << (0x4 ))
#define LL_AUDIO_VAD_CTL0_POWER_OV0_EN(x) (((x)&0x1) << (0x3 ))
#define LL_AUDIO_VAD_CTL0_AUTO_MODE_EN(x) (((x)&0x1) << (0x2 ))
#define LL_AUDIO_VAD_CTL0_VAD_KICK(x) (((x)&0x1) << (0x1 ))
#define LL_AUDIO_VAD_CTL0_VADEN(x) (((x)&0x1) << (0x0 ))
/*!
*VAD_CTL1
*/
#define LL_AUDIO_VAD_CTL1_POWER_TH1(x) (((x)&0xffff) << (0x10))
#define LL_AUDIO_VAD_CTL1_POWER_TH0(x) (((x)&0xffff) << (0x0 ))
/*!
*VAD_CTL2
*/
#define LL_AUDIO_VAD_CTL2_ZCR_TH0(x) (((x)&0xff) << (0x18))
#define LL_AUDIO_VAD_CTL2_WINDOW_NUM(x) (((x)&0xff) << (0x10))
#define LL_AUDIO_VAD_CTL2_WINDOW_LEN(x) (((x)&0xffff) << (0x0 ))
/*!
*VAD_DMA_CTL
*/
#define LL_AUDIO_VAD_DMA_CTL_DMA_SHITF(x) (((x)&0xffff) << (0x0 ))
/*!
*VAD_DMA_STADR
*/
#define LL_AUDIO_VAD_DMA_STADR_DMA_STADR(x) (((x)&0xffffffff)<< (0x0 ))
/*!
*VAD_DMA_CNT
*/
#define LL_AUDIO_VAD_DMA_CNT_ZCR_RES(x) (((x)&0xffff) << (0x10))
#define LL_AUDIO_VAD_DMA_CNT_DMA_CNT(x) (((x)&0xffff) << (0x0 ))
/*!
*VAD_STA
*/
#define LL_AUDIO_VAD_STA_POWER_RES_DB(x) (((x)&0xffffffff)<< (0x0 ))
/*!
*CORDIC_CTL0
*/
#define LL_AUDIO_CORDIC_CTL0_THETA(x) (((x)&0xffff) << (0x1 ))
#define LL_AUDIO_CORDIC_CTL0_CORDIC_KICK(x) (((x)&0x1) << (0x0 ))
/*!
*CORDIC_STA
*/
#define LL_AUDIO_CORDIC_STA_COS_DATA(x) (((x)&0xffff) << (0x10))
#define LL_AUDIO_CORDIC_STA_SIN_DATA(x) (((x)&0xffff) << (0x0 ))
/*!
*EQ_CON0
*/
#define LL_AUDIO_EQ_CON0_EQ_GAIN(x) (((x)&0x1fff) << (0xd ))
#define LL_AUDIO_EQ_CON0_EQ_COEFF_SW(x) (((x)&0x1) << (0xc ))
#define LL_AUDIO_EQ_CON0_EQ_ROUND_MODE(x) (((x)&0x1) << (0xb ))
#define LL_AUDIO_EQ_CON0_EQ_DSM_EN(x) (((x)&0x3ff) << (0x1 ))
#define LL_AUDIO_EQ_CON0_EQ_EN(x) (((x)&0x1) << (0x0 ))
/*!
*EQ_CON1
*/
#define LL_AUDIO_EQ_CON1_EQ_COEFF_RD(x) (((x)&0x1) << (0x1f))
#define LL_AUDIO_EQ_CON1_EQ_COEFF_WR(x) (((x)&0x1) << (0x1e))
#define LL_AUDIO_EQ_CON1_EQ_COEFF_WDATA(x) (((x)&0x3fffff) << (0x8 ))
#define LL_AUDIO_EQ_CON1_EQ_COEFF_SEL(x) (((x)&0x1) << (0x7 ))
#define LL_AUDIO_EQ_CON1_EQ_ADDR(x) (((x)&0x7f) << (0x0 ))
/*!
*EQ_CON2
*/
#define LL_AUDIO_EQ_CON2_EQ_DONE(x) (((x)&0x1) << (0x1f))
#define LL_AUDIO_EQ_CON2_EQ_SW_DONE(x) (((x)&0x1) << (0x1e))
#define LL_AUDIO_EQ_CON2_EQ_COEFF_NUM(x) (((x)&0x1) << (0x1d))
#define LL_AUDIO_EQ_CON2_EQ_COEFF_RDATA(x) (((x)&0x3fffff) << (0x0 ))
/*!
*ASRC_CON0
*/
#define LL_AUDIO_ASRC_CON0_SAMPLE_OFS(x) (((x)&0x3fffff) << (0xa ))
#define LL_AUDIO_ASRC_CON0_SAMPLE_CNT(x) (((x)&0x1ff) << (0x1 ))
#define LL_AUDIO_ASRC_CON0_ASRC_EN(x) (((x)&0x1) << (0x0 ))
/*!
*ASRC_STA
*/
#define LL_AUDIO_ASRC_STA_FIFO_FULL(x) (((x)&0x1) << (0x1 ))
#define LL_AUDIO_ASRC_STA_FIFO_EMPTY(x) (((x)&0x1) << (0x0 ))
/*!
*DRC_CON0
*/
#define LL_AUDIO_DRC_CON0_KNEE1_OP(x) (((x)&0x7f) << (0x19))
#define LL_AUDIO_DRC_CON0_KNEE1_IP(x) (((x)&0x1f) << (0x14))
#define LL_AUDIO_DRC_CON0_NOISE_SLOPE(x) (((x)&0x3) << (0x12))
#define LL_AUDIO_DRC_CON0_SLOPE1(x) (((x)&0x7) << (0xf ))
#define LL_AUDIO_DRC_CON0_SLOPE0(x) (((x)&0x7) << (0xc ))
#define LL_AUDIO_DRC_CON0_RC_SET(x) (((x)&0x1f) << (0x7 ))
#define LL_AUDIO_DRC_CON0_ATK_SET(x) (((x)&0x1f) << (0x2 ))
#define LL_AUDIO_DRC_CON0_DRC_EN(x) (((x)&0x1) << (0x0 ))
/*!
*DRC_CON1
*/
#define LL_AUDIO_DRC_CON1_NOISE_MIN_GAIN(x) (((x)&0x1f) << (0xf ))
#define LL_AUDIO_DRC_CON1_MAX_GAIN(x) (((x)&0x3) << (0xd ))
#define LL_AUDIO_DRC_CON1_MIN_GAIN(x) (((x)&0x7) << (0xa ))
#define LL_AUDIO_DRC_CON1_KNEE2_OP(x) (((x)&0x1f) << (0x5 ))
#define LL_AUDIO_DRC_CON1_KNEE2_IP(x) (((x)&0x1f) << (0x0 ))
struct hg_audio_hw_v0 {
__IO uint32 DIGI_PATH_CTL ; // 0x0
__IO uint32 DAC_DMA_CTL ; // 0x4
__IO uint32 DAC_DMA_STADR ; // 0x8
__IO uint32 DAC_DMA_LEN ; // 0xc
__IO uint32 DAC_SAMP_IDX ; // 0x10
__IO uint32 DAC_DMA_WCTL ; // 0x14
__IO uint32 DAC_DMA_WSTADR ; // 0x18
__IO uint32 DAC_DMA_WLEN ; // 0x1c
__IO uint32 DAC_SAMP_WIDX ; // 0x20
__IO uint32 DAC_FLT_CTL ; // 0x24
__IO uint32 DAC_MIX_CTL ; // 0x28
__IO uint32 DAC_VOL_CTL0 ; // 0x2c
__IO uint32 DAC_VOL_CTL1 ; // 0x30
__IO uint32 reserve0[51] ; // 0x34-0xfc
__IO uint32 ADC_DMA_CTL ; // 0x100
__IO uint32 ADC_DMA_STADR ; // 0x104
__IO uint32 ADC_DMA_LEN ; // 0x108
__IO uint32 ADC_SAMP_IDX ; // 0x10c
__IO uint32 ADC_FLT_CTL ; // 0x110
__IO uint32 AUDIO_IP ; // 0x114
__IO uint32 AUDIO_IE ; // 0x118
__IO uint32 ADC_RCCAL_CON ; // 0x11c
__IO uint32 ADC_RCCAL_STA ; // 0x120
__IO uint32 reserve1[55] ; // 0x124-0x1fc
__IO uint32 ADC_ANA_CTL0 ; // 0x200
__IO uint32 ADC_ANA_CTL1 ; // 0x204
__IO uint32 AMP_ANA_CTL0 ; // 0x208
__IO uint32 AMP_ANA_CTL1 ; // 0x20c
__IO uint32 DAC_ANA_CTL0 ; // 0x210
__IO uint32 DAC_ANA_CTL1 ; // 0x214
__IO uint32 PA_ANA_CTL0 ; // 0x218
__IO uint32 PA_ANA_CTL1 ; // 0x21c
__IO uint32 BIAS_ANA_CTL0 ; // 0x220
__IO uint32 BIAS_ANA_CTL1 ; // 0x224
__IO uint32 reserve2[54] ; // 0x228-0x2fc
__IO uint32 VAD_CTL0 ; // 0x300
__IO uint32 VAD_CTL1 ; // 0x304
__IO uint32 VAD_CTL2 ; // 0x308
__IO uint32 VAD_DMA_CTL ; // 0x30c
__IO uint32 VAD_DMA_STADR ; // 0x310
__IO uint32 VAD_DMA_CNT ; // 0x314
__IO uint32 VAD_STA ; // 0x318
__IO uint32 reserve3[281] ; // 0x31c-0x77c
__IO uint32 INCGAINTH3_0 ; // 0x780
__IO uint32 INCGAINTH5_4 ; // 0x784
__IO uint32 REDGAINTH3_0 ; // 0x788
__IO uint32 REDGAINTH5_4 ; // 0x78c
__IO uint32 GAINVAL3_0 ; // 0x790
__IO uint32 GAINVAL6_4 ; // 0x794
__IO uint32 AGC_CTL0 ; // 0x798
__IO uint32 AGC_CTL1 ; // 0x79c
__IO uint32 CODEC_CTL ; // 0x7a0
__IO uint32 CODEC_DMA_STADR ; // 0x7a4
__IO uint32 CODEC_DMA_DSTADR ; // 0x7a8
__IO uint32 CODEC_DMA_LEN ; // 0x7ac
__IO uint32 CODEC_DMA_CNT ; // 0x7b0
__IO uint32 HS_CTL0 ; // 0x7b4
__IO uint32 HS_CTL1 ; // 0x7b8
__IO uint32 HS_DMA_STADR ; // 0x7bc
__IO uint32 HS_DMA_DSTADR ; // 0x7c0
__IO uint32 HS_DMA_LEN ; // 0x7c4
__IO uint32 HS_DMA_CNT ; // 0x7c8
};
struct hg_aueq_hw_v0 {
__IO uint32 EQ_CON0;
__IO uint32 EQ_CON1;
__IO uint32 EQ_CON2;
};
struct hg_auasrc_hw_v0 {
__IO uint32 ASRC_CON0;
__IO uint32 ASRC_STA;
};
struct hg_audrc_hw_v0 {
__IO uint32 DRC_CON0;
__IO uint32 DRC_CON1;
};
#ifdef __cplusplus
}
#endif
#endif /* _HG_AUDIO_V0_HW_H */

203
sdk/include/dev/audio/components/vad/auvad.h Normal file
View File

@@ -0,0 +1,203 @@
#ifndef _AUVAD_H
#define _AUVAD_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief AUVAD calculate mode types
*/
enum auvad_calc_mode {
AUVAD_CALC_MODE_ENERGY = BIT(0),
AUVAD_CALC_MODE_ZCR = BIT(1),
};
/**
* @brief AUVAD irq_flag type
*/
enum auvad_irq_flag {
/*!
* @brief:
*
*/
NONE = BIT(0),
};
/**
* @brief AUVAD ioctl_cmd type
*/
enum auvad_ioctl_cmd {
/*!
* @brief:
*
*/
AUVAD_IOCTL_CMD_SET_CALC_MODE,
/*!
* @brief:
*
*/
AUVAD_IOCTL_CMD_SET_THRESHOLD_TH0,
/*!
* @brief:
*
*/
AUVAD_IOCTL_CMD_SET_THRESHOLD_TH1,
/*!
* @brief:
*
*/
AUVAD_IOCTL_CMD_SET_THRESHOLD_ZCR,
};
/* User interrupt handle */
typedef void (*auvad_irq_hdl)(uint32 irq, uint32 irq_data);
/* AUVAD api for user */
struct auvad_device {
struct dev_obj dev;
};
struct auvad_hal_ops {
struct devobj_ops ops;
int32(*open)(struct auvad_device *auvad, enum auvad_calc_mode mode);
int32(*close)(struct auvad_device *auvad);
int32(*calc)(struct auvad_device *auvad, void* dat_buf, uint32 bytes, uint32 calc_type, void* result_buf);
int32(*ioctl)(struct auvad_device *auvad, enum auvad_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
int32(*request_irq)(struct auvad_device *auvad, enum auvad_irq_flag irq_flag, auvad_irq_hdl irq_hdl, uint32 irq_data);
int32(*release_irq)(struct auvad_device *auvad, enum auvad_irq_flag irq_flag);
};
/* AUVAD API functions */
/**
* @brief auvad_open
*
*
* @note .
*
* @param auvad The address of auvad device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auvad_open(struct auvad_device *auvad, enum auvad_calc_mode mode);
/**
* @brief auvad_close
*
*
* @note .
*
* @param auvad The address of auvad device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auvad_close(struct auvad_device *auvad);
/**
* @brief auvad_encode
*
*
* @note .
*
* @param auvad The address of auvad device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auvad_encode(struct auvad_device *auvad, void* dat_buf, uint32 bytes, void* result_buf);
/**
* @brief auvad_decode
*
*
* @note .
*
* @param auvad The address of auvad device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auvad_calc(struct auvad_device *auvad, void* dat_buf, uint32 bytes, uint32 calc_type, void* result_buf);
/**
* @brief auvad_ioctl
*
*
* @note .
*
* @param auvad The address of auvad device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auvad_ioctl(struct auvad_device *auvad, enum auvad_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
/**
* @brief auvad_request_irq
*
*
* @note .
*
* @param auvad The address of auvad device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auvad_request_irq(struct auvad_device *auvad, enum auvad_irq_flag irq_flag, auvad_irq_hdl irq_hdl, uint32 irq_data);
/**
* @brief auvad_release_irq
*
*
* @note .
*
* @param auvad The address of auvad device in the RTOS.
* @param .
* @param .
*
* @return
* - RET_OK Success
* - RET_ERR Fail
*/
int32 auvad_release_irq(struct auvad_device *auvad, enum auvad_irq_flag irq_flag);
#ifdef __cplusplus
}
#endif
#endif

21
sdk/include/dev/audio/components/vad/hg_auvad_v0.h Normal file
View File

@@ -0,0 +1,21 @@
#ifndef _HG_AUVAD_V0_H_
#define _HG_AUVAD_V0_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 hg_auvad_v0_init(void);
int32 hg_auvad_v0_open(struct auvad_device *auvad, enum auvad_calc_mode mode);
int32 hg_auvad_v0_close(struct auvad_device *auvad);
int32 hg_auvad_v0_calc(struct auvad_device *auvad, void* dat_buf, uint32 bytes, uint32 calc_type, void* result_buf);
int32 hg_auvad_v0_ioctl(struct auvad_device *auvad, enum auvad_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2);
int32 hg_auvad_v0_request_irq(struct auvad_device *auvad, enum auvad_irq_flag irq_flag, auvad_irq_hdl irq_hdl, uint32 irq_data);
int32 hg_auvad_v0_release_irq(struct auvad_device *auvad, enum auvad_irq_flag irq_flag);
#ifdef __cplusplus
}
#endif
#endif /* _HG_AUVAD_V0_H_ */