zouhaitao/TAIXIN
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Initial commit: TXW82x FPV v2.7.0.7-42229 SDK + project sources

Browse Source
This commit is contained in:
zouhaitao
2026-07-06 11:30:13 +08:00
commit e76462eeb7
3451 changed files with 1415300 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

301
ohos/kernel/liteos_m/arch/csky/v2/gcc/los_arch_atomic.h Normal file
View File

@@ -0,0 +1,301 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#include "los_interrupt.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("ldw %0, (%1)\n"
: "=&r"(val)
: "r"(v)
: "cc");
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("stw %1, (%0, 0)"
:
: "r"(v), "r"(setVal)
: "cc");
LOS_IntRestore(intSave);
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("ldw %0, (%1)\n"
"add %0, %0, %2\n"
"stw %0, (%1, 0)"
: "=&r"(val)
: "r"(v), "r"(addVal)
: "cc");
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("ldw %0, (%1)\n"
"sub %0, %2\n"
"stw %0, (%1, 0)"
: "=&r"(val)
: "r"(v), "r"(subVal)
: "cc");
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("ldw %0, (%1)\n"
"stw %2, (%1)"
: "=&r"(prevVal)
: "r"(v), "r"(val)
: "cc");
LOS_IntRestore(intSave);
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("ldw %0, (%1)\n"
"cmpne %0, %2\n"
"bt 1f\n"
"stw %3, (%1)\n"
"1:"
: "=&r"(prevVal)
: "r"(v), "r"(oldVal), "r"(val)
: "cc");
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

194
ohos/kernel/liteos_m/arch/csky/v2/gcc/los_arch_context.h Normal file
View File

@@ -0,0 +1,194 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_CONTEXT_H
#define _LOS_ARCH_CONTEXT_H
#include "los_config.h"
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#ifdef CPU_CK803
#define OS_TRAP_STACK_SIZE 512
typedef struct TagTskContext {
UINT32 R0;
UINT32 R1;
UINT32 R2;
UINT32 R3;
UINT32 R4;
UINT32 R5;
UINT32 R6;
UINT32 R7;
UINT32 R8;
UINT32 R9;
UINT32 R10;
UINT32 R11;
UINT32 R12;
UINT32 R13;
UINT32 R15;
UINT32 R28;
UINT32 EPSR;
UINT32 EPC;
} TaskContext;
#endif
#ifdef CPU_CK804
#define OS_TRAP_STACK_SIZE 512
typedef struct TagTskContext {
UINT32 R0;
UINT32 R1;
UINT32 R2;
UINT32 R3;
UINT32 R4;
UINT32 R5;
UINT32 R6;
UINT32 R7;
UINT32 R8;
UINT32 R9;
UINT32 R10;
UINT32 R11;
UINT32 R12;
UINT32 R13;
UINT32 R15;
UINT32 R16;
UINT32 R17;
UINT32 R18;
UINT32 R19;
UINT32 R20;
UINT32 R21;
UINT32 R22;
UINT32 R23;
UINT32 R24;
UINT32 R25;
UINT32 R26;
UINT32 R27;
UINT32 R28;
UINT32 R29;
UINT32 R30;
UINT32 R31;
UINT32 EPSR;
UINT32 EPC;
} TaskContext;
#endif
#ifdef CPU_CK804DF
#define OS_TRAP_STACK_SIZE 768
typedef struct TagTskContext {
UINT32 R0;
UINT32 R1;
UINT32 R2;
UINT32 R3;
UINT32 R4;
UINT32 R5;
UINT32 R6;
UINT32 R7;
UINT32 R8;
UINT32 R9;
UINT32 R10;
UINT32 R11;
UINT32 R12;
UINT32 R13;
UINT32 R15;
UINT32 R16;
UINT32 R17;
UINT32 R18;
UINT32 R19;
UINT32 R20;
UINT32 R21;
UINT32 R22;
UINT32 R23;
UINT32 R24;
UINT32 R25;
UINT32 R26;
UINT32 R27;
UINT32 R28;
UINT32 R29;
UINT32 R30;
UINT32 R31;
UINT32 VR0;
UINT32 VR1;
UINT32 VR2;
UINT32 VR3;
UINT32 VR4;
UINT32 VR5;
UINT32 VR6;
UINT32 VR7;
UINT32 VR8;
UINT32 VR9;
UINT32 VR10;
UINT32 VR11;
UINT32 VR12;
UINT32 VR13;
UINT32 VR14;
UINT32 VR15;
UINT32 EPSR;
UINT32 EPC;
} TaskContext;
#endif
#ifdef CPU_CK802
#define OS_TRAP_STACK_SIZE 500
typedef struct TagTskContext {
UINT32 R0;
UINT32 R1;
UINT32 R2;
UINT32 R3;
UINT32 R4;
UINT32 R5;
UINT32 R6;
UINT32 R7;
UINT32 R8;
UINT32 R9;
UINT32 R10;
UINT32 R11;
UINT32 R12;
UINT32 R13;
UINT32 R15;
UINT32 EPSR;
UINT32 EPC;
} TaskContext;
#endif
VOID HalStartToRun(VOID);
VOID HalTaskContextSwitch(VOID);
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_CONTEXT_H */

324
ohos/kernel/liteos_m/arch/csky/v2/gcc/los_arch_interrupt.h Normal file
View File

@@ -0,0 +1,324 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2023 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_INTERRUPT_H
#define _LOS_ARCH_INTERRUPT_H
#include "los_common_interrupt.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
/* *
* @ingroup los_arch_interrupt
* Highest priority of a hardware interrupt.
*/
#ifndef OS_HWI_PRIO_HIGHEST
#define OS_HWI_PRIO_HIGHEST 0
#endif
/* *
* @ingroup los_arch_interrupt
* Lowest priority of a hardware interrupt.
*/
#ifndef OS_HWI_PRIO_LOWEST
#define OS_HWI_PRIO_LOWEST 3
#endif
/* *
* @ingroup los_arch_interrupt
* Check the interrupt priority.
*/
#define HWI_PRI_VALID(pri) (((pri) >= OS_HWI_PRIO_HIGHEST) && ((pri) <= OS_HWI_PRIO_LOWEST))
/* *
* @ingroup los_arch_interrupt
* Count of C-sky system interrupt vector.
*/
#define OS_SYS_VECTOR_CNT 32
/* *
* @ingroup los_arch_interrupt
* Count of C-sky interrupt vector.
*/
#define OS_VECTOR_CNT (OS_SYS_VECTOR_CNT + OS_HWI_MAX_NUM)
#define OS_USER_HWI_MIN 0
#define OS_USER_HWI_MAX (LOSCFG_PLATFORM_HWI_LIMIT - 1)
#define HWI_ALIGNSIZE 0x400
#define PSR_VEC_OFFSET 16U
#define VIC_REG_BASE 0xE000E100UL
typedef struct {
UINT32 ISER[4U];
UINT32 RESERVED0[12U];
UINT32 IWER[4U];
UINT32 RESERVED1[12U];
UINT32 ICER[4U];
UINT32 RESERVED2[12U];
UINT32 IWDR[4U];
UINT32 RESERVED3[12U];
UINT32 ISPR[4U];
UINT32 RESERVED4[12U];
UINT32 ISSR[4U];
UINT32 RESERVED5[12U];
UINT32 ICPR[4U];
UINT32 RESERVED6[12U];
UINT32 ICSR[4U];
UINT32 RESERVED7[12U];
UINT32 IABR[4U];
UINT32 RESERVED8[60U];
UINT32 IPR[32U];
UINT32 RESERVED9[480U];
UINT32 ISR;
UINT32 IPTR;
UINT32 TSPEND;
UINT32 TSABR;
UINT32 TSPR;
} VIC_TYPE;
extern VIC_TYPE *VIC_REG;
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt number.
*
* Value: 0x02000900
*
* Solution: Ensure that the interrupt number is valid.
*/
#define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Null hardware interrupt handling function.
*
* Value: 0x02000901
*
* Solution: Pass in a valid non-null hardware interrupt handling function.
*/
#define OS_ERRNO_HWI_PROC_FUNC_NULL LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x01)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Insufficient interrupt resources for hardware interrupt creation.
*
* Value: 0x02000902
*
* Solution: Increase the configured maximum number of supported hardware interrupts.
*/
#define OS_ERRNO_HWI_CB_UNAVAILABLE LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x02)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Insufficient memory for hardware interrupt initialization.
*
* Value: 0x02000903
*
* Solution: Expand the configured memory.
*/
#define OS_ERRNO_HWI_NO_MEMORY LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x03)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: The interrupt has already been created.
*
* Value: 0x02000904
*
* Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
*/
#define OS_ERRNO_HWI_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x04)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt priority.
*
* Value: 0x02000905
*
* Solution: Ensure that the interrupt priority is valid.
*/
#define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Incorrect interrupt creation mode.
*
* Value: 0x02000906
*
* Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST.
*/
#define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: The interrupt has already been created as a fast interrupt.
*
* Value: 0x02000907
*
* Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
*/
#define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt operation function.
*
* Value: 0x0200090c
*
* Solution: Set a valid interrupt operation function
*/
#define OS_ERRNO_HWI_OPS_FUNC_NULL LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x0c)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt number.
*
* Value: 0x02000900
*
* Solution: Ensure that the interrupt number is valid.
*/
#define LOS_ERRNO_HWI_NUM_INVALID OS_ERRNO_HWI_NUM_INVALID
/* *
* @ingroup los_arch_interrupt
* @brief: Hardware interrupt entry function.
*
* @par Description:
* This API is used as all hardware interrupt handling function entry.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param:None.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
extern VOID HalInterrupt(VOID);
#define OS_VIC_INT_ENABLE_SIZE 0x4
#define OS_VIC_INT_WAKER_SIZE 0x4
#define OS_VIC_INT_ICER_SIZE 0x4
#define OS_VIC_INT_ISPR_SIZE 0x4
#define OS_VIC_INT_IABR_SIZE 0x4
#define OS_VIC_INT_IPR_SIZE 0x4
#define OS_VIC_INT_ISR_SIZE 0x4
#define OS_VIC_INT_IPTR_SIZE 0x4
/**
* @ingroup los_exc
* the struct of register files
*
* description: the register files that saved when exception triggered
*
* notes:the following register with prefix 'uw' correspond to the registers in the cpu data sheet.
*/
typedef struct TagExcContext {
UINT32 R0;
UINT32 R1;
UINT32 R2;
UINT32 R3;
UINT32 R4;
UINT32 R5;
UINT32 R6;
UINT32 R7;
UINT32 R8;
UINT32 R9;
UINT32 R10;
UINT32 R11;
UINT32 R12;
UINT32 R13;
UINT32 R14;
UINT32 R15;
UINT32 EPSR;
UINT32 EPC;
} EXC_CONTEXT_S;
/* *
* @ingroup los_arch_interrupt
* @brief: Exception handler function.
*
* @par Description:
* This API is used to handle Exception.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param excBufAddr [IN] The address of stack pointer at which the error occurred.
* @param faultAddr [IN] The address at which the error occurred.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(EXC_CONTEXT_S *excBufAddr, UINT32 faultAddr);
VOID IrqEntry(VOID);
VOID HandleEntry(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Exception information structure
*
* Description: Exception information saved when an exception is triggered on the Csky platform.
*
*/
typedef struct TagExcInfo {
UINT16 phase;
UINT16 type;
UINT32 faultAddr;
UINT32 thrdPid;
UINT16 nestCnt;
UINT16 reserved;
EXC_CONTEXT_S *context;
} ExcInfo;
extern ExcInfo g_excInfo;
#define MAX_INT_INFO_SIZE (8 + 0x164)
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_INTERRUPT_H */

51
ohos/kernel/liteos_m/arch/csky/v2/gcc/los_arch_timer.h Normal file
View File

@@ -0,0 +1,51 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_TIMER_H
#define _LOS_ARCH_TIMER_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_TIMER_H */

128
ohos/kernel/liteos_m/arch/csky/v2/gcc/los_ck804df.S Normal file
View File

@@ -0,0 +1,128 @@
/*
* Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.import HalExcHandleEntry
.extern g_trapStackBase
#define VIC_TSPDR 0XE000EC08
.section .text
.align 2
.type HalStartToRun, %function
.global HalStartToRun
HalStartToRun:
lrw r1, g_losTask
lrw r2, g_losTask + 4
ldw r0, (r2)
st.w r0, (r1)
st.w r0, (r2)
ldw sp, (r0)
ldw r0, (sp, 192)
mtcr r0, epc
ldw r0, (sp, 188)
mtcr r0, epsr
ldm r0-r13, (sp)
ldw r15, (sp, 56)
addi sp, 60
ldm r16-r31, (sp)
addi sp, 64
fldms vr0-vr15, (sp)
addi sp, 72
rte
.align 2
.type HalTaskContextSwitch, %function
.global HalTaskContextSwitch
HalTaskContextSwitch:
lrw r0, VIC_TSPDR
bgeni r1, 0
stw r1, (r0)
nop
nop
nop
rts
.align 2
.type tspend_handler, %function
.global tspend_handler
tspend_handler:
subi sp, 196
stm r0-r13, (sp)
stw r15, (sp, 56)
addi r0, sp, 60
stm r16-r31, (r0)
addi r0, 64
fstms vr0-vr15, (r0)
mfcr r1, epsr
stw r1, (r0, 64)
mfcr r1, epc
stw r1, (r0, 68)
jbsr OsSchedTaskSwitch
bez r0, ret_con
lrw r2, g_losTask
ldw r0, (r2)
stw sp, (r0)
lrw r3, g_losTask + 4
ldw r0, (r3)
stw r0, (r2)
ldw sp, (r0)
ret_con:
ldw r0, (sp, 192)
mtcr r0, epc
ldw r0, (sp, 188)
mtcr r0, epsr
ldm r0-r13, (sp)
ldw r15, (sp, 56)
addi sp, 60
ldm r16-r31, (sp)
addi sp, 64
fldms vr0-vr15, (sp)
addi sp, 72
rte
.global __get_PC
.type __get_PC, %function
__get_PC:
grs r0, __get_PC
jmp r15

219
ohos/kernel/liteos_m/arch/csky/v2/gcc/los_context.c Normal file
View File

@@ -0,0 +1,219 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_context.h"
#include "securec.h"
#include "los_arch_context.h"
#include "los_arch_interrupt.h"
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_debug.h"
/* ****************************************************************************
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
}
/* ****************************************************************************
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
(VOID)LOS_IntLock();
while (1) {
}
}
/* ****************************************************************************
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
topStack --- Top of task's stack
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
#if defined(CPU_CK804)
context->R0 = taskID;
context->R1 = 0x01010101L;
context->R2 = 0x02020202L;
context->R3 = 0x03030303L;
context->R4 = 0x04040404L;
context->R5 = 0x05050505L;
context->R6 = 0x06060606L;
context->R7 = 0x07070707L;
context->R8 = 0x08080808L;
context->R9 = 0x09090909L;
context->R10 = 0x10101010L;
context->R11 = 0x11111111L;
context->R12 = 0x12121212L;
context->R13 = 0x13131313L;
context->R15 = (UINT32)ArchSysExit;
context->R16 = 0x16161616L;
context->R17 = 0x17171717L;
context->R18 = 0x18181818L;
context->R19 = 0x19191919L;
context->R20 = 0x20202020L;
context->R21 = 0x21212121L;
context->R22 = 0x22222222L;
context->R23 = 0x23232323L;
context->R24 = 0x24242424L;
context->R25 = 0x25252525L;
context->R26 = 0x26262626L;
context->R27 = 0x27272727L;
context->R28 = 0x28282828L;
context->R29 = 0x29292929L;
context->R30 = 0x30303030L;
context->R31 = 0x31313131L;
context->EPSR = 0x80000340L;
context->EPC = (UINT32)OsTaskEntry;
#elif defined(CPU_CK804DF)
context->R0 = taskID;
context->R1 = 0x01010101L;
context->R2 = 0x02020202L;
context->R3 = 0x03030303L;
context->R4 = 0x04040404L;
context->R5 = 0x05050505L;
context->R6 = 0x06060606L;
context->R7 = 0x07070707L;
context->R8 = 0x08080808L;
context->R9 = 0x09090909L;
context->R10 = 0x10101010L;
context->R11 = 0x11111111L;
context->R12 = 0x12121212L;
context->R13 = 0x13131313L;
context->R15 = (UINT32)ArchSysExit;
context->R16 = 0x16161616L;
context->R17 = 0x17171717L;
context->R18 = 0x18181818L;
context->R19 = 0x19191919L;
context->R20 = 0x20202020L;
context->R21 = 0x21212121L;
context->R22 = 0x22222222L;
context->R23 = 0x23232323L;
context->R24 = 0x24242424L;
context->R25 = 0x25252525L;
context->R26 = 0x26262626L;
context->R27 = 0x27272727L;
context->R28 = 0x28282828L;
context->R29 = 0x29292929L;
context->R30 = 0x30303030L;
context->R31 = 0x31313131L;
context->VR0 = 0x12345678L;
context->VR1 = 0x12345678L;
context->VR2 = 0x12345678L;
context->VR3 = 0x12345678L;
context->VR4 = 0x12345678L;
context->VR5 = 0x12345678L;
context->VR6 = 0x12345678L;
context->VR7 = 0x12345678L;
context->VR8 = 0x12345678L;
context->VR9 = 0x12345678L;
context->VR10 = 0x12345678L;
context->VR11 = 0x12345678L;
context->VR12 = 0x12345678L;
context->VR13 = 0x12345678L;
context->VR14 = 0x12345678L;
context->VR15 = 0x12345678L;
context->EPSR = 0x80000340L;
context->EPC = (UINT32)OsTaskEntry;
#elif defined(CPU_CK803)
context->R0 = taskID;
context->R1 = 0x01010101L;
context->R2 = 0x02020202L;
context->R3 = 0x03030303L;
context->R4 = 0x04040404L;
context->R5 = 0x05050505L;
context->R6 = 0x06060606L;
context->R7 = 0x07070707L;
context->R8 = 0x08080808L;
context->R9 = 0x09090909L;
context->R10 = 0x10101010L;
context->R11 = 0x11111111L;
context->R12 = 0x12121212L;
context->R13 = 0x13131313L;
context->R28 = 0x28282828L;
context->R15 = (UINT32)ArchSysExit;
context->EPSR = 0x80000140L;
context->EPC = (UINT32)OsTaskEntry;
#elif defined(CPU_CK802)
context->R0 = taskID;
context->R1 = 0x01010101L;
context->R2 = 0x02020202L;
context->R3 = 0x03030303L;
context->R4 = 0x04040404L;
context->R5 = 0x05050505L;
context->R6 = 0x06060606L;
context->R7 = 0x07070707L;
context->R8 = 0x08080808L;
context->R9 = 0x09090909L;
context->R10 = 0x10101010L;
context->R11 = 0x11111111L;
context->R12 = 0x12121212L;
context->R13 = 0x13131313L;
context->R15 = (UINT32)ArchSysExit;
context->EPSR = 0xe0000144L;
context->EPC = (UINT32)OsTaskEntry;
#else
#error "** Unsupport CSKY Arch **"
#endif
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
HalStartToRun();
return LOS_OK; /* never return */
}
VOID ArchTaskSchedule(VOID)
{
HalTaskContextSwitch();
}

193
ohos/kernel/liteos_m/arch/csky/v2/gcc/los_interrupt.c Normal file
View File

@@ -0,0 +1,193 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2023 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdarg.h>
#include "securec.h"
#include "los_context.h"
#include "los_arch_context.h"
#include "los_arch_interrupt.h"
#include "los_debug.h"
#include "los_hook.h"
#include "los_task.h"
#include "los_sched.h"
#include "los_memory.h"
#include "los_membox.h"
#include "osal/string.h"
#define INT_OFFSET 6
#define PRI_OFF_PER_INT 8
#define PRI_PER_REG 4
#define PRI_OFF_IN_REG 6
#define PRI_BITS 2
#define PRI_HI 0
#define PRI_LOW 7
#define MASK_8_BITS 0xFF
#define MASK_32_BITS 0xFFFFFFFF
#define BYTES_OF_128_INT 4
VIC_TYPE *VIC_REG = (VIC_TYPE *)VIC_REG_BASE;
UINT32 HalGetPsr(VOID)
{
UINT32 intSave;
__asm__ volatile("mfcr %0, psr" : "=r"(intSave) : : "memory");
return intSave;
}
UINT32 HalSetVbr(UINT32 intSave)
{
__asm__ volatile("mtcr %0, vbr" : : "r"(intSave) : "memory");
return intSave;
}
UINT32 ArchIntLock(VOID)
{
UINT32 intSave;
__asm__ __volatile__(
"mfcr %0, psr \n"
"psrclr ie"
: "=r"(intSave)
:
: "memory");
return intSave;
}
UINT32 ArchIntUnLock(VOID)
{
UINT32 intSave;
__asm__ __volatile__(
"mfcr %0, psr \n"
"psrset ie"
: "=r"(intSave)
:
: "memory");
return intSave;
}
VOID ArchIntRestore(UINT32 intSave)
{
__asm__ __volatile__("mtcr %0, psr" : : "r"(intSave));
}
UINT32 ArchIntLocked(VOID)
{
UINT32 intSave;
__asm__ volatile("mfcr %0, psr" : "=r"(intSave) : : "memory");
return !(intSave & (1 << INT_OFFSET));
}
STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
intSave = LOS_IntLock();
VIC_REG->ISER[hwiNum / 32] = (UINT32)(1UL << (hwiNum % 32));
VIC_REG->ISSR[hwiNum / 32] = (UINT32)(1UL << (hwiNum % 32));
LOS_IntRestore(intSave);
return LOS_OK;
}
STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
{
UINT32 intSave;
intSave = LOS_IntLock();
VIC_REG->IPR[hwiNum / PRI_PER_REG] |= (((priority << PRI_OFF_IN_REG) << (hwiNum % PRI_PER_REG)) * PRI_OFF_PER_INT);
LOS_IntRestore(intSave);
return LOS_OK;
}
STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
intSave = LOS_IntLock();
VIC_REG->ICER[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
LOS_IntRestore(intSave);
return LOS_OK;
}
STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
intSave = LOS_IntLock();
VIC_REG->ISPR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
LOS_IntRestore(intSave);
return LOS_OK;
}
STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
{
VIC_REG->ICPR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
return LOS_OK;
}
/* ****************************************************************************
Function : HwiNumGet
Description : Get an interrupt number
Input : None
Output : None
Return : Interrupt Indexes number
**************************************************************************** */
STATIC UINT32 HwiNumGet(VOID)
{
return (HalGetPsr() >> PSR_VEC_OFFSET) & MASK_8_BITS;
}
STATIC UINT32 HwiCreate(HWI_HANDLE_T hwiNum, HWI_PRIOR_T hwiPrio)
{
HwiSetPriority(hwiNum, (UINT8)hwiPrio);
HwiUnmask(hwiNum);
return LOS_OK;
}
STATIC HwiControllerOps g_archHwiOps = {
.enableIrq = HwiUnmask,
.disableIrq = HwiMask,
.setIrqPriority = HwiSetPriority,
.getCurIrqNum = HwiNumGet,
.triggerIrq = HwiPending,
.clearIrq = HwiClear,
.createIrq = HwiCreate,
};
HwiControllerOps *ArchIntOpsGet(VOID)
{
return &g_archHwiOps;
}

163
ohos/kernel/liteos_m/arch/csky/v2/gcc/los_timer.c Normal file
View File

@@ -0,0 +1,163 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_timer.h"
#include "los_config.h"
#include "los_tick.h"
#include "los_arch_interrupt.h"
#include "los_debug.h"
typedef struct {
UINT32 CTRL;
UINT32 LOAD;
UINT32 VAL;
UINT32 CALIB;
} CORE_TIM_TYPE;
#define CORE_TIM_BASE (0xE000E010UL)
#define SysTick ((CORE_TIM_TYPE *)CORE_TIM_BASE)
#define CORETIM_ENABLE (1UL << 0)
#define CORETIM_INTMASK (1UL << 1)
#define CORETIM_SOURCE (1UL << 2)
#define CORETIM_MODE (1UL << 16)
#ifdef CPU_CK802
#define TIM_INT_NUM 5
#endif
#ifdef CPU_CK803
#define TIM_INT_NUM 25
#endif
#ifdef CPU_CK804
#define TIM_INT_NUM 25
#endif
#ifdef CPU_CK804DF
#define TIM_INT_NUM 25
#endif
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
STATIC UINT64 SysTickCycleGet(UINT32 *period);
STATIC VOID SysTickLock(VOID);
STATIC VOID SysTickUnlock(VOID);
STATIC ArchTickTimer g_archTickTimer = {
.freq = OS_SYS_CLOCK,
.irqNum = TIM_INT_NUM,
.periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
.init = SysTickStart,
.getCycle = SysTickCycleGet,
.reload = SysTickReload,
.lock = SysTickLock,
.unlock = SysTickUnlock,
.tickHandler = NULL,
};
VOID systick_handler(VOID)
{
g_archTickTimer.tickHandler(NULL);
}
/* ****************************************************************************
Function : HalTickStart
Description : Configure Tick Interrupt Start
Input : none
output : none
return : LOS_OK - Success , or LOS_ERRNO_TICK_CFG_INVALID - failed
**************************************************************************** */
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
{
ArchTickTimer *tick = &g_archTickTimer;
tick->tickHandler = handler;
tick->freq = OS_SYS_CLOCK;
//设置所有的中断都能唤醒CPU
VIC_REG->IWER[0] = 0xffffffff;
VIC_REG->IWER[1] = 0xffffffff;
VIC_REG->IWER[2] = 0xffffffff;
VIC_REG->IWER[3] = 0xffffffff;
ArchIntEnable(tick->irqNum);
return LOS_OK;
}
STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
{
if (nextResponseTime > g_archTickTimer.periodMax) {
nextResponseTime = g_archTickTimer.periodMax;
}
SysTick->CTRL &= ~CORETIM_ENABLE;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
SysTick->CTRL |= CORETIM_ENABLE;
return nextResponseTime;
}
STATIC UINT64 SysTickCycleGet(UINT32 *period)
{
UINT32 hwCycle;
UINT32 intSave = LOS_IntLock();
*period = SysTick->LOAD;
hwCycle = *period - SysTick->VAL;
LOS_IntRestore(intSave);
return (UINT64)hwCycle;
}
STATIC VOID SysTickLock(VOID)
{
SysTick->CTRL &= ~CORETIM_ENABLE;
}
STATIC VOID SysTickUnlock(VOID)
{
SysTick->CTRL |= CORETIM_ENABLE;
}
ArchTickTimer *ArchSysTickTimerGet(VOID)
{
return &g_archTickTimer;
}
VOID Wfi(VOID)
{
__asm__ volatile("wait");
}
VOID Dsb(VOID)
{
__asm__ volatile("sync" : : : "memory");
}
UINT32 ArchEnterSleep(VOID)
{
Dsb();
Wfi(); //CPU进入低功耗状态，等待中断唤醒
return LOS_OK;
}