251 lines
7.3 KiB
C
251 lines
7.3 KiB
C
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#ifndef _HGUART_V2_HW_H_
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#define _HGUART_V2_HW_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***** UARTCON *****/
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/*! RX buffer trigger threshold
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*/
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#define LL_UART_CON_RBUF_TRIG(n) (((n)&0x03) << 18)
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/*! Singal RTS_N enable
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*/
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#define LL_UART_CON_RTS_EN (1UL << 17)
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/*! Singal CTS_N enable
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*/
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#define LL_UART_CON_CTS_EN (1UL << 16)
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/*! Transmission complete interrupt enable
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*/
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#define LL_UART_CON_TCIE_EN (1UL << 15)
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/*! UART with carrier output enable.
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* @note UART0 outputs pwm of TIMER0, and UART1 outputs pwm of TIMER1.
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*/
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#define LL_UART_CON_TMR_PWM_EN (1UL << 14)
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/*! Frame error interrupt enable
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* @note A frame error refers to a low-level signal received by rx during
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* the stop bit.
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*/
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#define LL_UART_CON_FERR_IE_EN (1UL << 11)
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/*! TX buffer empty interrupt enable
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*/
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#define LL_UART_CON_TXBUF_EMPTY_IE_EN (1UL << 10)
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/*! RX buffer not empty interrupt enable
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*/
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#define LL_UART_CON_RXBUF_NEMPTY_IE_EN (1UL << 9)
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/*! Inverted TX signal
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*/
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#define LL_UART_CON_TX_INV_EN (1UL << 8)
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/*! Inverted RX signal
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*/
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#define LL_UART_CON_RX_INV_EN (1UL << 7)
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/*! Odd parity
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* @note Parity and 9bit data transfer cannot be used at the same time.
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*/
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#define LL_UART_CON_ODD_EN (1UL << 6)
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/*! parity enable
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* @note Parity and 9bit data transfer cannot be used at the same time.
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*/
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#define LL_UART_CON_PARITY_EN (1UL << 5)
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/*! 9bit data transfer enable
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* @note Parity and 9bit data transfer cannot be used at the same time.
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*/
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#define LL_UART_CON_BIT9_EN (1UL << 4)
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/*! Stop bit selection
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*/
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#define LL_UART_CON_STOP_BIT(n) (((n)&0x01) << 3)
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/*! Work mode selection
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*/
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#define LL_UART_CON_WORK_MODE(n) (((n)&0x03) << 1)
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/*! UART module enable
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*/
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#define LL_UART_CON_UART_EN (1UL << 0)
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/***** UARTSTA *****/
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/*! Transmission complete pending
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*/
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#define LL_UART_STA_TC_PENDING (1UL << 12)
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/*! RX timeout detection pending
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* @note Only UART0 has this feature.
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*/
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#define LL_UART_STA_TO_PEND (1UL << 11)
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/*! RX parity error pending
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* @note 4 bits corrspond to 4 frame data in rx buffer.
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*/
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#define LL_UART_STA_PERR_PEND(n) (((n)>>7) & 0x0F)
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/*! The amount of data in the rx fifo
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*/
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#define LL_UART_STA_RX_CNT(n) (((n)>>4) & 0x07)
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/*! Frame error pending
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*/
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#define LL_UART_STA_FERR_PENDING (1UL << 3)
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/*! RX FIFO overflow pending
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*/
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#define LL_UART_STA_RX_BUF_OV (1UL << 2)
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/*! RX FIFO not empty pending
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*/
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#define LL_UART_STA_RX_BUF_NOT_EMPTY (1UL << 1)
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/*! TX FIFO empty pending
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*/
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#define LL_UART_STA_TX_BUF_EMPTY (1UL << 0)
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/***** DMACON *****/
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/*! RX DMA parity error interrupt enable
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* @note Only UART1 has this feature
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*/
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#define LL_UART_DMACON_RX_DMA_PERR_IE_EN (1UL << 4)
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/*! RX DMA interrupt enable
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* @note Only UART1 has this feature
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*/
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#define LL_UART_DMACON_RX_DMA_IE_EN (1UL << 3)
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/*! TX DMA interrupt enable
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* @note Only UART1 has this feature
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*/
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#define LL_UART_DMACON_TX_DMA_IE_EN (1UL << 2)
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/*! RX DMA enable
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* @note Only UART1 has this feature
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*/
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#define LL_UART_DMACON_RX_DMA_EN (0x0101UL << 1)
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/*! TX DMA enable
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* @note Only UART1 has this feature
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*/
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#define LL_UART_DMACON_TX_DMA_EN (0x0101UL << 0)
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/***** DMASTA *****/
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/*! RX DMA parity error pending
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* @note Only UART1 has this feature
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*/
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#define LL_UART_DMASTA_RX_DMA_PERR (1UL << 2)
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/*! RX DMA pending
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* @note Only UART1 has this feature
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*/
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#define LL_UART_DMASTA_RX_DMA_PEND (1UL << 1)
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/*! TX DMA pending
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* @note Only UART1 has this feature
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*/
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#define LL_UART_DMASTA_TX_DMA_PEND (1UL << 0)
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/***** UART_RS485_CON *****/
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/*! RS485 RE enable
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* @note Only UART1 has this feature
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*/
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#define LL_UART_RS485_CON_RE_EN (1UL << 9)
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/*! RS485 DE enable
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* @note Only UART1 has this feature
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*/
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#define LL_UART_RS485_CON_DE_EN (1UL << 8)
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/*! RS485 work mode
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* @note Only UART1 has this feature
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*/
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#define LL_UART_RS485_CON_RS485_MODE(n) (((n)&0x01) << 3)
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/*! RS485 RE polarity
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* @note Only UART1 has this feature
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*/
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#define LL_UART_RS485_CON_RE_POL(n) (((n)&0x01) << 2)
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/*! RS485 DE polarity
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* @note Only UART1 has this feature
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*/
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#define LL_UART_RS485_CON_DE_POL(n) (((n)&0x01) << 1)
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/*! RS485 enable
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* @note Only UART1 has this feature
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*/
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#define LL_UART_RS485_CON_RS485_EN (1UL << 0)
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/***** UART_RS485_DET *****/
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/*! The time interval between the end of STOP BIT and DE invalid. The unit
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* is the uart module clock.
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* @note Only UART1 has this feature
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*/
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#define LL_UART_RS485_DET_DE_DAT(n) (((n)&0x01FF) << 16)
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/*! The time interval between the time DE is valid and the START BIT is sent.
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* The unit is the uart module clock.
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* @note Only UART1 has this feature
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*/
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#define LL_UART_RS485_DET_DE_AT(n) (((n)&0x01FF) << 0)
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/***** UART_RS485_TAT *****/
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/*! The time interval between the valid of RE and DE valid, the unit is the
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* uart module clock.
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* @note Only UART1 has this feature
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*/
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#define LL_UART_RS485_TAT_RE2DE_T(n) (((n)&0xFFFF) << 16)
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/*! The time interval between DE valid and RE valid, the unit is the uart
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* module clock.
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* @note Only UART1 has this feature
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*/
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#define LL_UART_RS485_TAT_DE2RE_T(n) (((n)&0xFFFF) << 0)
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/***** UART_TOCON *****/
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/*! Timeout time configure
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*/
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#define LL_UART_TOCON_TO_BIT_LEN(n) (((n)&0xFFFF) << 16)
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/*! Timeout interrupt enable
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*/
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#define LL_UART_TOCON_TO_IE_EN (1UL << 1)
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/*! Timeout enable
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*/
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#define LL_UART_TOCON_TO_EN (1UL << 0)
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typedef struct hguart_v2_hw {
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__IO uint32_t CON;
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__IO uint32_t BAUD;
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__IO uint32_t DATA;
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__IO uint32_t STA;
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__IO uint32_t TSTADR;
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__IO uint32_t RSTADR;
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__IO uint32_t TDMALEN;
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__IO uint32_t RDMALEN;
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__IO uint32_t TDMACNT;
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__IO uint32_t RDMACNT;
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__IO uint32_t DMACON;
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__IO uint32_t DMASTA;
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__IO uint32_t RS485_CON;
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__IO uint32_t RS485_DET;
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__IO uint32_t RS485_TAT;
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__IO uint32_t TOCON;
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}UART_TypeDef;
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/**
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* @brief enable RS485 RE pin
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* @param p_uart : The structure pointer of the UART
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* @retval None
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*/
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__STATIC_INLINE void ll_uart485_re_enable(UART_TypeDef *p_uart) {
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p_uart->RS485_CON |= LL_UART_RS485_CON_RE_EN;
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}
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/**
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* @brief disable RS485 RE pin
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* @param p_uart : The structure pointer of the UART
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* @retval None
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*/
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__STATIC_INLINE void ll_uart485_re_disable(UART_TypeDef *p_uart) {
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p_uart->RS485_CON &= (~LL_UART_RS485_CON_RE_EN);
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}
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/**
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* @brief enable RS485 DE pin
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* @param p_uart : The structure pointer of the UART
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* @retval None
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*/
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__STATIC_INLINE void ll_uart485_de_enable(UART_TypeDef *p_uart) {
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p_uart->RS485_CON |= LL_UART_RS485_CON_DE_EN;
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}
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/**
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* @brief disable RS485 DE pin
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* @param p_uart : The structure pointer of the UART
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* @retval None
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*/
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__STATIC_INLINE void ll_uart485_de_disable(UART_TypeDef *p_uart) {
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p_uart->RS485_CON &= (~LL_UART_RS485_CON_DE_EN);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _HGUART_V2_HW_H_ */
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