118 lines
2.5 KiB
C
118 lines
2.5 KiB
C
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/* vxbPwrStates.h - device power state definitions */
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/*
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* Copyright (C) 2018 Alibaba Group Holding Limited
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*/
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/*
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modification history
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--------------------
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21jan2018,WangMin writen.
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*/
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/*
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DESCRIPTION
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This file provides base type define power state.
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*/
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#ifndef __pwr_state_h__
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#define __pwr_state_h__
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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#ifndef TRUE
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#define TRUE 1
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#endif
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#ifndef FALSE
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#define FALSE 0
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#endif
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/* CPU states */
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typedef enum
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{
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CPU_CSTATE_C0 = 0, /* Operating */
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CPU_CSTATE_C1 = 1, /* Halt -- not executing put powered on */
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CPU_CSTATE_C2 = 2, /* not execuing with lower power than C1 */
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CPU_CSTATE_C3 = 3, /* not execuing with lower power than C2 */
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CPU_CSTATE_C4 = 4, /* not execuing with lower power than C3 */
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CPU_CSTATE_C5 = 5,
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CPU_CSTATE_C6 = 6,
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CPU_CSTATE_C7 = 7,
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CPU_CSTATE_C8 = 8,
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CPU_CSTATE_C9 = 9,
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CPU_CSTATE_C10 = 10,
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CPU_CSTATE_C11 = 11,
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CPU_CSTATE_C12 = 12,
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CPU_CSTATE_C13 = 13,
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CPU_CSTATE_C14 = 14,
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CPU_CSTATE_C15 = 15,
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CPU_CSTATE_C16 = 16,
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CPU_CSTATE_C17 = 17,
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CPU_CSTATE_C18 = 18,
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CPU_CSTATE_C19 = 19,
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CPU_CSTATE_C20 = 20,
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CPU_CSTATE_C21 = 21,
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CPU_CSTATE_C22 = 22,
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CPU_CSTATE_C23 = 23,
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CPU_CSTATE_C24 = 24,
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CPU_CSTATE_C25 = 25,
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CPU_CSTATE_C26 = 26,
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CPU_CSTATE_C27 = 27,
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CPU_CSTATE_C28 = 28,
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CPU_CSTATE_C29 = 29,
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CPU_CSTATE_C30 = 30,
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CPU_CSTATE_C31 = 31,
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CPU_CSTATE_MAX = 31,
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CPU_CSTATE_NONE = 0xFF
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} cpu_cstate_t;
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/* Performance states */
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typedef enum
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{
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CPU_PSTATE_P0 = 0, /* Max power and clock */
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CPU_PSTATE_P1 = 1,
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CPU_PSTATE_P2 = 2,
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CPU_PSTATE_P3 = 3,
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CPU_PSTATE_P4 = 4,
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CPU_PSTATE_P5 = 5,
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CPU_PSTATE_P6 = 6,
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CPU_PSTATE_P7 = 7,
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CPU_PSTATE_P8 = 8,
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CPU_PSTATE_P9 = 9,
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CPU_PSTATE_P10 = 10,
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CPU_PSTATE_P11 = 11,
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CPU_PSTATE_P12 = 12,
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CPU_PSTATE_P13 = 13,
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CPU_PSTATE_P14 = 14,
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CPU_PSTATE_P15 = 15,
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CPU_PSTATE_P16 = 16,
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CPU_PSTATE_P17 = 17,
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CPU_PSTATE_P18 = 18,
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CPU_PSTATE_P19 = 19,
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CPU_PSTATE_P20 = 20,
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CPU_PSTATE_P21 = 21,
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CPU_PSTATE_P22 = 22,
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CPU_PSTATE_P23 = 23,
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CPU_PSTATE_P24 = 24,
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CPU_PSTATE_P25 = 25,
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CPU_PSTATE_P26 = 26,
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CPU_PSTATE_P27 = 27,
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CPU_PSTATE_P28 = 28,
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CPU_PSTATE_P29 = 29,
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CPU_PSTATE_P30 = 30,
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CPU_PSTATE_P31 = 31,
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CPU_PSTATE_MAX = 32,
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CPU_PSTATE_NONE = 0xFF
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} cpu_pstate_t;
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#ifdef __cplusplus
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}
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#endif
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#endif /* __pwr_state_h__ */
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