681 lines
16 KiB
C
681 lines
16 KiB
C
#include "typedef.h"
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#include "asm/clock.h"
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#include "asm/adc_api.h"
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#include "timer.h"
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#include "init.h"
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#include "asm/efuse.h"
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#include "irq.h"
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#include "asm/power/p33.h"
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#include "asm/power/p11.h"
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#include "asm/power_interface.h"
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#include "jiffies.h"
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u32 adc_sample(u32 ch);
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static volatile u16 _adc_res;
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static volatile u16 cur_ch_value;
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static u8 cur_ch = 0;
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struct adc_info_t {
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u32 ch;
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u16 value;
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u32 jiffies;
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u32 sample_period;
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};
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#define ENABLE_OCCUPY_MODE 1
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static struct adc_info_t adc_queue[ADC_MAX_CH + ENABLE_OCCUPY_MODE];
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static u8 adc_sample_flag = 0;
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static u16 dtemp_voltage = 0;
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#define ADC_SRC_CLK clk_get("adc")
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/*config adc clk according to sys_clk*/
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static const u32 sys2adc_clk_info[] = {
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128000000L,
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96000000L,
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72000000L,
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48000000L,
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24000000L,
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12000000L,
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6000000L,
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1000000L,
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};
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u32 adc_add_sample_ch(u32 ch)
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{
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u32 i = 0;
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for (i = 0; i < ADC_MAX_CH; i++) {
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/* printf("%s() %d %x %x\n", __func__, i, ch, adc_queue[i].ch); */
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if (adc_queue[i].ch == ch) {
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break;
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} else if (adc_queue[i].ch == -1) {
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adc_queue[i].ch = ch;
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adc_queue[i].value = 1;
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adc_queue[i].jiffies = 0;
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adc_queue[i].sample_period = msecs_to_jiffies(0);
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printf("add sample ch %x\n", ch);
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break;
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}
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}
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return i;
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}
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u32 adc_set_sample_freq(u32 ch, u32 ms)
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{
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u32 i;
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for (i = 0; i < ADC_MAX_CH; i++) {
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if (adc_queue[i].ch == ch) {
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adc_queue[i].sample_period = msecs_to_jiffies(ms);
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adc_queue[i].jiffies = msecs_to_jiffies(ms) + jiffies;
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break;
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}
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}
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return i;
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}
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u32 adc_remove_sample_ch(u32 ch)
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{
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u32 i = 0;
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for (i = 0; i < ADC_MAX_CH; i++) {
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if (adc_queue[i].ch == ch) {
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adc_queue[i].ch = -1;
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break;
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}
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}
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return i;
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}
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static u32 adc_get_next_ch(u32 cur_ch)
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{
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for (int i = cur_ch + 1; i < ADC_MAX_CH; i++) {
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if (adc_queue[i].ch != -1) {
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return i;
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}
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}
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return 0;
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}
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#define PMU_CH_SAMPLE_FREQ 500 //ms
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#define PMU_CH_VALUE_ARRAY_SIZE (16 + 1)
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static u16 vbat_value_array[PMU_CH_VALUE_ARRAY_SIZE];
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static u16 vbg_value_array[PMU_CH_VALUE_ARRAY_SIZE];
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static void adc_value_push(u16 *array, u16 adc_value)
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{
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u16 pos = array[0];
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pos++;
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if (pos >= PMU_CH_VALUE_ARRAY_SIZE) {
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pos = 1;
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}
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array[pos] = adc_value;
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array[0] = pos;
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}
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static u16 adc_value_avg(u16 *array)
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{
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u32 i, j, sum = 0;
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for (i = 1, j = 0; i < PMU_CH_VALUE_ARRAY_SIZE; i++) {
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if (array[i]) {
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sum += array[i];
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j += 1;
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}
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}
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if (sum) {
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return (sum / j);
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}
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return 1;
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}
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static void adc_value_array_reset(u16 *array)
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{
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for (int i = 0; i < PMU_CH_VALUE_ARRAY_SIZE; i++) {
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array[i] = 0;
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}
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}
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u32 adc_get_value(u32 ch)
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{
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if (ch == AD_CH_VBAT) {
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return adc_value_avg(vbat_value_array);
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} else if (ch == AD_CH_LDOREF) {
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return adc_value_avg(vbg_value_array);
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}
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for (int i = 0; i < ADC_MAX_CH; i++) {
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if (adc_queue[i].ch == ch) {
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return adc_queue[i].value;
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}
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}
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return 1;
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}
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#define VBG_CENTER 801
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#define VBG_RES 3
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u32 adc_value_to_voltage(u32 adc_vbg, u32 adc_ch_val)
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{
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u32 adc_res = adc_ch_val;
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u32 adc_trim = get_vbg_trim();
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u32 tmp, tmp1;
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tmp1 = adc_trim & 0x0f;
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tmp = (adc_trim & BIT(4)) ? VBG_CENTER - tmp1 * VBG_RES : VBG_CENTER + tmp1 * VBG_RES;
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/* printf("adc_res %d mv vbg:%d adc:%d adc_trim:%x\n", adc_res, adc_vbg, adc_ch_val, adc_trim); */
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if (adc_vbg == 0) {
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adc_vbg = 1; //防止div0异常
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}
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adc_res = adc_res * tmp / adc_vbg;
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return adc_res;
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}
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u32 adc_get_voltage(u32 ch)
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{
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#ifdef CONFIG_FPGA_ENABLE
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return 1000;
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#endif
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if (ch == AD_CH_DTEMP) {
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return dtemp_voltage;
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}
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u32 adc_vbg = adc_get_value(AD_CH_LDOREF);
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u32 adc_res = adc_get_value(ch);
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return adc_value_to_voltage(adc_vbg, adc_res);
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}
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u32 adc_check_vbat_lowpower()
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{
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return 0;
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}
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void adc_audio_ch_select(u32 ch)
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{
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SFR(JL_ADDA->ADDA_CON1, 1, 1, 1);
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SFR(JL_ADDA->ADDA_CON0, 0, 12, 0);
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switch (ch << 16) {
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case AD_AUDIO_VADADC:
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SFR(JL_ADDA->ADDA_CON0, 12, 1, 1);
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break;
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case AD_AUDIO_VCM:
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SFR(JL_ADDA->ADDA_CON0, 11, 1, 1);
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break;
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case AD_AUDIO_VBGLDO:
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SFR(JL_ADDA->ADDA_CON0, 10, 1, 1);
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break;
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case AD_AUDIO_HPVDD:
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SFR(JL_ADDA->ADDA_CON0, 9, 1, 1);
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break;
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case AD_AUDIO_RN:
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SFR(JL_ADDA->ADDA_CON0, 4, 1, 1);
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break;
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case AD_AUDIO_RP:
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SFR(JL_ADDA->ADDA_CON0, 3, 1, 1);
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break;
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case AD_AUDIO_LN:
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SFR(JL_ADDA->ADDA_CON0, 2, 1, 1);
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break;
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case AD_AUDIO_LP:
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SFR(JL_ADDA->ADDA_CON0, 1, 1, 1);
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break;
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case AD_AUDIO_DACVDD:
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SFR(JL_ADDA->ADDA_CON0, 0, 1, 1);
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break;
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default:
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break;
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}
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}
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void adc_close()
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{
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JL_ADC->CON = 0;
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JL_ADC->CON = 0;
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}
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void adc_suspend()
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{
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JL_ADC->CON &= ~BIT(4);
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}
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void adc_resume()
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{
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JL_ADC->CON |= BIT(4);
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}
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void adc_enter_occupy_mode(u32 ch)
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{
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if (JL_ADC->CON & BIT(4)) {
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return;
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}
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adc_queue[ADC_MAX_CH].ch = ch;
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cur_ch_value = adc_sample(ch);
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}
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void adc_exit_occupy_mode()
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{
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adc_queue[ADC_MAX_CH].ch = -1;
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}
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u32 adc_occupy_run()
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{
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if (adc_queue[ADC_MAX_CH].ch != -1) {
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while (1) {
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asm volatile("idle");//wait isr
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if (_adc_res != (u16) - 1) {
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break;
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}
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}
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if (_adc_res == 0) {
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_adc_res ++;
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}
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adc_queue[ADC_MAX_CH].value = _adc_res;
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_adc_res = cur_ch_value;
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return adc_queue[ADC_MAX_CH].value;
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}
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return 0;
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}
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u32 adc_get_occupy_value()
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{
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if (adc_queue[ADC_MAX_CH].ch != -1) {
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return adc_queue[ADC_MAX_CH].value;
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}
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return 0;
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}
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u32 get_adc_div(u32 src_clk)
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{
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u32 adc_clk;
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u32 adc_clk_idx;
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u32 cnt;
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adc_clk = src_clk;
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cnt = ARRAY_SIZE(sys2adc_clk_info);
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for (adc_clk_idx = 0; adc_clk_idx < cnt; adc_clk_idx ++) {
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if (adc_clk > sys2adc_clk_info[adc_clk_idx]) {
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break;
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}
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}
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if (adc_clk_idx < cnt) {
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adc_clk_idx = cnt - adc_clk_idx;
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} else {
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adc_clk_idx = cnt - 1;
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}
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return adc_clk_idx;
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}
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___interrupt
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static void adc_isr()
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{
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_adc_res = JL_ADC->RES;
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local_irq_disable();
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JL_ADC->CON = BIT(6);
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local_irq_enable();
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#if 1
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if (adc_sample_flag > 1) {
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extern void adc_scan(void *priv);
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adc_scan((void *)&adc_sample_flag);
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}
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#endif
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}
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u32 adc_sample(u32 ch)
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{
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const u32 tmp_adc_res = _adc_res;
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_adc_res = (u16) - 1;
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u32 adc_con = 0;
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SFR(adc_con, 0, 3, 0b110);//div 96
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adc_con |= (0xf << 12); //启动延时控制，实际启动延时为此数值*8个ADC时钟
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adc_con |= BIT(3); //ana en
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adc_con |= BIT(6); //clr pend
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adc_con |= BIT(5);//ie
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adc_con |= BIT(17);//clk en
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/* adc_con |= BIT(18)|BIT(19);//clk en */
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SFR(adc_con, 21, 3, 0b010);
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switch (ch & 0xff) {
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case AD_CH_BT:
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SFR(adc_con, 18, 3, AD_CH_BT & 0xf);
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break;
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case AD_CH_PMU:
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if (adc_sample_flag > 1) {
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SFR(adc_con, 0, 3, 0b011);//div 24
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adc_con &= ~(0xf << 12);
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}
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SFR(adc_con, 18, 3, AD_CH_PMU & 0xf);
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adc_pmu_ch_select(ch >> 16);
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break;
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case AD_CH_AUDIO:
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SFR(adc_con, 18, 3, AD_CH_AUDIO & 0xf);
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adc_audio_ch_select(ch >> 16);
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break;
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case AD_CH_LPCTM:
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SFR(adc_con, 18, 3, AD_CH_LPCTM & 0xf);
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break;
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case AD_CH_X32K:
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SFR(adc_con, 18, 3, AD_CH_X32K & 0xf);
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break;
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case AD_CH_PLL1:
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SFR(adc_con, 18, 3, AD_CH_PLL1 & 0xf);
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break;
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default:
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SFR(adc_con, 21, 3, 0b001);
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SFR(adc_con, 8, 4, ch & 0xf);
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break;
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}
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JL_ADC->CON = adc_con;
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JL_ADC->CON |= BIT(4);//en
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/* printf("ch %x %x %x %x",ch,ch >> 16,JL_ADC->CON,P3_ANA_CON4); */
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JL_ADC->CON |= BIT(6);//kistart
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return tmp_adc_res;
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}
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void adc_scan(void *priv)
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{
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static u16 vbg_adc_res = 0;
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static u16 dtemp_adc_res = 0;
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if ((priv == NULL) && (adc_sample_flag > 1)) {
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return;
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}
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if (adc_queue[ADC_MAX_CH].ch != -1) { //occupy mode
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return;
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}
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if (JL_ADC->CON & BIT(4)) {
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adc_sample_flag = 0;
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return ;
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}
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if (_adc_res == 0xffff) {
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adc_sample_flag = 0;
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}
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if (adc_sample_flag) {
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if (adc_sample_flag == 2) {
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dtemp_adc_res = _adc_res;
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adc_sample_flag = 3;
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adc_sample(AD_CH_LDOREF);
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return;
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} else if (adc_sample_flag == 3) {
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vbg_adc_res = _adc_res;
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dtemp_voltage = adc_value_to_voltage(vbg_adc_res, dtemp_adc_res);
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/* printf("vbg:%d dtemp:%d vol:%dmv\n", vbg_adc_res, dtemp_adc_res, dtemp_voltage); */
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} else {
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adc_queue[cur_ch].value = _adc_res;
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if (adc_queue[cur_ch].ch == AD_CH_VBAT) {
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adc_value_push(vbat_value_array, _adc_res);
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/* printf("vbat %d",_adc_res); */
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} else if (adc_queue[cur_ch].ch == AD_CH_LDOREF) {
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adc_value_push(vbg_value_array, _adc_res);
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/* printf("vbg %d",_adc_res); */
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}
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}
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adc_sample_flag = 0;
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}
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u8 next_ch = adc_get_next_ch(cur_ch);
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if (adc_queue[next_ch].sample_period) {
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if (time_before(adc_queue[next_ch].jiffies, jiffies)) {
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if (adc_queue[next_ch].ch == AD_CH_DTEMP) {
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adc_sample_flag = 2;
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} else {
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adc_sample_flag = 1;
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}
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adc_sample(adc_queue[next_ch].ch);
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adc_queue[next_ch].jiffies += adc_queue[next_ch].sample_period;
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}
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} else {
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adc_sample(adc_queue[next_ch].ch);
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adc_sample_flag = 1;
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}
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cur_ch = next_ch;
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}
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static u16 adc_wait_pnd()
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{
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while (!(JL_ADC->CON & BIT(7)));
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u32 adc_res = JL_ADC->RES;
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/* printf("adc_res =%d\n",adc_res); */
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asm("nop");
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JL_ADC->CON |= BIT(6);
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return adc_res;
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}
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static int hpvdd_voltage = 0;
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static void read_hpvdd_voltage(void)
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{
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int hpvdd_adc_value = 0;
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int tvalue = 0;
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adc_sample(AD_CH_AUDIO_HPVDD);
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for (int i = 0; i < 10; i++) {
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tvalue = adc_wait_pnd();
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hpvdd_adc_value += tvalue;
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}
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hpvdd_adc_value /= 10;
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u32 adc_vbg = adc_get_value(AD_CH_LDOREF);
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hpvdd_voltage = adc_value_to_voltage(adc_vbg, hpvdd_adc_value);
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printf("hpvdd = %d mV\n", hpvdd_voltage);
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SFR(JL_ADDA->ADDA_CON0, 9, 1, 0);
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}
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int get_hpvdd_voltage(void)
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{
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return hpvdd_voltage;
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}
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void adc_reset(void)
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{
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int i, j;
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local_irq_disable();
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JL_ADC->CON = 0;
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memset(vbg_value_array, 0x0, sizeof(vbg_value_array));
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memset(vbat_value_array, 0x0, sizeof(vbat_value_array));
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u32 sum_ad = 0;
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adc_sample(AD_CH_LDOREF);
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for (int i = 0; i < PMU_CH_VALUE_ARRAY_SIZE; i ++) {
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sum_ad += adc_wait_pnd();
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}
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sum_ad /= PMU_CH_VALUE_ARRAY_SIZE;
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adc_value_push(vbg_value_array, sum_ad);
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printf("vbg_adc_value = %d\n", adc_value_avg(vbg_value_array));
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sum_ad = 0;
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adc_sample(AD_CH_VBAT);
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for (int i = 0; i < PMU_CH_VALUE_ARRAY_SIZE; i ++) {
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sum_ad += adc_wait_pnd();
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}
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sum_ad /= PMU_CH_VALUE_ARRAY_SIZE;
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adc_value_push(vbat_value_array, sum_ad);
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printf("vbat_adc_value = %d\n", adc_value_avg(vbat_value_array));
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printf("vbat = %d mv\n", adc_get_voltage(AD_CH_VBAT) * 4);
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JL_ADC->CON = BIT(6);
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cur_ch = 0;
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adc_sample_flag = 0;
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local_irq_enable();
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}
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|
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void _adc_init(u32 sys_lvd_en)
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{
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memset(adc_queue, 0xff, sizeof(adc_queue));
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memset(vbg_value_array, 0x0, sizeof(vbg_value_array));
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memset(vbat_value_array, 0x0, sizeof(vbat_value_array));
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JL_ADC->CON = 0;
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JL_ADC->CON = 0;
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|
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adc_add_sample_ch(AD_CH_LDOREF);
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adc_set_sample_freq(AD_CH_LDOREF, PMU_CH_SAMPLE_FREQ);
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|
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adc_add_sample_ch(AD_CH_VBAT);
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adc_set_sample_freq(AD_CH_VBAT, PMU_CH_SAMPLE_FREQ);
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|
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adc_add_sample_ch(AD_CH_DTEMP);
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adc_set_sample_freq(AD_CH_DTEMP, PMU_CH_SAMPLE_FREQ);
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|
|
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u32 sum_ad = 0;
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adc_sample(AD_CH_LDOREF);
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for (int i = 0; i < PMU_CH_VALUE_ARRAY_SIZE; i ++) {
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sum_ad += adc_wait_pnd();
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}
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sum_ad /= PMU_CH_VALUE_ARRAY_SIZE;
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adc_value_push(vbg_value_array, sum_ad);
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printf("vbg_adc_value = %d\n", adc_value_avg(vbg_value_array));
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|
|
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sum_ad = 0;
|
|
adc_sample(AD_CH_VBAT);
|
|
for (int i = 0; i < PMU_CH_VALUE_ARRAY_SIZE; i ++) {
|
|
sum_ad += adc_wait_pnd();
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}
|
|
sum_ad /= PMU_CH_VALUE_ARRAY_SIZE;
|
|
adc_value_push(vbat_value_array, sum_ad);
|
|
printf("vbat_adc_value = %d\n", adc_value_avg(vbat_value_array));
|
|
printf("vbat = %d mv\n", adc_get_voltage(AD_CH_VBAT) * 4);
|
|
|
|
sum_ad = 0;
|
|
adc_sample(AD_CH_DTEMP);
|
|
for (int i = 0; i < PMU_CH_VALUE_ARRAY_SIZE; i ++) {
|
|
sum_ad += adc_wait_pnd();
|
|
}
|
|
sum_ad /= PMU_CH_VALUE_ARRAY_SIZE;
|
|
dtemp_voltage = adc_value_to_voltage(adc_value_avg(vbg_value_array), sum_ad);
|
|
printf("dtemp_adc_value = %d\n", sum_ad);
|
|
printf("dtemp = %d mv\n", dtemp_voltage);
|
|
|
|
read_hpvdd_voltage();
|
|
|
|
request_irq(IRQ_GPADC_IDX, 0, adc_isr, 0);
|
|
|
|
usr_timer_add(NULL, adc_scan, 5, 0); //2ms
|
|
|
|
/* void btosc_fast_boot_test(void); */
|
|
/* btosc_fast_boot_test(); */
|
|
/* sys_timer_add(NULL, adc_scan, 10); //2ms */
|
|
|
|
/* void adc_test(); */
|
|
/* usr_timer_add(NULL, adc_test, 1000, 0); //2ms */
|
|
|
|
/* extern void wdt_close(); */
|
|
/* wdt_close(); */
|
|
/* */
|
|
/* while(1); */
|
|
}
|
|
u32 get_vdd_voltage(u32 ch)
|
|
{
|
|
u32 vbg_value = 0;
|
|
u32 wvdd_value = 0;
|
|
|
|
adc_sample(AD_CH_LDOREF);
|
|
for (int i = 0; i < 10; i++) {
|
|
vbg_value += adc_wait_pnd();
|
|
}
|
|
|
|
adc_sample(ch);
|
|
for (int i = 0; i < 10; i++) {
|
|
wvdd_value += adc_wait_pnd();
|
|
}
|
|
|
|
u32 adc_vbg = vbg_value / 10;
|
|
u32 adc_res = wvdd_value / 10;
|
|
|
|
return adc_value_to_voltage(adc_vbg, adc_res);
|
|
}
|
|
|
|
|
|
#define ADC_SCAN_NUM 16
|
|
__attribute__((noinline))
|
|
AT(.volatile_ram_code)
|
|
u32 get_vddio_voltage()
|
|
{
|
|
|
|
u32 vbg_value = 0;
|
|
u32 vddio_value = 0;
|
|
u32 min = -1;
|
|
u32 max = 0;
|
|
adc_pmu_detect_en(0);
|
|
adc_sample(AD_CH_LDOREF);
|
|
for (int i = 0; i < ADC_SCAN_NUM; i++) {
|
|
while (!(JL_ADC->CON & BIT(7))) { //wait pending
|
|
}
|
|
|
|
u32 adc_res = JL_ADC->RES;
|
|
vbg_value += adc_res;
|
|
JL_ADC->CON |= BIT(6);
|
|
if (max < adc_res) {
|
|
max = adc_res;
|
|
}
|
|
if (min > adc_res) {
|
|
min = adc_res;
|
|
}
|
|
}
|
|
|
|
|
|
u32 adc_vbg = (vbg_value - max - min) / (ADC_SCAN_NUM - 2);
|
|
|
|
u32 adc_trim = get_vbg_trim();
|
|
|
|
u32 vbg_voltage, tmp1;
|
|
|
|
tmp1 = adc_trim & 0x0f;
|
|
vbg_voltage = (adc_trim & BIT(4)) ? VBG_CENTER - tmp1 * VBG_RES : VBG_CENTER + tmp1 * VBG_RES;
|
|
u32 vddio_voltage = vbg_voltage * 1023 / adc_vbg;
|
|
return vddio_voltage;
|
|
}
|
|
|
|
void adc_init()
|
|
{
|
|
adc_pmu_detect_en(1);
|
|
|
|
volatage_trim_init();
|
|
|
|
_adc_init(1);
|
|
}
|
|
//late_initcall(adc_init);
|
|
|
|
void adc_test()
|
|
{
|
|
/* void efuse_test(); */
|
|
/* efuse_test(); */
|
|
/* printf("\n\n%s() chip_id :%x\n", __func__, get_chip_id()); */
|
|
/* printf("%s() vbg trim:%x\n", __func__, get_vbg_trim()); */
|
|
/* printf("%s() vbat trim:%x\n", __func__, get_vbat_trim()); */
|
|
|
|
/* printf("\n\nWLA_CON0 %x\n", JL_ANA->WLA_CON0); */
|
|
/* printf("WLA_CON9 %x\n", JL_ANA->WLA_CON9); */
|
|
/* printf("WLA_CON10 %x\n", JL_ANA->WLA_CON10); */
|
|
/* printf("WLA_CON21 %x\n", JL_ANA->WLA_CON21); */
|
|
|
|
/* printf("ADA_CON %x\n", JL_ANA->ADA_CON3); */
|
|
/* printf("PLL_CON1 %x\n", JL_CLOCK->PLL_CON1); */
|
|
|
|
printf("\n%s() VBAT:%d %d mv\n\n", __func__,
|
|
adc_get_value(AD_CH_VBAT), adc_get_voltage(AD_CH_VBAT) * 4);
|
|
|
|
/* printf("\n%s() pa3:%d %d mv\n\n", __func__, */
|
|
/* adc_get_value(AD_CH_PA3), adc_get_voltage(AD_CH_PA3)); */
|
|
|
|
|
|
}
|
|
void adc_vbg_init()
|
|
{
|
|
return ;
|
|
}
|
|
//__initcall(adc_vbg_init);
|