From eb9de783edf404200a47152220876928406133cd Mon Sep 17 00:00:00 2001 From: lmx Date: Mon, 24 Nov 2025 13:55:10 +0800 Subject: [PATCH] =?UTF-8?q?=E5=AD=98=E6=A1=A3?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- apps/earphone/RFID/include/CPU_CARD.h | 58 ++ apps/earphone/RFID/include/MIFARE.h | 21 + apps/earphone/RFID/include/NTAG.h | 8 + apps/earphone/RFID/include/READER.h | 156 +++++ apps/earphone/RFID/include/READER_REG.h | 478 ++++++++++++++ apps/earphone/RFID/include/rfid_main.h | 60 ++ apps/earphone/RFID/reader/CPU_CARD.c | 584 +++++++++++++++++ apps/earphone/RFID/reader/MIFARE.c | 491 ++++++++++++++ apps/earphone/RFID/reader/NTAG.c | 76 +++ apps/earphone/RFID/reader/READER.c | 809 ++++++++++++++++++++++++ apps/earphone/RFID/reader/rfid_main.c | 360 +++++++++++ 11 files changed, 3101 insertions(+) create mode 100644 apps/earphone/RFID/include/CPU_CARD.h create mode 100644 apps/earphone/RFID/include/MIFARE.h create mode 100644 apps/earphone/RFID/include/NTAG.h create mode 100644 apps/earphone/RFID/include/READER.h create mode 100644 apps/earphone/RFID/include/READER_REG.h create mode 100644 apps/earphone/RFID/include/rfid_main.h create mode 100644 apps/earphone/RFID/reader/CPU_CARD.c create mode 100644 apps/earphone/RFID/reader/MIFARE.c create mode 100644 apps/earphone/RFID/reader/NTAG.c create mode 100644 apps/earphone/RFID/reader/READER.c create mode 100644 apps/earphone/RFID/reader/rfid_main.c diff --git a/apps/earphone/RFID/include/CPU_CARD.h b/apps/earphone/RFID/include/CPU_CARD.h new file mode 100644 index 0000000..eb86941 --- /dev/null +++ b/apps/earphone/RFID/include/CPU_CARD.h @@ -0,0 +1,58 @@ +#ifndef CPU_CARD_H +#define CPU_CARD_H 1 + +typedef struct +{ + unsigned char SendLength; + unsigned char *pSendBuffer; + unsigned char ReceiveLength; + unsigned char *pReceiveBuffer; + unsigned int Timeout; +}transmission_struct; + +struct ATS_STR +{ + unsigned char Length; + unsigned char Ats_Data[255]; +}; +struct PPS_STR +{ + unsigned char Length; + unsigned char Pps_Data[1]; +}; + +struct CPU_CARD_STR +{ + unsigned char FSCI; + unsigned char FSC; + unsigned char FWI; + unsigned int FWT; + unsigned char SFGI; + unsigned char TA; + unsigned char TB; + unsigned char TC; + unsigned char PCB; + unsigned char WTXM; + struct ATS_STR ATS; + struct PPS_STR PPS; +}; + + +extern struct CPU_CARD_STR CPU_CARD; +extern unsigned char Ats_Process( unsigned char ats_len, unsigned char *ats ); + +extern unsigned char CPU_CARD_EVENT( void ); +extern unsigned char CPU_TPDU( transmission_struct *tpdu ); + +extern unsigned char CPU_Rats( unsigned char *ats_len, unsigned char *ats ); + + +extern unsigned char CPU_NAK( transmission_struct *tpdu ); + + +extern unsigned char CPU_APDU( transmission_struct *apdu ); + + +extern unsigned char CPU_TPDU( transmission_struct *tpdu ); + +#endif diff --git a/apps/earphone/RFID/include/MIFARE.h b/apps/earphone/RFID/include/MIFARE.h new file mode 100644 index 0000000..b0b4b0f --- /dev/null +++ b/apps/earphone/RFID/include/MIFARE.h @@ -0,0 +1,21 @@ +#ifndef _MIFARE_H_ +#define _MIFARE_H_ +#define KEY_A_M1 0 +#define KEY_B_M1 1 + +extern unsigned char SECTOR,BLOCK,BLOCK_NUM; +extern unsigned char BLOCK_DATA[16]; +extern unsigned char KEY_A[16][6]; +extern unsigned char KEY_B[16][6]; +extern unsigned char MIFARE_CARD_EVENT(void); +extern void Mifare_Clear_Crypto(void); +unsigned char Mifare_LoadKey(unsigned char *mifare_key); +extern unsigned char Mifare_Transfer(unsigned char block); +extern unsigned char Mifare_Restore(unsigned char block); +extern unsigned char Mifare_Blockset(unsigned char block,unsigned char *data_buff); +extern unsigned char Mifare_Blockinc(unsigned char block,unsigned char *data_buff); +extern unsigned char Mifare_Blockdec(unsigned char block,unsigned char *data_buff); +extern unsigned char Mifare_Blockwrite(unsigned char block,unsigned char *data_buff); +extern unsigned char Mifare_Blockread(unsigned char block,unsigned char *data_buff); +extern unsigned char Mifare_Auth(unsigned char key_mode,unsigned char sector,unsigned char *mifare_key,unsigned char *card_uid); +#endif diff --git a/apps/earphone/RFID/include/NTAG.h b/apps/earphone/RFID/include/NTAG.h new file mode 100644 index 0000000..d32b68c --- /dev/null +++ b/apps/earphone/RFID/include/NTAG.h @@ -0,0 +1,8 @@ +#ifndef _NTAG_H +#define _NTAG_H + +extern unsigned char PAGE_DATA[16]; +extern unsigned char NTAG_EVENT(void); +extern unsigned char Read_Page(unsigned char page_num,unsigned char *page_data); +extern unsigned char Write_Page(unsigned char page_num,unsigned char *page_data); +#endif diff --git a/apps/earphone/RFID/include/READER.h b/apps/earphone/RFID/include/READER.h new file mode 100644 index 0000000..9064123 --- /dev/null +++ b/apps/earphone/RFID/include/READER.h @@ -0,0 +1,156 @@ + +#ifndef _READER_H +#define _READER_H + +// #include "fm15l0xx_ll_gpio.h" + +static const unsigned char RF_CMD_REQA = 0x26; +static const unsigned char RF_CMD_WUPA = 0x52; +static const unsigned char RF_CMD_ANTICOLL[3] = {0x93,0x95,0x97} ; +static const unsigned char RF_CMD_SELECT[3] = {0x93,0x95,0x97} ; + +static const unsigned char RF_CMD_KEYA = 0x60; +static const unsigned char RF_CMD_KEYB = 0x61; + +struct picc_b_struct +{ +unsigned char ATQB[12];//REQBӦ�� +unsigned char PUPI[4]; +unsigned char APPLICATION_DATA[4]; +unsigned char PROTOCOL_INF[3]; +unsigned char CID;//ATTRIBӦ�� +unsigned char Answer_to_HALT[1];//HALTӦ�� +unsigned char SN[8];//����֤SN���� +}; + +extern struct picc_b_struct PICC_B; + +struct picc_a_struct +{ +unsigned char ATQA[2]; +unsigned char CASCADE_LEVEL; +unsigned char UID_Length; +unsigned char UID[15]; +unsigned char BCC[3]; +unsigned char SAK[3]; +}; + +extern struct picc_a_struct PICC_A; + +struct picc_v_struct +{ + unsigned char UID[8]; + unsigned char RESPONSE; + unsigned char BLOCK_DATA[4]; +}; + +extern struct picc_v_struct PICC_V; +struct picc_f_struct +{ + unsigned char UID[8]; +}; +extern struct picc_f_struct PICC_F; + + +//���ղ������� TYPE A +#define GAIN_A 7 //���÷�Χ0~7 +#define HPCF_A 3 //���÷�Χ0~7 +#define AMPLITUDE_A 255 //���÷�Χ0~255 + + +//���ղ������� TYPE B +#define GAIN_B 7 //���÷�Χ0~7 +#define HPCF_B 3 //���÷�Χ0~7 +#define AMPLITUDE_B 255 //���÷�Χ0~255������ֵԽ���ز�Խ�� + +#define MODULATION_B 100//���÷�Χ0~255,����ֵԽС������Խ�� + +//���ղ������� TYPE V +#define GAIN_V 7//���÷�Χ0~7 +#define HPCF_V 4//���÷�Χ0~7 +#define AMPLITUDE_V 255 //���÷�Χ0~255������ֵԽ���ز�Խ�� +#define MODULATION_V 10 //���÷�Χ0~255,����ֵԽС������Խ�� + + +//���ղ������� TYPE F +#define GAIN_F 7//���÷�Χ0~7 +#define HPCF_F 4//���÷�Χ0~7 +#define AMPLITUDE_F 255 //���÷�Χ0~255������ֵԽ���ز�Խ�� + +#define MODULATION_F 100//���÷�Χ0~255,����ֵԽС������Խ�� + +#define SPI_GPIO GPIOB + +#define SCK_PIN LL_GPIO_Pin1//PB1 +#define MISO_PIN LL_GPIO_Pin2//PB2 +#define MOSI_PIN LL_GPIO_Pin3//PB3 +#define NSS_PIN LL_GPIO_Pin0//PB0 + +#define SCK_0 0//LL_GPIO_ResetOutputPin( SPI_GPIO, SCK_PIN ) +#define SCK_1 0//LL_GPIO_SetOutputPin( SPI_GPIO, SCK_PIN ) + +#define MOSI_0 0//LL_GPIO_ResetOutputPin( SPI_GPIO, MOSI_PIN ) +#define MOSI_1 0//LL_GPIO_SetOutputPin( SPI_GPIO, MOSI_PIN ) + +#define PD_GPIO GPIOA +#define PD_PIN LL_GPIO_Pin7//PA7 + + +#define NSS_0 0//LL_GPIO_ResetOutputPin( SPI_GPIO, NSS_PIN ) +#define NSS_1 0//LL_GPIO_SetOutputPin( SPI_GPIO, NSS_PIN ) + + +#define PD_0 0//LL_GPIO_ResetOutputPin( PD_GPIO, PD_PIN ) +#define PD_1 0//LL_GPIO_SetOutputPin( PD_GPIO, PD_PIN ) + + + + +extern void DelayMs( uint32_t xms ); +extern void DelayUs( uint32_t xus ); + +void Reader_GPIO_Init( void ); + +// extern unsigned char Reader_Set_HPD( unsigned char mode ); + +extern unsigned char FM176XX_HardReset(void); + +// extern unsigned char Reader_Set_HPD( unsigned char mode ) ; + +// extern unsigned char SetReg(unsigned char address,unsigned char reg_data); + +// extern unsigned char GetReg(unsigned char address,unsigned char *reg_data); + +extern void ModifyReg( unsigned char reg_address, unsigned char mask, unsigned char set ); +extern void Clear_FIFO(void); + +extern unsigned char SetCommand(unsigned char command); +extern void SetParity(unsigned char state); +extern void SetTimer(unsigned int timeout); +extern unsigned char SetCW(unsigned char mode); +extern unsigned char ReaderA_Initial(void); +extern unsigned char ReaderB_Initial(void); +extern unsigned char ReaderV_Initial(void); +extern unsigned char ReaderF_Initial(void); + +extern unsigned char ReaderA_Wakeeup(struct picc_a_struct *picc_a); +extern unsigned char ReaderA_Request(struct picc_a_struct *picc_a); +extern unsigned char ReaderA_Anticoll(struct picc_a_struct *picc_a); +extern unsigned char ReaderA_Select(struct picc_a_struct *picc_a); +extern unsigned char ReaderA_CardActivate(struct picc_a_struct *picc_a); + +extern unsigned char ReaderB_Wakeup(struct picc_b_struct *picc_b); +extern unsigned char ReaderB_Request(struct picc_b_struct *picc_b); +extern unsigned char ReaderB_Attrib(struct picc_b_struct *picc_b); +extern unsigned char ReaderB_Halt(struct picc_b_struct *picc_b); +extern unsigned char ReaderB_Get_SN(struct picc_b_struct *picc_b); + +extern unsigned char ReaderV_Inventory(struct picc_v_struct *picc_v); +extern unsigned char ReaderV_Select(struct picc_v_struct *picc_v); +extern unsigned char ReaderV_ReadSingleBlock(unsigned char block_num,struct picc_v_struct *picc_v); +extern unsigned char ReaderV_WriteSingleBlock(unsigned char block_num,struct picc_v_struct *picc_v); + +extern unsigned char ReaderF_Inventory(struct picc_f_struct *picc_f); + +#endif + diff --git a/apps/earphone/RFID/include/READER_REG.h b/apps/earphone/RFID/include/READER_REG.h new file mode 100644 index 0000000..1814b81 --- /dev/null +++ b/apps/earphone/RFID/include/READER_REG.h @@ -0,0 +1,478 @@ +/********************************************************************* + * * + * Copyright (c) 2010 Shanghai FuDan MicroElectronic Inc, Ltd. * + * All rights reserved. Licensed Software Material. * + * * + * Unauthorized use, duplication, or distribution is strictly * + * prohibited by law. * + * * + **********************************************************************/ +#ifndef _READER_REG_H +#define _READER_REG_H + +#define REG_COMMAND 0x00 // +#define REG_HOSTCTRL 0x01 // +#define REG_FIFOCONTROL 0x02 // +#define REG_WATERLEVEL 0x03 // +#define REG_FIFOLENGTH 0x04 // +#define REG_FIFODATA 0x05 // +#define REG_IRQ0 0x06 // +#define REG_IRQ1 0x07 // +#define REG_IRQ0EN 0x08 // +#define REG_IRQ1EN 0x09 // +#define REG_ERROR 0x0A // +#define REG_STATUS 0x0B // +#define REG_RXBITCTRL 0x0C // +#define REG_RXCOLL 0x0D // +#define REG_TCONTROL 0x0E // +#define REG_T0CONTROL 0x0F // + + +#define REG_T0RELOADHI 0x10 // +#define REG_T0RELOADLO 0x11 // +#define REG_T0COUNTERVALHI 0x12 // +#define REG_T0COUNTERVALLO 0x13 // +#define REG_T1CONTROL 0x14 // +#define REG_T1RELOADHI 0x15 // +#define REG_T1RELOADLO 0x16 // +#define REG_T1COUNTERVALHI 0x17 // +#define REG_T1COUNTERVALLO 0x18 // +#define REG_T2CONTROL 0x19 // +#define REG_T2RELOADHI 0x1A // +#define REG_T2RELOADLO 0x1B // +#define REG_T2COUNTERVALHI 0x1C // +#define REG_T2COUNTERVALLO 0x1D // +#define REG_T3CONTROL 0x1E // +#define REG_T3RELOADHI 0x1F // + + +#define REG_T3RELOADLO 0x20 // +#define REG_T3COUNTERVALHI 0x21 // +#define REG_T3COUNTERVALLO 0x22 // +#define REG_T4CONTROL 0x23 // +#define REG_T4RELOADHI 0x24 // +#define REG_T4RELOADLO 0x25 // +#define REG_T4COUNTERVALHI 0x26 // +#define REG_T4COUNTERVALLO 0x27 // +#define REG_TXMODE 0x28 +#define REG_TXAMP 0x29 +#define REG_TXCON 0x2A // +#define REG_TXI 0x2B // +#define REG_TXCRCCON 0x2C // +#define REG_RXCRCCON 0x2D // +#define REG_TXDATANUM 0x2E +#define REG_TXMODWIDTH 0x2F // + + +#define REG_TXSYM10BURSTLEN 0x30 // +#define REG_TXWAITCTRL 0x31 // +#define REG_TXWAITLO 0x32 // +#define REG_FRAMECON 0x33 // +#define REG_RXSOFD 0x34 // +#define REG_RXCTRL 0x35 // +#define REG_RXWAIT 0x36 // +#define REG_RXTHRESHOLD 0x37 // +#define REG_RCV 0x38 // +#define REG_RXANA 0x39 // +#define REG_LPCD_OPTIONS 0x3A // +#define REG_SERIALSPEED 0x3B // +#define REG_LFO_TRIMM 0x3C // +#define REG_CLKOUT_CTRL 0x3D // +#define REG_LPCD_THRESHOLD 0x3E // +#define REG_LPCD_QMIN 0x3F // +#define REG_LPCD_QMAX 0x40 +#define REG_LPCD_IMIN 0x41 +#define REG_LPCD_RESULT_I 0x42 +#define REG_LPCD_RESULT_Q 0x43 +#define REG_THNADJ 0x5F +#define REG_THNSET 0x61 +#define REG_THNMIN 0x62 +#define REG_DSP_CTRL1 0x64 +#define REG_MISC 0x75 +#define REG_RXTXCON 0x77 +#define REG_ERROREXT 0x7E +#define REG_VERSION 0x7F + +#define CMD_MASK 0x1F + +#define CMD_IDLE 0x00 +#define CMD_LPCD 0x01 +#define CMD_LOADKEY 0x02 +#define CMD_AUTHENT 0x03 +#define CMD_RECEIVE 0x05 +#define CMD_TRANSMIT 0x06 +#define CMD_TRANSCEIVE 0x07 +#define CMD_WRITEE2 0x08 +#define CMD_WRITEE2PAGE 0x09 +#define CMD_READE2 0x0A +#define CMD_LOADREG 0x0C +#define CMD_LOADPROTOCOL 0x0D +#define CMD_LOADKEYE2 0x0E +#define CMD_STOREKEYE2 0x0F +#define CMD_CRCCALC 0x1B +#define CMD_READRNR 0x1C +#define CMD_SOFTRESET 0x1F + + +/** \name Host-Control Register Contents (0x00) +*/ +/*@{*/ +#define BIT_STANDBY 0x80U /**< Standby bit; If set, the IC transits to standby mode. */ +#define BIT_MODEMOFF 0x40U +/*@{*/ +/** \name Host-Control Register Contents (0x01) +*/ +/*@{*/ +#define BIT_I2CFORCEHS 0x01U +//#define BIT_REGEN 0x80U +//#define BIT_BUSHOST 0x40U +//#define BIT_BUSSAM 0x20U +//#define MASK_SAMINTERFACE 0x0CU +/*@}*/ + +/** \name FIFO-Control Register Contents (0x02) +*/ +/*@{*/ +#define BIT_FIFOSIZE 0x80U +#define BIT_HIALERT 0x40U +#define BIT_LOALERT 0x20U +#define BIT_FIFOFLUSH 0x10U +#define BIT_WATERLEVEL_HI 0x04U +#define MASK_FIFOLENGTH_HI 0x03U +/*@}*/ + +/** \name IRQ0 Register(s) Contents (0x06/0x08) +*/ +/*@{*/ +#define BIT_SET 0x80U +#define BIT_IRQINV 0x80U +#define BIT_HIALERTIRQ 0x40U +#define BIT_LOALERTIRQ 0x20U +#define BIT_IDLEIRQ 0x10U +#define BIT_TXIRQ 0x08U +#define BIT_RXIRQ 0x04U +#define BIT_ERRIRQ 0x02U +#define BIT_RXSOFIRQ 0x01U +/*@}*/ + +/** \name IRQ1 Register(s) Contents (0x07/0x09) +*/ +/*@{*/ +/* #define BIT_SET 0x80U */ +#define BIT_IRQPUSHPULL 0x80U +#define BIT_GLOBALIRQ 0x40U +#define BIT_IRQPINEN 0x40U +#define BIT_LPCDIRQ 0x20U +#define BIT_TIMER4IRQ 0x10U +#define BIT_TIMER3IRQ 0x08U +#define BIT_TIMER2IRQ 0x04U +#define BIT_TIMER1IRQ 0x02U +#define BIT_TIMER0IRQ 0x01U +/*@}*/ + +/** \name Error Register Contents (0x0A) +*/ +/*@{*/ +#define BIT_CMDEE_ERR 0x80U +#define BIT_FIFOWRERR 0x40U +#define BIT_FIFOOVL 0x20U +#define BIT_MINFRAMEERR 0x10U +#define BIT_NODATAERR 0x08U +#define BIT_COLLDET 0x04U +#define BIT_PROTERR 0x02U +#define BIT_INTEGERR 0x01U +/*@}*/ + +/** \name Status Register Contents (0x0B) +*/ +/*@{*/ +#define BIT_CRYPTO1ON 0x20U +#define MASK_COMMSTATE 0x07U +/*@}*/ + +/** \name Rx-Bit-Control Register Contents (0x0C) +*/ +/*@{*/ +#define BIT_VALUESAFTERCOLL 0x80U +#define BIT_NOCOLL 0x08U +#define MASK_RXALIGN 0x70U +#define MASK_RXLASTBITS 0x07U +/*@}*/ + +/** \name Rx-Coll Register Contents (0x0D) +*/ +/*@{*/ +#define BIT_COLLPOSVALID 0x80U +#define MASK_COLLPOS 0x7FU +/*@}*/ + +/** \name Timer-Control Register Contents (0x0E) +*/ +/*@{*/ +#define BIT_T3RUNNING 0x80U +#define BIT_T2RUNNING 0x40U +#define BIT_T1RUNNING 0x20U +#define BIT_T0RUNNING 0x10U +#define BIT_T3STARTSTOPNOW 0x08U +#define BIT_T2STARTSTOPNOW 0x04U +#define BIT_T1STARTSTOPNOW 0x02U +#define BIT_T0STARTSTOPNOW 0x01U +/*@}*/ + +/** \name T[0-3]-Control Register Contents (0x0F/0x14/0x19/0x1E) +*/ +/*@{*/ +#define BIT_TSTOP_RX 0x80U /**< Stop timer on receive interrupt. */ +#define BIT_TAUTORESTARTED 0x08U /**< Auto-restart timer after underflow. */ +#define BIT_TSTART_TX 0x10U /**< Start timer on transmit interrupt. */ +//#define BIT_TSTART_LFO 0x20U /**< Use this timer for LFO trimming. */ +//#define BIT_TSTART_LFO_UV 0x30U /**< Use this timer for LFO trimming (generate UV at a trimming event). */ +#define MASK_TSTART 0x30U /**< Mask for TSTART bits. */ +#define VALUE_TCLK_1356_MHZ 0x00U /**< Use 13.56MHz as input clock. */ +#define VALUE_TCLK_212_KHZ 0x01U /**< Use 212KHz as input clock. */ +#define VALUE_TCLK_T0 0x02U /**< Use timer0 as input clock. */ +#define VALUE_TCLK_T1 0x03U /**< Use timer1 as input clock. */ +/*@}*/ + +/** \name T4-Control Register Contents (0x23) +*/ +/*@{*/ +#define BIT_T4RUNNING 0x80U +#define BIT_T4STARTSTOPNOW 0x40U +#define BIT_T4AUTOTRIMM 0x20U +#define BIT_T4AUTOLPCD 0x10U +#define BIT_T4AUTORESTARTED 0x08U +#define BIT_T4AUTOWAKEUP 0x04U +/*#define MASK_TSTART 0x30U*/ +#define VALUE_TCLK_LFO_64_KHZ 0x00U +#define VALUE_TCLK_LFO_8_KHZ 0x01U +#define VALUE_TCLK_LFO_4_KHZ 0x02U +#define VALUE_TCLK_LFO_2_KHZ 0x03U +/*@}*/ + +/** \name Driver Mode Register Contents (0x28) +*/ +/*@{*/ +#define BIT_TX2INV 0x80U +#define BIT_TX1INV 0x40U +#define BIT_TXEN 0x08U +#define VALUE_TXCLKMODE_HIGHIMPEDANCE 0x00U +#define VALUE_TXCLKMODE_OUTPULL0 0x01U +#define VALUE_TXCLKMODE_OUTPULL1 0x02U +#define VALUE_TXCLKMODE_RFLOWPULL 0x05U +#define VALUE_TXCLKMODE_RFHIGHPUSH 0x06U +#define VALUE_TXCLKMODE_PUSHPULL 0x07U +#define BIT_RFON 0x04U +#define BIT_TPUSHON 0x02U +#define BIT_TPULLON 0x01U +/*@}*/ + +/** \name Tx Amplifier Register Contents (0x29) +*/ +/*@{*/ +#define MASK_CW_AMPLITUDE 0x00U +#define MASK_RESIDUAL_CARRIER 0x1FU +/*@}*/ + +/** \name Driver Control Register Contents (0x2A) +*/ +/*@{*/ +#define BIT_CWMAX 0x08U +#define BIT_DRIVERINV 0x04U +#define VALUE_DRIVERSEL_LOW 0x00U +#define VALUE_DRIVERSEL_TXENV 0x01U +#define VALUE_DRIVERSEL_SIGIN 0x02U +/*@}*/ + +/** \name Tx-/Rx-CRC Control Register Contents (0x2C/0x2D) +*/ +/*@{*/ +#define BIT_RXFORCECRCWRITE 0x80U +#define BIT_CRCINVERT 0x02U +#define BIT_CRCEN 0x01U +#define MASK_CRCPRESETVAL 0x70U +#define MASK_CRCTYPE 0x0CU +#define MASK_CRCTYPE5 0x00U +#define MASK_CRCTYPE16 0x08U +/*@}*/ + +/** \name Tx-DataNum Register Contents (0x2E) +*/ +/*@{*/ +#define BIT_KEEPBITGRID 0x10U +#define BIT_DATAEN 0x08U +#define MASK_TXLASTBITS 0x07U +#define MASK_SYMBOL_SEND 0x08U +/*@}*/ + +/** \name Tx-Wait Control Register Contents (0x31) +*/ +/*@{*/ +#define BIT_TXWAIT_START_RX 0x80U +#define BIT_TXWAIT_DBFREQ 0x40U +#define MASK_TXWAITHI 0x38U +#define MASK_TXSTOPBITLEN 0x07U +/*@}*/ + +/** \name Frame Control Register Contents (0x33) +*/ +/*@{*/ +#define BIT_TXPARITYEN 0x80U +#define BIT_RXPARITYEN 0x40U +#define VALUE_STOP_SYM3 0x0CU +#define VALUE_STOP_SYM2 0x08U +#define VALUE_STOP_SYM1 0x04U +#define VALUE_START_SYM3 0x03U +#define VALUE_START_SYM2 0x02U +#define VALUE_START_SYM1 0x01U +#define MASK_STARTSYM 0x03U +#define MASK_STOPSYM 0x0CU +/*@}*/ + +/** \name Rx Control Register Contents (0x35) +*/ +/*@{*/ +#define BIT_RXALLOWBITS 0x80U +#define BIT_RXMULTIPLE 0x40U +#define BIT_RXEOFTYPE 0x20U +#define BIT_EGT_CHECK 0x10U +#define BIT_EMD_SUPPRESSION 0x08U +#define MASK_RXBAUDRATE 0x07U +/*@}*/ + +/** \name Rx-Wait Register Contents (0x36) +*/ +/*@{*/ +#define BIT_RXWAITDBFREQ 0x80U +#define MASK_RXWAIT 0x7FU +/*@}*/ + +/** \name Rx-Threshold Register Contents (0x37) +*/ +/*@{*/ +#define MASK_MINLEVEL 0xF0U +#define MASK_MINLEVELP 0x0FU +/*@}*/ + +/** \name Rx-Receiver Register Contents (0x38) +*/ +/*@{*/ +#define BIT_RX_SINGLE 0x80U +#define BIT_RX_SHORT_MIX2ADC 0x40U +#define BIT_USE_SMALL_EVAL 0x04U +#define MASK_RX_SIGPRO_IN_SEL 0x30U +#define MASK_COLLLEVEL 0x03U +/*@}*/ + +/** \name Rx-Analog Register Contents (0x39) +*/ +/*@{*/ +#define BIT_RX_OC_ENABLE 0x20U +#define BIT_RX_HP_LOWF 0x10U +#define MASK_VMID_R_SEL 0xC0U +#define MASK_RCV_HPCF 0x0CU +#define MASK_RCV_GAIN 0x03U +/*@}*/ + +/** \name Serial-Speed Register Contents (0x3B) +*/ +/*@{*/ +#define MASK_BR_T0 0xE0U +#define MASK_BR_T1 0x1FU +/*@}*/ + + +/** \name LPCD Result(Q) Register Contents (0x43) +*/ +/*@{*/ +#define BIT_LPCDIRQ_CLR 0x40U +/*@}*/ + +/** \name Tx-BitMod Register Contents (0x48) +*/ +/*@{*/ +#define BIT_TXMSBFIRST 0x80U +#define BIT_TXPARITYTYPE 0x20U +#define BIT_TXSTOPBITTYPE 0x08U +#define BIT_TXSTARTBITTYPE 0x02U +#define BIT_TXSTARTBITEN 0x01U +/*@}*/ + +/** \name Rx-BitMod Register Contents (0x58) +*/ +/*@{*/ +#define BIT_RXSTOPONINVPAR 0x20U +#define BIT_RXSTOPONLEN 0x10U +#define BIT_RXMSBFIRST 0x08U +#define BIT_RXSTOPBITEN 0x04U +#define BIT_RXPARITYTYPE 0x02U +/*@}*/ + +/** \name Rx-Mod Register Contents (0x5D) +*/ +/*@{*/ +#define BIT_PREFILTER 0x20U +#define BIT_RECTFILTER 0x10U +#define BIT_SYNCHIGH 0x08U +#define BIT_CORRINV 0x04U +#define BIT_FSK 0x02U +#define BIT_BPSK 0x01U +/*@}*/ + +/** \name RxSupCfg Register Contents (0x6E) +*/ +/*@{*/ +#define BIT_RXNOERR 0x80U +/*@}*/ +/** \name RxTxConReg Register Contents (0x77) +*/ +/*@{*/ +#define BIT_SHMODE 0x08U //Ϻ㷨 +/*@}*/ + +/** \name ErrorExtReg Register Contents (0x7E) +*/ +/*@{*/ +#define PARITY_ERROR 0x08U +#define CRC_ERROR 0x04U +/*@{*/ + +#define LPCD_OPTION2 0x1DF + +//--------------------------------------------------------------- +//Э +#define RX_TYPEA_106 0 +#define RX_TYPEA_212 1 +#define RX_TYPEA_424 2 +#define RX_TYPEA_848 3 + +#define RX_TYPEB_106 4 +#define RX_TYPEB_212 5 +#define RX_TYPEB_424 6 +#define RX_TYPEB_848 7 + +#define RX_TYPEV_26 10 +#define RX_TYPEV_53 11 + +#define RX_FELICA_212 19 +#define RX_FELICA_424 20 + +//巢Э +#define TX_TYPEA_106 0 +#define TX_TYPEA_212 1 +#define TX_TYPEA_424 2 +#define TX_TYPEA_848 3 + +#define TX_TYPEB_106 4 +#define TX_TYPEB_212 5 +#define TX_TYPEB_424 6 +#define TX_TYPEB_848 7 + +#define TX_TYPEV_26 10 +#define TX_TYPEV_53 11 + +#define TX_FELICA_212 19 +#define TX_FELICA_424 20 + +#endif + diff --git a/apps/earphone/RFID/include/rfid_main.h b/apps/earphone/RFID/include/rfid_main.h new file mode 100644 index 0000000..3e5fd99 --- /dev/null +++ b/apps/earphone/RFID/include/rfid_main.h @@ -0,0 +1,60 @@ +#ifndef _RFID_MAIN_H +#define _RFID_MAIN_H + +#define uchar unsigned char +#define uint unsigned int +//typedef unsigned char u8; +//typedef unsigned int u16; +//typedef unsigned long u32; + +#include "system/includes.h" +#define BIT5 0x00000020U +#define BIT6 0x00000040U +#define BIT7 0x00000080U + + +#define BIT0 0x00000001U +#define BIT1 0x00000002U +#define BIT2 0x00000004U +#define BIT3 0x00000008U +#define BIT4 0x00000010U +#define BIT5 0x00000020U + + +void Uart1Send(unsigned char dat); +void Uart1SendString(unsigned char *str); + +void printHex(unsigned char num); + +typedef enum { + FAIL = 0U, + SUCCESS = !FAIL +} ErrorStatus; + +typedef enum { + DISABLE = 0U, + ENABLE = !DISABLE +} FunState; + +typedef enum { + RESET = 0U, + SET = !RESET +} FlagStatus, ITStatus; + + +typedef struct +{ + unsigned char SendLength; + unsigned char *pSendBuffer; + unsigned char ReceiveLength; + unsigned char *pReceiveBuffer; + unsigned int Timeout; +}transmission_struct; + + + + unsigned char GetReg(unsigned char address,unsigned char *reg_data); + unsigned char SetReg(unsigned char address, unsigned char reg_data); +void Delay1ms(); + +#endif \ No newline at end of file diff --git a/apps/earphone/RFID/reader/CPU_CARD.c b/apps/earphone/RFID/reader/CPU_CARD.c new file mode 100644 index 0000000..2623a5c --- /dev/null +++ b/apps/earphone/RFID/reader/CPU_CARD.c @@ -0,0 +1,584 @@ + //2018��2��2�ձ༭��֧��CPU��Ƭָ����ӷ�ʽ���� +#include "../include/READER.h" +#include "../include/CPU_CARD.h" +#include +#include "../include/READER_REG.h" +#include "../include/rfid_main.h" + + + #define CPU_DEBUG 0 + + struct CPU_CARD_STR CPU_CARD; + +#if 0 +unsigned char CPU_CARD_EVENT( void ){ + return FAIL; +} +#else +unsigned char CPU_CARD_EVENT( void ) +{ + unsigned char result; + unsigned char SendBuffer[255]; + unsigned char ReceiveBuffer[255]; + unsigned char i; + transmission_struct APDU; + APDU.pSendBuffer = SendBuffer; /*���÷������� */ + APDU.pReceiveBuffer = ReceiveBuffer; /*���ý������� */ + result = CPU_Rats( &CPU_CARD.ATS.Length, CPU_CARD.ATS.Ats_Data ); + if ( result != SUCCESS ) + { + SetCW( DISABLE ); + printf( "-> RATS ERROR!\r\n" ); + return result; + } + + printf( "-> ATS = " ); + for(i = 0;i < CPU_CARD.ATS.Length;i++) + printf("%02X", CPU_CARD.ATS.Ats_Data[i]); + printf( "\r\n" ); + + result = Ats_Process( CPU_CARD.ATS.Length, CPU_CARD.ATS.Ats_Data ); + if ( result != SUCCESS ) + { + SetCW( DISABLE ); + printf( "-> RATS ERROR!\r\n" ); + return result; + } + + memcpy( APDU.pSendBuffer, "\x00\xA4\x00\x00\x02\x3F\x00", 7 ); + APDU.SendLength = 7; + result = CPU_APDU( &APDU ); + if ( result != SUCCESS ) + { + SetCW( DISABLE ); + printf( "-> APDU ERROR!\r\n" ); + return result; + } + printf( "->APDU = " ); + for(i=0;i APDU ERROR!\r\n"); + return result; + } + printf("-> APDU = "); + for(i=0;i APDU ERROR!\r\n"); + return result; + } + printf("-> Response = "); + for(i=0;i APDU ERROR!\r\n"); + return result; + } + printf("-> Response = "); + for(i=0;i APDU ERROR!\r\n"); + return result; + } + printf("-> Response = "); + for(i=0;i APDU ERROR!\r\n" ); + return result; + } + printf( "-> Response = " ); + for(i=0;iSendLength,tpdu->pSendBuffer); + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); +// SetTimer(tpdu->Timeout); + SetCommand(CMD_TRANSCEIVE); + for(i = 0;i < tpdu->Timeout; i++) + { + DelayMs(1);//���յȴ���ʱ + GetReg(REG_IRQ0,&irq0); + + if(irq0 & BIT_RXIRQ) + { + GetReg( REG_ERROR, &error ); /*Get Error Status */ + error = error & (BIT_NODATAERR | BIT_COLLDET | BIT_PROTERR | BIT_INTEGERR); + if(error != 0) + return FAIL;//���յ������д��� + GetReg(REG_FIFOLENGTH,&tpdu->ReceiveLength); + if(tpdu->ReceiveLength > 0) + { + Read_FIFO(tpdu->ReceiveLength,tpdu->pReceiveBuffer); + result = SUCCESS; + return result; + } + } + GetReg(REG_IRQ1,&irq1); + +// if(irq1 & BIT_TIMER1IRQ) +// { +// result = FAIL;//δ��timeoutʱ���ڽ��յ����� +// } + + } + result = FAIL;//δ��timeoutʱ���ڽ��յ����� + return result; +} +#endif + + +/****************************************************************/ +/*����: Rats */ +/*����: Request for answer to select */ +/*����: */ +/* */ +/*���: */ +/* ats_len�����յ�ATS���ݳ��� */ +/* *ats�����յ���ATS����ָ�� */ +/* OK: Ӧ����ȷ */ +/* ERROR: Ӧ����� */ +/****************************************************************/ +#if 0 +unsigned char CPU_Rats( unsigned char *ats_len, unsigned char *ats ) +{ + return FAIL; +} +#else +unsigned char CPU_Rats( unsigned char *ats_len, unsigned char *ats ) +{ + unsigned char result; + unsigned char outbuffer[2], inbuffer[64]; + transmission_struct tpdu; + tpdu.pSendBuffer = outbuffer; + tpdu.pReceiveBuffer = inbuffer; + tpdu.pSendBuffer[0] = 0xE0; /*Start byte */ + tpdu.pSendBuffer[1] = 0x50; /*default = 0x50 */ + tpdu.SendLength = 2; + tpdu.Timeout = 160; + //CPU_CARD.FWT = 160;//Ĭ����ʱʱ�� + result = FM176XX_TPDU( &tpdu ); + if ( result == SUCCESS ) + { + *ats_len = tpdu.ReceiveLength; + memcpy( ats, tpdu.pReceiveBuffer, *ats_len ); + } + return (result); +} +#endif + + +#if 0 +unsigned char Ats_Process( unsigned char ats_len, unsigned char *ats )/* ATS���ݽ��� */ +{ + return FAIL; +} +#else +unsigned char Ats_Process( unsigned char ats_len, unsigned char *ats )/* ATS���ݽ��� */ +{ + unsigned char result, offset; + + if ( (ats_len == ats[0]) || (ats_len > 2) )/*TL */ + { + CPU_CARD.FSCI = ats[1] & 0x0F; + if ( CPU_CARD.FSCI == 0 ) + CPU_CARD.FSC = 13; + if ( CPU_CARD.FSCI == 1 ) + CPU_CARD.FSC = 21; + if ( CPU_CARD.FSCI == 2 ) + CPU_CARD.FSC = 29; + if ( CPU_CARD.FSCI == 3 ) + CPU_CARD.FSC = 37; + if ( CPU_CARD.FSCI == 4 ) + CPU_CARD.FSC = 45; + if ( CPU_CARD.FSCI == 5 ) + CPU_CARD.FSC = 61; + if ( CPU_CARD.FSCI == 6 ) + CPU_CARD.FSC = 93; + if ( CPU_CARD.FSCI == 7 ) + CPU_CARD.FSC = 125; + if ( CPU_CARD.FSCI > 7 ) + CPU_CARD.FSC = 253; + //CPU_CARD.FSC = 13; + printf( "-> CPU_CARD.FSC = %02X\r\n",CPU_CARD.FSC ); + } + else + { + result = FAIL; + return (result); + } + offset = 0; + result = SUCCESS; + if ( ats[1] & BIT5 ) /*TA */ + { + CPU_CARD.TA = ats[2]; + offset++; + } + + if ( ats[1] & BIT6 ) /*TB */ + { + CPU_CARD.TB = ats[2 + offset]; + CPU_CARD.SFGI = CPU_CARD.TB & 0x0F; + CPU_CARD.FWI = (CPU_CARD.TB >> 4) & 0x0F; + printf( "-> CPU_CARD.SFGI = %02X\r\n",CPU_CARD.SFGI ); + printf( "-> CPU_CARD.FWI = %02X\r\n",CPU_CARD.FWI); + if ( CPU_CARD.FWI < 2 ) + CPU_CARD.FWT = 1; + if ( CPU_CARD.FWI == 2 ) + CPU_CARD.FWT = 2; + if ( CPU_CARD.FWI == 3 ) + CPU_CARD.FWT = 3; + if ( CPU_CARD.FWI == 4 ) + CPU_CARD.FWT = 5; + if ( CPU_CARD.FWI == 5 ) + CPU_CARD.FWT = 10; + if ( CPU_CARD.FWI == 6 ) + CPU_CARD.FWT = 20; + if ( CPU_CARD.FWI == 7 ) + CPU_CARD.FWT = 40; + if ( CPU_CARD.FWI == 8 ) + CPU_CARD.FWT = 80; + if ( CPU_CARD.FWI == 9 ) + CPU_CARD.FWT = 160; + if ( CPU_CARD.FWI == 10 ) + CPU_CARD.FWT = 310; + if ( CPU_CARD.FWI == 11 ) + CPU_CARD.FWT = 620; + if ( CPU_CARD.FWI == 12 ) + CPU_CARD.FWT = 1240; + if ( CPU_CARD.FWI == 13 ) + CPU_CARD.FWT = 2480; + if ( CPU_CARD.FWI > 13 ) + CPU_CARD.FWT = 4950; + offset++; + } + + if ( ats[1] & BIT7 )/*TC */ + { + CPU_CARD.TC = ats[2 + offset]; + offset++; + } + CPU_CARD.PCB = 0x02;/*PCB��ʼֵΪ0x02 */ + return (result); +} +#endif + +#if 1 +//xtell 同时把CPU_TPDU 和 CPU_NAk 用空函数替换 SPi正常 +unsigned char CPU_NAK( transmission_struct *tpdu ) /* ��Ƭ����NAK */ +{ + return FAIL; +} +#else +unsigned char CPU_NAK( transmission_struct *tpdu ) /* ��Ƭ����NAK */ +{ + unsigned char result, tpdu_send_buffer[255],tpdu_receive_buffer[255]; + + tpdu->pSendBuffer = tpdu_send_buffer; + tpdu->pReceiveBuffer = tpdu_receive_buffer; + + tpdu->pSendBuffer [0] = 0xB0 | CPU_CARD.PCB; + tpdu->SendLength = 1; + /*printf( "NAK\r\n" );*/ + + result = FM176XX_TPDU( tpdu ); + return (result); +} +#endif + +#if 0 +unsigned char CPU_TPDU( transmission_struct *tpdu ) +{ + return FAIL; +} +#else +unsigned char CPU_TPDU( transmission_struct *tpdu ) +{ + unsigned char result, i, pcb_byte; + transmission_struct nak_tpdu; + + result = FM176XX_TPDU( tpdu ); + + for ( i = 0; i < 3; i++ ) + { + if ( result != SUCCESS ) + { + result = CPU_NAK( &nak_tpdu ); + if(result == SUCCESS) + { + if(nak_tpdu.ReceiveLength > 0) + { + memcpy( &pcb_byte, nak_tpdu.pReceiveBuffer, 1 ); + if((pcb_byte & 0xF0) == 0xA0)//R(ACK) + { + #if CPU_DEBUG + printf("...pcb_byte = %02X\r\n",pcb_byte); + printf("...CPU_CARD.PCB = %02X\r\n",CPU_CARD.PCB); + #endif + if((pcb_byte & 0x03) != CPU_CARD.PCB) + { + result = FM176XX_TPDU( tpdu ); + } + else + { + tpdu->pSendBuffer[0] = tpdu->pSendBuffer[0] ^ 0x01;// + CPU_CARD.PCB = tpdu->pSendBuffer[0] & 0x03; + result = FM176XX_TPDU( tpdu ); + } + } + } + } + } + else + { + break; + } + } + return (result); +} +#endif + +/****************************************************************/ +/*����: CPU_APDU */ +/*����: �ú���ʵ��ת��APDU�����ʽ���� CPU card reset */ +/*����: */ +/* */ +/*���: */ +/* ats_len�����յ����ݳ��� */ +/* ats�����յ�����ָ�� */ +/* OK: Ӧ����ȷ */ +/* ERROR: Ӧ����� */ +/****************************************************************/ +#if 1 +//xtell 同时把CPU_TPDU 和 CPU_NAk 用空函数替换 SPi正常 +unsigned char CPU_APDU( transmission_struct *apdu ) +{ + return FAIL; +} +#else +unsigned char CPU_APDU( transmission_struct *apdu ) +{ + unsigned char result, pcb_byte, tpdu_send_buffer[255],tpdu_receive_buffer[255], i; + unsigned char unsent_length; + transmission_struct tpdu; + tpdu.pSendBuffer = tpdu_send_buffer; + tpdu.pReceiveBuffer = tpdu_receive_buffer; + tpdu.Timeout = CPU_CARD.FWT; + apdu->ReceiveLength = 0; + unsent_length = apdu->SendLength; /*���ô��������ݳ��� */ + + for ( i = 0; i < 16; i++ ) /*�������̣�����С���鳤��16��������16���鷢�� */ + { + #if CPU_DEBUG + printf("unsent_length = %02X\r\n",unsent_length); + #endif + if ( unsent_length < CPU_CARD.FSC ) + { + /*���������ݳ���С�����֡���ȣ��������д��������� */ + tpdu.pSendBuffer[0] = CPU_CARD.PCB; /*PCB�ֽ�д��TPDU���� */ + memcpy( tpdu.pSendBuffer + 1, apdu->pSendBuffer + apdu->SendLength - unsent_length, unsent_length ); /*APDU����д��TPDU���� */ + tpdu.SendLength = unsent_length + 1; /*���ͳ�������1 */ + #if CPU_DEBUG + printf("--> "); + for(i=0;ipSendBuffer + apdu->SendLength - unsent_length, CPU_CARD.FSC - 1 ); /*APDU����д��TPDU���� */ + + tpdu.SendLength = CPU_CARD.FSC; /*���鷢�ͳ��� */ + #if CPU_DEBUG + printf("..--> "); + for(i=0;ipReceiveBuffer + apdu->ReceiveLength, tpdu.pReceiveBuffer + 1, tpdu.ReceiveLength - 1 ); + apdu->ReceiveLength = apdu->ReceiveLength + tpdu.ReceiveLength - 1; + return (SUCCESS); /*������ݽ������� */ + } + + if ( (pcb_byte == 0x12) || (pcb_byte == 0x13) ) + { + memcpy( apdu->pReceiveBuffer + apdu->ReceiveLength, tpdu.pReceiveBuffer + 1, tpdu.ReceiveLength - 1 ); + apdu->ReceiveLength = apdu->ReceiveLength + tpdu.ReceiveLength - 1; + tpdu.pSendBuffer[0] = ( (pcb_byte & 0x03) | 0xA0) ^ 0x01; /*�յ�����֡������PCB�ֽ� */ + tpdu.SendLength = 1; + #if CPU_DEBUG + printf("...--> = "); + for(i=0;i = "); + for(i=0;i AUTH ERROR!\r\n"); + return result; + } + + printf("-> AUTH SUCCESS!\r\n"); + + for(BLOCK = 0;BLOCK < 3;BLOCK++) + { + BLOCK_NUM = (SECTOR * 4) + BLOCK; + if(BLOCK_NUM == 0) + BLOCK_NUM = 1; + printf("-> SECTOR = %02X\r\n",SECTOR);; + printf("-> BLOCK = %02X\r\n",BLOCK); + printf("-> BLOCK_NUM = %02X\r\n",BLOCK_NUM); + memcpy(BLOCK_DATA,"\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF",16); + result = Mifare_Blockwrite(BLOCK_NUM,BLOCK_DATA); + if(result != SUCCESS) + { + SetCW(DISABLE); + printf("-> WRITE BLOCK ERROR!\r\n"); + return result; + } + printf("-> WRITE BLOCK SUCCESS!\r\n"); + + result = Mifare_Blockread(BLOCK_NUM,BLOCK_DATA); + if(result != SUCCESS) + { + SetCW(DISABLE); + printf("-> READ BLOCK ERROR!\r\n"); + return result; + } + + printf("-> READ BLOCK = %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X\r\n",BLOCK_DATA[0],BLOCK_DATA[1],BLOCK_DATA[2],BLOCK_DATA[3],BLOCK_DATA[4],BLOCK_DATA[5],BLOCK_DATA[6],BLOCK_DATA[7],BLOCK_DATA[8],BLOCK_DATA[9],BLOCK_DATA[10],BLOCK_DATA[11],BLOCK_DATA[12],BLOCK_DATA[13],BLOCK_DATA[14],BLOCK_DATA[15]); + } + } + SetCW(DISABLE); + return result; +} + + +unsigned char MIFARE_CARD_EVENT(void) +{ + unsigned char result; + Mifare_Clear_Crypto(); + SECTOR = 1; + //for(SECTOR = 0;SECTOR < 16; SECTOR++) + { + BLOCK_NUM = (SECTOR * 4) + BLOCK; + result = Mifare_Auth(KEY_A_M1,SECTOR,KEY_A[SECTOR],PICC_A.UID); + if(result != SUCCESS) + { + SetCW(DISABLE); + printf("-> AUTH ERROR!\r\n"); + return result; + } + + printf("-> AUTH SUCCESS!\r\n"); + + for(BLOCK = 0;BLOCK < 3;BLOCK++) + { + BLOCK_NUM = (SECTOR * 4) + BLOCK; + if(BLOCK_NUM == 0) + BLOCK_NUM = 1; + printf("-> SECTOR = %02X\r\n",SECTOR);; + printf("-> BLOCK = %02X\r\n",BLOCK); + printf("-> BLOCK_NUM = %02X\r\n",BLOCK_NUM); + memcpy(BLOCK_DATA,"\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF",16); + result = Mifare_Blockwrite(BLOCK_NUM,BLOCK_DATA); + if(result != SUCCESS) + { + SetCW(DISABLE); + printf("-> WRITE BLOCK ERROR!\r\n"); + return result; + } + printf("-> WRITE BLOCK SUCCESS!\r\n"); + + result = Mifare_Blockread(BLOCK_NUM,BLOCK_DATA); + if(result != SUCCESS) + { + SetCW(DISABLE); + printf("-> READ BLOCK ERROR!\r\n"); + return result; + } + + printf("-> READ BLOCK = %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X\r\n",BLOCK_DATA[0],BLOCK_DATA[1],BLOCK_DATA[2],BLOCK_DATA[3],BLOCK_DATA[4],BLOCK_DATA[5],BLOCK_DATA[6],BLOCK_DATA[7],BLOCK_DATA[8],BLOCK_DATA[9],BLOCK_DATA[10],BLOCK_DATA[11],BLOCK_DATA[12],BLOCK_DATA[13],BLOCK_DATA[14],BLOCK_DATA[15]); + } + } + SetCW(DISABLE); + return result; +} + + + unsigned char Mifare_LoadKey(unsigned char *mifare_key) + { + unsigned char reg_data; + SetCommand(CMD_IDLE); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA,mifare_key[0]); + SetReg(REG_FIFODATA,mifare_key[1]); + SetReg(REG_FIFODATA,mifare_key[2]); + SetReg(REG_FIFODATA,mifare_key[3]); + SetReg(REG_FIFODATA,mifare_key[4]); + SetReg(REG_FIFODATA,mifare_key[5]); + SetCommand(CMD_LOADKEY); + DelayMs(1); + GetReg(REG_COMMAND,®_data); + if((reg_data & CMD_MASK) == CMD_IDLE) + return SUCCESS; + else + return FAIL; + } + +/*****************************************************************************************/ +/*���ƣ�Mifare_Auth */ +/*���ܣ�Mifare_Auth��Ƭ��֤ */ +/*���룺mode����֤ģʽ��0��key A��֤��1��key B��֤����sector����֤�������ţ�0~15�� */ +/* *mifare_key��6�ֽ���֤��Կ���飻*card_uid��4�ֽڿ�ƬUID���� */ +/*���: */ +/* OK :��֤�ɹ� */ +/* ERROR :��֤ʧ�� */ +/*****************************************************************************************/ + unsigned char Mifare_Auth(unsigned char key_mode,unsigned char sector,unsigned char *mifare_key,unsigned char *card_uid) +{ + unsigned char result,reg_data; + result = Mifare_LoadKey(mifare_key); + if (result != SUCCESS) + return result; + SetCommand(CMD_IDLE); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + if(key_mode == KEY_A_M1) + { + SetReg(REG_FIFODATA,0x60);//60 keyA M1��ָ֤�� + ModifyReg(REG_RXTXCON,BIT_SHMODE,DISABLE); + } + if(key_mode == KEY_B_M1) + { + SetReg(REG_FIFODATA,0x61);//61 keyB M1��ָ֤�� + ModifyReg(REG_RXTXCON,BIT_SHMODE,DISABLE); + } + + SetReg(REG_FIFODATA,sector * 4);//��֤�����Ŀ�0��ַ + SetReg(REG_FIFODATA,card_uid[0]); + SetReg(REG_FIFODATA,card_uid[1]); + SetReg(REG_FIFODATA,card_uid[2]); + SetReg(REG_FIFODATA,card_uid[3]); + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + SetCommand(CMD_AUTHENT); + DelayMs(5); + GetReg(REG_COMMAND,®_data); + if((reg_data & CMD_MASK) == CMD_IDLE) + { + GetReg(REG_STATUS,®_data); + if(reg_data & BIT_CRYPTO1ON)//�жϼ��ܱ�־λ��ȷ����֤��� + return SUCCESS; + } + return FAIL; +} +/*****************************************************************************************/ +/*���ƣ�Mifare_Blockset */ +/*���ܣ�Mifare_Blockset��Ƭ��ֵ���� */ +/*���룺block����ţ�*buff����Ҫ���õ�4�ֽ���ֵ���� */ +/* */ +/*���: */ +/* OK :���óɹ� */ +/* ERROR :����ʧ�� */ +/*****************************************************************************************/ + unsigned char Mifare_Blockset(unsigned char block,unsigned char *data_buff) + { + unsigned char block_data[16],result; + block_data[0] = data_buff[3]; + block_data[1] = data_buff[2]; + block_data[2] = data_buff[1]; + block_data[3] = data_buff[0]; + block_data[4] = ~data_buff[3]; + block_data[5] = ~data_buff[2]; + block_data[6] = ~data_buff[1]; + block_data[7] = ~data_buff[0]; + block_data[8] = data_buff[3]; + block_data[9] = data_buff[2]; + block_data[10] = data_buff[1]; + block_data[11] = data_buff[0]; + block_data[12] = block; + block_data[13] = ~block; + block_data[14] = block; + block_data[15] = ~block; + result = Mifare_Blockwrite(block,block_data); + return result; + } +/*****************************************************************************************/ +/*���ƣ�Mifare_Blockread */ +/*���ܣ�Mifare_Blockread��Ƭ������� */ +/*���룺block����ţ�0x00~0x3F����buff��16�ֽڶ����������� */ +/*���: */ +/* OK :�ɹ� */ +/* ERROR :ʧ�� */ +/*****************************************************************************************/ +unsigned char Mifare_Blockread(unsigned char block,unsigned char *data_buff) +{ + unsigned char reg_data,i; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + SetReg(REG_FIFODATA,0x30);//30 ����ָ�� + SetReg(REG_FIFODATA,block);//���ַ + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(2); + GetReg(REG_FIFOLENGTH,®_data); + if (reg_data != 16) //���յ������ݳ���Ϊ16 + return FAIL; + GetReg(REG_ERROR,®_data); + if(reg_data & 0x07) + return FAIL; + for(i=0;i<16;i++) + { + GetReg (REG_FIFODATA,&data_buff[i]); + } + return SUCCESS; +} +/*****************************************************************************************/ +/*���ƣ�mifare_blockwrite */ +/*���ܣ�Mifare��Ƭд����� */ +/*���룺block����ţ�0x00~0x3F����buff��16�ֽ�д���������� */ +/*���: */ +/* OK :�ɹ� */ +/* ERROR :ʧ�� */ +/*****************************************************************************************/ +unsigned char Mifare_Blockwrite(unsigned char block,unsigned char *data_buff) +{ + unsigned char reg_data,i; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + SetReg(REG_FIFODATA,0xA0);//A0 д��ָ�� + SetReg(REG_FIFODATA,block);//���ַ + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(5); + GetReg(REG_FIFOLENGTH,®_data); + if (reg_data != 1) //���յ������ݳ���Ϊ1 + return FAIL; + GetReg (REG_FIFODATA,®_data); + if(reg_data != 0x0A) + return FAIL; + for(i=0;i<16;i++) + { + SetReg(REG_FIFODATA,data_buff[i]); + } + SetCommand(CMD_TRANSCEIVE); + DelayMs(5); + GetReg(REG_FIFOLENGTH,®_data); + if (reg_data != 1) //���յ������ݳ���Ϊ1 + return FAIL; + GetReg (REG_FIFODATA,®_data); + if(reg_data != 0x0A) + return FAIL; + + return SUCCESS; + +} + +/*****************************************************************************************/ +/*���ƣ� */ +/*���ܣ�Mifare ��Ƭ��ֵ���� */ +/*���룺block����ţ�0x00~0x3F����buff��4�ֽ���ֵ�������� */ +/*���: */ +/* OK :�ɹ� */ +/* ERROR :ʧ�� */ +/*****************************************************************************************/ +unsigned char Mifare_Blockinc(unsigned char block,unsigned char *data_buff) +{ + +unsigned char reg_data,i; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + SetReg(REG_FIFODATA,0xC1);//C1 ��ֵָ�� + SetReg(REG_FIFODATA,block);//���ַ + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(5); + GetReg(REG_FIFOLENGTH,®_data); + if (reg_data != 1) //���յ������ݳ���Ϊ1 + return FAIL; + GetReg (REG_FIFODATA,®_data); + if(reg_data != 0x0A) + return FAIL; + for(i=0;i<4;i++) + { + SetReg(REG_FIFODATA,data_buff[i]); + } + SetCommand(CMD_TRANSCEIVE); + DelayMs(5); + GetReg(REG_FIFOLENGTH,®_data); + if (reg_data != 1) //���յ������ݳ���Ϊ1 + return FAIL; + GetReg (REG_FIFODATA,®_data); + + if(reg_data != 0x0A) + return FAIL; + + return SUCCESS; +} + + + +/*****************************************************************************************/ +/*���ƣ�mifare_blockdec */ +/*���ܣ�Mifare ��Ƭ��ֵ���� */ +/*���룺block����ţ�0x00~0x3F����buff��4�ֽڼ�ֵ�������� */ +/*���: */ +/* OK :�ɹ� */ +/* ERROR :ʧ�� */ +/*****************************************************************************************/ +unsigned char Mifare_Blockdec(unsigned char block,unsigned char *data_buff) +{ +unsigned char reg_data,i; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + SetReg(REG_FIFODATA,0xC0);//C0 ��ֵָ�� + SetReg(REG_FIFODATA,block);//���ַ + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(5); + GetReg(REG_FIFOLENGTH,®_data); + if (reg_data != 1) //���յ������ݳ���Ϊ1 + return FAIL; + GetReg (REG_FIFODATA,®_data); + if(reg_data != 0x0A) + return FAIL; + for(i=0;i<4;i++) + { + SetReg(REG_FIFODATA,data_buff[i]); + } + SetCommand(CMD_TRANSCEIVE); + DelayMs(5); + GetReg(REG_FIFOLENGTH,®_data); + if (reg_data != 1) //���յ������ݳ���Ϊ1 + return FAIL; + GetReg (REG_FIFODATA,®_data); + if(reg_data != 0x0A) + + return FAIL; + + return SUCCESS; + +} +/*****************************************************************************************/ +/*���ƣ�mifare_transfer */ +/*���ܣ�Mifare ��Ƭtransfer���� */ +/*���룺block����ţ�0x00~0x3F�� */ +/*���: */ +/* OK :�ɹ� */ +/* ERROR :ʧ�� */ +/*****************************************************************************************/ +unsigned char Mifare_Transfer(unsigned char block) +{ +unsigned char reg_data; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + SetReg(REG_FIFODATA,0xC1);//C1 Transferָ�� + SetReg(REG_FIFODATA,block);//���ַ + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(5); + GetReg(REG_FIFOLENGTH,®_data); + if (reg_data != 1) //���յ������ݳ���Ϊ1 + return FAIL; + GetReg (REG_FIFODATA,®_data); + if(reg_data != 0x0A) + return FAIL; + + return SUCCESS; + + +} +/*****************************************************************************************/ +/*���ƣ�mifare_restore */ +/*���ܣ�Mifare ��Ƭrestore���� */ +/*���룺block����ţ�0x00~0x3F�� */ +/*���: */ +/* OK :�ɹ� */ +/* ERROR :ʧ�� */ +/*****************************************************************************************/ + +unsigned char Mifare_Restore(unsigned char block) +{ + unsigned char reg_data,i; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + SetReg(REG_FIFODATA,0xC2);//C1 Transferָ�� + SetReg(REG_FIFODATA,block);//���ַ + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(5); + GetReg(REG_FIFOLENGTH,®_data); + if (reg_data != 1) //���յ������ݳ���Ϊ1 + return FAIL; + GetReg (REG_FIFODATA,®_data); + if(reg_data != 0x0A) + return FAIL; + for(i=0;i<4;i++) + { + SetReg(REG_FIFODATA,0); + } + SetCommand(CMD_TRANSCEIVE); + DelayMs(5); + GetReg(REG_FIFOLENGTH,®_data); + if (reg_data != 1) //���յ������ݳ���Ϊ1 + return FAIL; + GetReg (REG_FIFODATA,®_data); + if(reg_data != 0x0A) + return FAIL; + return SUCCESS; +} diff --git a/apps/earphone/RFID/reader/NTAG.c b/apps/earphone/RFID/reader/NTAG.c new file mode 100644 index 0000000..730eac5 --- /dev/null +++ b/apps/earphone/RFID/reader/NTAG.c @@ -0,0 +1,76 @@ +#include "../include/READER.h" +#include "../include/NTAG.h" +#include +#include "../include/READER_REG.h" +#include "../include/rfid_main.h" + + +unsigned char PAGE_DATA[16]; + +unsigned char NTAG_EVENT(void) +{ + unsigned char result; + memcpy(PAGE_DATA,"\x01\x02\x03\x04",4); + result = Write_Page(8,PAGE_DATA); + if (result != SUCCESS) + return result; + printf("PAGE 8 Write OK\r\n"); + result = Read_Page(8,PAGE_DATA); + printf("PAGE 8 = %02X%02X%02X%02X\r\n",PAGE_DATA[0],PAGE_DATA[1],PAGE_DATA[2],PAGE_DATA[3]); + return result; + +} + +unsigned char Read_Page(unsigned char page_num,unsigned char *page_data) +{ + unsigned char reg_data,i; + SetCommand(CMD_IDLE); + Clear_FIFO(); + SetReg(REG_FIFODATA,0x30); + SetReg(REG_FIFODATA,page_num); + + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(5); + GetReg(REG_ERROR,®_data); + if(reg_data & 0x07) + return FAIL; + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 16) + return FAIL; + for(i=0;i<16;i++) + { + GetReg(REG_FIFODATA,&page_data[i]); + } + return SUCCESS; + +} + +unsigned char Write_Page(unsigned char page_num,unsigned char *page_data) +{ + unsigned char reg_data; + SetCommand(CMD_IDLE); + Clear_FIFO(); + SetReg(REG_FIFODATA,0xA2); + SetReg(REG_FIFODATA,page_num); + SetReg(REG_FIFODATA,page_data[0]); + SetReg(REG_FIFODATA,page_data[1]); + SetReg(REG_FIFODATA,page_data[2]); + SetReg(REG_FIFODATA,page_data[3]); + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(5); + + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 1) + return FAIL; + + GetReg(REG_FIFODATA,®_data); + if(reg_data != 0x0A) + return FAIL; + return SUCCESS; + +} + diff --git a/apps/earphone/RFID/reader/READER.c b/apps/earphone/RFID/reader/READER.c new file mode 100644 index 0000000..d477502 --- /dev/null +++ b/apps/earphone/RFID/reader/READER.c @@ -0,0 +1,809 @@ +//#include "fm15l0xx_ll_spi.h" +#include "../include/READER.h" +#include "../include/READER_REG.h" +#include +#include "../include/rfid_main.h" + + +struct picc_a_struct PICC_A; +struct picc_b_struct PICC_B; +struct picc_v_struct PICC_V; +struct picc_f_struct PICC_F; +void DelayMs( uint32_t xms ); +void DelayUs( uint32_t xus ); +void DelayUs( uint32_t xus ) +{ + int t; + + while ( xus-- ) + { + t = 5; + while ( t-- ) + ; + } +} + + +void DelayMs( uint32_t xms ) +{ + DelayUs( xms * 1000 ); +} + + +// void Reader_GPIO_Init( void ) +// { + /******** 重做GPIO初始化 **********/ + + +// // LL_GPIO_SetPinMode( PD_GPIO, PD_PIN, LL_GPIO_PINxMODE_OUTPUT );//PA7 PD + + +// //LL_GPIO_EnablePinPullUp( SPI_GPIO, SCK_PIN | MOSI_PIN ); // Enable Pullup + +// //xtell注释 +// // LL_GPIO_SetPinMode( SPI_GPIO, SCK_PIN, LL_GPIO_PINxMODE_OUTPUT ); // PB1 Digital function - SPI1 SCK +// // LL_GPIO_SetPinMode( SPI_GPIO, MISO_PIN, LL_GPIO_PINxMODE_INPUT ); // PB2 Digital function - SPI1 MISO1 +// // LL_GPIO_SetPinMode( SPI_GPIO, MOSI_PIN, LL_GPIO_PINxMODE_OUTPUT ); // PB3 Digital function - SPI1 MOSI +// LL_GPIO_SetPinMode(); //xtell +// SCK_0; +// MOSI_0; +// +// LL_GPIO_SetPinMode(); //xtell +// //xtell注释 +// // LL_GPIO_SetPinMode( SPI_GPIO, NSS_PIN, LL_GPIO_PINxMODE_OUTPUT ); // PB0 Digital function - SPI1 NSS1 +// PD_0; +// NSS_1; +// } + +// unsigned char FM176XX_HardReset(void) +// { + + /*************NFC 硬件初始化 重做********************/ + +// unsigned char reg_data; +// NSS_1;//NSS = 1 +// PD_1;//RST = 1 +// DelayMs(1); +// PD_0;//RST = 0 +// DelayMs(1); +// GetReg(REG_COMMAND,®_data); +// if (reg_data != 0x40) +// return FAIL; +// return SUCCESS; +// } + +// unsigned char Reader_Set_HPD( unsigned char mode ) //mode = DISABLE �˳�HPDģʽ ��mode = ENABLE ����HPDģʽ +// { +// if ( mode == ENABLE ) +// { +// DelayMs( 1 ); //��ʱ1ms + +// /******设置一个GPIO输出高*******xtell******/ +// //PD_1; // PD = 1 +// P34 = 1; + +// } +// else +// { +// /******设置一个GPIO输出低*************/ +// //PD_0; //PD = 0 +// P34 =0; +// DelayMs( 1 ); //��ʱ1ms���ȴ�Reader���� +// } +// return (mode); +// } + + + + +//*********************************************** +//�������ƣ�GetReg(unsigned char addr,unsigned char *regdata) +//�������ܣ���ȡ�Ĵ���ֵ +//��ڲ�����addr:Ŀ��Ĵ�����ַ regdata:��ȡ��ֵ +//���ڲ�����unsigned char TRUE����ȡ�ɹ� FALSE:ʧ�� +//*********************************************** + +// 从FM17660 读取数据时，BIT7 置 1 +// unsigned char GetReg(unsigned char address,unsigned char *reg_data) +// { +// unsigned char spi_data,i; +// NSS_0; //NSS = 0; +// spi_data = (address << 1) | 0x01; + +// for(i=0;i<8;i++) +// { +// if(spi_data & 0x80) +// MOSI_1; +// else +// MOSI_0; +// SCK_1; +// spi_data = spi_data<<1; +// SCK_0; +// } + +// MOSI_0; +// *reg_data = 0; +// for(i=0;i<8;i++) +// { +// *reg_data = *reg_data<<1; +// SCK_1; + +// if(LL_GPIO_ReadInputPort(SPI_GPIO)& MISO_PIN) +// *reg_data = *reg_data | 0x01; +// SCK_0; +// } + +// NSS_1; //NSS = 1; +// return SUCCESS; +// } + +//*********************************************** +//�������ƣ�SetReg(unsigned char addr,unsigned char* regdata) +//�������ܣ�д�Ĵ��� +//��ڲ�����addr:Ŀ��Ĵ�����ַ regdata:Ҫд���ֵ +//���ڲ�����unsigned char TRUE��д�ɹ� FALSE:дʧ�� +//*********************************************** +// unsigned char SetReg(unsigned char address,unsigned char reg_data) +// { +// unsigned char spi_data,i; +// NSS_0; //NSS = 0; +// spi_data = (address << 1) & 0xFE; + +// for(i=0;i<8;i++) +// { + +// if(spi_data & 0x80) +// MOSI_1; +// else +// MOSI_0; +// SCK_1; +// spi_data = spi_data<<1; +// SCK_0; +// } +// MOSI_0; +// spi_data = reg_data; +// for(i=0;i<8;i++) +// { +// if(spi_data & 0x80) +// MOSI_1; +// else +// MOSI_0; +// SCK_1; +// spi_data = spi_data<<1; +// SCK_0; +// } +// SCK_0; +// MOSI_0; +// NSS_1; //NSS = 1; + +// return SUCCESS; +// } + +void ModifyReg( unsigned char reg_address, unsigned char mask, unsigned char set ) +{ + unsigned char reg_data; + // Uart1SendString(" ModifyReg begin "); + + GetReg( reg_address, ®_data ); + + if ( set ) + { + reg_data |= mask; + } + else + { + reg_data &= ~mask; + } + + SetReg( reg_address, reg_data ); + return; +} + +unsigned char SetCommand(unsigned char command) +{ + unsigned char result; + result = SetReg(REG_COMMAND,CMD_MASK & command); + return result; +} + +void SetTimer(unsigned int timeout) // +{ + unsigned long prescale = 1; + unsigned long t,fc; + fc = timeout*13560; + t = fc; + + while(fc > 65535) + { + prescale*=2; + fc = t/prescale; + if(fc*prescale != t) + fc++; + } + + if(prescale>1) + { + SetReg(REG_T0CONTROL, BIT_TSTOP_RX | BIT_TSTART_TX | BIT_TAUTORESTARTED | VALUE_TCLK_1356_MHZ ); + SetReg(REG_T0RELOADHI,(u8)(fc>>8)); + SetReg(REG_T0RELOADLO,(u8)fc); + + SetReg(REG_T1CONTROL, BIT_TSTOP_RX | BIT_TSTART_TX | VALUE_TCLK_T0 ); + SetReg(REG_T1RELOADHI,(u8)(prescale>>8)); + SetReg(REG_T1RELOADLO,(u8)prescale); + } + else + { + SetReg(REG_T1CONTROL, BIT_TSTOP_RX | BIT_TSTART_TX | VALUE_TCLK_1356_MHZ ); + SetReg(REG_T1RELOADHI,(u8)(fc>>8)); + SetReg(REG_T1RELOADLO,(u8)fc); + } + +} + +unsigned char SetCW(unsigned char mode) +{ + unsigned char result; + if(mode == ENABLE) + { + ModifyReg(REG_COMMAND,BIT_MODEMOFF,DISABLE); + ModifyReg(REG_TXMODE,BIT0 | BIT1,ENABLE); + } + else + { + ModifyReg(REG_COMMAND,BIT_MODEMOFF,ENABLE); + ModifyReg(REG_TXMODE,BIT0 | BIT1,DISABLE); + } + DelayMs(5); + return result; +} + +void Clear_FIFO(void) +{ + unsigned char fifolength; + + GetReg(REG_FIFOLENGTH,&fifolength); + if((fifolength) != 0) //FIFO������գ���FLUSH FIFO + { + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); + } + return ; +} + +unsigned char LoadProtocol(unsigned char p_rx,unsigned char p_tx) +{ + unsigned char reg_data = 0; + // Uart1SendString(" LoadProtocol begin "); + SetCommand(CMD_IDLE); // + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA,p_rx);//Rx + SetReg(REG_FIFODATA,p_tx);//Tx + + SetCommand(CMD_LOADPROTOCOL); + DelayMs(2); + GetReg(REG_COMMAND,®_data); + if(reg_data != CMD_IDLE) + return FAIL; + return SUCCESS; +} + +void SetParity(unsigned char state) +{ + // Uart1SendString(" SetParity begin"); + ModifyReg(REG_FRAMECON,BIT_TXPARITYEN|BIT_RXPARITYEN,state); +} + +unsigned char ReaderA_Initial(void) +{ + + // Uart1SendString(" ReaderA_Initial begin"); + LoadProtocol(RX_TYPEA_106,TX_TYPEA_106); + ModifyReg(REG_TXMODE,BIT2,ENABLE);//FORCE 100ask ENABLE + SetReg(REG_TXAMP,AMPLITUDE_A); + SetReg(REG_TXCON,0x00); + SetReg(REG_RXANA,(HPCF_A<<3)|GAIN_A); + SetReg(0x5F,0x08); + SetReg(REG_THNSET,0xFF); + SetReg(REG_THNMIN,0xC0); + SetReg(REG_RXTXCON,0x80);// + SetParity(ENABLE); + SetReg(REG_STATUS,0);//���Cry1Onλ + + // Uart1SendString(" ReaderA_Initial end"); + return SUCCESS; +} + + +unsigned char ReaderB_Initial(void) +{ + LoadProtocol(RX_TYPEB_106,TX_TYPEB_106); + + ModifyReg(REG_TXMODE,BIT2,DISABLE);//FORCE 100ask DISABLE + SetReg(REG_TXAMP,AMPLITUDE_B); + SetReg(REG_TXCON,MODULATION_B); + SetReg(REG_RXANA,(HPCF_B<<3)|GAIN_B); + SetReg(0x5F,0x08); + SetReg(REG_THNSET,0xFF); + SetReg(REG_THNMIN,0xC0); + SetReg(REG_RXTXCON,0x80);// + return SUCCESS; +} + + +unsigned char ReaderV_Initial(void) +{ + LoadProtocol(RX_TYPEV_26,RX_TYPEV_26); + ModifyReg(REG_RXANA,BIT3|BIT2|BIT1|BIT0,DISABLE); + ModifyReg(REG_RXANA,(HPCF_V<<3)|GAIN_V,ENABLE);//39h + SetParity(DISABLE); + SetReg(REG_TXAMP,AMPLITUDE_V); + SetReg(REG_TXCON,MODULATION_V); + SetReg(REG_TXI,0x06); + SetReg(REG_THNSET,0xFF); + SetReg(REG_THNMIN,0x80); + SetReg(REG_THNADJ,0x08); + SetReg(REG_RXTXCON,0); + + return SUCCESS; +} + +unsigned char ReaderF_Initial(void) +{ + ModifyReg(REG_MISC, 0x04,ENABLE); + LoadProtocol(RX_FELICA_212,TX_FELICA_212); + SetReg(REG_TXAMP,AMPLITUDE_F); // + SetReg(REG_TXCON,MODULATION_F); + ModifyReg(REG_RXANA,BIT3|BIT2|BIT1|BIT0,DISABLE); + ModifyReg(REG_RXANA,(HPCF_F<<3)|GAIN_F,ENABLE);//39h + SetParity(DISABLE); + SetReg(REG_THNSET,0xFF); + SetReg(REG_THNMIN,0x80); + SetReg(REG_THNADJ,0x08); + ModifyReg(REG_MISC, 0x04,DISABLE); + return SUCCESS; +} + +unsigned char ReaderA_Wakeeup(struct picc_a_struct *picc_a) +{ + unsigned char reg_data; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x0F); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA,RF_CMD_WUPA); + ModifyReg(REG_TXCRCCON, BIT_CRCEN,DISABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(2); + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 2) + return FAIL; + + GetReg(REG_FIFODATA,&picc_a->ATQA[0]); + GetReg(REG_FIFODATA,&picc_a->ATQA[1]); + + return SUCCESS; +} + +unsigned char ReaderA_Request(struct picc_a_struct *picc_a) +{ + unsigned char reg_data; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x0F); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA,RF_CMD_REQA); + ModifyReg(REG_TXCRCCON, BIT_CRCEN,DISABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE); + SetCommand(CMD_TRANSCEIVE); + // DelayMs(2); + Delay1ms(); + Delay1ms(); + GetReg(REG_FIFOLENGTH,®_data); + // Uart1SendString("REG_FIFOLENGTH data="); + // printHex(reg_data); + if(reg_data != 2) + return FAIL; + + GetReg(REG_FIFODATA,&picc_a->ATQA[0]); + GetReg(REG_FIFODATA,&picc_a->ATQA[1]); + + return SUCCESS; +} + +unsigned char ReaderA_Anticoll(struct picc_a_struct *picc_a) +{ + unsigned char reg_data; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA,RF_CMD_ANTICOLL[picc_a->CASCADE_LEVEL]); + SetReg(REG_FIFODATA,0x20); + ModifyReg(REG_TXCRCCON, BIT_CRCEN,DISABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(2); + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 5) + return FAIL; + + GetReg(REG_FIFODATA,&picc_a->UID[picc_a->CASCADE_LEVEL*4]); + GetReg(REG_FIFODATA,&picc_a->UID[picc_a->CASCADE_LEVEL*4+1]); + GetReg(REG_FIFODATA,&picc_a->UID[picc_a->CASCADE_LEVEL*4+2]); + GetReg(REG_FIFODATA,&picc_a->UID[picc_a->CASCADE_LEVEL*4+3]); + GetReg(REG_FIFODATA,&picc_a->BCC[picc_a->CASCADE_LEVEL]); + if( (picc_a->UID[picc_a->CASCADE_LEVEL*4] ^ picc_a->UID[picc_a->CASCADE_LEVEL*4+1] ^ picc_a->UID[picc_a->CASCADE_LEVEL*4+2] ^ picc_a->UID[picc_a->CASCADE_LEVEL*4+3]) == picc_a->BCC[picc_a->CASCADE_LEVEL]) + return SUCCESS; + + return FAIL; +} + +unsigned char ReaderA_Select(struct picc_a_struct *picc_a) +{ + unsigned char reg_data; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA,RF_CMD_ANTICOLL[picc_a->CASCADE_LEVEL]); + SetReg(REG_FIFODATA,0x70); + SetReg(REG_FIFODATA,picc_a->UID[picc_a->CASCADE_LEVEL*4]); + SetReg(REG_FIFODATA,picc_a->UID[picc_a->CASCADE_LEVEL*4+1]); + SetReg(REG_FIFODATA,picc_a->UID[picc_a->CASCADE_LEVEL*4+2]); + SetReg(REG_FIFODATA,picc_a->UID[picc_a->CASCADE_LEVEL*4+3]); + SetReg(REG_FIFODATA,picc_a->BCC[picc_a->CASCADE_LEVEL]); + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(2); + GetReg(REG_ERROR,®_data); + if((reg_data & 0x0F)!=0) + return FAIL; + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 1) + return FAIL; + GetReg(REG_FIFODATA,&picc_a->SAK [picc_a->CASCADE_LEVEL]); + return SUCCESS; + +} + + +unsigned char ReaderA_CardActivate(struct picc_a_struct *picc_a) +{ +unsigned char result,cascade_level; + result = ReaderA_Request(picc_a);// + if (result != SUCCESS) + return result; + + if ((picc_a->ATQA[0]&0xC0)==0x00) //1��UID + { + cascade_level = 1; + picc_a->UID_Length = 4; + } + if ((picc_a->ATQA[0]&0xC0)==0x40) //2��UID + { + cascade_level = 2; + picc_a->UID_Length = 8; + } + if ((picc_a->ATQA[0]&0xC0)==0x80) //3��UID + { + cascade_level = 3; + picc_a->UID_Length = 12; + } + for (picc_a->CASCADE_LEVEL = 0; picc_a->CASCADE_LEVEL < cascade_level; picc_a->CASCADE_LEVEL++) + { + result = ReaderA_Anticoll(picc_a);// + if (result != SUCCESS) + return result; + + result = ReaderA_Select(picc_a);// + if (result != SUCCESS) + return result; + } + picc_a->CASCADE_LEVEL--; + return result; +} + + +unsigned char ReaderB_Wakeup(struct picc_b_struct *picc_b) +{ + unsigned char reg_data,i; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA, 0x05); //APf + SetReg(REG_FIFODATA, 0x00); //AFI (00:for all cards) + SetReg(REG_FIFODATA, 0x08); //PARAM(REQB,Number of slots =0) + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(10); + GetReg(REG_ERROR,®_data); + if((reg_data & 0x0F)!=0)//�жϴ����־ + return FAIL; + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 12)//�жϽ������ݳ��� + return FAIL; + for(i=0;i<12;i++) + GetReg(REG_FIFODATA,&picc_b->ATQB [i]); + memcpy(picc_b->PUPI,picc_b->ATQB + 1,4); + memcpy(picc_b->APPLICATION_DATA,picc_b->ATQB + 6,4); + memcpy(picc_b->PROTOCOL_INF,picc_b->ATQB + 10,3); + + return SUCCESS; + +} + +unsigned char ReaderB_Request(struct picc_b_struct *picc_b) +{ + unsigned char reg_data,i; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA, 0x05); //APf + SetReg(REG_FIFODATA, 0x00); //AFI (00:for all cards) + SetReg(REG_FIFODATA, 0x00); //PARAM(REQB,Number of slots =0) + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(10); + GetReg(REG_ERROR,®_data); + if((reg_data & 0x0F)!=0) + return FAIL; + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 12) + return FAIL; + for(i=0;i<12;i++) + GetReg(REG_FIFODATA,&picc_b->ATQB [i]); + memcpy(picc_b->PUPI,picc_b->ATQB + 1,4); + memcpy(picc_b->APPLICATION_DATA,picc_b->ATQB + 6,4); + memcpy(picc_b->PROTOCOL_INF,picc_b->ATQB + 10,3); + return SUCCESS; +} + +unsigned char ReaderB_Attrib(struct picc_b_struct *picc_b) +{ + unsigned char reg_data; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA, 0x1D); // + SetReg(REG_FIFODATA, picc_b->PUPI[0]); // + SetReg(REG_FIFODATA, picc_b->PUPI[1]); // + SetReg(REG_FIFODATA, picc_b->PUPI[2]); // + SetReg(REG_FIFODATA, picc_b->PUPI[3]); // + SetReg(REG_FIFODATA, 0x00); //Param1 + SetReg(REG_FIFODATA, 0x08); //Param2 BIT0~BIT3 Frame Size 0 = 16, 1 = 24, 2 = 32, 3 = 40, 4 = 48, 5 = 64, 6 = 96, 7 = 128, 8 = 256 + //Param2 BIT4~BIT5 TX BaudRate BIT6~BIT7 RX BaudRate,00 = 106Kbps, 01 = 212Kbps, 10 = 424Kbps, 11 = 848Kbps + SetReg(REG_FIFODATA, 0x01); //COMPATIBLE WITH 14443-4 + SetReg(REG_FIFODATA, 0x01); //CID:01 + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(10); + GetReg(REG_ERROR,®_data); + if((reg_data & 0x0F)!=0) + return FAIL; + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 1) + return FAIL; + GetReg(REG_FIFODATA,®_data); + picc_b->CID = reg_data & 0x0F; + + return SUCCESS; + +} + +unsigned char ReaderB_Halt(struct picc_b_struct *picc_b) +{ + unsigned char reg_data; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA, 0x50); // + SetReg(REG_FIFODATA, picc_b->PUPI[0]); // + SetReg(REG_FIFODATA, picc_b->PUPI[1]); // + SetReg(REG_FIFODATA, picc_b->PUPI[2]); // + SetReg(REG_FIFODATA, picc_b->PUPI[3]); // + + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(10); + GetReg(REG_ERROR,®_data); + if((reg_data & 0x0F)!=0) + return FAIL; + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 1) + return FAIL; + GetReg(REG_FIFODATA,®_data); + *picc_b->Answer_to_HALT = reg_data & 0x0F; + + return SUCCESS; + +} + +unsigned char ReaderB_Get_SN(struct picc_b_struct *picc_b) +{ + unsigned char reg_data,i; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA, 0x00); // + SetReg(REG_FIFODATA, 0x36); // + SetReg(REG_FIFODATA, 0x00); // + SetReg(REG_FIFODATA, 0x00); // + SetReg(REG_FIFODATA, 0x08); // + + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + SetCommand(CMD_TRANSCEIVE); + DelayMs(10); + GetReg(REG_ERROR,®_data); + if((reg_data & 0x0F)!=0) + return FAIL; + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 10) + return FAIL; + for(i=0;i<8;i++) + GetReg(REG_FIFODATA,&picc_b->SN[i]); + + return SUCCESS; + +} + +unsigned char ReaderV_Inventory(struct picc_v_struct *picc_v) +{ + unsigned char reg_data,i; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA, 0x26); // + SetReg(REG_FIFODATA, 0x01); + SetReg(REG_FIFODATA, 0x00); + + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + + SetCommand(CMD_TRANSCEIVE); + DelayMs(10); + GetReg(REG_ERROR,®_data); + if((reg_data & 0x0F)!=0) + return FAIL; + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 10) + return FAIL; + GetReg(REG_FIFODATA,&picc_v->RESPONSE ); + GetReg(REG_FIFODATA,®_data); + for(i = 0;i < 8; i++) + { + GetReg(REG_FIFODATA,&picc_v->UID[i]); + } + return SUCCESS; +} + +unsigned char ReaderV_Select(struct picc_v_struct *picc_v) +{ + unsigned char reg_data; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA, 0x22); + SetReg(REG_FIFODATA, 0x25); // + SetReg(REG_FIFODATA, picc_v->UID[0]); + SetReg(REG_FIFODATA, picc_v->UID[1]); + SetReg(REG_FIFODATA, picc_v->UID[2]); + SetReg(REG_FIFODATA, picc_v->UID[3]); + SetReg(REG_FIFODATA, picc_v->UID[4]); + SetReg(REG_FIFODATA, picc_v->UID[5]); + SetReg(REG_FIFODATA, picc_v->UID[6]); + SetReg(REG_FIFODATA, picc_v->UID[7]); + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + + SetCommand(CMD_TRANSCEIVE); + DelayMs(10); + GetReg(REG_ERROR,®_data); + if((reg_data & 0x0F)!=0) + return FAIL; + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 1) + return FAIL; + GetReg(REG_FIFODATA,&picc_v->RESPONSE ); + return SUCCESS; +} + +unsigned char ReaderV_ReadSingleBlock(unsigned char block_num,struct picc_v_struct *picc_v) +{ + unsigned char reg_data,i; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA,0x12); + SetReg(REG_FIFODATA, 0x20); // + SetReg(REG_FIFODATA, block_num); + + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + + SetCommand(CMD_TRANSCEIVE); + DelayMs(10); + GetReg(REG_ERROR,®_data); + if((reg_data & 0x0F)!=0) + return FAIL; + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 5) + return FAIL; + GetReg(REG_FIFODATA,&picc_v->RESPONSE ); + for(i = 0;i < 4; i++) + { + GetReg(REG_FIFODATA,&picc_v->BLOCK_DATA[i]); + } + return SUCCESS; +} + + + +unsigned char ReaderV_WriteSingleBlock(unsigned char block_num,struct picc_v_struct *picc_v) +{ + unsigned char reg_data; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + SetReg(REG_FIFODATA,0x02); + SetReg(REG_FIFODATA, 0x21); // + SetReg(REG_FIFODATA, block_num); + SetReg(REG_FIFODATA, picc_v->BLOCK_DATA[0]); + SetReg(REG_FIFODATA, picc_v->BLOCK_DATA[1]); + SetReg(REG_FIFODATA, picc_v->BLOCK_DATA[2]); + SetReg(REG_FIFODATA, picc_v->BLOCK_DATA[3]); + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + + SetCommand(CMD_TRANSCEIVE); + DelayMs(10); + GetReg(REG_ERROR,®_data); + if((reg_data & 0x0F)!=0) + return FAIL; + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 1) + return FAIL; + GetReg(REG_FIFODATA,&picc_v->RESPONSE ); + + return SUCCESS; +} + +unsigned char ReaderF_Inventory(struct picc_f_struct *picc_f) +{ + unsigned char reg_data,i; + SetCommand(CMD_IDLE); + SetReg(REG_TXDATANUM,0x08); + ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO + + SetReg(REG_FIFODATA, 0x06); + SetReg(REG_FIFODATA, 0x00); // + SetReg(REG_FIFODATA, 0xFF); + SetReg(REG_FIFODATA, 0xFF); + SetReg(REG_FIFODATA, 0x10); + SetReg(REG_FIFODATA, 0x00); + + ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE); + ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE); + + SetCommand(CMD_TRANSCEIVE); + DelayMs(10); + GetReg(REG_ERROR,®_data); + if((reg_data & 0x0F)!=0) + return FAIL; + GetReg(REG_FIFOLENGTH,®_data); + if(reg_data != 18) + return FAIL; + GetReg(REG_FIFODATA,®_data); + GetReg(REG_FIFODATA,®_data); + for(i = 0;i < 8; i++) + { + GetReg(REG_FIFODATA,&picc_f->UID[i]); + } + return SUCCESS; + +} + + + + diff --git a/apps/earphone/RFID/reader/rfid_main.c b/apps/earphone/RFID/reader/rfid_main.c new file mode 100644 index 0000000..9723da7 --- /dev/null +++ b/apps/earphone/RFID/reader/rfid_main.c @@ -0,0 +1,360 @@ +/******************************************************************************************************** + * @file rfid_main.c + * @brief RFID 读卡器应用层主逻辑文件 + * @details + * 本文件包含了RFID读卡器的主要应用逻辑，负责初始化RFID模块，并根据不同的卡片类型（Type A, B, V, F） + * 执行相应的寻卡、激活和数据交换流程。 + * 原代码是为51单片机编写，现已进行重构，移除了所有硬件相关的代码（如GPIO、SPI、UART的直接操作）， + * 并引入了硬件抽象层（HAL）的概念。所有底层硬件操作都通过 `rfid_hal.h` 中定义的接口函数完成， + * 以便于在STM32等不同平台上进行移植。 + * + * @author Kilo Code + * @date 2025-11-24 + * @version 1.0 + * + * @note + * - 您需要在使用本模块前，在您的平台上实现 `rfid_hal.h` 中声明的所有硬件接口函数。 + * - `rfid_task()` 函数是一个示例性的主任务循环，您可以根据您的实际应用需求进行修改或集成。 + * - 文件中保留了对不同卡片类型事件的处理函数（`TYPE_A_EVENT`, `TYPE_B_EVENT`等）， + * 这些是RFID协议的核心逻辑。 + ********************************************************************************************************/ + +#include "../include/rfid_main.h" +#include +#include +#include + +#include "../include/READER.h" +#include "../include/READER_REG.h" +#include "../include/MIFARE.h" +#include "../include/NTAG.h" +#include "rfid_hal.h" // 引入硬件抽象层头文件 + +// 宏定义，用于调试信息输出。您需要实现 rfid_hal.h 中的 rfid_log_debug 函数 +#define rfid_printf rfid_log_debug + +/** + * @brief 将一个字节的整数转换为两位十六进制字符串。 + * @param buf [out] 存储转换后字符串的缓冲区，长度至少为3。 + * @param num [in] 要转换的无符号字符。 + * @return 无。 + */ +static void IntToHex(unsigned char *buf, unsigned char num) +{ + const unsigned char digits[] = "0123456789ABCDEF"; + buf[0] = digits[(num >> 4) & 0x0F]; // 高4位 + buf[1] = digits[num & 0x0F]; // 低4位 + buf[2] = '\0'; +} + +/** + * @brief 通过调试接口打印一个字节的十六进制值。 + * @param num [in] 要打印的无符号字符。 + * @return 无。 + */ +static void printHex(unsigned char num) +{ + unsigned char buf[3]; + IntToHex(buf, num); + rfid_printf((const char *)buf); +} + +/** + * @brief 处理Type A卡片事件。 + * @details + * 该函数执行ISO/IEC 14443 Type A卡片的完整激活流程，包括： + * 1. 初始化读卡器以支持Type A协议。 + * 2. 打开RF场。 + * 3. 请求（Request）和防冲突（Anticollision），最终激活卡片。 + * 4. 根据卡片的SAK（Select Acknowledge）值，判断卡片具体类型（如Mifare, NTAG, CPU卡）并调用相应的处理函数。 + * 5. 操作结束后关闭RF场。 + * @return 无。 + */ +void TYPE_A_EVENT(void) +{ + unsigned char result; + rfid_printf("TYPE_A_EVENT begin\n"); + + // 初始化读卡器为Type A模式 + result = ReaderA_Initial(); + if (result != SUCCESS) + { + rfid_printf("INIT_ERROR\r\n"); + SetCW(DISABLE); + return; + } + + // 打开RF场（载波） + result = SetCW(ENABLE); + if (result != SUCCESS) + { + rfid_printf("CW_ERROR\r\n"); + SetCW(DISABLE); + return; + } + + // 激活Type A卡片 + result = ReaderA_CardActivate(&PICC_A); + if (result != SUCCESS) + { + // rfid_printf("ReaderA_CardActivate_ERROR\r\n"); + SetCW(DISABLE); + return; + } + + rfid_printf("************* TYPE A CARD ************* \r\n"); + rfid_printf("-> ATQA = %02X%02X\r\n", PICC_A.ATQA[0], PICC_A.ATQA[1]); + + if (PICC_A.UID_Length == 4) + { + rfid_printf("-> UID = %02X%02X%02X%02X\r\n", PICC_A.UID[0], PICC_A.UID[1], PICC_A.UID[2], PICC_A.UID[3]); + } + else if (PICC_A.UID_Length > 4) // 支持更长的UID + { + rfid_printf("-> UID = "); + for (int i = 0; i < PICC_A.UID_Length; i++) + { + rfid_printf("%02X", PICC_A.UID[i]); + } + rfid_printf("\r\n"); + } + rfid_printf("-> SAK = %02X\r\n", PICC_A.SAK[0]); + + // 根据SAK值判断卡片类型 + if (PICC_A.SAK[0] == 0x08) + { + rfid_printf("************* Mifare CARD ************* \r\n"); + result = MIFARE_CARD_EVENT(); + } + else if ((PICC_A.SAK[0] == 0x28) || (PICC_A.SAK[0] == 0x20)) + { + rfid_printf("************* CPU CARD ************* \r\n"); + // result = CPU_CARD_EVENT(); // CPU卡处理函数，暂未实现 + } + else if (PICC_A.SAK[0] == 0x04) + { + rfid_printf("************* NTAG CARD ************* \r\n"); + result = NTAG_EVENT(); + } + + SetCW(DISABLE); // 关闭RF场 +} + +/** + * @brief 处理Type B卡片事件。 + * @details + * 该函数执行ISO/IEC 14443 Type B卡片的激活流程，包括： + * 1. 初始化读卡器以支持Type B协议。 + * 2. 打开RF场。 + * 3. 发送REQB/WUPB命令寻卡。 + * 4. 发送ATTRIB命令选卡。 + * 5. 获取卡片序列号（SN）。 + * 6. 操作结束后关闭RF场。 + * @return 无。 + */ +void TYPE_B_EVENT(void) +{ + unsigned char result; + rfid_printf("TYPE_B_EVENT begin\n"); + + ReaderB_Initial(); + SetCW(ENABLE); + + result = ReaderB_Request(&PICC_B); + if (result != SUCCESS) + { + SetCW(DISABLE); + return; + } + + rfid_printf("************* TYPE B CARD ************* \r\n"); + // 打印ATQB信息 + rfid_printf("-> ATQB = "); + for(int i=0; i<12; i++) rfid_printf("%02X", PICC_B.ATQB[i]); + rfid_printf("\r\n"); + + result = ReaderB_Attrib(&PICC_B); + if (result != SUCCESS) + { + SetCW(DISABLE); + return; + } + rfid_printf("-> ATTRIB = %02X\r\n", PICC_B.CID); + + result = ReaderB_Get_SN(&PICC_B); + if (result != SUCCESS) + { + SetCW(DISABLE); + return; + } + rfid_printf("-> SN = "); + for(int i=0; i<8; i++) rfid_printf("%02X", PICC_B.SN[i]); + rfid_printf("\r\n"); + + SetCW(DISABLE); +} + +/** + * @brief 处理Type V (ISO/IEC 15693) 卡片事件。 + * @details + * 该函数执行ISO/IEC 15693 Vicinity卡片的交互流程，包括： + * 1. 初始化读卡器以支持15693协议。 + * 2. 打开RF场。 + * 3. 发送Inventory命令寻卡并获取UID。 + * 4. 发送Select命令选择卡片。 + * 5. 示例性地对第4块进行写操作，然后再读回校验。 + * 6. 操作结束后关闭RF场。 + * @return 无。 + */ +void TYPE_V_EVENT(void) +{ + unsigned char result, i; + rfid_printf("TYPE_V_EVENT begin\n"); + + ReaderV_Initial(); + SetCW(ENABLE); + + result = ReaderV_Inventory(&PICC_V); + if (result != SUCCESS) + { + SetCW(DISABLE); + rfid_printf("-> ReaderV Inventory ERROR!\r\n"); + return; + } + + rfid_printf("************* TYPE V CARD ************* \r\n"); + rfid_printf("UID="); + for (i = 0; i < 8; i++) + { + printHex(PICC_V.UID[i]); + } + rfid_printf("\r\n"); + + result = ReaderV_Select(&PICC_V); + if (result != SUCCESS) + { + SetCW(DISABLE); + rfid_printf("-> ReaderV Select ERROR!\r\n"); + return; + } + + // 示例：写单个块 + memcpy(PICC_V.BLOCK_DATA, "\x11\x22\x33\x44", 4); + result = ReaderV_WriteSingleBlock(4, &PICC_V); + if (result != SUCCESS) + { + SetCW(DISABLE); + rfid_printf("-> ReaderV WriteSingleBlock ERROR!\r\n"); + return; + } + rfid_printf("WriteSingleBlock SUCCESS\r\n"); + + // 示例：读单个块 + result = ReaderV_ReadSingleBlock(4, &PICC_V); + if (result != SUCCESS) + { + SetCW(DISABLE); + rfid_printf("-> ReaderV ReadSingleBlock ERROR!\r\n"); + return; + } + rfid_printf("BLOCK DATA = %02X%02X%02X%02X \r\n", PICC_V.BLOCK_DATA[0], PICC_V.BLOCK_DATA[1], PICC_V.BLOCK_DATA[2], PICC_V.BLOCK_DATA[3]); + + SetCW(DISABLE); +} + +/** + * @brief 处理Type F (FeliCa) 卡片事件。 + * @details + * 该函数执行FeliCa卡片的交互流程，包括： + * 1. 初始化读卡器以支持FeliCa协议。 + * 2. 打开RF场。 + * 3. 发送Inventory命令寻卡并获取UID。 + * 4. 后续可以添加与FeliCa卡的数据交换命令。 + * 5. 操作结束后关闭RF场。 + * @note 当前实现仅包含寻卡部分，具体的TPDU命令交换被注释掉了，因为它们依赖于一个未提供的 `CPU_TPDU` 函数。 + * @return 无。 + */ +void TYPE_F_EVENT(void) +{ + unsigned char result, i; + // unsigned char SendBuffer[255]; + // unsigned char ReceiveBuffer[255]; + // transmission_struct TPDU; + // TPDU.pSendBuffer = SendBuffer; + // TPDU.pReceiveBuffer = ReceiveBuffer; + + rfid_printf("TYPE_F_EVENT begin\n"); + ReaderF_Initial(); + SetCW(ENABLE); + + result = ReaderF_Inventory(&PICC_F); + if (result != SUCCESS) + { + SetCW(DISABLE); + return; + } + + rfid_printf("************* TYPE F CARD ************* \r\n"); + rfid_printf("->TYPE F UID = "); + for(i=0; i<8; i++) rfid_printf("%02X", PICC_F.UID[i]); + rfid_printf("\r\n"); + + // 此处省略了原代码中复杂的TPDU数据交换部分， + // 因为它依赖于一个未定义的 CPU_TPDU 函数。 + // 如果需要与CPU卡进行数据交换，您需要实现相关的APDU指令封装和解析。 + + SetCW(DISABLE); +} + + +/** + * @brief RFID模块的主任务函数。 + * @details + * 这是一个示例性的任务函数，展示了如何初始化RFID芯片并进入一个无限循环来轮询不同类型的卡片。 + * 您可以将此函数作为一个独立的任务运行，或者将其中的逻辑集成到您现有的任务调度中。 + * 1. 调用 `rfid_hal_init()` 初始化底层硬件。 + * 2. 调用 `FM176XX_HardReset()` 硬复位RFID芯片。 + * 3. 检查芯片版本号，确认通信正常。 + * 4. 在主循环中，依次调用不同卡片类型的事件处理函数。 + * @return 无。 + */ +void rfid_task(void) +{ + unsigned char result, reg_data; + + // 1. 初始化底层硬件 (SPI, GPIO, UART, Delay) + // 这个函数需要您在 rfid_hal.c 中实现 + rfid_hal_init(); + + // 2. 硬复位 FM176XX 芯片 + while (1) + { + result = FM176XX_HardReset(); + if (result != SUCCESS) + { + rfid_printf("FM176XX HardReset FAIL\r\n"); + rfid_delay_ms(1000); // 延时后重试 + } + else + { + rfid_printf("FM176XX HardReset SUCCESS\r\n"); + break; + } + } + + // 3. 读取芯片版本号，确认通信是否正常 + GetReg(REG_VERSION, ®_data); + rfid_printf("REG_VERSION = %02X\r\n", reg_data); + + // 4. 进入主循环，轮询不同类型的卡 + while (1) + { + // 您可以根据需要取消注释来测试不同类型的卡 + // TYPE_A_EVENT(); + // TYPE_B_EVENT(); + TYPE_V_EVENT(); // 当前默认只测试 Type V (15693) 卡 + // TYPE_F_EVENT(); + + rfid_delay_ms(500); // 每次轮询后延时 + } +}