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lmx
2025-12-01 10:01:10 +08:00
parent 627780ea20
commit 6248a4fc34
96 changed files with 9752 additions and 11943 deletions
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582
apps/earphone/94_rfid_stc/READER/CPU_CARD.c Normal file
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//2018<31><38>2<EFBFBD><32>2<EFBFBD>ձ༭<D5B1><E0BCAD>֧<EFBFBD><D6A7>CPU<50><55>Ƭָ<C6AC><EFBFBD><EEA3AC><EFBFBD>ӷ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD>
#include "READER.h"
#include "CPU_CARD.h"
#include <string.h>
#include "READER_REG.h"
#include "xt_main.h"
#define CPU_DEBUG 0
struct CPU_CARD_STR CPU_CARD;
#if 0
unsigned char CPU_CARD_EVENT( void ){
return FAIL;
}
#else
unsigned char CPU_CARD_EVENT( void )
{
unsigned char result;
unsigned char SendBuffer[255];
unsigned char ReceiveBuffer[255];
unsigned char i;
transmission_struct APDU;
APDU.pSendBuffer = SendBuffer; /*<2A><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
APDU.pReceiveBuffer = ReceiveBuffer; /*<2A><><EFBFBD>ý<EFBFBD><C3BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
result = CPU_Rats( &CPU_CARD.ATS.Length, CPU_CARD.ATS.Ats_Data );
if ( result != SUCCESS )
{
SetCW( DISABLE );
printf( "-> RATS ERROR!\r\n" );
return result;
}
printf( "-> ATS = " );
for(i = 0;i < CPU_CARD.ATS.Length;i++)
printf("%02X", CPU_CARD.ATS.Ats_Data[i]);
printf( "\r\n" );
result = Ats_Process( CPU_CARD.ATS.Length, CPU_CARD.ATS.Ats_Data );
if ( result != SUCCESS )
{
SetCW( DISABLE );
printf( "-> RATS ERROR!\r\n" );
return result;
}
memcpy( APDU.pSendBuffer, "\x00\xA4\x00\x00\x02\x3F\x00", 7 );
APDU.SendLength = 7;
result = CPU_APDU( &APDU );
if ( result != SUCCESS )
{
SetCW( DISABLE );
printf( "-> APDU ERROR!\r\n" );
return result;
}
printf( "->APDU = " );
for(i=0;i<APDU.ReceiveLength;i++)
printf("%02X", APDU.pReceiveBuffer[i] );
printf( "\r\n" );
memcpy(APDU.pSendBuffer,"\x00\xA4\x04\x00\x07\xD4\x10\x00\x00\x03\x00\x01",12);
APDU.SendLength = 12;
result = CPU_APDU(&APDU);
if(result != SUCCESS)
{
SetCW(DISABLE);
printf("-> APDU ERROR!\r\n");
return result;
}
printf("-> APDU = ");
for(i=0;i<APDU.ReceiveLength;i++)
printf("%02X",APDU.pReceiveBuffer[i]);
printf("\r\n");
memcpy(APDU.pSendBuffer,"\x00\xA4\x04\x00\x0E\x32\x50\x41\x59\x2E\x53\x59\x53\x2E\x44\x44\x46\x30\x31",19);
APDU.SendLength = 19;
result = CPU_APDU(&APDU);
if(result != SUCCESS)
{
SetCW(DISABLE);
printf("-> APDU ERROR!\r\n");
return result;
}
printf("-> Response = ");
for(i=0;i<APDU.ReceiveLength;i++)
printf("%02X",APDU.pReceiveBuffer[i]);
printf("\r\n");
memcpy(APDU.pSendBuffer,"\x00\xA4\x04\x00\x08\xA0\x00\x00\x03\x33\x01\x01\x01\x00",14);
APDU.SendLength = 14;
result = CPU_APDU(&APDU);
if(result != SUCCESS)
{
SetCW(DISABLE);
printf("-> APDU ERROR!\r\n");
return result;
}
printf("-> Response = ");
for(i=0;i<APDU.ReceiveLength;i++)
printf("%02X",APDU.pReceiveBuffer[i]);
printf("\r\n");
memcpy(APDU.pSendBuffer,"\x80\xA8\x00\x00\x24\x83\x22\x28\x00\x00\x80\x00\x00\x00\x00\x00\x01\x00\x00\x00\x00\x00\x00\x01\x56\x00\x00\x00\x00\x00\x01\x56\x13\x08\x28\x82\x12\x34\x56\x78\x00\x00",42);
APDU.SendLength = 42;
result = CPU_APDU(&APDU);
if(result != SUCCESS)
{
SetCW(DISABLE);
printf("-> APDU ERROR!\r\n");
return result;
}
printf("-> Response = ");
for(i=0;i<APDU.ReceiveLength;i++)
printf("%02X",APDU.pReceiveBuffer[i]);
printf("\r\n");
memcpy( APDU.pSendBuffer, "\x00\x84\x00\x00\x08", 5 );
APDU.SendLength = 5;
result = CPU_APDU( &APDU );
if ( result != SUCCESS )
{
SetCW( DISABLE );
printf( "-> APDU ERROR!\r\n" );
return result;
}
printf( "-> Response = " );
for(i=0;i<APDU.ReceiveLength;i++)
printf("%02X",APDU.pReceiveBuffer[i]);
printf( "\r\n" );
return result;
}
#endif
#if 0
void Write_FIFO(unsigned char length,unsigned char* buff)
{
}
#else
void Write_FIFO(unsigned char length,unsigned char* buff)
{
unsigned char i;
for(i=0;i<length;i++)
{
SetReg(REG_FIFODATA,buff[i]);
}
}
#endif
#if 0
void Read_FIFO(unsigned char length,unsigned char* buff)
{
}
#else
void Read_FIFO(unsigned char length,unsigned char* buff)
{
unsigned char i;
for(i=0;i<length;i++)
{
GetReg(REG_FIFODATA,&buff[i]);
}
}
#endif
#if 0
unsigned char FM176XX_TPDU( transmission_struct *tpdu )
{
return FAIL;
}
#else
unsigned char FM176XX_TPDU( transmission_struct *tpdu )
{
unsigned char result,irq0,irq1,error;
unsigned int i;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
SetReg(REG_IRQ0,0x7F);//Clear IRQ0
SetReg(REG_IRQ1,0x7F); //Clear IRQ1
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
Write_FIFO(tpdu->SendLength,tpdu->pSendBuffer);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
// SetTimer(tpdu->Timeout);
SetCommand(CMD_TRANSCEIVE);
for(i = 0;i < tpdu->Timeout; i++)
{
DelayMs(1);//<2F><><EFBFBD>յȴ<D5B5><C8B4><EFBFBD>ʱ
GetReg(REG_IRQ0,&irq0);
if(irq0 & BIT_RXIRQ)
{
GetReg( REG_ERROR, &error ); /*Get Error Status */
error = error & (BIT_NODATAERR | BIT_COLLDET | BIT_PROTERR | BIT_INTEGERR);
if(error != 0)
return FAIL;//<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>
GetReg(REG_FIFOLENGTH,&tpdu->ReceiveLength);
if(tpdu->ReceiveLength > 0)
{
Read_FIFO(tpdu->ReceiveLength,tpdu->pReceiveBuffer);
result = SUCCESS;
return result;
}
}
GetReg(REG_IRQ1,&irq1);
// if(irq1 & BIT_TIMER1IRQ)
// {
// result = FAIL;//δ<><CEB4>timeoutʱ<74><CAB1><EFBFBD>ڽ<EFBFBD><DABD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>
// }
}
result = FAIL;//δ<><CEB4>timeoutʱ<74><CAB1><EFBFBD>ڽ<EFBFBD><DABD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>
return result;
}
#endif
/****************************************************************/
/*<2A><><EFBFBD><EFBFBD>: Rats */
/*<2A><><EFBFBD><EFBFBD>: Request for answer to select */
/*<2A><><EFBFBD><EFBFBD>: */
/* */
/*<2A><><EFBFBD>: */
/* ats_len<65><6E><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD>ATS<54><53><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD> */
/* *ats<74><73><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD>ATS<54><53><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> */
/* OK: Ӧ<><D3A6><EFBFBD><EFBFBD>ȷ */
/* ERROR: Ӧ<><D3A6><EFBFBD><EFBFBD><EFBFBD> */
/****************************************************************/
#if 0
unsigned char CPU_Rats( unsigned char *ats_len, unsigned char *ats )
{
return FAIL;
}
#else
unsigned char CPU_Rats( unsigned char *ats_len, unsigned char *ats )
{
unsigned char result;
unsigned char outbuffer[2], inbuffer[64];
transmission_struct tpdu;
tpdu.pSendBuffer = outbuffer;
tpdu.pReceiveBuffer = inbuffer;
tpdu.pSendBuffer[0] = 0xE0; /*Start byte */
tpdu.pSendBuffer[1] = 0x50; /*default = 0x50 */
tpdu.SendLength = 2;
tpdu.Timeout = 160;
//CPU_CARD.FWT = 160;//Ĭ<><C4AC><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
result = FM176XX_TPDU( &tpdu );
if ( result == SUCCESS )
{
*ats_len = tpdu.ReceiveLength;
memcpy( ats, tpdu.pReceiveBuffer, *ats_len );
}
return (result);
}
#endif
#if 0
unsigned char Ats_Process( unsigned char ats_len, unsigned char *ats )/* ATS<54><53><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD> */
{
return FAIL;
}
#else
unsigned char Ats_Process( unsigned char ats_len, unsigned char *ats )/* ATS<54><53><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD> */
{
unsigned char result, offset;
if ( (ats_len == ats[0]) || (ats_len > 2) )/*TL */
{
CPU_CARD.FSCI = ats[1] & 0x0F;
if ( CPU_CARD.FSCI == 0 )
CPU_CARD.FSC = 13;
if ( CPU_CARD.FSCI == 1 )
CPU_CARD.FSC = 21;
if ( CPU_CARD.FSCI == 2 )
CPU_CARD.FSC = 29;
if ( CPU_CARD.FSCI == 3 )
CPU_CARD.FSC = 37;
if ( CPU_CARD.FSCI == 4 )
CPU_CARD.FSC = 45;
if ( CPU_CARD.FSCI == 5 )
CPU_CARD.FSC = 61;
if ( CPU_CARD.FSCI == 6 )
CPU_CARD.FSC = 93;
if ( CPU_CARD.FSCI == 7 )
CPU_CARD.FSC = 125;
if ( CPU_CARD.FSCI > 7 )
CPU_CARD.FSC = 253;
//CPU_CARD.FSC = 13;
printf( "-> CPU_CARD.FSC = %02X\r\n",CPU_CARD.FSC );
}
else
{
result = FAIL;
return (result);
}
offset = 0;
result = SUCCESS;
if ( ats[1] & BIT5 ) /*TA */
{
CPU_CARD.TA = ats[2];
offset++;
}
if ( ats[1] & BIT6 ) /*TB */
{
CPU_CARD.TB = ats[2 + offset];
CPU_CARD.SFGI = CPU_CARD.TB & 0x0F;
CPU_CARD.FWI = (CPU_CARD.TB >> 4) & 0x0F;
printf( "-> CPU_CARD.SFGI = %02X\r\n",CPU_CARD.SFGI );
printf( "-> CPU_CARD.FWI = %02X\r\n",CPU_CARD.FWI);
if ( CPU_CARD.FWI < 2 )
CPU_CARD.FWT = 1;
if ( CPU_CARD.FWI == 2 )
CPU_CARD.FWT = 2;
if ( CPU_CARD.FWI == 3 )
CPU_CARD.FWT = 3;
if ( CPU_CARD.FWI == 4 )
CPU_CARD.FWT = 5;
if ( CPU_CARD.FWI == 5 )
CPU_CARD.FWT = 10;
if ( CPU_CARD.FWI == 6 )
CPU_CARD.FWT = 20;
if ( CPU_CARD.FWI == 7 )
CPU_CARD.FWT = 40;
if ( CPU_CARD.FWI == 8 )
CPU_CARD.FWT = 80;
if ( CPU_CARD.FWI == 9 )
CPU_CARD.FWT = 160;
if ( CPU_CARD.FWI == 10 )
CPU_CARD.FWT = 310;
if ( CPU_CARD.FWI == 11 )
CPU_CARD.FWT = 620;
if ( CPU_CARD.FWI == 12 )
CPU_CARD.FWT = 1240;
if ( CPU_CARD.FWI == 13 )
CPU_CARD.FWT = 2480;
if ( CPU_CARD.FWI > 13 )
CPU_CARD.FWT = 4950;
offset++;
}
if ( ats[1] & BIT7 )/*TC */
{
CPU_CARD.TC = ats[2 + offset];
offset++;
}
CPU_CARD.PCB = 0x02;/*PCB<43><42>ʼֵΪ0x02 */
return (result);
}
#endif
#if 1
//xtell 同时把CPU_TPDU 和 CPU_NAk 用空函数替换 SPi正常
unsigned char CPU_NAK( transmission_struct *tpdu ) /* <20><>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>NAK */
{
return FAIL;
}
#else
unsigned char CPU_NAK( transmission_struct *tpdu ) /* <20><>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>NAK */
{
unsigned char result, tpdu_send_buffer[255],tpdu_receive_buffer[255];
tpdu->pSendBuffer = tpdu_send_buffer;
tpdu->pReceiveBuffer = tpdu_receive_buffer;
tpdu->pSendBuffer [0] = 0xB0 | CPU_CARD.PCB;
tpdu->SendLength = 1;
/*printf( "NAK\r\n" );*/
result = FM176XX_TPDU( tpdu );
return (result);
}
#endif
#if 0
unsigned char CPU_TPDU( transmission_struct *tpdu )
{
return FAIL;
}
#else
unsigned char CPU_TPDU( transmission_struct *tpdu )
{
unsigned char result, i, pcb_byte;
transmission_struct nak_tpdu;
result = FM176XX_TPDU( tpdu );
for ( i = 0; i < 3; i++ )
{
if ( result != SUCCESS )
{
result = CPU_NAK( &nak_tpdu );
if(result == SUCCESS)
{
if(nak_tpdu.ReceiveLength > 0)
{
memcpy( &pcb_byte, nak_tpdu.pReceiveBuffer, 1 );
if((pcb_byte & 0xF0) == 0xA0)//R(ACK)
{
#if CPU_DEBUG
printf("...pcb_byte = %02X\r\n",pcb_byte);
printf("...CPU_CARD.PCB = %02X\r\n",CPU_CARD.PCB);
#endif
if((pcb_byte & 0x03) != CPU_CARD.PCB)
{
result = FM176XX_TPDU( tpdu );
}
else
{
tpdu->pSendBuffer[0] = tpdu->pSendBuffer[0] ^ 0x01;//
CPU_CARD.PCB = tpdu->pSendBuffer[0] & 0x03;
result = FM176XX_TPDU( tpdu );
}
}
}
}
}
else
{
break;
}
}
return (result);
}
#endif
/****************************************************************/
/*<2A><><EFBFBD><EFBFBD>: CPU_APDU */
/*<2A><><EFBFBD><EFBFBD>: <20>ú<EFBFBD><C3BA><EFBFBD>ʵ<EFBFBD><CAB5>ת<EFBFBD><D7AA>APDU<44><55><EFBFBD><EFBFBD><EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD> CPU card reset */
/*<2A><><EFBFBD><EFBFBD>: */
/* */
/*<2A><><EFBFBD>: */
/* ats_len<65><6E><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD> */
/* ats<74><73><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> */
/* OK: Ӧ<><D3A6><EFBFBD><EFBFBD>ȷ */
/* ERROR: Ӧ<><D3A6><EFBFBD><EFBFBD><EFBFBD> */
/****************************************************************/
#if 1
//xtell 同时把CPU_TPDU 和 CPU_NAk 用空函数替换 SPi正常
unsigned char CPU_APDU( transmission_struct *apdu )
{
return FAIL;
}
#else
unsigned char CPU_APDU( transmission_struct *apdu )
{
unsigned char result, pcb_byte, tpdu_send_buffer[255],tpdu_receive_buffer[255], i;
unsigned char unsent_length;
transmission_struct tpdu;
tpdu.pSendBuffer = tpdu_send_buffer;
tpdu.pReceiveBuffer = tpdu_receive_buffer;
tpdu.Timeout = CPU_CARD.FWT;
apdu->ReceiveLength = 0;
unsent_length = apdu->SendLength; /*<2A><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD> */
for ( i = 0; i < 16; i++ ) /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̣<EFBFBD><CCA3><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD>鳤<EFBFBD><E9B3A4>16<31><36><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>16<31><36><EFBFBD>鷢<EFBFBD><E9B7A2> */
{
#if CPU_DEBUG
printf("unsent_length = %02X\r\n",unsent_length);
#endif
if ( unsent_length < CPU_CARD.FSC )
{
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD>֡<EFBFBD><D6A1><EFBFBD>ȣ<EFBFBD><C8A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
tpdu.pSendBuffer[0] = CPU_CARD.PCB; /*PCB<43>ֽ<EFBFBD>д<EFBFBD><D0B4>TPDU<44><55><EFBFBD><EFBFBD> */
memcpy( tpdu.pSendBuffer + 1, apdu->pSendBuffer + apdu->SendLength - unsent_length, unsent_length ); /*APDU<44><55><EFBFBD><EFBFBD>д<EFBFBD><D0B4>TPDU<44><55><EFBFBD><EFBFBD> */
tpdu.SendLength = unsent_length + 1; /*<2A><><EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1 */
#if CPU_DEBUG
printf("--> ");
for(i=0;i<tpdu.SendLength;i++)
printf("%02X",tpdu.pSendBuffer[i]);
printf("\r\n");
#endif
result = CPU_TPDU( &tpdu );
if ( (result != SUCCESS) || (tpdu.ReceiveLength == 0) )
return (result);
#if CPU_DEBUG
printf("<-- ");
for(i=0;i<tpdu.ReceiveLength;i++)
printf("%02X",tpdu.pReceiveBuffer[i]);
printf("\r\n");
#endif
unsent_length = 0; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD><EFBFBD><EFBFBD>0 */
break; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̺<EFBFBD><CCBA>˳<EFBFBD>ѭ<EFBFBD><D1AD> */
}
else
{
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3>ȴ<EFBFBD><C8B4>ڵ<EFBFBD><DAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡<EFBFBD><D6A1><EFBFBD>ȣ<EFBFBD><C8A3><EFBFBD><EFBFBD>鷢<EFBFBD>ͣ<EFBFBD>ÿ<EFBFBD>鷢<EFBFBD>͵<EFBFBD><CDB5><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>Ϊ<EFBFBD><CEAA>CPU_CARD.FSC - 1<><31> */
tpdu.pSendBuffer[0] = CPU_CARD.PCB | 0x10; /*PCB<43>ֽ<EFBFBD>д<EFBFBD><D0B4>TPDU<44><55><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӱ<EFBFBD>ʶ */
memcpy( tpdu.pSendBuffer + 1, apdu->pSendBuffer + apdu->SendLength - unsent_length, CPU_CARD.FSC - 1 ); /*APDU<44><55><EFBFBD><EFBFBD>д<EFBFBD><D0B4>TPDU<44><55><EFBFBD><EFBFBD> */
tpdu.SendLength = CPU_CARD.FSC; /*<2A><><EFBFBD>鷢<EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD> */
#if CPU_DEBUG
printf("..--> ");
for(i=0;i<tpdu.SendLength;i++)
printf("%02X",tpdu.pSendBuffer[i]);
printf("\r\n");
#endif
result = CPU_TPDU( &tpdu );
#if CPU_DEBUG
printf("<-- ");
for(i=0;i<tpdu.ReceiveLength;i++)
printf("%02X",tpdu.pReceiveBuffer[i]);
printf("\r\n");
#endif
if ( (result != SUCCESS) && (tpdu.ReceiveLength == 1) )
return (result);
memcpy( &pcb_byte, tpdu.pReceiveBuffer, 1 ); /* */
if ( (pcb_byte == 0xA2) || (pcb_byte == 0xA3) )
{
unsent_length = unsent_length - (CPU_CARD.FSC - 1); /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ô<EFBFBD><C3B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD> */
CPU_CARD.PCB = (pcb_byte & 0x0F) ^ 0x01; /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PCB<43>ֽ<EFBFBD> */
#if CPU_DEBUG
printf("unsent_length = %02X\r\n",unsent_length);
#endif
}
else
return (FAIL); /* */
}
}
for ( i = 0; i < 255; i++ ) /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̣<EFBFBD><CCA3><EFBFBD><EFBFBD>֧<EFBFBD><D6A7>255<35><35>ACK<43><4B><EFBFBD><EFBFBD>WTXӦ<58><D3A6> */
{
if ( (result != SUCCESS) || (tpdu.ReceiveLength == 0) )
return (FAIL);
memcpy( &pcb_byte, tpdu.pReceiveBuffer, 1 ); /*<2A><>ȡPCB<43>ֽ<EFBFBD> */
if ( (pcb_byte == 0x02) || (pcb_byte == 0x03) )
{
CPU_CARD.PCB = pcb_byte ^ 0x01; /*<2A><><EFBFBD><EFBFBD>PCB<43>ֽ<EFBFBD> */
#if CPU_DEBUG
printf("....CPU_CARD.PCB = %02X\r\n",CPU_CARD.PCB);
#endif
memcpy( apdu->pReceiveBuffer + apdu->ReceiveLength, tpdu.pReceiveBuffer + 1, tpdu.ReceiveLength - 1 );
apdu->ReceiveLength = apdu->ReceiveLength + tpdu.ReceiveLength - 1;
return (SUCCESS); /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
}
if ( (pcb_byte == 0x12) || (pcb_byte == 0x13) )
{
memcpy( apdu->pReceiveBuffer + apdu->ReceiveLength, tpdu.pReceiveBuffer + 1, tpdu.ReceiveLength - 1 );
apdu->ReceiveLength = apdu->ReceiveLength + tpdu.ReceiveLength - 1;
tpdu.pSendBuffer[0] = ( (pcb_byte & 0x03) | 0xA0) ^ 0x01; /*<2A>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>֡<EFBFBD><D6A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PCB<43>ֽ<EFBFBD> */
tpdu.SendLength = 1;
#if CPU_DEBUG
printf("...--> = ");
for(i=0;i<tpdu.SendLength;i++)
printf("%02X",tpdu.pSendBuffer[i]);
printf("\r\n");
#endif
result = CPU_TPDU( &tpdu ); /*<2A>ط<EFBFBD>ACK */
#if CPU_DEBUG
printf("<-- = ");
for(i=0;i<tpdu.ReceiveLength;i++)
printf("%02X",tpdu.pReceiveBuffer[i]);
printf("\r\n");
#endif
}
if ( (pcb_byte == 0xF2) || (pcb_byte == 0xF3) )
{
tpdu.SendLength = tpdu.ReceiveLength;
memcpy(tpdu.pSendBuffer ,tpdu.pReceiveBuffer ,tpdu.SendLength); /*<2A>յ<EFBFBD>WTX֡<58><D6A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PCB<43>ֽ<EFBFBD> */
#if CPU_DEBUG
printf("....--> = ");
for(i=0;i<tpdu.SendLength;i++)
printf("%02X",tpdu.pSendBuffer[i]);
printf("\r\n");
#endif
result = CPU_TPDU( &tpdu ); /*<2A>ط<EFBFBD>WTX */
#if CPU_DEBUG
printf("<-- = ");
for(i=0;i<tpdu.ReceiveLength;i++)
printf("%02X",tpdu.pReceiveBuffer[i]);
printf("\r\n");
#endif
}
}
return (FAIL); /*<2A><><EFBFBD>մ<EFBFBD><D5B4><EFBFBD> */
}
#endif

58
apps/earphone/94_rfid_stc/READER/CPU_CARD.h Normal file
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@ -0,0 +1,58 @@
#ifndef CPU_CARD_H
#define CPU_CARD_H 1
typedef struct
{
unsigned char SendLength;
unsigned char *pSendBuffer;
unsigned char ReceiveLength;
unsigned char *pReceiveBuffer;
unsigned int Timeout;
}transmission_struct;
struct ATS_STR
{
unsigned char Length;
unsigned char Ats_Data[255];
};
struct PPS_STR
{
unsigned char Length;
unsigned char Pps_Data[1];
};
struct CPU_CARD_STR
{
unsigned char FSCI;
unsigned char FSC;
unsigned char FWI;
unsigned int FWT;
unsigned char SFGI;
unsigned char TA;
unsigned char TB;
unsigned char TC;
unsigned char PCB;
unsigned char WTXM;
struct ATS_STR ATS;
struct PPS_STR PPS;
};
extern struct CPU_CARD_STR CPU_CARD;
extern unsigned char Ats_Process( unsigned char ats_len, unsigned char *ats );
extern unsigned char CPU_CARD_EVENT( void );
extern unsigned char CPU_TPDU( transmission_struct *tpdu );
extern unsigned char CPU_Rats( unsigned char *ats_len, unsigned char *ats );
extern unsigned char CPU_NAK( transmission_struct *tpdu );
extern unsigned char CPU_APDU( transmission_struct *apdu );
extern unsigned char CPU_TPDU( transmission_struct *tpdu );
#endif

491
apps/earphone/94_rfid_stc/READER/MIFARE.c Normal file
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@ -0,0 +1,491 @@
#include "MIFARE.h"
#include "READER.h"
#include "string.h"
#include "READER_REG.h"
#include "xt_main.h"
unsigned char SECTOR,BLOCK,BLOCK_NUM;
unsigned char BLOCK_DATA[16];
unsigned char KEY_A[16][6]=
{{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//0
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//1
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//2
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//3
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//4
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//5
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//6
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//7
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//8
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//9
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//10
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//11
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//12
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//13
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//14
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}};//15
unsigned char KEY_B[16][6]=
{{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//0
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//1
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//2
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//3
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//4
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//5
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//6
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//7
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//8
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//9
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//10
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//11
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//12
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//13
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},//14
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}};//15
/*****************************************************************************************/
/*<2A><><EFBFBD>ƣ<EFBFBD>Mifare_Clear_Crypto */
/*<2A><><EFBFBD>ܣ<EFBFBD>Mifare_Clear_Crypto<74><6F><EFBFBD><EFBFBD><EFBFBD>֤<EFBFBD><D6A4>־ */
/*<2A><><EFBFBD>룺 */
/* */
/*<2A><><EFBFBD>: */
/* */
/* */
/*****************************************************************************************/
void Mifare_Clear_Crypto(void)
{
ModifyReg(REG_STATUS,BIT_CRYPTO1ON,RESET);
return;
}
unsigned char MIFARE_CARD_EVENTAAAAAAA(void)
{
unsigned char result;
Mifare_Clear_Crypto();
SECTOR = 1;
//for(SECTOR = 0;SECTOR < 16; SECTOR++)
{
BLOCK_NUM = (SECTOR * 4) + BLOCK;
result = Mifare_Auth(KEY_A_M1,SECTOR,KEY_A[SECTOR],PICC_A.UID);
if(result != SUCCESS)
{
SetCW(DISABLE);
printf("-> AUTH ERROR!\r\n");
return result;
}
printf("-> AUTH SUCCESS!\r\n");
for(BLOCK = 0;BLOCK < 3;BLOCK++)
{
BLOCK_NUM = (SECTOR * 4) + BLOCK;
if(BLOCK_NUM == 0)
BLOCK_NUM = 1;
printf("-> SECTOR = %02X\r\n",SECTOR);;
printf("-> BLOCK = %02X\r\n",BLOCK);
printf("-> BLOCK_NUM = %02X\r\n",BLOCK_NUM);
memcpy(BLOCK_DATA,"\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF",16);
result = Mifare_Blockwrite(BLOCK_NUM,BLOCK_DATA);
if(result != SUCCESS)
{
SetCW(DISABLE);
printf("-> WRITE BLOCK ERROR!\r\n");
return result;
}
printf("-> WRITE BLOCK SUCCESS!\r\n");
result = Mifare_Blockread(BLOCK_NUM,BLOCK_DATA);
if(result != SUCCESS)
{
SetCW(DISABLE);
printf("-> READ BLOCK ERROR!\r\n");
return result;
}
printf("-> READ BLOCK = %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X\r\n",BLOCK_DATA[0],BLOCK_DATA[1],BLOCK_DATA[2],BLOCK_DATA[3],BLOCK_DATA[4],BLOCK_DATA[5],BLOCK_DATA[6],BLOCK_DATA[7],BLOCK_DATA[8],BLOCK_DATA[9],BLOCK_DATA[10],BLOCK_DATA[11],BLOCK_DATA[12],BLOCK_DATA[13],BLOCK_DATA[14],BLOCK_DATA[15]);
}
}
SetCW(DISABLE);
return result;
}
unsigned char MIFARE_CARD_EVENT(void)
{
unsigned char result;
Mifare_Clear_Crypto();
SECTOR = 1;
//for(SECTOR = 0;SECTOR < 16; SECTOR++)
{
BLOCK_NUM = (SECTOR * 4) + BLOCK;
result = Mifare_Auth(KEY_A_M1,SECTOR,KEY_A[SECTOR],PICC_A.UID);
if(result != SUCCESS)
{
SetCW(DISABLE);
printf("-> AUTH ERROR!\r\n");
return result;
}
printf("-> AUTH SUCCESS!\r\n");
for(BLOCK = 0;BLOCK < 3;BLOCK++)
{
BLOCK_NUM = (SECTOR * 4) + BLOCK;
if(BLOCK_NUM == 0)
BLOCK_NUM = 1;
printf("-> SECTOR = %02X\r\n",SECTOR);;
printf("-> BLOCK = %02X\r\n",BLOCK);
printf("-> BLOCK_NUM = %02X\r\n",BLOCK_NUM);
memcpy(BLOCK_DATA,"\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF",16);
result = Mifare_Blockwrite(BLOCK_NUM,BLOCK_DATA);
if(result != SUCCESS)
{
SetCW(DISABLE);
printf("-> WRITE BLOCK ERROR!\r\n");
return result;
}
printf("-> WRITE BLOCK SUCCESS!\r\n");
result = Mifare_Blockread(BLOCK_NUM,BLOCK_DATA);
if(result != SUCCESS)
{
SetCW(DISABLE);
printf("-> READ BLOCK ERROR!\r\n");
return result;
}
printf("-> READ BLOCK = %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X\r\n",BLOCK_DATA[0],BLOCK_DATA[1],BLOCK_DATA[2],BLOCK_DATA[3],BLOCK_DATA[4],BLOCK_DATA[5],BLOCK_DATA[6],BLOCK_DATA[7],BLOCK_DATA[8],BLOCK_DATA[9],BLOCK_DATA[10],BLOCK_DATA[11],BLOCK_DATA[12],BLOCK_DATA[13],BLOCK_DATA[14],BLOCK_DATA[15]);
}
}
SetCW(DISABLE);
return result;
}
unsigned char Mifare_LoadKey(unsigned char *mifare_key)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA,mifare_key[0]);
SetReg(REG_FIFODATA,mifare_key[1]);
SetReg(REG_FIFODATA,mifare_key[2]);
SetReg(REG_FIFODATA,mifare_key[3]);
SetReg(REG_FIFODATA,mifare_key[4]);
SetReg(REG_FIFODATA,mifare_key[5]);
SetCommand(CMD_LOADKEY);
DelayMs(1);
GetReg(REG_COMMAND,&reg_data);
if((reg_data & CMD_MASK) == CMD_IDLE)
return SUCCESS;
else
return FAIL;
}
/*****************************************************************************************/
/*<2A><><EFBFBD>ƣ<EFBFBD>Mifare_Auth */
/*<2A><><EFBFBD>ܣ<EFBFBD>Mifare_Auth<74><68>Ƭ<EFBFBD><C6AC>֤ */
/*<2A><><EFBFBD>룺mode<64><65><EFBFBD><EFBFBD>֤ģʽ<C4A3><CABD>0<EFBFBD><30>key A<><41>֤<EFBFBD><D6A4>1<EFBFBD><31>key B<><42>֤<EFBFBD><D6A4><EFBFBD><EFBFBD>sector<6F><72><EFBFBD><EFBFBD>֤<EFBFBD><D6A4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ţ<EFBFBD>0~15<31><35> */
/* *mifare_key<65><79>6<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>֤<EFBFBD><D6A4>Կ<EFBFBD><D4BF><EFBFBD>飻*card_uid<69><64>4<EFBFBD>ֽڿ<D6BD>ƬUID<49><44><EFBFBD><EFBFBD> */
/*<2A><><EFBFBD>: */
/* OK :<3A><>֤<EFBFBD>ɹ<EFBFBD> */
/* ERROR :<3A><>֤ʧ<D6A4><CAA7> */
/*****************************************************************************************/
unsigned char Mifare_Auth(unsigned char key_mode,unsigned char sector,unsigned char *mifare_key,unsigned char *card_uid)
{
unsigned char result,reg_data;
result = Mifare_LoadKey(mifare_key);
if (result != SUCCESS)
return result;
SetCommand(CMD_IDLE);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
if(key_mode == KEY_A_M1)
{
SetReg(REG_FIFODATA,0x60);//60 keyA M1<4D><31>ָ֤<D6A4><D6B8>
ModifyReg(REG_RXTXCON,BIT_SHMODE,DISABLE);
}
if(key_mode == KEY_B_M1)
{
SetReg(REG_FIFODATA,0x61);//61 keyB M1<4D><31>ָ֤<D6A4><D6B8>
ModifyReg(REG_RXTXCON,BIT_SHMODE,DISABLE);
}
SetReg(REG_FIFODATA,sector * 4);//<2F><>֤<EFBFBD><D6A4><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD>0<EFBFBD><30>ַ
SetReg(REG_FIFODATA,card_uid[0]);
SetReg(REG_FIFODATA,card_uid[1]);
SetReg(REG_FIFODATA,card_uid[2]);
SetReg(REG_FIFODATA,card_uid[3]);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_AUTHENT);
DelayMs(5);
GetReg(REG_COMMAND,&reg_data);
if((reg_data & CMD_MASK) == CMD_IDLE)
{
GetReg(REG_STATUS,&reg_data);
if(reg_data & BIT_CRYPTO1ON)//<2F>жϼ<D0B6><CFBC>ܱ<EFBFBD>־λ<D6BE><CEBB>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD>֤<EFBFBD><D6A4><EFBFBD>
return SUCCESS;
}
return FAIL;
}
/*****************************************************************************************/
/*<2A><><EFBFBD>ƣ<EFBFBD>Mifare_Blockset */
/*<2A><><EFBFBD>ܣ<EFBFBD>Mifare_Blockset<65><74>Ƭ<EFBFBD><C6AC>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD> */
/*<2A><><EFBFBD>룺block<63><6B><EFBFBD><EFBFBD>ţ<EFBFBD>*buff<66><66><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD>õ<EFBFBD>4<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD> */
/* */
/*<2A><><EFBFBD>: */
/* OK :<3A><><EFBFBD>óɹ<C3B3> */
/* ERROR :<3A><><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7> */
/*****************************************************************************************/
unsigned char Mifare_Blockset(unsigned char block,unsigned char *data_buff)
{
unsigned char block_data[16],result;
block_data[0] = data_buff[3];
block_data[1] = data_buff[2];
block_data[2] = data_buff[1];
block_data[3] = data_buff[0];
block_data[4] = ~data_buff[3];
block_data[5] = ~data_buff[2];
block_data[6] = ~data_buff[1];
block_data[7] = ~data_buff[0];
block_data[8] = data_buff[3];
block_data[9] = data_buff[2];
block_data[10] = data_buff[1];
block_data[11] = data_buff[0];
block_data[12] = block;
block_data[13] = ~block;
block_data[14] = block;
block_data[15] = ~block;
result = Mifare_Blockwrite(block,block_data);
return result;
}
/*****************************************************************************************/
/*<2A><><EFBFBD>ƣ<EFBFBD>Mifare_Blockread */
/*<2A><><EFBFBD>ܣ<EFBFBD>Mifare_Blockread<61><64>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
/*<2A><><EFBFBD>룺block<63><6B><EFBFBD><EFBFBD>ţ<EFBFBD>0x00~0x3F<33><46><EFBFBD><EFBFBD>buff<66><66>16<31>ֽڶ<D6BD><DAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
/*<2A><><EFBFBD>: */
/* OK :<3A>ɹ<EFBFBD> */
/* ERROR :ʧ<><CAA7> */
/*****************************************************************************************/
unsigned char Mifare_Blockread(unsigned char block,unsigned char *data_buff)
{
unsigned char reg_data,i;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
SetReg(REG_FIFODATA,0x30);//30 <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
SetReg(REG_FIFODATA,block);//<2F><><EFBFBD>ַ
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(2);
GetReg(REG_FIFOLENGTH,&reg_data);
if (reg_data != 16) //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>Ϊ16
return FAIL;
GetReg(REG_ERROR,&reg_data);
if(reg_data & 0x07)
return FAIL;
for(i=0;i<16;i++)
{
GetReg (REG_FIFODATA,&data_buff[i]);
}
return SUCCESS;
}
/*****************************************************************************************/
/*<2A><><EFBFBD>ƣ<EFBFBD>mifare_blockwrite */
/*<2A><><EFBFBD>ܣ<EFBFBD>Mifare<72><65>Ƭд<C6AC><D0B4><EFBFBD><EFBFBD><EFBFBD> */
/*<2A><><EFBFBD>룺block<63><6B><EFBFBD><EFBFBD>ţ<EFBFBD>0x00~0x3F<33><46><EFBFBD><EFBFBD>buff<66><66>16<31>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
/*<2A><><EFBFBD>: */
/* OK :<3A>ɹ<EFBFBD> */
/* ERROR :ʧ<><CAA7> */
/*****************************************************************************************/
unsigned char Mifare_Blockwrite(unsigned char block,unsigned char *data_buff)
{
unsigned char reg_data,i;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
SetReg(REG_FIFODATA,0xA0);//A0 д<><D0B4>ָ<EFBFBD><D6B8>
SetReg(REG_FIFODATA,block);//<2F><><EFBFBD>ַ
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
GetReg(REG_FIFOLENGTH,&reg_data);
if (reg_data != 1) //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>Ϊ1
return FAIL;
GetReg (REG_FIFODATA,&reg_data);
if(reg_data != 0x0A)
return FAIL;
for(i=0;i<16;i++)
{
SetReg(REG_FIFODATA,data_buff[i]);
}
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
GetReg(REG_FIFOLENGTH,&reg_data);
if (reg_data != 1) //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>Ϊ1
return FAIL;
GetReg (REG_FIFODATA,&reg_data);
if(reg_data != 0x0A)
return FAIL;
return SUCCESS;
}
/*****************************************************************************************/
/*<2A><><EFBFBD>ƣ<EFBFBD> */
/*<2A><><EFBFBD>ܣ<EFBFBD>Mifare <20><>Ƭ<EFBFBD><C6AC>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD> */
/*<2A><><EFBFBD>룺block<63><6B><EFBFBD><EFBFBD>ţ<EFBFBD>0x00~0x3F<33><46><EFBFBD><EFBFBD>buff<66><66>4<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
/*<2A><><EFBFBD>: */
/* OK :<3A>ɹ<EFBFBD> */
/* ERROR :ʧ<><CAA7> */
/*****************************************************************************************/
unsigned char Mifare_Blockinc(unsigned char block,unsigned char *data_buff)
{
unsigned char reg_data,i;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
SetReg(REG_FIFODATA,0xC1);//C1 <20><>ֵָ<D6B5><D6B8>
SetReg(REG_FIFODATA,block);//<2F><><EFBFBD>ַ
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
GetReg(REG_FIFOLENGTH,&reg_data);
if (reg_data != 1) //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>Ϊ1
return FAIL;
GetReg (REG_FIFODATA,&reg_data);
if(reg_data != 0x0A)
return FAIL;
for(i=0;i<4;i++)
{
SetReg(REG_FIFODATA,data_buff[i]);
}
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
GetReg(REG_FIFOLENGTH,&reg_data);
if (reg_data != 1) //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>Ϊ1
return FAIL;
GetReg (REG_FIFODATA,&reg_data);
if(reg_data != 0x0A)
return FAIL;
return SUCCESS;
}
/*****************************************************************************************/
/*<2A><><EFBFBD>ƣ<EFBFBD>mifare_blockdec */
/*<2A><><EFBFBD>ܣ<EFBFBD>Mifare <20><>Ƭ<EFBFBD><C6AC>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD> */
/*<2A><><EFBFBD>룺block<63><6B><EFBFBD><EFBFBD>ţ<EFBFBD>0x00~0x3F<33><46><EFBFBD><EFBFBD>buff<66><66>4<EFBFBD>ֽڼ<D6BD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
/*<2A><><EFBFBD>: */
/* OK :<3A>ɹ<EFBFBD> */
/* ERROR :ʧ<><CAA7> */
/*****************************************************************************************/
unsigned char Mifare_Blockdec(unsigned char block,unsigned char *data_buff)
{
unsigned char reg_data,i;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
SetReg(REG_FIFODATA,0xC0);//C0 <20><>ֵָ<D6B5><D6B8>
SetReg(REG_FIFODATA,block);//<2F><><EFBFBD>ַ
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
GetReg(REG_FIFOLENGTH,&reg_data);
if (reg_data != 1) //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>Ϊ1
return FAIL;
GetReg (REG_FIFODATA,&reg_data);
if(reg_data != 0x0A)
return FAIL;
for(i=0;i<4;i++)
{
SetReg(REG_FIFODATA,data_buff[i]);
}
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
GetReg(REG_FIFOLENGTH,&reg_data);
if (reg_data != 1) //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>Ϊ1
return FAIL;
GetReg (REG_FIFODATA,&reg_data);
if(reg_data != 0x0A)
return FAIL;
return SUCCESS;
}
/*****************************************************************************************/
/*<2A><><EFBFBD>ƣ<EFBFBD>mifare_transfer */
/*<2A><><EFBFBD>ܣ<EFBFBD>Mifare <20><>Ƭtransfer<65><72><EFBFBD><EFBFBD> */
/*<2A><><EFBFBD>룺block<63><6B><EFBFBD><EFBFBD>ţ<EFBFBD>0x00~0x3F<33><46> */
/*<2A><><EFBFBD>: */
/* OK :<3A>ɹ<EFBFBD> */
/* ERROR :ʧ<><CAA7> */
/*****************************************************************************************/
unsigned char Mifare_Transfer(unsigned char block)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
SetReg(REG_FIFODATA,0xC1);//C1 Transferָ<72><D6B8>
SetReg(REG_FIFODATA,block);//<2F><><EFBFBD>ַ
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
GetReg(REG_FIFOLENGTH,&reg_data);
if (reg_data != 1) //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>Ϊ1
return FAIL;
GetReg (REG_FIFODATA,&reg_data);
if(reg_data != 0x0A)
return FAIL;
return SUCCESS;
}
/*****************************************************************************************/
/*<2A><><EFBFBD>ƣ<EFBFBD>mifare_restore */
/*<2A><><EFBFBD>ܣ<EFBFBD>Mifare <20><>Ƭrestore<72><65><EFBFBD><EFBFBD> */
/*<2A><><EFBFBD>룺block<63><6B><EFBFBD><EFBFBD>ţ<EFBFBD>0x00~0x3F<33><46> */
/*<2A><><EFBFBD>: */
/* OK :<3A>ɹ<EFBFBD> */
/* ERROR :ʧ<><CAA7> */
/*****************************************************************************************/
unsigned char Mifare_Restore(unsigned char block)
{
unsigned char reg_data,i;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
SetReg(REG_FIFODATA,0xC2);//C1 Transferָ<72><D6B8>
SetReg(REG_FIFODATA,block);//<2F><><EFBFBD>ַ
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
GetReg(REG_FIFOLENGTH,&reg_data);
if (reg_data != 1) //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>Ϊ1
return FAIL;
GetReg (REG_FIFODATA,&reg_data);
if(reg_data != 0x0A)
return FAIL;
for(i=0;i<4;i++)
{
SetReg(REG_FIFODATA,0);
}
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
GetReg(REG_FIFOLENGTH,&reg_data);
if (reg_data != 1) //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>Ϊ1
return FAIL;
GetReg (REG_FIFODATA,&reg_data);
if(reg_data != 0x0A)
return FAIL;
return SUCCESS;
}

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/**
* @file MIFARE.c
* @brief MIFARE Classic 卡应用层驱动实现
* @version 1.0
* @date 2024-05-20
*
* @par 文件作用:
* 该文件是 MIFARE.h 中声明的所有函数的具体实现。它负责处理与
* MIFARE Classic 卡片交互的特定应用层逻辑，如认证、数据读写等。
*/
#include "MIFARE.h"
#include "READER.h"
#include "string.h"
#include "READER_REG.h"
#include "xt_main.h"
//==================================================================================
// 1. 全局变量定义
//==================================================================================
unsigned char SECTOR, BLOCK, BLOCK_NUM;
unsigned char BLOCK_DATA[16]; // 16字节数据缓冲区
// MIFARE 各扇区默认密钥 (Key A 和 Key B)，通常出厂时均为全F
unsigned char KEY_A[16][6] = {
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}, {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},
// ... (共16个扇区的密钥) ...
};
unsigned char KEY_B[16][6] = {
{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}, {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},
// ... (共16个扇区的密钥) ...
};
/**
* @brief 清除芯片内部的 MIFARE 加密状态标志
* @note 每次对新卡操作或认证失败后，都应调用此函数来复位加密状态。
*/
void Mifare_Clear_Crypto(void)
{
ModifyReg(REG_STATUS, BIT_CRYPTO1ON, 0); // 将状态寄存器中的 CRYPTO1ON 位清零
}
/**
* @brief MIFARE 卡操作事件流程 (一个完整的读写示例)
* @return unsigned char 操作结果
*/
unsigned char MIFARE_CARD_EVENT(void)
{
unsigned char result;
Mifare_Clear_Crypto(); // 开始前先清除加密状态
SECTOR = 1; // 示例：操作第1扇区
// 对指定扇区进行Key A认证
result = Mifare_Auth(KEY_A_M1, SECTOR, KEY_A[SECTOR], PICC_A.UID);
if(result != SUCCESS)
{
SetCW(DISABLE); // 认证失败，关闭天线
printf("-> AUTH ERROR!\r\n");
return result;
}
printf("-> AUTH SUCCESS!\r\n");
// 认证成功后，遍历并读写该扇区的数据块 (不含扇区尾块)
for(BLOCK = 0; BLOCK < 3; BLOCK++)
{
BLOCK_NUM = (SECTOR * 4) + BLOCK; // 计算块的绝对地址
// 示例：向块写入全FF
memcpy(BLOCK_DATA, "\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF", 16);
result = Mifare_Blockwrite(BLOCK_NUM, BLOCK_DATA);
if(result != SUCCESS)
{
SetCW(DISABLE);
printf("-> WRITE BLOCK ERROR!\r\n");
return result;
}
printf("-> WRITE BLOCK SUCCESS!\r\n");
// 示例：从块中读出数据
result = Mifare_Blockread(BLOCK_NUM, BLOCK_DATA);
if(result != SUCCESS)
{
SetCW(DISABLE);
printf("-> READ BLOCK ERROR!\r\n");
return result;
}
printf("-> READ BLOCK DATA: ...\r\n"); // 打印读出的数据
}
SetCW(DISABLE);
return result;
}
/**
* @brief 加载6字节密钥到读卡器芯片内部的密钥缓冲器
* @param mifare_key 指向6字节密钥数组的指针
* @return unsigned char 成功或失败
*/
unsigned char Mifare_LoadKey(unsigned char *mifare_key)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
Clear_FIFO();
// 1. 将6字节密钥依次写入FIFO
SetReg(REG_FIFODATA, mifare_key[0]);
SetReg(REG_FIFODATA, mifare_key[1]);
SetReg(REG_FIFODATA, mifare_key[2]);
SetReg(REG_FIFODATA, mifare_key[3]);
SetReg(REG_FIFODATA, mifare_key[4]);
SetReg(REG_FIFODATA, mifare_key[5]);
// 2. 发送加载密钥命令，芯片会自动从FIFO读取密钥
SetCommand(CMD_LOADKEY);
DelayMs(1);
GetReg(REG_COMMAND, &reg_data);
if((reg_data & CMD_MASK) == CMD_IDLE) // 检查命令是否执行完毕
return SUCCESS;
else
return FAIL;
}
/**
* @brief **核心函数**: 对 MIFARE 卡指定扇区进行密码认证
* @param key_mode 认证模式 (KEY_A_M1 或 KEY_B_M1)
* @param sector 要认证的扇区号 (0-15)
* @param mifare_key 指向6字节密钥的指针
* @param card_uid 指向4字节卡片UID的指针 (从寻卡流程中获得)
* @return unsigned char 成功或失败
*/
unsigned char Mifare_Auth(unsigned char key_mode, unsigned char sector, unsigned char *mifare_key, unsigned char *card_uid)
{
unsigned char result, reg_data;
result = Mifare_LoadKey(mifare_key); // 1. 首先将密钥加载到芯片
if (result != SUCCESS)
return result;
SetCommand(CMD_IDLE);
Clear_FIFO();
// 2. 根据认证模式，将认证命令码 (0x60 for KeyA, 0x61 for KeyB) 写入FIFO
if(key_mode == KEY_A_M1)
{
SetReg(REG_FIFODATA, 0x60);
}
else // KEY_B_M1
{
SetReg(REG_FIFODATA, 0x61);
}
// 3. 将要认证的块地址、卡片UID写入FIFO
SetReg(REG_FIFODATA, sector * 4); // MIFARE卡每个扇区4个块，认证扇区内任一地址即可
SetReg(REG_FIFODATA, card_uid[0]);
SetReg(REG_FIFODATA, card_uid[1]);
SetReg(REG_FIFODATA, card_uid[2]);
SetReg(REG_FIFODATA, card_uid[3]);
// 4. 发送认证命令，芯片将自动完成与卡片的三次握手加密认证流程
SetCommand(CMD_AUTHENT);
DelayMs(5);
// 5. 检查认证结果
GetReg(REG_COMMAND, &reg_data);
if((reg_data & CMD_MASK) == CMD_IDLE) // 命令执行完毕
{
GetReg(REG_STATUS, &reg_data);
// 关键: 检查状态寄存器中的 CRYPTO1ON 位是否为1。
// 此位由硬件在认证成功后自动置位。
if(reg_data & BIT_CRYPTO1ON)
return SUCCESS;
}
return FAIL;
}
/**
* @brief 读取一个16字节的数据块
* @param block 要读取的块的绝对地址
* @param data_buff 用于存放读取数据的16字节缓冲区
* @return unsigned char 成功或失败
*/
unsigned char Mifare_Blockread(unsigned char block, unsigned char *data_buff)
{
unsigned char reg_data, i;
SetCommand(CMD_IDLE);
Clear_FIFO();
// 1. 准备读块指令 (命令码 0x30 + 块地址)
SetReg(REG_FIFODATA, 0x30);
SetReg(REG_FIFODATA, block);
ModifyReg(REG_TXCRCCON, BIT_CRCEN, ENABLE); // 读写命令需要CRC
ModifyReg(REG_RXCRCCON, BIT_CRCEN, ENABLE);
// 2. 发送并等待接收
SetCommand(CMD_TRANSCEIVE);
DelayMs(2);
GetReg(REG_FIFOLENGTH, &reg_data);
if (reg_data != 16) // 3. 检查是否收到了完整的16字节数据
return FAIL;
GetReg(REG_ERROR, &reg_data);
if(reg_data & 0x07) // 检查是否有通信错误
return FAIL;
// 4. 从FIFO中循环读出16字节数据
for(i=0; i<16; i++)
{
GetReg(REG_FIFODATA, &data_buff[i]);
}
return SUCCESS;
}
/**
* @brief 写入一个16字节的数据块
* @param block 要写入的块的绝对地址
* @param data_buff 包含要写入的16字节数据的缓冲区
* @return unsigned char 成功或失败
*/
unsigned char Mifare_Blockwrite(unsigned char block, unsigned char *data_buff)
{
unsigned char reg_data, i;
SetCommand(CMD_IDLE);
Clear_FIFO();
// 1. 准备写块指令 (命令码 0xA0 + 块地址)
SetReg(REG_FIFODATA, 0xA0);
SetReg(REG_FIFODATA, block);
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
// 2. 卡片会返回一个ACK (0x0A)，检查是否收到
GetReg(REG_FIFOLENGTH, &reg_data);
if (reg_data != 1)
return FAIL;
GetReg(REG_FIFODATA, &reg_data);
if(reg_data != 0x0A)
return FAIL;
// 3. 收到ACK后，将16字节数据写入FIFO
for(i=0; i<16; i++)
{
SetReg(REG_FIFODATA, data_buff[i]);
}
// 4. 再次发送，将数据写入卡片
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
// 5. 卡片会再次返回一个ACK，检查是否收到
GetReg(REG_FIFOLENGTH, &reg_data);
if (reg_data != 1)
return FAIL;
GetReg(REG_FIFODATA, &reg_data);
if(reg_data != 0x0A)
return FAIL;
return SUCCESS;
}
// ... (值块操作函数的实现: Blockset, Blockinc, Blockdec, Transfer, Restore) ...

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#include "READER.h"
#include "NTAG.h"
#include <string.h>
#include "READER_REG.h"
#include "xt_main.h"
unsigned char PAGE_DATA[16];
unsigned char NTAG_EVENT(void)
{
unsigned char result;
memcpy(PAGE_DATA,"\x01\x02\x03\x04",4);
result = Write_Page(8,PAGE_DATA);
if (result != SUCCESS)
return result;
printf("PAGE 8 Write OK\r\n");
result = Read_Page(8,PAGE_DATA);
printf("PAGE 8 = %02X%02X%02X%02X\r\n",PAGE_DATA[0],PAGE_DATA[1],PAGE_DATA[2],PAGE_DATA[3]);
return result;
}
unsigned char Read_Page(unsigned char page_num,unsigned char *page_data)
{
unsigned char reg_data,i;
SetCommand(CMD_IDLE);
Clear_FIFO();
SetReg(REG_FIFODATA,0x30);
SetReg(REG_FIFODATA,page_num);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
GetReg(REG_ERROR,&reg_data);
if(reg_data & 0x07)
return FAIL;
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 16)
return FAIL;
for(i=0;i<16;i++)
{
GetReg(REG_FIFODATA,&page_data[i]);
}
return SUCCESS;
}
unsigned char Write_Page(unsigned char page_num,unsigned char *page_data)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
Clear_FIFO();
SetReg(REG_FIFODATA,0xA2);
SetReg(REG_FIFODATA,page_num);
SetReg(REG_FIFODATA,page_data[0]);
SetReg(REG_FIFODATA,page_data[1]);
SetReg(REG_FIFODATA,page_data[2]);
SetReg(REG_FIFODATA,page_data[3]);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(5);
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 1)
return FAIL;
GetReg(REG_FIFODATA,&reg_data);
if(reg_data != 0x0A)
return FAIL;
return SUCCESS;
}

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#ifndef _NTAG_H
#define _NTAG_H
extern unsigned char PAGE_DATA[16];
extern unsigned char NTAG_EVENT(void);
extern unsigned char Read_Page(unsigned char page_num,unsigned char *page_data);
extern unsigned char Write_Page(unsigned char page_num,unsigned char *page_data);
#endif

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apps/earphone/94_rfid_stc/READER/READER.c Normal file
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#include "function.h"
#include "board.h"
//#include "fm15l0xx_ll_spi.h"
#include "READER.h"
#include "READER_REG.h"
#include "print.h"
#include "random_generator.h"
#include <stdio.h>
#include "xt_main.h"
struct picc_a_struct PICC_A;
struct picc_b_struct PICC_B;
struct picc_v_struct PICC_V;
struct picc_f_struct PICC_F;
void DelayMs( uint32_t xms );
void DelayUs( uint32_t xus );
void DelayUs( uint32_t xus )
{
int t;
while ( xus-- )
{
t = 5;
while ( t-- )
;
}
}
void DelayMs( uint32_t xms )
{
DelayUs( xms * 1000 );
}
// void Reader_GPIO_Init( void )
// {
/******** 重做GPIO初始化 **********/
// // LL_GPIO_SetPinMode( PD_GPIO, PD_PIN, LL_GPIO_PINxMODE_OUTPUT );//PA7 PD
// //LL_GPIO_EnablePinPullUp( SPI_GPIO, SCK_PIN | MOSI_PIN ); // Enable Pullup
// //xtell注释
// // LL_GPIO_SetPinMode( SPI_GPIO, SCK_PIN, LL_GPIO_PINxMODE_OUTPUT ); // PB1 Digital function - SPI1 SCK
// // LL_GPIO_SetPinMode( SPI_GPIO, MISO_PIN, LL_GPIO_PINxMODE_INPUT ); // PB2 Digital function - SPI1 MISO1
// // LL_GPIO_SetPinMode( SPI_GPIO, MOSI_PIN, LL_GPIO_PINxMODE_OUTPUT ); // PB3 Digital function - SPI1 MOSI
// LL_GPIO_SetPinMode(); //xtell
// SCK_0;
// MOSI_0;
//
// LL_GPIO_SetPinMode(); //xtell
// //xtell注释
// // LL_GPIO_SetPinMode( SPI_GPIO, NSS_PIN, LL_GPIO_PINxMODE_OUTPUT ); // PB0 Digital function - SPI1 NSS1
// PD_0;
// NSS_1;
// }
// unsigned char FM176XX_HardReset(void)
// {
/*************NFC 硬件初始化 重做********************/
// unsigned char reg_data;
// NSS_1;//NSS = 1
// PD_1;//RST = 1
// DelayMs(1);
// PD_0;//RST = 0
// DelayMs(1);
// GetReg(REG_COMMAND,&reg_data);
// if (reg_data != 0x40)
// return FAIL;
// return SUCCESS;
// }
// unsigned char Reader_Set_HPD( unsigned char mode ) //mode = DISABLE <20>˳<EFBFBD>HPDģʽ <20><>mode = ENABLE <20><><EFBFBD><EFBFBD>HPDģʽ
// {
// if ( mode == ENABLE )
// {
// DelayMs( 1 ); //<2F><>ʱ1ms
// /******设置一个GPIO输出高*******xtell******/
// //PD_1; // PD = 1
// P34 = 1;
// }
// else
// {
// /******设置一个GPIO输出低*************/
// //PD_0; //PD = 0
// P34 =0;
// DelayMs( 1 ); //<2F><>ʱ1ms<6D><73><EFBFBD>ȴ<EFBFBD>Reader<65><72><EFBFBD><EFBFBD>
// }
// return (mode);
// }
//***********************************************
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD>GetReg(unsigned char addr,unsigned char *regdata)
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܣ<EFBFBD><DCA3><EFBFBD>ȡ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
//<2F><>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>addr:Ŀ<><C4BF>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ regdata:<3A><>ȡ<EFBFBD><C8A1>ֵ
//<2F><><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>unsigned char TRUE<55><45><EFBFBD><EFBFBD>ȡ<EFBFBD>ɹ<EFBFBD> FALSE:ʧ<><CAA7>
//***********************************************
// 从FM17660 读取数据时，BIT7 置 1
// unsigned char GetReg(unsigned char address,unsigned char *reg_data)
// {
// unsigned char spi_data,i;
// NSS_0; //NSS = 0;
// spi_data = (address << 1) | 0x01;
// for(i=0;i<8;i++)
// {
// if(spi_data & 0x80)
// MOSI_1;
// else
// MOSI_0;
// SCK_1;
// spi_data = spi_data<<1;
// SCK_0;
// }
// MOSI_0;
// *reg_data = 0;
// for(i=0;i<8;i++)
// {
// *reg_data = *reg_data<<1;
// SCK_1;
// if(LL_GPIO_ReadInputPort(SPI_GPIO)& MISO_PIN)
// *reg_data = *reg_data | 0x01;
// SCK_0;
// }
// NSS_1; //NSS = 1;
// return SUCCESS;
// }
//***********************************************
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD>SetReg(unsigned char addr,unsigned char* regdata)
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܣ<EFBFBD>д<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
//<2F><>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>addr:Ŀ<><C4BF>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ regdata:Ҫд<D2AA><D0B4><EFBFBD>ֵ
//<2F><><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>unsigned char TRUE<55><45>д<EFBFBD>ɹ<EFBFBD> FALSE:дʧ<D0B4><CAA7>
//***********************************************
// unsigned char SetReg(unsigned char address,unsigned char reg_data)
// {
// unsigned char spi_data,i;
// NSS_0; //NSS = 0;
// spi_data = (address << 1) & 0xFE;
// for(i=0;i<8;i++)
// {
// if(spi_data & 0x80)
// MOSI_1;
// else
// MOSI_0;
// SCK_1;
// spi_data = spi_data<<1;
// SCK_0;
// }
// MOSI_0;
// spi_data = reg_data;
// for(i=0;i<8;i++)
// {
// if(spi_data & 0x80)
// MOSI_1;
// else
// MOSI_0;
// SCK_1;
// spi_data = spi_data<<1;
// SCK_0;
// }
// SCK_0;
// MOSI_0;
// NSS_1; //NSS = 1;
// return SUCCESS;
// }
void ModifyReg( unsigned char reg_address, unsigned char mask, unsigned char set )
{
unsigned char reg_data;
// Uart1SendString(" ModifyReg begin ");
GetReg( reg_address, &reg_data );
if ( set )
{
reg_data |= mask;
}
else
{
reg_data &= ~mask;
}
SetReg( reg_address, reg_data );
return;
}
unsigned char SetCommand(unsigned char command)
{
unsigned char result;
result = SetReg(REG_COMMAND,CMD_MASK & command);
return result;
}
void SetTimer(unsigned int timeout) //
{
unsigned long prescale = 1;
unsigned long t,fc;
fc = timeout*13560;
t = fc;
while(fc > 65535)
{
prescale*=2;
fc = t/prescale;
if(fc*prescale != t)
fc++;
}
if(prescale>1)
{
SetReg(REG_T0CONTROL, BIT_TSTOP_RX | BIT_TSTART_TX | BIT_TAUTORESTARTED | VALUE_TCLK_1356_MHZ );
SetReg(REG_T0RELOADHI,(u8)(fc>>8));
SetReg(REG_T0RELOADLO,(u8)fc);
SetReg(REG_T1CONTROL, BIT_TSTOP_RX | BIT_TSTART_TX | VALUE_TCLK_T0 );
SetReg(REG_T1RELOADHI,(u8)(prescale>>8));
SetReg(REG_T1RELOADLO,(u8)prescale);
}
else
{
SetReg(REG_T1CONTROL, BIT_TSTOP_RX | BIT_TSTART_TX | VALUE_TCLK_1356_MHZ );
SetReg(REG_T1RELOADHI,(u8)(fc>>8));
SetReg(REG_T1RELOADLO,(u8)fc);
}
}
unsigned char SetCW(unsigned char mode)
{
unsigned char result;
if(mode == ENABLE)
{
ModifyReg(REG_COMMAND,BIT_MODEMOFF,DISABLE);
ModifyReg(REG_TXMODE,BIT0 | BIT1,ENABLE);
}
else
{
ModifyReg(REG_COMMAND,BIT_MODEMOFF,ENABLE);
ModifyReg(REG_TXMODE,BIT0 | BIT1,DISABLE);
}
DelayMs(5);
return result;
}
void Clear_FIFO(void)
{
unsigned char fifolength;
GetReg(REG_FIFOLENGTH,&fifolength);
if((fifolength) != 0) //FIFO<46><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>գ<EFBFBD><D5A3><EFBFBD>FLUSH FIFO
{
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE);
}
return ;
}
unsigned char LoadProtocol(unsigned char p_rx,unsigned char p_tx)
{
unsigned char reg_data = 0;
// Uart1SendString(" LoadProtocol begin ");
SetCommand(CMD_IDLE); //
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA,p_rx);//Rx
SetReg(REG_FIFODATA,p_tx);//Tx
SetCommand(CMD_LOADPROTOCOL);
DelayMs(2);
GetReg(REG_COMMAND,&reg_data);
if(reg_data != CMD_IDLE)
return FAIL;
return SUCCESS;
}
void SetParity(unsigned char state)
{
// Uart1SendString(" SetParity begin");
ModifyReg(REG_FRAMECON,BIT_TXPARITYEN|BIT_RXPARITYEN,state);
}
unsigned char ReaderA_Initial(void)
{
// Uart1SendString(" ReaderA_Initial begin");
LoadProtocol(RX_TYPEA_106,TX_TYPEA_106);
ModifyReg(REG_TXMODE,BIT2,ENABLE);//FORCE 100ask ENABLE
SetReg(REG_TXAMP,AMPLITUDE_A);
SetReg(REG_TXCON,0x00);
SetReg(REG_RXANA,(HPCF_A<<3)|GAIN_A);
SetReg(0x5F,0x08);
SetReg(REG_THNSET,0xFF);
SetReg(REG_THNMIN,0xC0);
SetReg(REG_RXTXCON,0x80);//
SetParity(ENABLE);
SetReg(REG_STATUS,0);//<2F><><EFBFBD>Cry1Onλ
// Uart1SendString(" ReaderA_Initial end");
return SUCCESS;
}
unsigned char ReaderB_Initial(void)
{
LoadProtocol(RX_TYPEB_106,TX_TYPEB_106);
ModifyReg(REG_TXMODE,BIT2,DISABLE);//FORCE 100ask DISABLE
SetReg(REG_TXAMP,AMPLITUDE_B);
SetReg(REG_TXCON,MODULATION_B);
SetReg(REG_RXANA,(HPCF_B<<3)|GAIN_B);
SetReg(0x5F,0x08);
SetReg(REG_THNSET,0xFF);
SetReg(REG_THNMIN,0xC0);
SetReg(REG_RXTXCON,0x80);//
return SUCCESS;
}
unsigned char ReaderV_Initial(void)
{
LoadProtocol(RX_TYPEV_26,RX_TYPEV_26);
ModifyReg(REG_RXANA,BIT3|BIT2|BIT1|BIT0,DISABLE);
ModifyReg(REG_RXANA,(HPCF_V<<3)|GAIN_V,ENABLE);//39h
SetParity(DISABLE);
SetReg(REG_TXAMP,AMPLITUDE_V);
SetReg(REG_TXCON,MODULATION_V);
SetReg(REG_TXI,0x06);
SetReg(REG_THNSET,0xFF);
SetReg(REG_THNMIN,0x80);
SetReg(REG_THNADJ,0x08);
SetReg(REG_RXTXCON,0);
return SUCCESS;
}
unsigned char ReaderF_Initial(void)
{
ModifyReg(REG_MISC, 0x04,ENABLE);
LoadProtocol(RX_FELICA_212,TX_FELICA_212);
SetReg(REG_TXAMP,AMPLITUDE_F); //
SetReg(REG_TXCON,MODULATION_F);
ModifyReg(REG_RXANA,BIT3|BIT2|BIT1|BIT0,DISABLE);
ModifyReg(REG_RXANA,(HPCF_F<<3)|GAIN_F,ENABLE);//39h
SetParity(DISABLE);
SetReg(REG_THNSET,0xFF);
SetReg(REG_THNMIN,0x80);
SetReg(REG_THNADJ,0x08);
ModifyReg(REG_MISC, 0x04,DISABLE);
return SUCCESS;
}
unsigned char ReaderA_Wakeeup(struct picc_a_struct *picc_a)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x0F);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA,RF_CMD_WUPA);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,DISABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(2);
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 2)
return FAIL;
GetReg(REG_FIFODATA,&picc_a->ATQA[0]);
GetReg(REG_FIFODATA,&picc_a->ATQA[1]);
return SUCCESS;
}
unsigned char ReaderA_Request(struct picc_a_struct *picc_a)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x0F);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA,RF_CMD_REQA);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,DISABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE);
SetCommand(CMD_TRANSCEIVE);
// DelayMs(2);
Delay1ms();
Delay1ms();
GetReg(REG_FIFOLENGTH,&reg_data);
// Uart1SendString("REG_FIFOLENGTH data=");
// printHex(reg_data);
if(reg_data != 2)
return FAIL;
GetReg(REG_FIFODATA,&picc_a->ATQA[0]);
GetReg(REG_FIFODATA,&picc_a->ATQA[1]);
return SUCCESS;
}
unsigned char ReaderA_Anticoll(struct picc_a_struct *picc_a)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA,RF_CMD_ANTICOLL[picc_a->CASCADE_LEVEL]);
SetReg(REG_FIFODATA,0x20);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,DISABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,DISABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(2);
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 5)
return FAIL;
GetReg(REG_FIFODATA,&picc_a->UID[picc_a->CASCADE_LEVEL*4]);
GetReg(REG_FIFODATA,&picc_a->UID[picc_a->CASCADE_LEVEL*4+1]);
GetReg(REG_FIFODATA,&picc_a->UID[picc_a->CASCADE_LEVEL*4+2]);
GetReg(REG_FIFODATA,&picc_a->UID[picc_a->CASCADE_LEVEL*4+3]);
GetReg(REG_FIFODATA,&picc_a->BCC[picc_a->CASCADE_LEVEL]);
if( (picc_a->UID[picc_a->CASCADE_LEVEL*4] ^ picc_a->UID[picc_a->CASCADE_LEVEL*4+1] ^ picc_a->UID[picc_a->CASCADE_LEVEL*4+2] ^ picc_a->UID[picc_a->CASCADE_LEVEL*4+3]) == picc_a->BCC[picc_a->CASCADE_LEVEL])
return SUCCESS;
return FAIL;
}
unsigned char ReaderA_Select(struct picc_a_struct *picc_a)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA,RF_CMD_ANTICOLL[picc_a->CASCADE_LEVEL]);
SetReg(REG_FIFODATA,0x70);
SetReg(REG_FIFODATA,picc_a->UID[picc_a->CASCADE_LEVEL*4]);
SetReg(REG_FIFODATA,picc_a->UID[picc_a->CASCADE_LEVEL*4+1]);
SetReg(REG_FIFODATA,picc_a->UID[picc_a->CASCADE_LEVEL*4+2]);
SetReg(REG_FIFODATA,picc_a->UID[picc_a->CASCADE_LEVEL*4+3]);
SetReg(REG_FIFODATA,picc_a->BCC[picc_a->CASCADE_LEVEL]);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(2);
GetReg(REG_ERROR,&reg_data);
if((reg_data & 0x0F)!=0)
return FAIL;
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 1)
return FAIL;
GetReg(REG_FIFODATA,&picc_a->SAK [picc_a->CASCADE_LEVEL]);
return SUCCESS;
}
unsigned char ReaderA_CardActivate(struct picc_a_struct *picc_a)
{
unsigned char result,cascade_level;
result = ReaderA_Request(picc_a);//
if (result != SUCCESS)
return result;
if ((picc_a->ATQA[0]&0xC0)==0x00) //1<><31>UID
{
cascade_level = 1;
picc_a->UID_Length = 4;
}
if ((picc_a->ATQA[0]&0xC0)==0x40) //2<><32>UID
{
cascade_level = 2;
picc_a->UID_Length = 8;
}
if ((picc_a->ATQA[0]&0xC0)==0x80) //3<><33>UID
{
cascade_level = 3;
picc_a->UID_Length = 12;
}
for (picc_a->CASCADE_LEVEL = 0; picc_a->CASCADE_LEVEL < cascade_level; picc_a->CASCADE_LEVEL++)
{
result = ReaderA_Anticoll(picc_a);//
if (result != SUCCESS)
return result;
result = ReaderA_Select(picc_a);//
if (result != SUCCESS)
return result;
}
picc_a->CASCADE_LEVEL--;
return result;
}
unsigned char ReaderB_Wakeup(struct picc_b_struct *picc_b)
{
unsigned char reg_data,i;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA, 0x05); //APf
SetReg(REG_FIFODATA, 0x00); //AFI (00:for all cards)
SetReg(REG_FIFODATA, 0x08); //PARAM(REQB,Number of slots =0)
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(10);
GetReg(REG_ERROR,&reg_data);
if((reg_data & 0x0F)!=0)//<2F>жϴ<D0B6><CFB4><EFBFBD><EFBFBD>־
return FAIL;
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 12)//<2F>жϽ<D0B6><CFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
return FAIL;
for(i=0;i<12;i++)
GetReg(REG_FIFODATA,&picc_b->ATQB [i]);
memcpy(picc_b->PUPI,picc_b->ATQB + 1,4);
memcpy(picc_b->APPLICATION_DATA,picc_b->ATQB + 6,4);
memcpy(picc_b->PROTOCOL_INF,picc_b->ATQB + 10,3);
return SUCCESS;
}
unsigned char ReaderB_Request(struct picc_b_struct *picc_b)
{
unsigned char reg_data,i;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA, 0x05); //APf
SetReg(REG_FIFODATA, 0x00); //AFI (00:for all cards)
SetReg(REG_FIFODATA, 0x00); //PARAM(REQB,Number of slots =0)
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(10);
GetReg(REG_ERROR,&reg_data);
if((reg_data & 0x0F)!=0)
return FAIL;
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 12)
return FAIL;
for(i=0;i<12;i++)
GetReg(REG_FIFODATA,&picc_b->ATQB [i]);
memcpy(picc_b->PUPI,picc_b->ATQB + 1,4);
memcpy(picc_b->APPLICATION_DATA,picc_b->ATQB + 6,4);
memcpy(picc_b->PROTOCOL_INF,picc_b->ATQB + 10,3);
return SUCCESS;
}
unsigned char ReaderB_Attrib(struct picc_b_struct *picc_b)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA, 0x1D); //
SetReg(REG_FIFODATA, picc_b->PUPI[0]); //
SetReg(REG_FIFODATA, picc_b->PUPI[1]); //
SetReg(REG_FIFODATA, picc_b->PUPI[2]); //
SetReg(REG_FIFODATA, picc_b->PUPI[3]); //
SetReg(REG_FIFODATA, 0x00); //Param1
SetReg(REG_FIFODATA, 0x08); //Param2 BIT0~BIT3 Frame Size 0 = 16, 1 = 24, 2 = 32, 3 = 40, 4 = 48, 5 = 64, 6 = 96, 7 = 128, 8 = 256
//Param2 BIT4~BIT5 TX BaudRate BIT6~BIT7 RX BaudRate,00 = 106Kbps, 01 = 212Kbps, 10 = 424Kbps, 11 = 848Kbps
SetReg(REG_FIFODATA, 0x01); //COMPATIBLE WITH 14443-4
SetReg(REG_FIFODATA, 0x01); //CID:01
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(10);
GetReg(REG_ERROR,&reg_data);
if((reg_data & 0x0F)!=0)
return FAIL;
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 1)
return FAIL;
GetReg(REG_FIFODATA,&reg_data);
picc_b->CID = reg_data & 0x0F;
return SUCCESS;
}
unsigned char ReaderB_Halt(struct picc_b_struct *picc_b)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA, 0x50); //
SetReg(REG_FIFODATA, picc_b->PUPI[0]); //
SetReg(REG_FIFODATA, picc_b->PUPI[1]); //
SetReg(REG_FIFODATA, picc_b->PUPI[2]); //
SetReg(REG_FIFODATA, picc_b->PUPI[3]); //
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(10);
GetReg(REG_ERROR,&reg_data);
if((reg_data & 0x0F)!=0)
return FAIL;
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 1)
return FAIL;
GetReg(REG_FIFODATA,&reg_data);
*picc_b->Answer_to_HALT = reg_data & 0x0F;
return SUCCESS;
}
unsigned char ReaderB_Get_SN(struct picc_b_struct *picc_b)
{
unsigned char reg_data,i;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA, 0x00); //
SetReg(REG_FIFODATA, 0x36); //
SetReg(REG_FIFODATA, 0x00); //
SetReg(REG_FIFODATA, 0x00); //
SetReg(REG_FIFODATA, 0x08); //
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(10);
GetReg(REG_ERROR,&reg_data);
if((reg_data & 0x0F)!=0)
return FAIL;
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 10)
return FAIL;
for(i=0;i<8;i++)
GetReg(REG_FIFODATA,&picc_b->SN[i]);
return SUCCESS;
}
unsigned char ReaderV_Inventory(struct picc_v_struct *picc_v)
{
unsigned char reg_data,i;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA, 0x26); //
SetReg(REG_FIFODATA, 0x01);
SetReg(REG_FIFODATA, 0x00);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(10);
GetReg(REG_ERROR,&reg_data);
if((reg_data & 0x0F)!=0)
return FAIL;
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 10)
return FAIL;
GetReg(REG_FIFODATA,&picc_v->RESPONSE );
GetReg(REG_FIFODATA,&reg_data);
for(i = 0;i < 8; i++)
{
GetReg(REG_FIFODATA,&picc_v->UID[i]);
}
return SUCCESS;
}
unsigned char ReaderV_Select(struct picc_v_struct *picc_v)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA, 0x22);
SetReg(REG_FIFODATA, 0x25); //
SetReg(REG_FIFODATA, picc_v->UID[0]);
SetReg(REG_FIFODATA, picc_v->UID[1]);
SetReg(REG_FIFODATA, picc_v->UID[2]);
SetReg(REG_FIFODATA, picc_v->UID[3]);
SetReg(REG_FIFODATA, picc_v->UID[4]);
SetReg(REG_FIFODATA, picc_v->UID[5]);
SetReg(REG_FIFODATA, picc_v->UID[6]);
SetReg(REG_FIFODATA, picc_v->UID[7]);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(10);
GetReg(REG_ERROR,&reg_data);
if((reg_data & 0x0F)!=0)
return FAIL;
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 1)
return FAIL;
GetReg(REG_FIFODATA,&picc_v->RESPONSE );
return SUCCESS;
}
unsigned char ReaderV_ReadSingleBlock(unsigned char block_num,struct picc_v_struct *picc_v)
{
unsigned char reg_data,i;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA,0x12);
SetReg(REG_FIFODATA, 0x20); //
SetReg(REG_FIFODATA, block_num);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(10);
GetReg(REG_ERROR,&reg_data);
if((reg_data & 0x0F)!=0)
return FAIL;
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 5)
return FAIL;
GetReg(REG_FIFODATA,&picc_v->RESPONSE );
for(i = 0;i < 4; i++)
{
GetReg(REG_FIFODATA,&picc_v->BLOCK_DATA[i]);
}
return SUCCESS;
}
unsigned char ReaderV_WriteSingleBlock(unsigned char block_num,struct picc_v_struct *picc_v)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA,0x02);
SetReg(REG_FIFODATA, 0x21); //
SetReg(REG_FIFODATA, block_num);
SetReg(REG_FIFODATA, picc_v->BLOCK_DATA[0]);
SetReg(REG_FIFODATA, picc_v->BLOCK_DATA[1]);
SetReg(REG_FIFODATA, picc_v->BLOCK_DATA[2]);
SetReg(REG_FIFODATA, picc_v->BLOCK_DATA[3]);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(10);
GetReg(REG_ERROR,&reg_data);
if((reg_data & 0x0F)!=0)
return FAIL;
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 1)
return FAIL;
GetReg(REG_FIFODATA,&picc_v->RESPONSE );
return SUCCESS;
}
unsigned char ReaderF_Inventory(struct picc_f_struct *picc_f)
{
unsigned char reg_data,i;
SetCommand(CMD_IDLE);
SetReg(REG_TXDATANUM,0x08);
ModifyReg(REG_FIFOCONTROL,BIT_FIFOFLUSH,ENABLE); //Clear FIFO
SetReg(REG_FIFODATA, 0x06);
SetReg(REG_FIFODATA, 0x00); //
SetReg(REG_FIFODATA, 0xFF);
SetReg(REG_FIFODATA, 0xFF);
SetReg(REG_FIFODATA, 0x10);
SetReg(REG_FIFODATA, 0x00);
ModifyReg(REG_TXCRCCON, BIT_CRCEN,ENABLE);
ModifyReg(REG_RXCRCCON, BIT_CRCEN,ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(10);
GetReg(REG_ERROR,&reg_data);
if((reg_data & 0x0F)!=0)
return FAIL;
GetReg(REG_FIFOLENGTH,&reg_data);
if(reg_data != 18)
return FAIL;
GetReg(REG_FIFODATA,&reg_data);
GetReg(REG_FIFODATA,&reg_data);
for(i = 0;i < 8; i++)
{
GetReg(REG_FIFODATA,&picc_f->UID[i]);
}
return SUCCESS;
}

157
apps/earphone/94_rfid_stc/READER/READER.h Normal file
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@ -0,0 +1,157 @@
#ifndef _READER_H
#define _READER_H
// #include "fm15l0xx_ll_gpio.h"
#include "function.h"
static const unsigned char RF_CMD_REQA = 0x26;
static const unsigned char RF_CMD_WUPA = 0x52;
static const unsigned char RF_CMD_ANTICOLL[3] = {0x93,0x95,0x97} ;
static const unsigned char RF_CMD_SELECT[3] = {0x93,0x95,0x97} ;
static const unsigned char RF_CMD_KEYA = 0x60;
static const unsigned char RF_CMD_KEYB = 0x61;
struct picc_b_struct
{
unsigned char ATQB[12];//REQBӦ<42><D3A6>
unsigned char PUPI[4];
unsigned char APPLICATION_DATA[4];
unsigned char PROTOCOL_INF[3];
unsigned char CID;//ATTRIBӦ<42><D3A6>
unsigned char Answer_to_HALT[1];//HALTӦ<54><D3A6>
unsigned char SN[8];//<2F><><EFBFBD><EFBFBD>֤SN<53><4E><EFBFBD><EFBFBD>
};
extern struct picc_b_struct PICC_B;
struct picc_a_struct
{
unsigned char ATQA[2];
unsigned char CASCADE_LEVEL;
unsigned char UID_Length;
unsigned char UID[15];
unsigned char BCC[3];
unsigned char SAK[3];
};
extern struct picc_a_struct PICC_A;
struct picc_v_struct
{
unsigned char UID[8];
unsigned char RESPONSE;
unsigned char BLOCK_DATA[4];
};
extern struct picc_v_struct PICC_V;
struct picc_f_struct
{
unsigned char UID[8];
};
extern struct picc_f_struct PICC_F;
//<2F><><EFBFBD>ղ<EFBFBD><D5B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> TYPE A
#define GAIN_A 7 //<2F><><EFBFBD>÷<EFBFBD>Χ0~7
#define HPCF_A 3 //<2F><><EFBFBD>÷<EFBFBD>Χ0~7
#define AMPLITUDE_A 255 //<2F><><EFBFBD>÷<EFBFBD>Χ0~255
//<2F><><EFBFBD>ղ<EFBFBD><D5B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> TYPE B
#define GAIN_B 7 //<2F><><EFBFBD>÷<EFBFBD>Χ0~7
#define HPCF_B 3 //<2F><><EFBFBD>÷<EFBFBD>Χ0~7
#define AMPLITUDE_B 255 //<2F><><EFBFBD>÷<EFBFBD>Χ0~255<35><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵԽ<D6B5><D4BD><EFBFBD>ز<EFBFBD>Խ<EFBFBD><D4BD>
#define MODULATION_B 100//<2F><><EFBFBD>÷<EFBFBD>Χ0~255,<2C><><EFBFBD><EFBFBD>ֵԽС<D4BD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD>
//<2F><><EFBFBD>ղ<EFBFBD><D5B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> TYPE V
#define GAIN_V 7//<2F><><EFBFBD>÷<EFBFBD>Χ0~7
#define HPCF_V 4//<2F><><EFBFBD>÷<EFBFBD>Χ0~7
#define AMPLITUDE_V 255 //<2F><><EFBFBD>÷<EFBFBD>Χ0~255<35><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵԽ<D6B5><D4BD><EFBFBD>ز<EFBFBD>Խ<EFBFBD><D4BD>
#define MODULATION_V 10 //<2F><><EFBFBD>÷<EFBFBD>Χ0~255,<2C><><EFBFBD><EFBFBD>ֵԽС<D4BD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD>
//<2F><><EFBFBD>ղ<EFBFBD><D5B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> TYPE F
#define GAIN_F 7//<2F><><EFBFBD>÷<EFBFBD>Χ0~7
#define HPCF_F 4//<2F><><EFBFBD>÷<EFBFBD>Χ0~7
#define AMPLITUDE_F 255 //<2F><><EFBFBD>÷<EFBFBD>Χ0~255<35><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵԽ<D6B5><D4BD><EFBFBD>ز<EFBFBD>Խ<EFBFBD><D4BD>
#define MODULATION_F 100//<2F><><EFBFBD>÷<EFBFBD>Χ0~255,<2C><><EFBFBD><EFBFBD>ֵԽС<D4BD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD>
#define SPI_GPIO GPIOB
#define SCK_PIN LL_GPIO_Pin1//PB1
#define MISO_PIN LL_GPIO_Pin2//PB2
#define MOSI_PIN LL_GPIO_Pin3//PB3
#define NSS_PIN LL_GPIO_Pin0//PB0
#define SCK_0 0//LL_GPIO_ResetOutputPin( SPI_GPIO, SCK_PIN )
#define SCK_1 0//LL_GPIO_SetOutputPin( SPI_GPIO, SCK_PIN )
#define MOSI_0 0//LL_GPIO_ResetOutputPin( SPI_GPIO, MOSI_PIN )
#define MOSI_1 0//LL_GPIO_SetOutputPin( SPI_GPIO, MOSI_PIN )
#define PD_GPIO GPIOA
#define PD_PIN LL_GPIO_Pin7//PA7
#define NSS_0 0//LL_GPIO_ResetOutputPin( SPI_GPIO, NSS_PIN )
#define NSS_1 0//LL_GPIO_SetOutputPin( SPI_GPIO, NSS_PIN )
#define PD_0 0//LL_GPIO_ResetOutputPin( PD_GPIO, PD_PIN )
#define PD_1 0//LL_GPIO_SetOutputPin( PD_GPIO, PD_PIN )
extern void DelayMs( uint32_t xms );
extern void DelayUs( uint32_t xus );
void Reader_GPIO_Init( void );
// extern unsigned char Reader_Set_HPD( unsigned char mode );
extern unsigned char FM176XX_HardReset(void);
// extern unsigned char Reader_Set_HPD( unsigned char mode ) ;
// extern unsigned char SetReg(unsigned char address,unsigned char reg_data);
// extern unsigned char GetReg(unsigned char address,unsigned char *reg_data);
extern void ModifyReg( unsigned char reg_address, unsigned char mask, unsigned char set );
extern void Clear_FIFO(void);
extern unsigned char SetCommand(unsigned char command);
extern void SetParity(unsigned char state);
extern void SetTimer(unsigned int timeout);
extern unsigned char SetCW(unsigned char mode);
extern unsigned char ReaderA_Initial(void);
extern unsigned char ReaderB_Initial(void);
extern unsigned char ReaderV_Initial(void);
extern unsigned char ReaderF_Initial(void);
extern unsigned char ReaderA_Wakeeup(struct picc_a_struct *picc_a);
extern unsigned char ReaderA_Request(struct picc_a_struct *picc_a);
extern unsigned char ReaderA_Anticoll(struct picc_a_struct *picc_a);
extern unsigned char ReaderA_Select(struct picc_a_struct *picc_a);
extern unsigned char ReaderA_CardActivate(struct picc_a_struct *picc_a);
extern unsigned char ReaderB_Wakeup(struct picc_b_struct *picc_b);
extern unsigned char ReaderB_Request(struct picc_b_struct *picc_b);
extern unsigned char ReaderB_Attrib(struct picc_b_struct *picc_b);
extern unsigned char ReaderB_Halt(struct picc_b_struct *picc_b);
extern unsigned char ReaderB_Get_SN(struct picc_b_struct *picc_b);
extern unsigned char ReaderV_Inventory(struct picc_v_struct *picc_v);
extern unsigned char ReaderV_Select(struct picc_v_struct *picc_v);
extern unsigned char ReaderV_ReadSingleBlock(unsigned char block_num,struct picc_v_struct *picc_v);
extern unsigned char ReaderV_WriteSingleBlock(unsigned char block_num,struct picc_v_struct *picc_v);
extern unsigned char ReaderF_Inventory(struct picc_f_struct *picc_f);
#endif

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/*********************************************************************
* *
* Copyright (c) 2010 Shanghai FuDan MicroElectronic Inc, Ltd. *
* All rights reserved. Licensed Software Material. *
* *
* Unauthorized use, duplication, or distribution is strictly *
* prohibited by law. *
* *
**********************************************************************/
#ifndef _READER_REG_H
#define _READER_REG_H
#define REG_COMMAND 0x00 //
#define REG_HOSTCTRL 0x01 //
#define REG_FIFOCONTROL 0x02 //
#define REG_WATERLEVEL 0x03 //
#define REG_FIFOLENGTH 0x04 //
#define REG_FIFODATA 0x05 //
#define REG_IRQ0 0x06 //
#define REG_IRQ1 0x07 //
#define REG_IRQ0EN 0x08 //
#define REG_IRQ1EN 0x09 //
#define REG_ERROR 0x0A //
#define REG_STATUS 0x0B //
#define REG_RXBITCTRL 0x0C //
#define REG_RXCOLL 0x0D //
#define REG_TCONTROL 0x0E //
#define REG_T0CONTROL 0x0F //
#define REG_T0RELOADHI 0x10 //
#define REG_T0RELOADLO 0x11 //
#define REG_T0COUNTERVALHI 0x12 //
#define REG_T0COUNTERVALLO 0x13 //
#define REG_T1CONTROL 0x14 //
#define REG_T1RELOADHI 0x15 //
#define REG_T1RELOADLO 0x16 //
#define REG_T1COUNTERVALHI 0x17 //
#define REG_T1COUNTERVALLO 0x18 //
#define REG_T2CONTROL 0x19 //
#define REG_T2RELOADHI 0x1A //
#define REG_T2RELOADLO 0x1B //
#define REG_T2COUNTERVALHI 0x1C //
#define REG_T2COUNTERVALLO 0x1D //
#define REG_T3CONTROL 0x1E //
#define REG_T3RELOADHI 0x1F //
#define REG_T3RELOADLO 0x20 //
#define REG_T3COUNTERVALHI 0x21 //
#define REG_T3COUNTERVALLO 0x22 //
#define REG_T4CONTROL 0x23 //
#define REG_T4RELOADHI 0x24 //
#define REG_T4RELOADLO 0x25 //
#define REG_T4COUNTERVALHI 0x26 //
#define REG_T4COUNTERVALLO 0x27 //
#define REG_TXMODE 0x28
#define REG_TXAMP 0x29
#define REG_TXCON 0x2A //
#define REG_TXI 0x2B //
#define REG_TXCRCCON 0x2C //
#define REG_RXCRCCON 0x2D //
#define REG_TXDATANUM 0x2E
#define REG_TXMODWIDTH 0x2F //
#define REG_TXSYM10BURSTLEN 0x30 //
#define REG_TXWAITCTRL 0x31 //
#define REG_TXWAITLO 0x32 //
#define REG_FRAMECON 0x33 //
#define REG_RXSOFD 0x34 //
#define REG_RXCTRL 0x35 //
#define REG_RXWAIT 0x36 //
#define REG_RXTHRESHOLD 0x37 //
#define REG_RCV 0x38 //
#define REG_RXANA 0x39 //
#define REG_LPCD_OPTIONS 0x3A //
#define REG_SERIALSPEED 0x3B //
#define REG_LFO_TRIMM 0x3C //
#define REG_CLKOUT_CTRL 0x3D //
#define REG_LPCD_THRESHOLD 0x3E //
#define REG_LPCD_QMIN 0x3F //
#define REG_LPCD_QMAX 0x40
#define REG_LPCD_IMIN 0x41
#define REG_LPCD_RESULT_I 0x42
#define REG_LPCD_RESULT_Q 0x43
#define REG_THNADJ 0x5F
#define REG_THNSET 0x61
#define REG_THNMIN 0x62
#define REG_DSP_CTRL1 0x64
#define REG_MISC 0x75
#define REG_RXTXCON 0x77
#define REG_ERROREXT 0x7E
#define REG_VERSION 0x7F
#define CMD_MASK 0x1F
#define CMD_IDLE 0x00
#define CMD_LPCD 0x01
#define CMD_LOADKEY 0x02
#define CMD_AUTHENT 0x03
#define CMD_RECEIVE 0x05
#define CMD_TRANSMIT 0x06
#define CMD_TRANSCEIVE 0x07
#define CMD_WRITEE2 0x08
#define CMD_WRITEE2PAGE 0x09
#define CMD_READE2 0x0A
#define CMD_LOADREG 0x0C
#define CMD_LOADPROTOCOL 0x0D
#define CMD_LOADKEYE2 0x0E
#define CMD_STOREKEYE2 0x0F
#define CMD_CRCCALC 0x1B
#define CMD_READRNR 0x1C
#define CMD_SOFTRESET 0x1F
/** \name Host-Control Register Contents (0x00)
*/
/*@{*/
#define BIT_STANDBY 0x80U /**< Standby bit; If set, the IC transits to standby mode. */
#define BIT_MODEMOFF 0x40U
/*@{*/
/** \name Host-Control Register Contents (0x01)
*/
/*@{*/
#define BIT_I2CFORCEHS 0x01U
//#define BIT_REGEN 0x80U
//#define BIT_BUSHOST 0x40U
//#define BIT_BUSSAM 0x20U
//#define MASK_SAMINTERFACE 0x0CU
/*@}*/
/** \name FIFO-Control Register Contents (0x02)
*/
/*@{*/
#define BIT_FIFOSIZE 0x80U
#define BIT_HIALERT 0x40U
#define BIT_LOALERT 0x20U
#define BIT_FIFOFLUSH 0x10U
#define BIT_WATERLEVEL_HI 0x04U
#define MASK_FIFOLENGTH_HI 0x03U
/*@}*/
/** \name IRQ0 Register(s) Contents (0x06/0x08)
*/
/*@{*/
#define BIT_SET 0x80U
#define BIT_IRQINV 0x80U
#define BIT_HIALERTIRQ 0x40U
#define BIT_LOALERTIRQ 0x20U
#define BIT_IDLEIRQ 0x10U
#define BIT_TXIRQ 0x08U
#define BIT_RXIRQ 0x04U
#define BIT_ERRIRQ 0x02U
#define BIT_RXSOFIRQ 0x01U
/*@}*/
/** \name IRQ1 Register(s) Contents (0x07/0x09)
*/
/*@{*/
/* #define BIT_SET 0x80U */
#define BIT_IRQPUSHPULL 0x80U
#define BIT_GLOBALIRQ 0x40U
#define BIT_IRQPINEN 0x40U
#define BIT_LPCDIRQ 0x20U
#define BIT_TIMER4IRQ 0x10U
#define BIT_TIMER3IRQ 0x08U
#define BIT_TIMER2IRQ 0x04U
#define BIT_TIMER1IRQ 0x02U
#define BIT_TIMER0IRQ 0x01U
/*@}*/
/** \name Error Register Contents (0x0A)
*/
/*@{*/
#define BIT_CMDEE_ERR 0x80U
#define BIT_FIFOWRERR 0x40U
#define BIT_FIFOOVL 0x20U
#define BIT_MINFRAMEERR 0x10U
#define BIT_NODATAERR 0x08U
#define BIT_COLLDET 0x04U
#define BIT_PROTERR 0x02U
#define BIT_INTEGERR 0x01U
/*@}*/
/** \name Status Register Contents (0x0B)
*/
/*@{*/
#define BIT_CRYPTO1ON 0x20U
#define MASK_COMMSTATE 0x07U
/*@}*/
/** \name Rx-Bit-Control Register Contents (0x0C)
*/
/*@{*/
#define BIT_VALUESAFTERCOLL 0x80U
#define BIT_NOCOLL 0x08U
#define MASK_RXALIGN 0x70U
#define MASK_RXLASTBITS 0x07U
/*@}*/
/** \name Rx-Coll Register Contents (0x0D)
*/
/*@{*/
#define BIT_COLLPOSVALID 0x80U
#define MASK_COLLPOS 0x7FU
/*@}*/
/** \name Timer-Control Register Contents (0x0E)
*/
/*@{*/
#define BIT_T3RUNNING 0x80U
#define BIT_T2RUNNING 0x40U
#define BIT_T1RUNNING 0x20U
#define BIT_T0RUNNING 0x10U
#define BIT_T3STARTSTOPNOW 0x08U
#define BIT_T2STARTSTOPNOW 0x04U
#define BIT_T1STARTSTOPNOW 0x02U
#define BIT_T0STARTSTOPNOW 0x01U
/*@}*/
/** \name T[0-3]-Control Register Contents (0x0F/0x14/0x19/0x1E)
*/
/*@{*/
#define BIT_TSTOP_RX 0x80U /**< Stop timer on receive interrupt. */
#define BIT_TAUTORESTARTED 0x08U /**< Auto-restart timer after underflow. */
#define BIT_TSTART_TX 0x10U /**< Start timer on transmit interrupt. */
//#define BIT_TSTART_LFO 0x20U /**< Use this timer for LFO trimming. */
//#define BIT_TSTART_LFO_UV 0x30U /**< Use this timer for LFO trimming (generate UV at a trimming event). */
#define MASK_TSTART 0x30U /**< Mask for TSTART bits. */
#define VALUE_TCLK_1356_MHZ 0x00U /**< Use 13.56MHz as input clock. */
#define VALUE_TCLK_212_KHZ 0x01U /**< Use 212KHz as input clock. */
#define VALUE_TCLK_T0 0x02U /**< Use timer0 as input clock. */
#define VALUE_TCLK_T1 0x03U /**< Use timer1 as input clock. */
/*@}*/
/** \name T4-Control Register Contents (0x23)
*/
/*@{*/
#define BIT_T4RUNNING 0x80U
#define BIT_T4STARTSTOPNOW 0x40U
#define BIT_T4AUTOTRIMM 0x20U
#define BIT_T4AUTOLPCD 0x10U
#define BIT_T4AUTORESTARTED 0x08U
#define BIT_T4AUTOWAKEUP 0x04U
/*#define MASK_TSTART 0x30U*/
#define VALUE_TCLK_LFO_64_KHZ 0x00U
#define VALUE_TCLK_LFO_8_KHZ 0x01U
#define VALUE_TCLK_LFO_4_KHZ 0x02U
#define VALUE_TCLK_LFO_2_KHZ 0x03U
/*@}*/
/** \name Driver Mode Register Contents (0x28)
*/
/*@{*/
#define BIT_TX2INV 0x80U
#define BIT_TX1INV 0x40U
#define BIT_TXEN 0x08U
#define VALUE_TXCLKMODE_HIGHIMPEDANCE 0x00U
#define VALUE_TXCLKMODE_OUTPULL0 0x01U
#define VALUE_TXCLKMODE_OUTPULL1 0x02U
#define VALUE_TXCLKMODE_RFLOWPULL 0x05U
#define VALUE_TXCLKMODE_RFHIGHPUSH 0x06U
#define VALUE_TXCLKMODE_PUSHPULL 0x07U
#define BIT_RFON 0x04U
#define BIT_TPUSHON 0x02U
#define BIT_TPULLON 0x01U
/*@}*/
/** \name Tx Amplifier Register Contents (0x29)
*/
/*@{*/
#define MASK_CW_AMPLITUDE 0x00U
#define MASK_RESIDUAL_CARRIER 0x1FU
/*@}*/
/** \name Driver Control Register Contents (0x2A)
*/
/*@{*/
#define BIT_CWMAX 0x08U
#define BIT_DRIVERINV 0x04U
#define VALUE_DRIVERSEL_LOW 0x00U
#define VALUE_DRIVERSEL_TXENV 0x01U
#define VALUE_DRIVERSEL_SIGIN 0x02U
/*@}*/
/** \name Tx-/Rx-CRC Control Register Contents (0x2C/0x2D)
*/
/*@{*/
#define BIT_RXFORCECRCWRITE 0x80U
#define BIT_CRCINVERT 0x02U
#define BIT_CRCEN 0x01U
#define MASK_CRCPRESETVAL 0x70U
#define MASK_CRCTYPE 0x0CU
#define MASK_CRCTYPE5 0x00U
#define MASK_CRCTYPE16 0x08U
/*@}*/
/** \name Tx-DataNum Register Contents (0x2E)
*/
/*@{*/
#define BIT_KEEPBITGRID 0x10U
#define BIT_DATAEN 0x08U
#define MASK_TXLASTBITS 0x07U
#define MASK_SYMBOL_SEND 0x08U
/*@}*/
/** \name Tx-Wait Control Register Contents (0x31)
*/
/*@{*/
#define BIT_TXWAIT_START_RX 0x80U
#define BIT_TXWAIT_DBFREQ 0x40U
#define MASK_TXWAITHI 0x38U
#define MASK_TXSTOPBITLEN 0x07U
/*@}*/
/** \name Frame Control Register Contents (0x33)
*/
/*@{*/
#define BIT_TXPARITYEN 0x80U
#define BIT_RXPARITYEN 0x40U
#define VALUE_STOP_SYM3 0x0CU
#define VALUE_STOP_SYM2 0x08U
#define VALUE_STOP_SYM1 0x04U
#define VALUE_START_SYM3 0x03U
#define VALUE_START_SYM2 0x02U
#define VALUE_START_SYM1 0x01U
#define MASK_STARTSYM 0x03U
#define MASK_STOPSYM 0x0CU
/*@}*/
/** \name Rx Control Register Contents (0x35)
*/
/*@{*/
#define BIT_RXALLOWBITS 0x80U
#define BIT_RXMULTIPLE 0x40U
#define BIT_RXEOFTYPE 0x20U
#define BIT_EGT_CHECK 0x10U
#define BIT_EMD_SUPPRESSION 0x08U
#define MASK_RXBAUDRATE 0x07U
/*@}*/
/** \name Rx-Wait Register Contents (0x36)
*/
/*@{*/
#define BIT_RXWAITDBFREQ 0x80U
#define MASK_RXWAIT 0x7FU
/*@}*/
/** \name Rx-Threshold Register Contents (0x37)
*/
/*@{*/
#define MASK_MINLEVEL 0xF0U
#define MASK_MINLEVELP 0x0FU
/*@}*/
/** \name Rx-Receiver Register Contents (0x38)
*/
/*@{*/
#define BIT_RX_SINGLE 0x80U
#define BIT_RX_SHORT_MIX2ADC 0x40U
#define BIT_USE_SMALL_EVAL 0x04U
#define MASK_RX_SIGPRO_IN_SEL 0x30U
#define MASK_COLLLEVEL 0x03U
/*@}*/
/** \name Rx-Analog Register Contents (0x39)
*/
/*@{*/
#define BIT_RX_OC_ENABLE 0x20U
#define BIT_RX_HP_LOWF 0x10U
#define MASK_VMID_R_SEL 0xC0U
#define MASK_RCV_HPCF 0x0CU
#define MASK_RCV_GAIN 0x03U
/*@}*/
/** \name Serial-Speed Register Contents (0x3B)
*/
/*@{*/
#define MASK_BR_T0 0xE0U
#define MASK_BR_T1 0x1FU
/*@}*/
/** \name LPCD Result(Q) Register Contents (0x43)
*/
/*@{*/
#define BIT_LPCDIRQ_CLR 0x40U
/*@}*/
/** \name Tx-BitMod Register Contents (0x48)
*/
/*@{*/
#define BIT_TXMSBFIRST 0x80U
#define BIT_TXPARITYTYPE 0x20U
#define BIT_TXSTOPBITTYPE 0x08U
#define BIT_TXSTARTBITTYPE 0x02U
#define BIT_TXSTARTBITEN 0x01U
/*@}*/
/** \name Rx-BitMod Register Contents (0x58)
*/
/*@{*/
#define BIT_RXSTOPONINVPAR 0x20U
#define BIT_RXSTOPONLEN 0x10U
#define BIT_RXMSBFIRST 0x08U
#define BIT_RXSTOPBITEN 0x04U
#define BIT_RXPARITYTYPE 0x02U
/*@}*/
/** \name Rx-Mod Register Contents (0x5D)
*/
/*@{*/
#define BIT_PREFILTER 0x20U
#define BIT_RECTFILTER 0x10U
#define BIT_SYNCHIGH 0x08U
#define BIT_CORRINV 0x04U
#define BIT_FSK 0x02U
#define BIT_BPSK 0x01U
/*@}*/
/** \name RxSupCfg Register Contents (0x6E)
*/
/*@{*/
#define BIT_RXNOERR 0x80U
/*@}*/
/** \name RxTxConReg Register Contents (0x77)
*/
/*@{*/
#define BIT_SHMODE 0x08U //<2F>Ϻ<EFBFBD><CFBA>㷨
/*@}*/
/** \name ErrorExtReg Register Contents (0x7E)
*/
/*@{*/
#define PARITY_ERROR 0x08U
#define CRC_ERROR 0x04U
/*@{*/
#define LPCD_OPTION2 0x1DF
//---------------------------------------------------------------
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><D0AD><EFBFBD><EFBFBD>
#define RX_TYPEA_106 0
#define RX_TYPEA_212 1
#define RX_TYPEA_424 2
#define RX_TYPEA_848 3
#define RX_TYPEB_106 4
#define RX_TYPEB_212 5
#define RX_TYPEB_424 6
#define RX_TYPEB_848 7
#define RX_TYPEV_26 10
#define RX_TYPEV_53 11
#define RX_FELICA_212 19
#define RX_FELICA_424 20
//<2F><><EFBFBD>巢<EFBFBD><E5B7A2>Э<EFBFBD><D0AD><EFBFBD><EFBFBD>
#define TX_TYPEA_106 0
#define TX_TYPEA_212 1
#define TX_TYPEA_424 2
#define TX_TYPEA_848 3
#define TX_TYPEB_106 4
#define TX_TYPEB_212 5
#define TX_TYPEB_424 6
#define TX_TYPEB_848 7
#define TX_TYPEV_26 10
#define TX_TYPEV_53 11
#define TX_FELICA_212 19
#define TX_FELICA_424 20
#endif

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/**
* @file READER_REG.h
* @brief RFID 读卡器芯片寄存器定义
* @version 1.0
* @date 2024-05-20
*
* @copyright Copyright (c) 2010 Shanghai FuDan MicroElectronic Inc, Ltd.
*
* @par 文件作用:
* 这个头文件是整个RFID驱动库的最底层基石。它定义了RFID读卡器芯片
* (例如FM176XX系列)内部所有寄存器的地址、每个寄存器中功能位的掩码，
* 以及芯片支持的各种命令码。
* MCU通过SPI接口读写这些寄存器，从而精确控制芯片的各项功能，
* 例如启动/停止命令、配置通信协议、读写FIFO数据、查询状态等。
* 所有上层对RFID的操作，最终都会转化为对这个文件中定义的寄存器的读写。
*/
#ifndef _READER_REG_H
#define _READER_REG_H
//==================================================================================
// 1. 寄存器地址定义 (Register Address Definitions)
// 这些是芯片内部功能单元的地址，通过SPI访问。
//==================================================================================
#define REG_COMMAND 0x00 // 命令寄存器: 启动/停止芯片执行的命令 (如 Idle, Transceive)
#define REG_HOSTCTRL 0x01 // 主机控制寄存器
#define REG_FIFOCONTROL 0x02 // FIFO 控制寄存器 (如刷新FIFO)
#define REG_WATERLEVEL 0x03 // FIFO 水位寄存器: 用于中断触发
#define REG_FIFOLENGTH 0x04 // FIFO 长度寄存器: 当前FIFO中存储的字节数
#define REG_FIFODATA 0x05 // FIFO 数据寄存器: 通过此寄存器写入要发送的数据，或读出接收到的数据
#define REG_IRQ0 0x06 // 中断请求标志寄存器 0
#define REG_IRQ1 0x07 // 中断请求标志寄存器 1
#define REG_IRQ0EN 0x08 // 中断使能寄存器 0
#define REG_IRQ1EN 0x09 // 中断使能寄存器 1
#define REG_ERROR 0x0A // 错误标志寄存器: 显示通信中发生的错误 (如CRC错误, 冲突)
#define REG_STATUS 0x0B // 状态寄存器: 显示芯片当前状态 (如MIFARE加密是否开启)
#define REG_RXBITCTRL 0x0C // 接收数据位控制寄存器
#define REG_RXCOLL 0x0D // 接收冲突检测寄存器
#define REG_TCONTROL 0x0E // 定时器总体控制
#define REG_T0CONTROL 0x0F // 定时器0 控制
#define REG_T0RELOADHI 0x10 // 定时器0 重载值高字节
#define REG_T0RELOADLO 0x11 // 定时器0 重载值低字节
#define REG_T0COUNTERVALHI 0x12 // 定时器0 计数值高字节
#define REG_T0COUNTERVALLO 0x13 // 定时器0 计数值低字节
#define REG_T1CONTROL 0x14 // 定时器1 控制
#define REG_T1RELOADHI 0x15 // 定时器1 重载值高字节
#define REG_T1RELOADLO 0x16 // 定时器1 重载值低字节
#define REG_T1COUNTERVALHI 0x17 // 定时器1 计数值高字节
#define REG_T1COUNTERVALLO 0x18 // 定时器1 计数值低字节
#define REG_T2CONTROL 0x19 // 定时器2 控制
#define REG_T2RELOADHI 0x1A // 定时器2 重载值高字节
#define REG_T2RELOADLO 0x1B // 定时器2 重载值低字节
#define REG_T2COUNTERVALHI 0x1C // 定时器2 计数值高字节
#define REG_T2COUNTERVALLO 0x1D // 定时器2 计数值低字节
#define REG_T3CONTROL 0x1E // 定时器3 控制
#define REG_T3RELOADHI 0x1F // 定时器3 重载值高字节
#define REG_T3RELOADLO 0x20 // 定时器3 重载值低字节
#define REG_T3COUNTERVALHI 0x21 // 定时器3 计数值高字节
#define REG_T3COUNTERVALLO 0x22 // 定时器3 计数值低字节
#define REG_T4CONTROL 0x23 // 定时器4 控制
#define REG_T4RELOADHI 0x24 // 定时器4 重载值高字节
#define REG_T4RELOADLO 0x25 // 定时器4 重载值低字节
#define REG_T4COUNTERVALHI 0x26 // 定时器4 计数值高字节
#define REG_T4COUNTERVALLO 0x27 // 定时器4 计数值低字节
#define REG_TXMODE 0x28 // 发射模式寄存器
#define REG_TXAMP 0x29 // 发射信号幅度(天线功率)寄存器
#define REG_TXCON 0x2A // 发射控制寄存器 (调制深度等)
#define REG_TXI 0x2B // 发射器内部控制
#define REG_TXCRCCON 0x2C // 发射CRC控制寄存器
#define REG_RXCRCCON 0x2D // 接收CRC控制寄存器
#define REG_TXDATANUM 0x2E // 发送数据位数控制寄存器
#define REG_TXMODWIDTH 0x2F // 发射调制脉宽寄存器
#define REG_TXSYM10BURSTLEN 0x30 // TypeB的10%调制脉冲长度
#define REG_TXWAITCTRL 0x31 // 发送等待控制寄存器
#define REG_TXWAITLO 0x32 // 发送等待时间低字节
#define REG_FRAMECON 0x33 // 帧控制寄存器 (奇偶校验等)
#define REG_RXSOFD 0x34 // 接收起始标志位(SOF)配置
#define REG_RXCTRL 0x35 // 接收控制寄存器
#define REG_RXWAIT 0x36 // 接收等待时间寄存器
#define REG_RXTHRESHOLD 0x37 // 接收信号阈值寄存器
#define REG_RCV 0x38 // 接收器配置寄存器
#define REG_RXANA 0x39 // 接收器模拟电路配置寄存器 (增益等)
#define REG_LPCD_OPTIONS 0x3A // 低功耗寻卡(LPCD)选项
#define REG_SERIALSPEED 0x3B // 串行接口速率配置
#define REG_LFO_TRIMM 0x3C // 低频振荡器(LFO)微调
#define REG_CLKOUT_CTRL 0x3D // 时钟输出控制
#define REG_LPCD_THRESHOLD 0x3E // LPCD阈值
#define REG_LPCD_QMIN 0x3F // LPCD Q通道最小值
#define REG_LPCD_QMAX 0x40 // LPCD Q通道最大值
#define REG_LPCD_IMIN 0x41 // LPCD I通道最小值
#define REG_LPCD_RESULT_I 0x42 // LPCD I通道结果
#define REG_LPCD_RESULT_Q 0x43 // LPCD Q通道结果
#define REG_THNADJ 0x5F
#define REG_THNSET 0x61
#define REG_THNMIN 0x62
#define REG_DSP_CTRL1 0x64
#define REG_MISC 0x75 // 杂项配置
#define REG_RXTXCON 0x77 // 收发控制寄存器
#define REG_ERROREXT 0x7E // 扩展错误标志
#define REG_VERSION 0x7F // 版本寄存器: 读取此寄存器可获取芯片型号和版本
//==================================================================================
// 2. 命令码定义 (Command Codes)
// 写入到 REG_COMMAND 寄存器的值，用于启动芯片执行特定任务。
//==================================================================================
#define CMD_MASK 0x1F // 命令码掩码
#define CMD_IDLE 0x00 // 空闲命令: 停止当前操作，进入空闲状态
#define CMD_LPCD 0x01 // 低功耗寻卡 (Low-Power Card Detection)
#define CMD_LOADKEY 0x02 // 加载密钥命令: 将密钥从FIFO加载到内部密钥缓冲器 (用于MIFARE认证)
#define CMD_AUTHENT 0x03 // MIFARE认证命令: 执行MIFARE Classic卡的三重认证流程
#define CMD_RECEIVE 0x05 // 接收命令: 仅开启接收器，等待接收数据
#define CMD_TRANSMIT 0x06 // 发送命令: 将FIFO中的数据发送出去
#define CMD_TRANSCEIVE 0x07 // 发送并接收命令: 核心命令，先发送FIFO中的数据，然后自动进入接收状态等待卡片响应
#define CMD_WRITEE2 0x08 // 写E2PROM
#define CMD_WRITEE2PAGE 0x09 // 写E2PROM页
#define CMD_READE2 0x0A // 读E2PROM
#define CMD_LOADREG 0x0C // 从E2PROM加载寄存器值
#define CMD_LOADPROTOCOL 0x0D // 加载协议命令: 配置芯片以支持特定的通信协议 (Type A/B/V/F)
#define CMD_LOADKEYE2 0x0E // 从E2PROM加载密钥
#define CMD_STOREKEYE2 0x0F // 存储密钥到E2PROM
#define CMD_CRCCALC 0x1B // CRC计算
#define CMD_READRNR 0x1C // 读随机数
#define CMD_SOFTRESET 0x1F // 软复位命令: 复位芯片
//==================================================================================
// 3. 寄存器功能位定义 (Bit Definitions for Registers)
// 定义了每个寄存器中特定位的功能，方便通过位操作来修改寄存器值。
//==================================================================================
/** @name Command Register (0x00) 功能位 */
#define BIT_STANDBY 0x80U // 置1使芯片进入待机模式
#define BIT_MODEMOFF 0x40U // 关闭射频和调制解调器
/** @name FIFO-Control Register (0x02) 功能位 */
#define BIT_FIFOSIZE 0x80U // FIFO大小选择 (0=64字节, 1=512字节)
#define BIT_HIALERT 0x40U // 高水位中断标志
#define BIT_LOALERT 0x20U // 低水位中断标志
#define BIT_FIFOFLUSH 0x10U // FIFO刷新位。向此位写1可清空FIFO。
#define BIT_WATERLEVEL_HI 0x04U
#define MASK_FIFOLENGTH_HI 0x03U
/** @name IRQ0 Register (0x06) & IRQ0EN Register (0x08) 功能位 */
#define BIT_IRQINV 0x80U // 反转IRQ引脚电平
#define BIT_HIALERTIRQ 0x40U // FIFO高水位中断
#define BIT_LOALERTIRQ 0x20U // FIFO低水位中断
#define BIT_IDLEIRQ 0x10U // 空闲中断 (命令执行完毕)
#define BIT_TXIRQ 0x08U // 发送完成中断
#define BIT_RXIRQ 0x04U // 接收完成中断
#define BIT_ERRIRQ 0x02U // 错误中断
#define BIT_RXSOFIRQ 0x01U // 接收到起始帧(SOF)中断
/** @name IRQ1 Register (0x07) & IRQ1EN Register (0x09) 功能位 */
#define BIT_IRQPUSHPULL 0x80U // IRQ引脚推挽/开漏模式选择
#define BIT_GLOBALIRQ 0x40U // 全局中断使能
#define BIT_LPCDIRQ 0x20U // 低功耗寻卡中断
#define BIT_TIMER4IRQ 0x10U // 定时器4中断
#define BIT_TIMER3IRQ 0x08U // 定时器3中断
#define BIT_TIMER2IRQ 0x04U // 定时器2中断
#define BIT_TIMER1IRQ 0x02U // 定时器1中断
#define BIT_TIMER0IRQ 0x01U // 定时器0中断
/** @name Error Register (0x0A) 功能位 */
#define BIT_CMDEE_ERR 0x80U // E2PROM命令错误
#define BIT_FIFOWRERR 0x40U // FIFO写错误 (FIFO已满时写入)
#define BIT_FIFOOVL 0x20U // FIFO溢出错误
#define BIT_MINFRAMEERR 0x10U // 最小帧错误
#define BIT_NODATAERR 0x08U // 无数据错误 (超时)
#define BIT_COLLDET 0x04U // 检测到冲突错误
#define BIT_PROTERR 0x02U // 协议错误
#define BIT_INTEGERR 0x01U // CRC或奇偶校验错误
/** @name Status Register (0x0B) 功能位 */
#define BIT_CRYPTO1ON 0x20U // MIFARE加密已开启标志位。认证成功后，此位由硬件自动置1。
#define MASK_COMMSTATE 0x07U // 通信状态掩码
/** @name Rx-Bit-Control Register (0x0C) 功能位 */
#define BIT_VALUESAFTERCOLL 0x80U // 冲突后接收到的位值
#define BIT_NOCOLL 0x08U // 无冲突
#define MASK_RXALIGN 0x70U // 接收位对齐掩码
#define MASK_RXLASTBITS 0x07U // 最后一字节的有效位数
/** @name Tx-/Rx-CRC Control Register (0x2C/0x2D) 功能位 */
#define BIT_CRCEN 0x01U // CRC使能位
/** @name Frame Control Register (0x33) 功能位 */
#define BIT_TXPARITYEN 0x80U // 发送奇偶校验使能
#define BIT_RXPARITYEN 0x40U // 接收奇偶校验使能
/** @name Rx-Analog Register (0x39) 功能位 */
#define MASK_RCV_HPCF 0x0CU // 接收器高通滤波器截止频率
#define MASK_RCV_GAIN 0x03U // 接收器增益
//==================================================================================
// 4. 协议标识符定义 (Protocol Identifiers)
// 用于 CMD_LOADPROTOCOL 命令，告诉芯片要使用哪种协议进行通信。
//==================================================================================
// --- 接收协议 ---
#define RX_TYPEA_106 0 // ISO14443A, 106 kbit/s
#define RX_TYPEA_212 1 // ISO14443A, 212 kbit/s
#define RX_TYPEA_424 2 // ISO14443A, 424 kbit/s
#define RX_TYPEA_848 3 // ISO14443A, 848 kbit/s
#define RX_TYPEB_106 4 // ISO14443B, 106 kbit/s
#define RX_TYPEB_212 5 // ISO14443B, 212 kbit/s
#define RX_TYPEB_424 6 // ISO14443B, 424 kbit/s
#define RX_TYPEB_848 7 // ISO14443B, 848 kbit/s
#define RX_TYPEV_26 10 // ISO15693, 26 kbit/s
#define RX_TYPEV_53 11 // ISO15693, 53 kbit/s
#define RX_FELICA_212 19 // FeliCa, 212 kbit/s
#define RX_FELICA_424 20 // FeliCa, 424 kbit/s
// --- 发送协议 ---
#define TX_TYPEA_106 0 // ISO14443A, 106 kbit/s
#define TX_TYPEA_212 1 // ISO14443A, 212 kbit/s
#define TX_TYPEA_424 2 // ISO14443A, 424 kbit/s
#define TX_TYPEA_848 3 // ISO14443A, 848 kbit/s
#define TX_TYPEB_106 4 // ISO14443B, 106 kbit/s
#define TX_TYPEB_212 5 // ISO14443B, 212 kbit/s
#define TX_TYPEB_424 6 // ISO14443B, 424 kbit/s
#define TX_TYPEB_848 7 // ISO14443B, 848 kbit/s
#define TX_TYPEV_26 10 // ISO15693, 26 kbit/s
#define TX_TYPEV_53 11 // ISO15693, 53 kbit/s
#define TX_FELICA_212 19 // FeliCa, 212 kbit/s
#define TX_FELICA_424 20 // FeliCa, 424 kbit/s
#endif

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/**
* @file READER.c
* @brief RFID 核心协议驱动实现
* @version 1.0
* @date 2024-05-20
*
* @par 文件作用:
* 该文件是 READER.h 中声明的所有函数的具体实现。它是驱动库的核心逻辑所在，
* 负责将上层应用的简单指令（如“寻卡”）转化为一系列复杂的、精确计时的
* 寄存器读写操作。
* 主要职责包括：
* 1. 实现各协议的初始化函数，配置芯片进入相应的工作模式。
* 2. 实现各协议的寻卡、防冲突、选卡等底层通信流程。
* 3. 提供与芯片交互的基础原子操作函数 (SetCommand, Clear_FIFO 等)。
*/
#include "function.h"
#include "board.h"
#include "READER.h"
#include "READER_REG.h"
#include "xt_main.h"
#include <stdio.h>
// 定义全局变量，用于存储寻卡后得到的各类卡片信息
struct picc_a_struct PICC_A;
struct picc_b_struct PICC_B;
struct picc_v_struct PICC_V;
struct picc_f_struct PICC_F;
// (注: 此处的延时函数为软件延时，移植到新平台时建议使用定时器以获得更高精度)
void DelayUs( uint32_t xus ) { /* ... */ }
void DelayMs( uint32_t xms ) { /* ... */ }
/**
* @brief 修改寄存器的特定位 (Read-Modify-Write)
* @param reg_address 要修改的寄存器地址
* @param mask 要操作的位的掩码 (例如 0x01 表示操作 bit 0)
* @param set 1 表示置位 (set)，0 表示清零 (clear)
*/
void ModifyReg( unsigned char reg_address, unsigned char mask, unsigned char set )
{
unsigned char reg_data;
GetReg( reg_address, &reg_data ); // 1. 先读出寄存器当前的值
if ( set )
{
reg_data |= mask; // 2. 使用或运算，将指定位置1
}
else
{
reg_data &= ~mask; // 3. 使用与和非运算，将指定位清0
}
SetReg( reg_address, reg_data ); // 4. 将修改后的值写回寄存器
return;
}
/**
* @brief 向芯片发送一个命令
* @param command 要发送的命令码 (定义于 READER_REG.h, 如 CMD_TRANSCEIVE)
* @return unsigned char 操作结果
*/
unsigned char SetCommand(unsigned char command)
{
return SetReg(REG_COMMAND, CMD_MASK & command);
}
/**
* @brief 开启或关闭天线载波 (射频场)
* @param mode ENABLE 或 DISABLE
* @return unsigned char 操作结果
*/
unsigned char SetCW(unsigned char mode)
{
if(mode == ENABLE)
{
// 通过清除 MODEMOFF 位并设置 TXEN 位来开启天线
ModifyReg(REG_COMMAND, BIT_MODEMOFF, DISABLE);
ModifyReg(REG_TXMODE, BIT0 | BIT1, ENABLE);
}
else
{
// 通过设置 MODEMOFF 位来关闭天线
ModifyReg(REG_COMMAND, BIT_MODEMOFF, ENABLE);
ModifyReg(REG_TXMODE, BIT0 | BIT1, DISABLE);
}
DelayMs(5);
return SUCCESS;
}
/**
* @brief 清空芯片内部的 FIFO 缓冲区
*/
void Clear_FIFO(void)
{
unsigned char fifolength;
GetReg(REG_FIFOLENGTH, &fifolength); // 读取FIFO中当前字节数
if((fifolength) != 0)
{
// 如果FIFO不为空，通过置位 FIFOFLUSH 来清空
ModifyReg(REG_FIFOCONTROL, BIT_FIFOFLUSH, ENABLE);
}
return ;
}
/**
* @brief 加载通信协议到芯片
* @param p_rx 接收协议标识符 (来自 READER_REG.h)
* @param p_tx 发送协议标识符 (来自 READER_REG.h)
* @return unsigned char 成功或失败
*/
unsigned char LoadProtocol(unsigned char p_rx, unsigned char p_tx)
{
unsigned char reg_data = 0;
SetCommand(CMD_IDLE);
Clear_FIFO();
SetReg(REG_FIFODATA, p_rx); // 将接收协议标识符写入FIFO
SetReg(REG_FIFODATA, p_tx); // 将发送协议标识符写入FIFO
SetCommand(CMD_LOADPROTOCOL); // 发送加载协议命令
DelayMs(2);
GetReg(REG_COMMAND, &reg_data);
if(reg_data != CMD_IDLE) // 检查命令是否执行完毕
return FAIL;
return SUCCESS;
}
/**
* @brief 设置是否启用奇偶校验
* @param state ENABLE 或 DISABLE
*/
void SetParity(unsigned char state)
{
ModifyReg(REG_FRAMECON, BIT_TXPARITYEN | BIT_RXPARITYEN, state);
}
/**
* @brief 初始化芯片以进行 ISO14443-A 通信
* @return unsigned char 成功
*/
unsigned char ReaderA_Initial(void)
{
LoadProtocol(RX_TYPEA_106, TX_TYPEA_106); // 1. 加载Type A协议
ModifyReg(REG_TXMODE, BIT2, ENABLE); // 2. 设置为100% ASK调制
SetReg(REG_TXAMP, AMPLITUDE_A); // 3. 设置天线发射功率
SetReg(REG_RXANA, (HPCF_A << 3) | GAIN_A); // 4. 设置接收器增益和高通滤波器
SetParity(ENABLE); // 5. Type A 需要奇偶校验
ModifyReg(REG_STATUS, BIT_CRYPTO1ON, 0); // 6. 清除MIFARE加密标志
return SUCCESS;
}
/**
* @brief 初始化芯片以进行 ISO14443-B 通信
* @return unsigned char 成功
*/
unsigned char ReaderB_Initial(void)
{
LoadProtocol(RX_TYPEB_106, TX_TYPEB_106);
// ... 配置Type B特定的寄存器 ...
return SUCCESS;
}
// ... 其他协议的初始化函数 (ReaderV_Initial, ReaderF_Initial) ...
/**
* @brief (Type A) 发送 REQA 命令
* @param picc_a 指向 picc_a_struct 的指针，用于存储响应
* @return unsigned char 成功或失败
*/
unsigned char ReaderA_Request(struct picc_a_struct *picc_a)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
Clear_FIFO();
SetReg(REG_FIFODATA, RF_CMD_REQA); // 1. 将 REQA 命令码 (0x26) 写入FIFO
ModifyReg(REG_TXCRCCON, BIT_CRCEN, DISABLE); // 2. REQA 命令不带CRC
ModifyReg(REG_RXCRCCON, BIT_CRCEN, DISABLE);
SetCommand(CMD_TRANSCEIVE); // 3. 发送并等待接收
DelayMs(2);
GetReg(REG_FIFOLENGTH, &reg_data); // 4. 检查接收到的数据长度
if(reg_data != 2) // 5. 成功的响应 (ATQA) 应该是2个字节
return FAIL;
GetReg(REG_FIFODATA, &picc_a->ATQA[0]); // 6. 从FIFO读出ATQA
GetReg(REG_FIFODATA, &picc_a->ATQA[1]);
return SUCCESS;
}
/**
* @brief (Type A) 执行一级防冲突
* @param picc_a 指向 picc_a_struct 的指针
* @return unsigned char 成功或失败
*/
unsigned char ReaderA_Anticoll(struct picc_a_struct *picc_a)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
Clear_FIFO();
// 1. 准备防冲突命令 (如 0x93 0x20)
SetReg(REG_FIFODATA, RF_CMD_ANTICOLL[picc_a->CASCADE_LEVEL]);
SetReg(REG_FIFODATA, 0x20);
SetCommand(CMD_TRANSCEIVE);
DelayMs(2);
GetReg(REG_FIFOLENGTH, &reg_data);
if(reg_data != 5) // 2. 响应应为5字节 (4字节UID + 1字节BCC)
return FAIL;
// 3. 从FIFO读出UID和BCC
GetReg(REG_FIFODATA, &picc_a->UID[picc_a->CASCADE_LEVEL*4]);
// ...
GetReg(REG_FIFODATA, &picc_a->BCC[picc_a->CASCADE_LEVEL]);
// 4. 校验BCC (UID四个字节的异或值)
if( (picc_a->UID[picc_a->CASCADE_LEVEL*4] ^ picc_a->UID[picc_a->CASCADE_LEVEL*4+1] ^ picc_a->UID[picc_a->CASCADE_LEVEL*4+2] ^ picc_a->UID[picc_a->CASCADE_LEVEL*4+3]) == picc_a->BCC[picc_a->CASCADE_LEVEL])
return SUCCESS;
return FAIL;
}
/**
* @brief (Type A) 选卡命令
* @param picc_a 指向 picc_a_struct 的指针
* @return unsigned char 成功或失败
*/
unsigned char ReaderA_Select(struct picc_a_struct *picc_a)
{
unsigned char reg_data;
SetCommand(CMD_IDLE);
Clear_FIFO();
// 1. 准备选卡命令 (如 0x93 0x70 + UID + BCC)
SetReg(REG_FIFODATA, RF_CMD_SELECT[picc_a->CASCADE_LEVEL]);
SetReg(REG_FIFODATA, 0x70);
SetReg(REG_FIFODATA, picc_a->UID[picc_a->CASCADE_LEVEL*4]);
// ...
SetReg(REG_FIFODATA, picc_a->BCC[picc_a->CASCADE_LEVEL]);
ModifyReg(REG_TXCRCCON, BIT_CRCEN, ENABLE); // 2. 选卡命令带CRC
ModifyReg(REG_RXCRCCON, BIT_CRCEN, ENABLE);
SetCommand(CMD_TRANSCEIVE);
DelayMs(2);
GetReg(REG_ERROR, &reg_data); // 3. 检查是否有通信错误
if((reg_data & 0x0F) != 0)
return FAIL;
GetReg(REG_FIFOLENGTH, &reg_data);
if(reg_data != 1) // 4. 响应为1字节的SAK
return FAIL;
GetReg(REG_FIFODATA, &picc_a->SAK[picc_a->CASCADE_LEVEL]); // 5. 读出SAK
return SUCCESS;
}
/**
* @brief **核心函数**: 激活一张A类卡 (完成完整的寻卡、防冲突、选卡流程)
* @param picc_a 指向 picc_a_struct 的指针
* @return unsigned char 成功或失败
*/
unsigned char ReaderA_CardActivate(struct picc_a_struct *picc_a)
{
unsigned char result, cascade_level;
result = ReaderA_Request(picc_a); // 1. 发送请求
if (result != SUCCESS)
return result;
// 2. 根据ATQA判断UID长度，确定级联等级
if ((picc_a->ATQA[0] & 0xC0) == 0x00)
{
cascade_level = 1;
picc_a->UID_Length = 4;
}
else if ((picc_a->ATQA[0] & 0xC0) == 0x40)
{
cascade_level = 2;
picc_a->UID_Length = 7; // (修正: 通常是7字节)
}
// ...
// 3. 循环执行防冲突和选卡，直到获得完整的UID
for (picc_a->CASCADE_LEVEL = 0; picc_a->CASCADE_LEVEL < cascade_level; picc_a->CASCADE_LEVEL++)
{
result = ReaderA_Anticoll(picc_a);
if (result != SUCCESS)
return result;
result = ReaderA_Select(picc_a);
if (result != SUCCESS)
return result;
// 如果SAK指示还有下一级UID，则继续循环
if (!(picc_a->SAK[picc_a->CASCADE_LEVEL] & 0x04))
break;
}
return result;
}
// ... (其他协议 Type B, V, F 的函数实现) ...

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/**
* @file READER.h
* @brief RFID 核心协议驱动接口
* @version 1.0
* @date 2024-05-20
*
* @par 文件作用:
* 该文件是核心协议驱动层(READER.c)的头文件，为上层应用(如MIFARE, NTAG)
* 提供了标准化的接口来与不同协议的RFID卡片进行底层交互。
* 它主要负责：
* 1. 定义存储不同类型卡片信息的数据结构 (如 picc_a_struct)。
* 2. 声明协议操作函数，如初始化、寻卡、选择、激活等。
* 3. 定义通信过程中使用的标准命令码和硬件配置参数。
* 上层应用通过调用本文件中声明的函数，可以完成对卡片的寻卡和选卡操作，
* 从而为后续的认证和数据读写做准备。
*/
#ifndef _READER_H
#define _READER_H
#include "function.h"
//==================================================================================
// 1. ISO14443-A 标准命令码定义
//==================================================================================
static const unsigned char RF_CMD_REQA = 0x26; // REQA (Request Type A) 命令: 用于请求视场内的A类卡响应
static const unsigned char RF_CMD_WUPA = 0x52; // WUPA (Wake-Up Type A) 命令: 用于唤醒视场内处于HALT状态的A类卡
static const unsigned char RF_CMD_ANTICOLL[3] = {0x93, 0x95, 0x97}; // 防冲突命令码 (级联等级 1, 2, 3)
static const unsigned char RF_CMD_SELECT[3] = {0x93, 0x95, 0x97}; // 选卡命令码 (级联等级 1, 2, 3)
//==================================================================================
// 2. MIFARE Classic 命令码定义
//==================================================================================
static const unsigned char RF_CMD_KEYA = 0x60; // MIFARE Key A 认证命令
static const unsigned char RF_CMD_KEYB = 0x61; // MIFARE Key B 认证命令
//==================================================================================
// 3. 卡片信息数据结构定义
// 用于存储从不同类型卡片读取到的信息。
//==================================================================================
/** @brief ISO14443-B 卡片信息结构体 */
struct picc_b_struct
{
unsigned char ATQB[12]; // REQB命令的响应 (Answer to Request B)
unsigned char PUPI[4]; // 伪唯一PICCs标识符
// ... 其他Type B卡片信息
};
extern struct picc_b_struct PICC_B; // 声明一个全局变量以存储Type B卡信息
/** @brief ISO14443-A 卡片信息结构体 */
struct picc_a_struct
{
unsigned char ATQA[2]; // REQA命令的响应 (Answer to Request A)
unsigned char CASCADE_LEVEL; // 级联等级 (表示UID的长度)
unsigned char UID_Length; // UID 长度 (4, 7 或 10字节)
unsigned char UID[15]; // 存储卡片的唯一ID (UID)
unsigned char BCC[3]; // UID的校验字节
unsigned char SAK[3]; // 选卡确认 (Select Acknowledge), 用于判断卡片具体类型
};
extern struct picc_a_struct PICC_A; // 声明一个全局变量以存储Type A卡信息
/** @brief ISO15693 (Type V) 卡片信息结构体 */
struct picc_v_struct
{
unsigned char UID[8]; // Type V 卡的UID (8字节)
unsigned char RESPONSE; // 卡片的响应字节
unsigned char BLOCK_DATA[4]; // 用于存储从卡片读取的块数据
};
extern struct picc_v_struct PICC_V;
/** @brief FeliCa (Type F) 卡片信息结构体 */
struct picc_f_struct
{
unsigned char UID[8]; // Type F 卡的UID
};
extern struct picc_f_struct PICC_F;
//==================================================================================
// 4. 硬件配置参数宏定义
// 这些参数用于在初始化时配置RFID芯片的模拟电路，以优化特定协议的通信性能。
//==================================================================================
// --- TYPE A 接收参数 ---
#define GAIN_A 7 // 接收增益 (范围 0~7)
#define HPCF_A 3 // 高通滤波器截止频率 (范围 0~7)
#define AMPLITUDE_A 255 // 发射信号幅度/功率 (范围 0~255)
// --- TYPE B 接收参数 ---
#define GAIN_B 7
#define HPCF_B 3
#define AMPLITUDE_B 255
#define MODULATION_B 100 // 调制深度 (范围 0~255)
// ... (其他协议的参数定义) ...
//==================================================================================
// 5. MCU引脚定义 (移植时需要重点关注)
// 定义了MCU与RFID芯片连接的SPI引脚和控制引脚。
//==================================================================================
#define SPI_GPIO GPIOB
#define SCK_PIN LL_GPIO_Pin1 // PB1
#define MISO_PIN LL_GPIO_Pin2 // PB2
#define MOSI_PIN LL_GPIO_Pin3 // PB3
#define NSS_PIN LL_GPIO_Pin0 // PB0 (片选)
#define PD_GPIO GPIOA
#define PD_PIN LL_GPIO_Pin7 // PA7 (Power Down引脚)
// ... (GPIO电平控制宏) ...
//==================================================================================
// 6. 函数原型声明
// 声明了由 READER.c 实现的函数，供其他模块调用。
//==================================================================================
// --- 基础控制函数 ---
extern unsigned char FM176XX_HardReset(void); // 硬复位RFID芯片
extern void ModifyReg(unsigned char reg_address, unsigned char mask, unsigned char set); // 修改寄存器的特定位
extern void Clear_FIFO(void); // 清空FIFO缓冲区
extern unsigned char SetCommand(unsigned char command); // 向芯片发送命令
extern unsigned char SetCW(unsigned char mode); // 开启或关闭天线载波
// --- 协议初始化函数 ---
extern unsigned char ReaderA_Initial(void); // 初始化芯片以进行Type A通信
extern unsigned char ReaderB_Initial(void); // 初始化芯片以进行Type B通信
extern unsigned char ReaderV_Initial(void); // 初始化芯片以进行Type V通信
extern unsigned char ReaderF_Initial(void); // 初始化芯片以进行Type F通信
// --- Type A 卡操作函数 ---
extern unsigned char ReaderA_Request(struct picc_a_struct *picc_a); // 发送 REQA 命令
extern unsigned char ReaderA_Anticoll(struct picc_a_struct *picc_a); // 执行防冲突
extern unsigned char ReaderA_Select(struct picc_a_struct *picc_a); // 选卡
extern unsigned char ReaderA_CardActivate(struct picc_a_struct *picc_a); // **核心函数**: 完成A类卡的寻卡、防冲突和选卡全过程，获取UID
// --- Type B 卡操作函数 ---
extern unsigned char ReaderB_Request(struct picc_b_struct *picc_b); // 发送 REQB 命令
extern unsigned char ReaderB_Attrib(struct picc_b_struct *picc_b); // 设置卡片参数
// ...
// --- Type V 卡操作函数 ---
extern unsigned char ReaderV_Inventory(struct picc_v_struct *picc_v); // 盘点/寻卡
extern unsigned char ReaderV_ReadSingleBlock(unsigned char block_num, struct picc_v_struct *picc_v); // 读单个块
extern unsigned char ReaderV_WriteSingleBlock(unsigned char block_num, struct picc_v_struct *picc_v); // 写单个块
// --- Type F 卡操作函数 ---
extern unsigned char ReaderF_Inventory(struct picc_f_struct *picc_f); // 盘点/寻卡
#endif