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This commit is contained in:
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include_lib/btctrler/ble/hci_ll.h
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278
include_lib/btctrler/ble/hci_ll.h
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/*********************************************************************************************
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* Filename : hci_ll.h
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* Description : 提供Vendor Host 直接调用Controller API LL Part
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* Author : Bingquan
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* Email : bingquan_cai@zh-jieli.com
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* Last modifiled : 2018-12-04 11:58
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* Copyright:(c)JIELI 2011-2017 @ , All Rights Reserved.
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*********************************************************************************************/
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#ifndef _HCI_LL_H_
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#define _HCI_LL_H_
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#include <stdint.h>
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#include <stdlib.h>
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#include <stdarg.h>
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#include "typedef.h"
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// LE CONTROLLER COMMANDS
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#define HCI_LE_SET_CIG_PARAMS 0x0062
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#define HCI_LE_SETUP_ISO_DATA_PATH 0x006E
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#define HCI_LE_CREATE_BIG 0x0068
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#define HCI_LE_SET_EXTENDED_ADVERTISING_ENABLE 0x0039
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// LE EVENTS
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#define HCI_LE_CIS_ESTABLISHED_EVENT 0x19
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#define HCI_LE_CIS_REQUEST_EVENT 0x1A
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#define HCI_LE_CREATE_BIG_COMPLETE_EVENT 0x1B
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#define HCI_SUBEVENT_LE_BIG_INFO_ADV_REPORT_EVT 0x22
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enum {
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LL_EVENT_SUPERVISION_TIMEOUT,
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LL_EVENT_RX,
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LL_EVENT_ACL_TX_POST,
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};
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typedef struct {
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u8 Own_Address_Type: 2;
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u8 Adv_Filter_Policy: 2;
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u8 Scan_Filter_Policy: 2;
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u8 initiator_filter_policy: 2;
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} hci_ll_param_t;
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/*! \brief LE Set CIG Parameters */
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typedef struct {
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uint8_t GIG_ID;
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uint8_t SDU_Interval_C_To_P[3];
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uint8_t SDU_Interval_P_To_C[3];
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uint8_t Worst_Case_SCA;
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uint8_t Packing;
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uint8_t Framing;
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uint16_t Max_Transport_Latency_C_To_P;
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uint16_t Max_Transport_Latency_P_To_C;
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uint8_t CIS_Count;
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struct le_cis_param_t {
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uint8_t CIS_ID;
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uint16_t Max_SDU_C_To_P;
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uint16_t Max_SDU_P_To_C;
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uint8_t PHY_C_To_P;
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uint8_t PHY_P_To_C;
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uint8_t RTN_C_To_P;
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uint8_t RTN_P_To_C;
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} _GNU_PACKED_ param[0];
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} _GNU_PACKED_ le_set_cig_param_t;
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/*! \brief LE Create CIS */
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typedef struct {
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uint8_t CIS_Count;
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struct le_cis_hdl_t {
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uint16_t CIS_Connection_Handle;
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uint16_t ACL_Connection_Handle;
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} _GNU_PACKED_ param[0];
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} _GNU_PACKED_ le_create_cis_t;
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/*! \brief LE Setup ISO Data Path */
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typedef struct {
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uint16_t Connection_Handle;
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uint8_t Data_Path_Direction;
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uint8_t Data_Path_ID;
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struct {
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uint8_t Coding_Format;
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uint16_t Company_Identifier;
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uint16_t Vendor_ID;
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} _GNU_PACKED_ Codec_ID;
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uint8_t Controller_Delay[3];
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uint8_t Codec_Configuratin_Length;
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uint8_t Codec_Configuratin[0];
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} _GNU_PACKED_ le_setup_iso_data_path_t;
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/*! \brief LE Create BIG */
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typedef struct {
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uint8_t BIG_Handle;
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uint8_t Advertising_Handle;
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uint8_t Num_BIS;
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uint8_t SDU_Interval[3];
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uint16_t Max_SDU;
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uint16_t Max_Transport_Latency;
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uint8_t RTN;
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uint8_t PHY;
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uint8_t Packing;
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uint8_t Framing;
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uint8_t Encryption;
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uint8_t Broadcast_Code[16];
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} _GNU_PACKED_ le_create_big_t;
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/*! \brief LE BIG Create Sync */
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typedef struct {
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uint8_t BIG_Handle;
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uint16_t Sync_Handle;
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uint8_t Encryption;
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uint8_t Broadcast_Code[16];
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uint8_t MSE;
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uint16_t BIG_Sync_Timeout;
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uint8_t Num_BIS;
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uint8_t BIS[0];
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} _GNU_PACKED_ le_big_create_sync_t;
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/*! \brief HCI ISO Data packets */
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typedef struct {
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uint32_t Connection_Handle : 12;
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uint32_t PB_Flag : 2;
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uint32_t TS_Flag : 1;
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uint32_t RFU : 1;
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uint32_t ISO_Data_Load_Length : 14;
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uint32_t RFU2 : 2;
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uint32_t Time_Stamp;
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uint32_t Packet_Sequence_Num : 16;
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uint32_t ISO_SDU_Length : 12;
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uint32_t RFU3 : 2;
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uint32_t Packet_Status_Flag : 2;
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uint8_t ISO_SDU_Fragment[0];
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} _GNU_PACKED_ hci_iso_data_packets_t ;
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typedef struct {
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u32 handle : 12;
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//0b00 frist fragment of a fragmented SDU
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//0b01 a continuation fragment of a fragmented SDU
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//0b10 a complete SDU
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//0b11 the last fragment of an SDU
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u32 pb_flag : 2;
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u32 ts_flag : 1;
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u32 rfu : 1;
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u32 iso_data_load_length : 14;
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u32 rfu2 : 2;
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u32 time_stamp;
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u32 packet_sequence_num : 16;
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u32 iso_sdu_length : 12;
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u32 rfu3 : 2;
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//0b00 Valid data. The complete ISO_SDU was received correctly.
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//0b01 Possibly invalid data. The contents of the ISO_SDU may contain errors or
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// part of the ISO_SDU may be missing. This is reported as "data with possible
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// errors".
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//0b10 Part(s) of the ISO_SDU were not received correctly. This is reported as
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// "lost data".
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u32 packet_status_flag : 2;
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uint8_t *iso_sdu;
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} hci_iso_hdr_t ;
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/*! \brief LE BIGInfo Advertising report event */
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typedef struct {
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uint8_t Subevent_Code;
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uint16_t Sync_Handle;
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uint8_t Num_BIS;
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uint8_t NSE;
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uint16_t ISO_Interval;
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uint8_t BN;
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uint8_t PTO;
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uint8_t IRC;
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uint16_t Max_PDU;
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uint8_t SDU_Interval[3];
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uint16_t Max_SDU;
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uint8_t PHY;
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uint8_t Framing;
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uint8_t Encryption;
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} _GNU_PACKED_ le_biginfo_adv_report_evt_t;
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//Adjust Host part API
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void ll_hci_init(void);
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void ll_hci_reset(void);
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void ll_hci_destory(void);
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void ll_hci_set_event_mask(const u8 *mask);
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void ll_hci_set_name(const char *name);
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void ll_hci_adv_set_params(uint16_t adv_int_min, uint16_t adv_int_max, uint8_t adv_type,
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uint8_t direct_address_type, uint8_t *direct_address,
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uint8_t channel_map, uint8_t filter_policy);
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void ll_hci_adv_set_data(uint8_t advertising_data_length, uint8_t *advertising_data);
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void ll_hci_adv_scan_response_set_data(uint8_t scan_response_data_length, uint8_t *scan_response_data);
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int ll_hci_adv_enable(bool enable);
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void ll_hci_scan_set_params(uint8_t scan_type, uint16_t scan_interval, uint16_t scan_window);
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int ll_hci_scan_enable(bool enable, u8 filter_duplicates);
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int ll_hci_create_conn(u8 *conn_param, u8 *addr_param);
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int ll_hci_create_conn_ext(void *param);
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int ll_hci_create_conn_cancel(void);
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int ll_hci_vendor_send_key_num(u16 con_handle, u8 num);
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int ll_vendor_latency_hold_cnt(u16 conn_handle, u16 hold_cnt);
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int ll_hci_encryption(u8 *key, u8 *plaintext_data);
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int ll_hci_get_le_rand(void);
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int ll_hci_start_encryption(u16 handle, u32 rand_low, u32 rand_high, u16 peer_ediv, u8 *ltk);
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int ll_hci_long_term_key_request_reply(u16 handle, u8 *ltk);
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int ll_hci_long_term_key_request_nagative_reply(u16 handle);
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int ll_hci_connection_update(u16 handle, u16 conn_interval_min, u16 conn_interval_max,
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u16 conn_latency, u16 supervision_timeout,
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u16 minimum_ce_length, u16 maximum_ce_length);
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u16 ll_hci_get_acl_data_len(void);
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u16 ll_hci_get_acl_total_num(void);
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void ll_hci_set_random_address(u8 *addr);
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int ll_hci_disconnect(u16 handle, u8 reason);
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int ll_hci_read_local_p256_pb_key(void);
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int ll_hci_generate_dhkey(const u8 *data, u32 size);
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//Adjust Controller part API
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void ll_hci_cmd_handler(int *cmd);
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void ll_event_handler(int *msg);
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void ll_hci_private_free_dma_rx(u8 *rx_head);
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void ll_hci_set_data_length(u16 conn_handle, u16 tx_octets, u16 tx_time);
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hci_ll_param_t *ll_hci_param_config_get(void);
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void hci_ll_get_device_address(uint8_t *addr_type, u8 *addr);
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void ll_hci_set_host_channel_classification(u8 *channel_map);
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// ble5
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void ll_hci_set_ext_adv_params(u8 *data, u32 size);
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void ll_hci_set_ext_adv_data(u8 *data, u32 size);
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void ll_hci_set_ext_adv_enable(u8 *data, u32 size);
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void ll_hci_set_phy(u16 conn_handle, u8 all_phys, u8 tx_phy, u8 rx_phy, u16 phy_options);
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void ll_hci_set_ext_scan_params(u8 *data, u32 size);
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void ll_hci_set_ext_scan_enable(u8 *data, u32 size);
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void ll_hci_ext_create_conn(u8 *data, u32 size);
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void ll_hci_set_periodic_adv_params(u8 *data, u32 size);
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void ll_hci_set_periodic_adv_data(u8 *data, u32 size);
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void ll_hci_set_periodic_adv_enable(u8 *data, u32 size);
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void ll_hci_periodic_adv_creat_sync(u8 *data, u32 size);
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void ll_hci_periodic_adv_terminate_sync(u8 *data, u32 size);
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void ll_hci_periodic_adv_create_sync_cancel(void);
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int le_controller_set_mac(void *addr);
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#endif
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213
include_lib/btctrler/ble/ll_config.h
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include_lib/btctrler/ble/ll_config.h
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/*********************************************************************************************
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* Filename : ll_config.h
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* Description : Lto 优化Macro 定义
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* Author : Bingquan
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* Email : bingquan_cai@zh-jieli.com
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* Last modifiled : 2018-12-19 16:12
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* Copyright:(c)JIELI 2011-2017 @ , All Rights Reserved.
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*********************************************************************************************/
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#ifndef _LL_CONFIG_H_
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#define _LL_CONFIG_H_
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#include <stdint.h> //for UINT64_C
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/*
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*-------------------LE FEATURE SUPPORT
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* brief : 运行时优化（LTO）下，代码空间优化；
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*/
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/* --- Core Spec 4.0 --- */
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#define LL_FEAT_ENCRYPTION (UINT64_C(1) << ( 0)) /*!< Encryption supported. */
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/* --- Core Spec 4.2 --- */
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#define LL_FEAT_CONN_PARAM_REQ_PROC (UINT64_C(1) << ( 1)) /*!< Connection Parameters Request Procedure supported. */
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#define LL_FEAT_EXT_REJECT_IND (UINT64_C(1) << ( 2)) /*!< Extended Reject Indication supported. */
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#define LL_FEAT_SLV_INIT_FEAT_EXCH (UINT64_C(1) << ( 3)) /*!< Slave-Initiated Features Exchange supported. */
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#define LL_FEAT_LE_PING (UINT64_C(1) << ( 4)) /*!< LE Ping supported. */
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#define LL_FEAT_DATA_LEN_EXT (UINT64_C(1) << ( 5)) /*!< Data Length Extension supported. */
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#define LL_FEAT_PRIVACY (UINT64_C(1) << ( 6)) /*!< LL Privacy supported. */
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#define LL_FEAT_EXT_SCAN_FILT_POLICY (UINT64_C(1) << ( 7)) /*!< Extended Scan Filter Policy supported. */
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/* --- Core Spec 5.0 --- */
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#define LL_FEAT_LE_2M_PHY (UINT64_C(1) << ( 8)) /*!< LE 2M PHY supported. */
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#define LL_FEAT_STABLE_MOD_IDX_TRANSMITTER (UINT64_C(1) << ( 9)) /*!< Stable Modulation Index - Transmitter supported. */
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#define LL_FEAT_STABLE_MOD_IDX_RECEIVER (UINT64_C(1) << (10)) /*!< Stable Modulation Index - Receiver supported. */
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#define LL_FEAT_LE_CODED_PHY (UINT64_C(1) << (11)) /*!< LE Coded PHY supported. */
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#define LL_FEAT_LE_EXT_ADV (UINT64_C(1) << (12)) /*!< LE Extended Advertising supported. */
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#define LL_FEAT_LE_PER_ADV (UINT64_C(1) << (13)) /*!< LE Periodic Advertising supported. */
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#define LL_FEAT_CH_SEL_2 (UINT64_C(1) << (14)) /*!< Channel Selection Algorithm #2 supported. */
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#define LL_FEAT_LE_POWER_CLASS_1 (UINT64_C(1) << (15)) /*!< LE Power Class 1 supported. */
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#define LL_FEAT_MIN_NUM_USED_CHAN (UINT64_C(1) << (16)) /*!< Minimum Number of Used Channels supported. */
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/* --- Core Spec 5.1 --- */
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#define LL_FEAT_CONN_CTE_REQ (UINT64_C(1) << (17)) /*!< Connection CTE Request supported */
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#define LL_FEAT_CONN_CTE_RSP (UINT64_C(1) << (18)) /*!< Connection CTE Response supported */
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#define LL_FEAT_CONNLESS_CTE_TRANS (UINT64_C(1) << (19)) /*!< Connectionless CTE Transmitter supported */
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#define LL_FEAT_CONNLESS_CTE_RECV (UINT64_C(1) << (20)) /*!< Connectionless CTE Receiver supported */
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#define LL_FEAT_ANTENNA_SWITCH_AOD (UINT64_C(1) << (21)) /*!< Anetenna Switching during CTE Transmission (AoD) supported */
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#define LL_FEAT_ANTENNA_SWITCH_AOA (UINT64_C(1) << (22)) /*!< Anetenna Switching during CTE Reception (AoA) supported */
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#define LL_FEAT_RECV_CTE (UINT64_C(1) << (23)) /*!< Receive Constant Tone Extension supported */
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#define LL_FEAT_PAST_SENDER (UINT64_C(1) << (24)) /*!< Periodic Advertising Sync Transfer – Sender supported. */
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#define LL_FEAT_PAST_RECIPIENT (UINT64_C(1) << (25)) /*!< Periodic Advertising Sync Transfer – Recipient supported. */
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#define LL_FEAT_SCA_UPDATE (UINT64_C(1) << (26)) /*!< Sleep Clock Accuracy Updates supported. */
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#define LL_FEAT_REMOTE_PUB_KEY_VALIDATION (UINT64_C(1) << (27)) /*!< Remote Public Key Validation supported. */
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/* --- Core Spec 5.2 --- */
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#define LL_FEAT_CIS_MASTER_ROLE (UINT64_C(1) << (28)) /*!< Connected Isochronous Stream Master Role supported. */
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#define LL_FEAT_CIS_SLAVE_ROLE (UINT64_C(1) << (29)) /*!< Connected Isochronous Stream Slave Role supported. */
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#define LL_FEAT_ISO_BROADCASTER (UINT64_C(1) << (30)) /*!< Isochronous Broadcaster Role supported. */
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#define LL_FEAT_ISO_SYNC (UINT64_C(1) << (31)) /*!< Isochronous Synchronizer Role supported. */
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#define LL_FEAT_ISO_HOST_SUPPORT (UINT64_C(1) << (32)) /*!< Host support for ISO Channels. */
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#define LL_FEAT_POWER_CONTROL_REQUEST (UINT64_C(1) << (33)) /*!< Power control requests supported. */
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#define LL_FEAT_POWER_CHANGE_IND (UINT64_C(1) << (34)) /*!< Power control power change indication supported. */
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#define LL_FEAT_PATH_LOSS_MONITOR (UINT64_C(1) << (35)) /*!< Path loss monitoring supported. */
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#define LL_FEAT_PATH_LOSS_MONITOR (UINT64_C(1) << (35)) /*!< Path loss monitoring supported. */
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#define LL_FEAT_PERIODIC_ADV_ADI_SUPPORT (UINT64_C(1) << (36)) /*!< Periodic Advertising ADI supported. */
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#define LL_FEAT_CONN_SUBRATE (UINT64_C(1) << (37)) /*!< Connection subrating supported. */
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#define LL_FEAT_CONN_SUBRATE_HOST_SUPPORT (UINT64_C(1) << (38)) /*!< Connection subratingHost supported. */
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#define LL_FEAT_CHANNEL_CLASSIFICATION (UINT64_C(1) << (39)) /*!< Channel classification supported. */
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#define LE_ENCRYPTION LL_FEAT_ENCRYPTION
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#define CONNECTION_PARAMETER_REQUEST LL_FEAT_CONN_PARAM_REQ_PROC
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#define EXTENDED_REJECT_INDICATION LL_FEAT_EXT_REJECT_IND
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#define LE_SLAVE_INIT_FEATURES_EXCHANGE LL_FEAT_SLV_INIT_FEAT_EXCH
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#define LE_PING LL_FEAT_LE_PING
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#define LE_DATA_PACKET_LENGTH_EXTENSION LL_FEAT_DATA_LEN_EXT
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#define LL_PRIVACY LL_FEAT_PRIVACY
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#define EXTENDED_SCANNER_FILTER_POLICIES LL_FEAT_EXT_SCAN_FILT_POLICY
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||||
#define LE_2M_PHY LL_FEAT_LE_2M_PHY
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||||
#define LE_CODED_PHY LL_FEAT_LE_CODED_PHY
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#define LE_EXTENDED_ADVERTISING LL_FEAT_LE_EXT_ADV
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||||
#define LE_PERIODIC_ADVERTISING LL_FEAT_LE_PER_ADV
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||||
#define CHANNEL_SELECTION_ALGORITHM_2 LL_FEAT_CH_SEL_2
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||||
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||||
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||||
#define LE_CORE_V50_FEATURES \
|
||||
( \
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||||
LE_2M_PHY | \
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||||
LE_CODED_PHY | \
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||||
LE_EXTENDED_ADVERTISING | \
|
||||
LE_PERIODIC_ADVERTISING | \
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||||
CHANNEL_SELECTION_ALGORITHM_2 | \
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0 \
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)
|
||||
|
||||
#if (LE_CORE_V50_FEATURES & LE_PERIODIC_ADVERTISING)
|
||||
#if ((LE_CORE_V50_FEATURES & LE_EXTENDED_ADVERTISING) == 0)
|
||||
#error "enable <LE_PERIODIC_ADVERTISING> must enable <LE_EXTENDED_ADVERTISING> at the same time"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define LE_FEATURES_CONST_TONE (LL_FEAT_CONN_CTE_REQ | \
|
||||
LL_FEAT_CONN_CTE_RSP | \
|
||||
LL_FEAT_CONNLESS_CTE_TRANS | \
|
||||
LL_FEAT_CONNLESS_CTE_RECV | \
|
||||
LL_FEAT_ANTENNA_SWITCH_AOD | \
|
||||
LL_FEAT_ANTENNA_SWITCH_AOA | \
|
||||
LL_FEAT_RECV_CTE)
|
||||
|
||||
#define LE_FEATURES_PAST (LL_FEAT_PAST_SENDER | \
|
||||
LL_FEAT_PAST_RECIPIENT)
|
||||
|
||||
#define LE_FEATURES_CIS (LL_FEAT_CIS_MASTER_ROLE | \
|
||||
LL_FEAT_CIS_SLAVE_ROLE | \
|
||||
LL_FEAT_ISO_HOST_SUPPORT)
|
||||
|
||||
#define LE_FEATURES_BIS (LL_FEAT_ISO_BROADCASTER | \
|
||||
LL_FEAT_ISO_SYNC | \
|
||||
LL_FEAT_ISO_HOST_SUPPORT)
|
||||
|
||||
#define LE_FEATURES_ISO (LE_FEATURES_BIS|LE_FEATURES_CIS)
|
||||
|
||||
#define LE_FEATURES_POWER_CONTROL (LL_FEAT_POWER_CONTROL_REQUEST | \
|
||||
LL_FEAT_POWER_CHANGE_IND | \
|
||||
LL_FEAT_PATH_LOSS_MONITOR)
|
||||
|
||||
extern const uint64_t config_btctler_le_features;
|
||||
#define LE_FEATURES_IS_SUPPORT(x) (config_btctler_le_features & (x))
|
||||
|
||||
#define LE_FEATURES_IS_SUPPORT_OPTIMIZE(x) if (LE_FEATURES_IS_SUPPORT(x) == 0x0) return
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
*-------------------LE ROLES SUPPORT
|
||||
* brief : 运行时优化（LTO）下，代码空间优化；
|
||||
*/
|
||||
#define LE_MASTER BIT(0)
|
||||
#define LE_SLAVE BIT(1)
|
||||
#define LE_ADV BIT(2)
|
||||
#define LE_SCAN BIT(3)
|
||||
#define LE_INIT BIT(4)
|
||||
|
||||
/*! \brief Combination */
|
||||
#define LE_CONN (LE_MASTER|LE_SLAVE)
|
||||
|
||||
extern const int config_btctler_le_roles;
|
||||
#define LE_ROLES_IS_SUPPORT(x) (config_btctler_le_roles & x)
|
||||
|
||||
#define LE_ROLES_IS_SUPPORT_OPTIMIZE(x) if (LE_ROLES_IS_SUPPORT(x) == 0x0) return
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
extern const int config_btctler_le_tws;
|
||||
#define LE_TWS_IS_SUPPORT() (config_btctler_le_tws)
|
||||
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
extern const int config_btctler_le_afh_en;
|
||||
#define LE_AFH_IS_SUPPORT() (config_btctler_le_afh_en)
|
||||
|
||||
#define LE_AFH_IS_SUPPORT_OPTIMIZE(x) if (LE_AFH_IS_SUPPORT() == 0x0) return
|
||||
|
||||
/*
|
||||
*-------------------LE PARAM CHECK
|
||||
* brief : 运行时优化（LTO）下，代码空间优化；
|
||||
*/
|
||||
// extern const int config_btctler_le_param_check;
|
||||
#define LE_PARAM_IS_CHECK() TRUE//(config_btctler_le_param_check)
|
||||
/*
|
||||
*-------------------LE RAM CONTROL
|
||||
*
|
||||
*/
|
||||
extern const int config_btctler_le_hw_nums;
|
||||
extern const int config_btctler_le_rx_nums;
|
||||
extern const int config_btctler_le_acl_packet_length;
|
||||
extern const int config_btctler_le_acl_total_nums;
|
||||
extern const int config_btctler_le_slave_conn_update_winden;
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
*-------------------LE Multi-link CONTROL
|
||||
*/
|
||||
extern const int config_btctler_le_master_multilink;
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
*-------------------LE Vendor baseband CONTROL
|
||||
*/
|
||||
#define VENDOR_BB_PIS_EN BIT(0)
|
||||
#define VENDOR_BB_PIS_HB BIT(1)
|
||||
#define VENDOR_BB_PIS_HB_M BIT(2)
|
||||
#define VENDOR_BB_MD_CLOSE BIT(3)
|
||||
#define VENDOR_BB_CONNECT_SLOT BIT(4)
|
||||
#define VENDOR_BB_NEW_SCAN_STRATEGY BIT(5)
|
||||
#define VENDOR_BB_PIS_HB_R BIT(6)
|
||||
#define VENDOR_BB_WL_COEX_ROLE_EN BIT(6)
|
||||
#define VENDOR_BB_WL_COEX_ROLE BIT(7)
|
||||
#define VENDOR_BB_ADV_PDU_INT(x) ((x) << 8) /* 4bit */
|
||||
#define VENDOR_BB_EVT_HOLD_TRIGG(x) ((x) << 12) /* 6bit */
|
||||
#define VENDOR_BB_RX_PAYLOAD_LEN(x) ((x) << 18) /* 7bit */
|
||||
#define VENDOR_BB_PIS_TX_PAYLOAD_LEN(x) ((x) << 25) /* 7bit*/
|
||||
|
||||
extern const u32 config_vendor_le_bb;
|
||||
extern const int config_rf_oob;
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
*-------------------LE close wait
|
||||
*/
|
||||
extern const int ble_disable_wait_enable;
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#endif //_LL_CONFIG_H_
|
||||
59
include_lib/btctrler/btcontroller_mode.h
Normal file
59
include_lib/btctrler/btcontroller_mode.h
Normal file
@ -0,0 +1,59 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : btcontroller_modules.h
|
||||
|
||||
* Description : Lto 优化Macro 定义
|
||||
|
||||
* Author : Bingquan
|
||||
|
||||
* Email : bingquan_cai@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2018-12-19 16:38
|
||||
|
||||
* Copyright:(c)JIELI 2011-2017 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
#ifndef _BTCONTROLLER_MODE_H_
|
||||
#define _BTCONTROLLER_MODE_H_
|
||||
|
||||
/*
|
||||
ble 测试串口默认使用usb口，代码要确保usb口没有其他地方使用
|
||||
开启测试模式，uart0 key 等一些功能默认关闭，请看特殊情况
|
||||
自行处理
|
||||
|
||||
1、提供实验室测试rf bqb的时候配 BT_BQB
|
||||
|
||||
2、提供实验室测试rf fcc的时候配 BT_FCC
|
||||
|
||||
3、如果要定频测试配BT_FRE 频点:2402 , 发射功率最大
|
||||
|
||||
4、性能测试配BT_PER,使用仪器直接连接测试即可,测试完毕后
|
||||
需要复位或者上电开机才会恢复正常流程，不复位或上电的话只支持链接一个设备
|
||||
|
||||
量产测试性能可直接配BT_NORMAL 然后通过某个外部操作来
|
||||
调用 void bredr_set_dut_enble(u8 en,u8 phone )
|
||||
en 1 :使能 bredr dut 测试然后就可以使用仪器链接测试
|
||||
phone: 1 可以被手机连接，0 不可以被手机连接上
|
||||
|
||||
如果样机通过按键等操作进入dut测试调用bredr_set_dut_enble使能可以被仪器链接，
|
||||
同时调用下面函数，关闭耳机快速链接，开启可发现可链接
|
||||
tws_cancle_all_noconn() ;
|
||||
user_send_cmd_prepare(USER_CTRL_WRITE_SCAN_ENABLE, 0, NULL);
|
||||
user_send_cmd_prepare(USER_CTRL_WRITE_CONN_ENABLE, 0, NULL);
|
||||
|
||||
|
||||
5、可以调用 void bt_fix_fre_api() 函数实现经典蓝牙定频测试，频点2402，发射功率最大，
|
||||
调用后不可恢复之前状态，只是用来量产测试，测试完需要复位或重新上电开机！
|
||||
|
||||
6、可以调用 void ble_fix_fre_api()函数实现ble定频测试,发射功率最大,
|
||||
|
||||
*/
|
||||
|
||||
#define BT_NORMAL 0x01
|
||||
#define BT_BQB 0x02
|
||||
#define BT_FCC 0x04
|
||||
#define BT_FRE 0x10
|
||||
#define BT_PER 0x20
|
||||
|
||||
|
||||
#define CONFIG_BT_MODE BT_NORMAL
|
||||
|
||||
#endif
|
||||
279
include_lib/btctrler/btcontroller_modules.h
Normal file
279
include_lib/btctrler/btcontroller_modules.h
Normal file
@ -0,0 +1,279 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : btcontroller_modules.h
|
||||
|
||||
* Description : Lto 优化Macro 定义
|
||||
|
||||
* Author : Bingquan
|
||||
|
||||
* Email : bingquan_cai@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2018-12-19 16:38
|
||||
|
||||
* Copyright:(c)JIELI 2011-2017 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
#ifndef _BTCONTROLLER_H_
|
||||
#define _BTCONTROLLER_H_
|
||||
|
||||
#include "hci_transport.h"
|
||||
#include "btcontroller_mode.h"
|
||||
|
||||
#include "ble/hci_ll.h"
|
||||
|
||||
#include "classic/hci_lmp.h"
|
||||
|
||||
|
||||
/* app 层修改蓝牙版本，可在BT_STATUS_INIT_OK case
|
||||
调用 set_bt_version 函数更改蓝牙版本号
|
||||
*/
|
||||
#define BLUETOOTH_CORE_SPEC_42 0x08
|
||||
#define BLUETOOTH_CORE_SPEC_50 0x09
|
||||
#define BLUETOOTH_CORE_SPEC_51 0x0a
|
||||
#define BLUETOOTH_CORE_SPEC_52 0x0b
|
||||
extern void set_bt_version(u8 version);
|
||||
|
||||
|
||||
/*
|
||||
*-------------------Module SUPPORT
|
||||
* brief : 运行时优化（LTO）下，代码空间优化；
|
||||
*/
|
||||
#define BT_MODULE_CLASSIC BIT(0)
|
||||
#define BT_MODULE_LE BIT(1)
|
||||
|
||||
extern const int config_btctler_modules;
|
||||
#define BT_MODULES_IS_SUPPORT(x) (config_btctler_modules & (x))
|
||||
/*-----------------------------------------------------------*/
|
||||
extern const int config_stack_modules;
|
||||
#define STACK_MODULES_IS_SUPPORT(x) (config_stack_modules & (x))
|
||||
|
||||
/*
|
||||
*-------------------Mode SELECT
|
||||
* brief : 运行时优化（LTO）下，代码空间优化；
|
||||
*/
|
||||
extern const int config_btctler_mode;
|
||||
#define BT_MODE_IS(x) (config_btctler_mode & (x))
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
extern const int config_btctler_hci_standard;
|
||||
#define BT_HCI_STANDARD_IS_SUPPORT(x) (config_btctler_hci_standard)
|
||||
|
||||
|
||||
extern const int config_bt_function ;
|
||||
#define BT_ENCTRY_TASK BIT(0)
|
||||
#define BT_MASTER_AFH BIT(1)
|
||||
#define BT_MASTER_QOS BIT(2)
|
||||
|
||||
|
||||
#define BT_FUNCTION_IS(x) (config_bt_function & (x))
|
||||
|
||||
|
||||
extern const int CONFIG_TEST_DUT_CODE;
|
||||
extern const int CONFIG_TEST_FCC_CODE;
|
||||
extern const int CONFIG_TEST_DUT_ONLY_BOX_CODE;
|
||||
extern const int CONFIG_BREDR_INQUIRY;
|
||||
|
||||
extern const int CONFIG_INQUIRY_PAGE_OFFSET_ADJUST ;
|
||||
|
||||
extern const int CONFIG_LMP_NAME_REQ_ENABLE ;
|
||||
extern const int CONFIG_LMP_PASSKEY_ENABLE ;
|
||||
extern const int CONFIG_LMP_MASTER_ESCO_ENABLE ;
|
||||
extern const int config_btctler_bredr_master ;
|
||||
extern const int config_bredr_afh_user ;
|
||||
extern const int config_bredr_master_afh ;
|
||||
extern const int CONFIG_ESCO_MUX_RX_BULK_ENABLE ;
|
||||
extern const int config_bt_temperature_pll_trim ;
|
||||
extern const int CONFIG_WIFI_DETECT_ENABLE;
|
||||
extern const int ESCO_FORWARD_ENABLE;
|
||||
/********************************************************************************/
|
||||
/*
|
||||
* API
|
||||
*
|
||||
*/
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief rf_set_24g_hackable_coded
|
||||
*
|
||||
* @param coded 2.4G 配对码
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void rf_set_24g_hackable_coded(int coded);
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief bt_pll_para
|
||||
*
|
||||
* @param osc
|
||||
* @param sys
|
||||
* @param low_power
|
||||
* @param xosc
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void bt_pll_para(u32 osc, u32 sys, u8 low_power, u8 xosc);
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief bt_production_test
|
||||
*
|
||||
* @param en
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void bt_production_test(u8 en);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief bt_set_rxtx_status_enable
|
||||
*
|
||||
* @param en
|
||||
*
|
||||
*
|
||||
|
||||
TX RX
|
||||
AI800x PA13 PA12
|
||||
AC692x PA13 PA12
|
||||
AC693x PA8 PA9
|
||||
AC695x PA9 PA10
|
||||
AC696x PC1 PC2
|
||||
AC694x PB1 PB2
|
||||
AC697x PC2 PC3
|
||||
AC631x PA7 PA8
|
||||
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void bt_set_rxtx_status_enable(u8 en);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief bt_osc_offset_ext_save
|
||||
*
|
||||
* @param offset
|
||||
*
|
||||
* 更新并且保存频偏
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void bt_osc_offset_ext_save(s32 offset);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief bt_osc_offset_ext_updata
|
||||
*
|
||||
* @param offset
|
||||
*
|
||||
* 更新频偏
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void bt_osc_offset_ext_updata(s32 offset);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief 初始化配置蓝牙发射功率最大值范围
|
||||
*
|
||||
* @param pwr edr 连接后发射功率(range:0~9)
|
||||
* @param pg_pwr edr page 可连接状态发射功率
|
||||
* @param iq_pwr edr inquiry 可发现状态发射功率
|
||||
* @param ble_pwr ble 发射功率
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
/*
|
||||
蓝牙TX发射功率档位, 参考功率值(dbm) ,超过等级范围默认设置为最高档
|
||||
BD29: rang(0~8) {-18.3, -14.6, -12.1, -8.5, -6.0, -4.1, -1.1, +1.1, +4.0, +6.1}
|
||||
BD19: rang(0~10) {-17.6, -14.0, -11.5, -9.6, -6.6, -4.4, -0.79, +1.12, +3.8, +5.65, +8.04}
|
||||
BR23: rang(0~9) {-15.7, -12.5, -10.0, -6.6, -4.4, -2.5, -0.1, +2.1, +4.6, +6.4}
|
||||
BR25: rang(0~9) {-15.7, -12.5, -10.0, -6.6, -4.4, -2.5, -0.1, +2.1, +4.6, +6.4}
|
||||
BR30: rang(0~8) {-17.48, -11.46, -7.96, -3.59, -0.79, +1.12, +3.8, +6.5, +8.44}
|
||||
BR34: rang(0~10) {-17.6, -14.0, -11.5, -9.6, -6.6, -4.4, -1.8, 0, +2.1, +4, +6.3}
|
||||
*/
|
||||
|
||||
void bt_max_pwr_set(u8 pwr, u8 pg_pwr, u8 iq_pwr, u8 ble_pwr);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief bt_set_ldos
|
||||
*
|
||||
* @param mode
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void bt_set_ldos(u8 mode);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief ble_set_fix_pwr
|
||||
*
|
||||
* @param fix (0~max)
|
||||
* 动态调整BLE的发射功率
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void ble_set_fix_pwr(u8 fix);
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief bredr_set_fix_pwr
|
||||
*
|
||||
* @param fix (0~max)
|
||||
* 动态调整EDR的发射功率
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void bredr_set_fix_pwr(u8 fix);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief ble_rf_vendor_fixed_channel
|
||||
*
|
||||
* @param channel_index: 指定信道定频: range 0~39 fixed freq, or 0xff --close fixed,default 37、38、39
|
||||
* @param pktcnt: adv方式,1次发包的个数: range 1~3
|
||||
* 配置ble 的 adv、scan、init 状态定频
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
bool ble_rf_vendor_fixed_channel(u8 channel_index, u8 pktcnt);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief bredr_get_rssi_for_address
|
||||
* 获取已连接设备的rssi
|
||||
*
|
||||
* @param address 对方mac地址
|
||||
* @return rssi 值，range(-127 ~ +127)
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
s8 bredr_get_rssi_for_address(u8 *address);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief 配置tx 是否支持包类型, (sdk默认支持)
|
||||
*
|
||||
* @param packet_type
|
||||
* @param support_en 0 or 1
|
||||
* @return true or false
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
typedef enum {
|
||||
PKT_TYPE_2DH5_EU = 0,
|
||||
} pkt_type_eu;
|
||||
|
||||
bool bredr_link_vendor_support_packet_enable(pkt_type_eu packet_type, u8 support_en);
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief 配置ble 优先级锁定不低压ACL, (sdk 默认自动调节)
|
||||
*
|
||||
* @param role:0--master,1--slave
|
||||
* @param enalbe 0 or 1
|
||||
* @return null
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void ble_vendor_set_hold_prio(u8 role, u8 enable);
|
||||
|
||||
void set_bt_afh_classs_enc(u8 afh_class);
|
||||
void set_bt_enhanced_power_control(u8 en);
|
||||
void set_bt_data_rate_acl_3mbs_mode(u8 en);
|
||||
|
||||
void set_bt_full_name_event(u8 en);
|
||||
|
||||
/* coexist between bt chips */
|
||||
void bt_wl_coex_init(uint8_t state);
|
||||
void bt_wl_coex_enable(bool enable);
|
||||
|
||||
#endif
|
||||
130
include_lib/btctrler/btctrler_task.h
Normal file
130
include_lib/btctrler/btctrler_task.h
Normal file
@ -0,0 +1,130 @@
|
||||
#ifndef BTCTRLER_TASK_H
|
||||
#define BTCTRLER_TASK_H
|
||||
|
||||
#include "typedef.h"
|
||||
#include "system/task.h"
|
||||
|
||||
enum {
|
||||
LMP_EVENT = Q_USER + 1,
|
||||
LMP_HCI_CMD,
|
||||
LMP_HCI_CMD_TO_CONN,
|
||||
HCI_COMMON_CMD,
|
||||
LL_EVENT,
|
||||
HCI_CMD_TO_LL,
|
||||
TWS_LMP_EVENT,
|
||||
MSG_BT_UPDATA_START,
|
||||
MSG_BT_UPDATE_LOADER_DOWNLOAD_START,
|
||||
MSG_BLE_TEST_UPDATA_START,
|
||||
MSG_BLE_TEST_OTA_LOADER_DOWNLOAD_START,
|
||||
MSG_TASK_READY,
|
||||
MSG_TASK_DEL,
|
||||
};
|
||||
|
||||
enum {
|
||||
BTCTRLER_EVENT_RESUME_REQ = 1,
|
||||
};
|
||||
|
||||
#define SYS_EVENT_FROM_CTRLER (('C' << 24) | ('T' << 16) | ('R' << 8) | '\0')
|
||||
|
||||
|
||||
|
||||
|
||||
int bredr_link_event(void *link, int argc, ...);
|
||||
|
||||
int bredr_tws_link_event(void *link, int argc, ...);
|
||||
|
||||
int btctrler_hci_cmd_to_task(int cmd, int argc, ...);
|
||||
|
||||
int lmp_hci_cmd_to_conn_for_handle(u16 handle, int argc, ...);
|
||||
|
||||
int lmp_hci_cmd_to_conn_for_addr(u8 *addr, int argc, ...);
|
||||
|
||||
int lmp_hci_cmd_to_conn(void *conn, int argc, ...);
|
||||
|
||||
|
||||
#define lmp_hci_cmd_to_task(argc, ...) btctrler_hci_cmd_to_task(LMP_HCI_CMD, argc, ## __VA_ARGS__)
|
||||
|
||||
#define ll_hci_cmd_to_task(argc, ...) btctrler_hci_cmd_to_task(HCI_CMD_TO_LL, argc, ## __VA_ARGS__)
|
||||
|
||||
|
||||
int btctrler_task_init(const void *transport, const void *config);
|
||||
|
||||
void btctrler_resume_req();
|
||||
|
||||
void btctrler_resume();
|
||||
|
||||
int btctrler_suspend(u8 suepend_rx_bulk);
|
||||
|
||||
int btctrler_task_ready();
|
||||
|
||||
int btctrler_task_exit();
|
||||
|
||||
int btctrler_task_close_bredr();
|
||||
void btctrler_task_init_bredr();
|
||||
|
||||
void set_idle_period_slot(u16 slot);
|
||||
enum {
|
||||
TESTBOX_INFO_VBAT_VALUE = 0, //(u16 (*handle)(void))
|
||||
TESTBOX_INFO_VBAT_PERCENT, //(u8 (*handle)(void))
|
||||
TESTBOX_INFO_BURN_CODE, //(u8 *(*handle)(u8 *len))
|
||||
TESTBOX_INFO_SDK_VERSION, //(u8 *(*handle)(u8 *len))
|
||||
};
|
||||
|
||||
void bt_testbox_ex_info_get_handle_register(u8 info_type, void *handle);
|
||||
u8 bredr_bulk_change_rx_bulk(u8 mode);
|
||||
void lmp_set_features_req_step(u8 *addr);
|
||||
|
||||
struct ble_dut_tx_param_t {
|
||||
u8 ch_index; //data[0]
|
||||
u8 payload_len; //data[1]
|
||||
u8 payload_type;//data[2]
|
||||
u8 phy_type; //data[3]
|
||||
};
|
||||
|
||||
struct ble_dut_rx_param_t {
|
||||
u8 ch_index; //data[0]
|
||||
u8 phy_type; //data[1]
|
||||
};
|
||||
|
||||
enum BLE_DUT_CTRL_TYPE {
|
||||
BLE_DUT_SET_RX_MODE = 0, //param1:struct ble_dut_rx_param_t *param;
|
||||
BLE_DUT_SET_TX_MODE, //param1:struct ble_dut_tx_param_t *param;
|
||||
BLE_DUT_SET_TEST_END, //param1:u16 *pkt_valid_cnt,param2:u16 *pkt_err_cnt;
|
||||
};
|
||||
|
||||
struct ble_dut_ops_t {
|
||||
|
||||
/* *****************************************************************************/
|
||||
/**
|
||||
* @brief : initialize the ble dut test module
|
||||
*
|
||||
* @param : void
|
||||
*
|
||||
* @return : pointer to instance of test module
|
||||
*/
|
||||
/* *****************************************************************************/
|
||||
void *(*init)(void);
|
||||
|
||||
/* *****************************************************************************/
|
||||
/**
|
||||
* @brief : ble dut test control api,such as setting rx/tx mode,stop testing
|
||||
*
|
||||
* @param : control type,using enum BLE_DUT_CTRL_TYPE value;
|
||||
* @param : vary from different control type;
|
||||
*/
|
||||
/* *****************************************************************************/
|
||||
int (*ioctrl)(int ctrl, ...);
|
||||
|
||||
/* *****************************************************************************/
|
||||
/**
|
||||
* @brief : exit the ble dut test module
|
||||
*
|
||||
* @param : poniter to instance of test module
|
||||
*/
|
||||
/* *****************************************************************************/
|
||||
void (*exit)(void *priv);
|
||||
};
|
||||
|
||||
extern const struct ble_dut_ops_t *__ble_dut_ops;
|
||||
|
||||
#endif
|
||||
220
include_lib/btctrler/classic/hci_lmp.h
Normal file
220
include_lib/btctrler/classic/hci_lmp.h
Normal file
@ -0,0 +1,220 @@
|
||||
#ifndef LMP_API_H
|
||||
#define LMP_API_H
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
int lmp_private_is_clearing_a2dp_packet(void *_conn);
|
||||
|
||||
int lmp_private_a2dp_channel_exist(void *_conn);
|
||||
|
||||
int lmp_private_get_sbc_remain_time(void *_conn, u8 include_tws);
|
||||
|
||||
void *lmp_private_open_sbc_channel(u8 *addr, u16 channel, u8 codec_type);
|
||||
|
||||
void lmp_private_free_sbc_packet(void *_conn, void *packet);
|
||||
|
||||
int lmp_private_get_sbc_data_len(void *_conn);
|
||||
|
||||
int lmp_private_get_rx_buffer_size();
|
||||
|
||||
void lmp_private_set_max_rx_buf_persent(u8 *addr, int persent);
|
||||
|
||||
void *lmp_private_fetch_sbc_packet(void *_conn, int *len, void *_prev, int);
|
||||
|
||||
int lmp_private_get_sbc_packet_num(void *_conn);
|
||||
void lmp_private_close_sbc_channel(void *_conn);
|
||||
|
||||
int lmp_private_get_sbc_packet(void *_conn, u8 **frame, int block);
|
||||
|
||||
u8 *lmp_private_get_tx_packet_buffer(int size);
|
||||
|
||||
int lmp_private_clear_a2dp_packet(void *_conn, u16 seqn_number);
|
||||
|
||||
int lmp_private_send_esco_packet(void *priv, u8 *packet, int len);
|
||||
|
||||
u8 *lmp_private_remote_addr_for_handler(int handle);
|
||||
|
||||
u16 lmp_private_handler_for_remote_addr(u8 *addr, int link_type);
|
||||
|
||||
int lmp_private_get_rx_buffer_total_size(void *_conn);
|
||||
|
||||
int lmp_private_get_rx_buffer_remain_size(void *_conn);
|
||||
|
||||
void lmp_hci_private_hold_acl_packet(u8 *packet);
|
||||
|
||||
void lmp_hci_private_free_acl_packet(u8 *packet);
|
||||
|
||||
void lmp_hci_private_try_free_acl_packet(u8 *packet);
|
||||
|
||||
int lmp_hci_send_packet(u8 *packet, int len);
|
||||
|
||||
int lmp_hci_send_packet_standard(const u8 *packet, int len);
|
||||
|
||||
int lmp_hci_reset();
|
||||
|
||||
int lmp_hci_write_scan_enable(u8 enable);
|
||||
|
||||
void lmp_hci_write_class_of_device(int dev_class);
|
||||
|
||||
void lmp_hci_write_local_name(const char *name);
|
||||
void lmp_hci_write_local_priv_version(const char *ic_verson, const char *priv_version, u8 *tws_local_addr);
|
||||
|
||||
void lmp_hci_write_local_address(const u8 *addr);
|
||||
|
||||
void lmp_hci_write_simple_pairing_mode(u8 enable);
|
||||
|
||||
void lmp_hci_write_super_timeout(u16 timeout);
|
||||
void lmp_hci_write_page_timeout(u16 timeout);
|
||||
void lmp_hci_write_tws_internal_addr(u8 *internal_addr_local, u8 *internal_addr_remote);
|
||||
|
||||
void lmp_hci_write_link_supervision_timeout(u16 handle, int);
|
||||
|
||||
int lmp_hci_write_le_host_support(int features);
|
||||
|
||||
int lmp_hci_read_pin_type();
|
||||
|
||||
void lmp_hci_set_pin_code(const char *code, u8 len);
|
||||
|
||||
void lmp_hci_pin_code_request_reply(u8 *addr, u8 len, u8 *pin_code);
|
||||
|
||||
void lmp_hci_pin_code_request_negative_reply(u8 *addr);
|
||||
|
||||
int lmp_hci_write_pin_type(u8 type);
|
||||
|
||||
int lmp_hci_set_connection_encryption(u16 handle, int enable);
|
||||
|
||||
void lmp_hci_io_capability_request_reply(u8 *addr, u8 io_cap, u8 oob_data, u8 auth_req);
|
||||
|
||||
void lmp_hci_user_confirmation_request_reply(u8 *address);
|
||||
|
||||
void lmp_hci_user_confirmation_request_negative_reply(u8 *addr);
|
||||
|
||||
int lmp_hci_disconnect(u16 handle, u8 reason);
|
||||
int lmp_hci_test_key_cmd(u8 cmd, u16 handle);
|
||||
int lmp_hci_send_user_info_cmd(u32 info, u16 handle);
|
||||
|
||||
void lmp_hci_accept_connection_request(u8 *addr, u8 role);
|
||||
|
||||
void lmp_hci_accept_sco_connection_request(u8 *addr, u32 tx_bandwidth,
|
||||
u32 rx_bandwidth, u16 max_latency, u16 content_format,
|
||||
u8 retransmission, u16 packey_type);
|
||||
|
||||
void lmp_hci_reject_connection_request(u8 *addr, u8 reason);
|
||||
|
||||
void lmp_hci_switch_role_command(u8 *addr, u8 role);
|
||||
|
||||
void lmp_hci_authentication_requested(u16 handler);
|
||||
|
||||
void lmp_hci_link_key_request_reply(u8 *addr, u8 *link_key);
|
||||
|
||||
void lmp_hci_link_key_request_negative_reply(u8 *addr);
|
||||
|
||||
void lmp_hci_write_default_link_policy_settings(u16 setting);
|
||||
|
||||
void lmp_hci_release_packet(u8 *packet);
|
||||
|
||||
void lmp_hci_create_connection(const u8 *addr, u16 packet_type,
|
||||
u8 repetition_mode, u8 reserved,
|
||||
u16 clk_offset, u8 allow_role_switch);
|
||||
|
||||
void lmp_hci_connection_cancel(u8 *addr);;
|
||||
|
||||
void lmp_hci_cancel_page();
|
||||
void lmp_hci_inquiry(int lap, u8 length, u8 num);
|
||||
void lmp_hci_cancel_inquiry();
|
||||
void lmp_hci_sniff_mode_command(u16 handle, u16 max_interval, u16 min_interval, u16 attempt, u16 timeout);
|
||||
void lmp_hci_exit_sniff_mode_command(u16 handle);
|
||||
|
||||
void lmp_hci_host_num_of_completed_packets(u16 handle, u16 num_of_completed_packet);
|
||||
|
||||
int lmp_hci_read_remote_version_information(u16 handle);
|
||||
|
||||
void lmp_hci_read_remote_supported_features(u16 handle);
|
||||
|
||||
void lmp_hci_read_remote_extended_features(u16 handle);
|
||||
|
||||
void lmp_hci_role_discovery(u16 handle);
|
||||
|
||||
void lmp_hci_read_clock_offset(u16 handle);
|
||||
|
||||
void lmp_hci_read_link_policy_settings(u16 handle);
|
||||
void lmp_hci_write_link_policy_settings(u16 handle, u16 policy);
|
||||
|
||||
void lmp_hci_remote_name_request(u8 *addr, u8 page_scan_repetition_mode, u16 clk_offset);
|
||||
|
||||
void lmp_set_sniff_establish_by_remote(u8 enable);
|
||||
|
||||
void lmp_set_sniff_disable(void);
|
||||
|
||||
|
||||
u8 lmp_hci_read_local_supported_features(int octet);
|
||||
|
||||
void lmp_hci_write_local_supported_features(u8 features, int octet);
|
||||
|
||||
|
||||
u8 lmp_standard_connect_check(void);
|
||||
|
||||
void lmp_hci_send_keypress_notification(u8 *addr, u8 key);
|
||||
void lmp_hci_user_keypress_request_reply(u8 *addr, u32 key);
|
||||
void lmp_hci_user_keypress_request_negative_reply(u8 *addr, u8 key);
|
||||
|
||||
|
||||
void lmp_hci_set_role_switch_supported(bool enable);
|
||||
void lmp_hci_tx_channel_chassification(u8 *map);
|
||||
|
||||
|
||||
|
||||
u8 *get_tws_internal_addr(int channel);
|
||||
|
||||
extern int lmp_private_esco_suspend_resume(int flag);;
|
||||
|
||||
void user_set_tws_box_mode(u8 mode);
|
||||
|
||||
|
||||
void bt_set_tx_power(u8 txpower);
|
||||
|
||||
|
||||
void bredr_bulk_change(u8 mode);
|
||||
|
||||
|
||||
extern u8 get_bredr_link_state();
|
||||
|
||||
extern u32 get_bt_slot_time(u8 type, u32 time, int *ret_time, int (*local_us_time)(void));
|
||||
extern u32 get_sync_rec_instant_us_time();
|
||||
extern u8 tws_remote_state_check(void);
|
||||
extern void tws_remote_state_clear(void);
|
||||
extern void user_set_tws_box_mode(u8 mode);
|
||||
|
||||
|
||||
extern void bredr_fcc_init(u8 mode, u8 fre);
|
||||
extern void bredr_set_dut_enble(u8 en, u8 phone);
|
||||
|
||||
extern int a2dp_media_clear_packet_before_seqn(u16 seqn_number);
|
||||
|
||||
|
||||
struct link_fix_rx_result {
|
||||
u32 rx_err_b; //接收到err bit
|
||||
u32 rx_sum_b; //接收到正确bit
|
||||
u32 rx_perr_p; //接收到crc 错误 包数
|
||||
u32 rx_herr_p; //接收到crc 以外其他错误包数
|
||||
u32 rx_invail_p; //接收到crc错误bit太多的包数，丢弃不统计到err bit中
|
||||
};
|
||||
|
||||
#define DH1_1 0
|
||||
#define DH3_1 1
|
||||
#define DH5_1 2
|
||||
#define DH1_2 3
|
||||
#define DH3_2 4
|
||||
#define DH5_2 5
|
||||
|
||||
int link_fix_tx_enable(u8 *remote_addr, u8 fre, u8 packet_type, u16 payload);
|
||||
int link_fix_rx_enable(u8 *remote_addr, u8 fre, u8 packet_type, u16 payload);
|
||||
void link_fix_txrx_disable();
|
||||
void link_fix_rx_update_result(struct link_fix_rx_result *result);
|
||||
void link_fix_rx_dump_result();
|
||||
|
||||
|
||||
#endif
|
||||
18
include_lib/btctrler/classic/lmp_config.h
Normal file
18
include_lib/btctrler/classic/lmp_config.h
Normal file
@ -0,0 +1,18 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : lmp_config.h
|
||||
|
||||
* Description : Lto 优化Macro 定义
|
||||
|
||||
* Author : Bingquan
|
||||
|
||||
* Email : bingquan_cai@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2018-12-19 16:38
|
||||
|
||||
* Copyright:(c)JIELI 2011-2017 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
#ifndef _LMP_CONFIG_H_
|
||||
#define _LMP_CONFIG_H_
|
||||
|
||||
#endif
|
||||
|
||||
243
include_lib/btctrler/classic/tws_api.h
Normal file
243
include_lib/btctrler/classic/tws_api.h
Normal file
@ -0,0 +1,243 @@
|
||||
#ifndef TWS_API_H
|
||||
#define TWS_API_H
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
#include "classic/tws_event.h"
|
||||
#include "classic/tws_local_media_sync.h"
|
||||
#include "classic/tws_data_trans.h"
|
||||
|
||||
#define TWS_ROLE_MASTER 0
|
||||
#define TWS_ROLE_SLAVE 1
|
||||
|
||||
/*
|
||||
* tws 状态
|
||||
*/
|
||||
#define TWS_STA_SIBLING_DISCONNECTED 0x00000001 //tws未连接
|
||||
#define TWS_STA_SIBLING_CONNECTED 0x00000002 //tws已连接
|
||||
#define TWS_STA_PHONE_DISCONNECTED 0x00000004 //手机未连接
|
||||
#define TWS_STA_PHONE_CONNECTED 0x00000008 //手机已连接
|
||||
#define TWS_STA_ESCO_OPEN 0x00000010 //正在打电话
|
||||
#define TWS_STA_SBC_OPEN 0x00000020 //正在播歌
|
||||
#define TWS_STA_MONITOR_START 0x00000040 //tws从机开始监听手机链路
|
||||
#define TWS_STA_LOCAL_TWS_OPEN 0x00000080 //开启local_tws
|
||||
#define TWS_STA_ESCO_OPEN_LINK 0x00000100 //正在打电话，create link
|
||||
#define TWS_STA_MONITOR_ING 0x00000200 //tws主从收到监听信息
|
||||
|
||||
#define TWS_SYNC_CALL_TX 1
|
||||
#define TWS_SYNC_CALL_RX 2
|
||||
|
||||
struct tws_sync_call {
|
||||
int uuid;
|
||||
void (*func)(int priv, int err);
|
||||
const char *task_name;
|
||||
};
|
||||
|
||||
extern const struct tws_sync_call tws_sync_call_begin[];
|
||||
extern const struct tws_sync_call tws_sync_call_end[];
|
||||
|
||||
#define list_for_each_tws_sync_call(p) \
|
||||
for (p = tws_sync_call_begin; p < tws_sync_call_end; p++)
|
||||
|
||||
|
||||
#define TWS_SYNC_CALL_REGISTER(sync_call) \
|
||||
static const struct tws_sync_call __tws_##sync_call sec(.tws_sync_call)
|
||||
|
||||
|
||||
#define TWS_FUNC_ID(a, b, c, d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d))
|
||||
|
||||
typedef void (*tws_func_t)(void *data, u16 len, bool rx);
|
||||
|
||||
struct tws_func_stub {
|
||||
u32 func_id;
|
||||
tws_func_t func; //call from irq
|
||||
};
|
||||
|
||||
#define REGISTER_TWS_FUNC_STUB(stub) \
|
||||
static const struct tws_func_stub stub sec(.tws_func_stub)
|
||||
|
||||
extern const struct tws_func_stub tws_func_stub_begin[];
|
||||
extern const struct tws_func_stub tws_func_stub_end[];
|
||||
|
||||
static inline tws_func_t tws_function_get_by_id(u32 id)
|
||||
{
|
||||
const struct tws_func_stub *p;
|
||||
|
||||
for (p = tws_func_stub_begin; p < tws_func_stub_end; p++) {
|
||||
if (p->func_id == id) {
|
||||
return p->func;
|
||||
}
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline void tws_function_call_by_id(u32 id, void *data, u16 len, bool rx)
|
||||
{
|
||||
const struct tws_func_stub *p;
|
||||
|
||||
for (p = tws_func_stub_begin; p < tws_func_stub_end; p++) {
|
||||
if (p->func_id == id) {
|
||||
p->func(data, len, rx);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* 通过搜索码搜索tws设备
|
||||
*/
|
||||
int tws_api_search_sibling_by_code(u16 code, int timeout_ms);
|
||||
|
||||
/*
|
||||
*打开可发现, 可连接，可被手机和tws搜索到
|
||||
*/
|
||||
int tws_api_wait_pair_by_code(u16 code, const char *name, int timeout_ms);
|
||||
int tws_api_wait_pair_by_ble(u16 code, const char *name, int timeout_ms);
|
||||
|
||||
int tws_api_wait_tws_pair(int code, const char *name);
|
||||
|
||||
int tws_api_wait_phone_pair(int code, const char *name);
|
||||
|
||||
|
||||
int tws_wait_tws_pair(u16 code, const char *name);
|
||||
|
||||
int tws_wait_phone_pair(u16 code, const char *name);
|
||||
|
||||
|
||||
/*
|
||||
*取消可发现, 可连接，可被tws搜索到
|
||||
*/
|
||||
int tws_api_cancle_wait_pair();
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* 搜索并连接已经配对过的tws
|
||||
* timeout: 单位ms， 0 表示不超时
|
||||
* 返回值: 0: 函数调用成功
|
||||
*/
|
||||
int tws_api_create_connection(int timeout);
|
||||
|
||||
|
||||
/*
|
||||
* 取消搜索已配对的tws
|
||||
*/
|
||||
int tws_api_cancle_create_connection();
|
||||
|
||||
|
||||
/*
|
||||
* 打开可发现，可连接, 可以被手机和已配对过的tws连接
|
||||
*/
|
||||
int tws_api_wait_connection();
|
||||
|
||||
|
||||
/*
|
||||
* 断开tws直接的连接
|
||||
* reason: 断开原因
|
||||
*/
|
||||
int tws_api_detach(enum tws_detach_reason reason);
|
||||
|
||||
/*
|
||||
* 获取主从, 播歌和打电话状态下结果不可靠,请勿调用
|
||||
*/
|
||||
int tws_api_get_role();
|
||||
|
||||
/*
|
||||
* 获取tws 连接的状态
|
||||
* 返回值： 详见顶部TWS_STA_**
|
||||
*/
|
||||
int tws_api_get_tws_state();
|
||||
|
||||
/*
|
||||
* 设置tws对方地址
|
||||
*/
|
||||
int tws_api_set_sibling_addr(u8 *addr);
|
||||
|
||||
/*
|
||||
* 获取tws对方地址
|
||||
*/
|
||||
int tws_api_get_sibling_addr(u8 *addr);
|
||||
|
||||
|
||||
/*
|
||||
* 获取tws本地地址
|
||||
*/
|
||||
int tws_api_get_local_addr(u8 *addr);
|
||||
|
||||
/*
|
||||
*发送解除配对命令给对方, 成功后会收到TWS_EVENT_REMOVE_PAIRS事件
|
||||
*/
|
||||
int tws_api_remove_pairs();
|
||||
|
||||
|
||||
/*
|
||||
* 设置本地声道
|
||||
* 'L': 左声道
|
||||
* 'R': 右声道
|
||||
* 'U': 双声道合并
|
||||
*/
|
||||
void tws_api_set_local_channel(char channel);
|
||||
|
||||
/*
|
||||
* 获取本地声道
|
||||
*/
|
||||
char tws_api_get_local_channel();
|
||||
|
||||
/*
|
||||
* 通过uuid，主从同步调用相同函数
|
||||
*/
|
||||
int tws_api_sync_call_by_uuid(int uuid, int priv, int delay_ms);
|
||||
|
||||
/*
|
||||
* tws 数据发送函数, 要求 len <= 512
|
||||
*/
|
||||
int tws_api_send_data_to_sibling(void *data, u16 len, u32 func_id);
|
||||
|
||||
int tws_api_send_data_to_slave(void *data, int len, u32 func_id);
|
||||
|
||||
int tws_profile_init();
|
||||
int tws_profile_exit();
|
||||
|
||||
|
||||
|
||||
int tws_api_connect_in_esco();
|
||||
int tws_api_cancle_connect_in_esco();
|
||||
int tws_disconnect();
|
||||
|
||||
/*
|
||||
* 使能对耳自动主从切换
|
||||
*/
|
||||
void tws_api_auto_role_switch_enable();
|
||||
|
||||
/*
|
||||
* 关闭对耳自动主从切换
|
||||
*/
|
||||
void tws_api_auto_role_switch_disable();
|
||||
|
||||
int tws_api_get_low_latency_state();
|
||||
|
||||
int tws_api_low_latency_enable(bool enable);
|
||||
|
||||
|
||||
void tws_api_set_quick_connect_addr(u8 *addr);
|
||||
|
||||
u8 *tws_api_get_quick_connect_addr();
|
||||
|
||||
void tws_api_common_addr_en(u8 en);
|
||||
|
||||
void tws_api_pair_all_way(u8 en);
|
||||
|
||||
int tws_api_power_saving_mode_enable();
|
||||
|
||||
int tws_api_power_saving_mode_disable();
|
||||
|
||||
int tws_api_enter_pure_monitor_mode();
|
||||
|
||||
void tws_try_connect_disable(void);
|
||||
|
||||
void tws_conn_switch_role();
|
||||
|
||||
void tws_api_role_switch();
|
||||
|
||||
#endif
|
||||
47
include_lib/btctrler/classic/tws_data_trans.h
Normal file
47
include_lib/btctrler/classic/tws_data_trans.h
Normal file
@ -0,0 +1,47 @@
|
||||
#ifndef TWS_DATA_TRANS_H
|
||||
#define TWS_DATA_TRANS_H
|
||||
|
||||
#include "generic/typedef.h"
|
||||
|
||||
enum {
|
||||
TWS_DATA_TRANS_SOURCE,
|
||||
TWS_DATA_TRANS_SINK,
|
||||
};
|
||||
|
||||
enum tws_data_trans_attr {
|
||||
TWS_DTC_LOCAL_MEDIA,
|
||||
TWS_DTC_MIC_REC,
|
||||
};
|
||||
|
||||
u8 tws_api_data_trans_open(u8 channel, enum tws_data_trans_attr attr, u16 buf_size);
|
||||
|
||||
|
||||
int tws_api_data_trans_start(u8 channel, u8 *arg, u8 len);
|
||||
|
||||
|
||||
int tws_api_data_trans_stop(u8 channel);
|
||||
|
||||
|
||||
int tws_api_data_trans_close(u8 channel);
|
||||
|
||||
|
||||
void tws_api_data_trans_auto_drop(u8 channel, int enable);
|
||||
|
||||
int tws_api_data_trans_send(u8 channel, u8 *buf, int len);
|
||||
|
||||
void *tws_api_data_trans_buf_alloc(u8 channel, int len);
|
||||
|
||||
int tws_api_data_trans_push(u8 channel, void *_frame, int len);
|
||||
|
||||
void *tws_api_data_trans_pop(u8 channel, int *len);
|
||||
|
||||
void tws_api_data_trans_free(u8 channel, void *_frame);
|
||||
|
||||
void *tws_api_data_trans_fetch(u8 channel, void *_prev, int *len);
|
||||
|
||||
void tws_api_data_trans_clear(u8 channel);
|
||||
|
||||
int tws_api_data_trans_check(u8 channel, u16 *ready_len, u16 *total_len);
|
||||
|
||||
#endif
|
||||
|
||||
95
include_lib/btctrler/classic/tws_event.h
Normal file
95
include_lib/btctrler/classic/tws_event.h
Normal file
@ -0,0 +1,95 @@
|
||||
#ifndef TWS_EVENT_H
|
||||
#define TWS_EVENT_H
|
||||
|
||||
#define KEY_EVENT_FROM_TWS (('T' << 24) | ('W' << 16) | ('S' << 8) | '\0')
|
||||
#define SYS_BT_EVENT_FROM_TWS (('T' << 24) | ('W' << 16) | ('S' << 8) | '\0')
|
||||
|
||||
enum {
|
||||
TWS_STA_WAIT_SIBLING_PAIR = 1,
|
||||
TWS_STA_SEARCH_SIBLING,
|
||||
TWS_STA_CREATE_CONNECTION_BREDR,
|
||||
TWS_STA_CREATE_CONNECTION_BLE,
|
||||
TWS_STA_WAIT_CONNECTION_BREDR,
|
||||
TWS_STA_WAIT_CONNECTION_BLE,
|
||||
TWS_STA_DISCONNECTION,
|
||||
TWS_STA_CONNECTION,
|
||||
TWS_STA_START_MONITOR,
|
||||
TWS_STA_MONITOR,
|
||||
TWS_STA_WAIT_PHONE_PAIR,
|
||||
TWS_STA_WAIT_PAIR,
|
||||
};
|
||||
|
||||
enum {
|
||||
LOCAL_REMOTE_ADDR = 0,
|
||||
TWS_PAIR_REMOTE_ADDR_STATE_OK,
|
||||
TWS_PAIR_REMOTE_ADDR_STATE_NOT,
|
||||
};
|
||||
|
||||
enum tws_detach_reason {
|
||||
TWS_DETACH_BY_SUPER_TIMEOUT = 8,
|
||||
TWS_DETACH_BY_LOCAL,
|
||||
TWS_DETACH_BY_REMOTE,
|
||||
TWS_DETACH_BY_POWEROFF,
|
||||
TWS_DETACH_BY_REMOVE_PAIRS,
|
||||
TWS_DETACH_BY_TESTBOX_CON,
|
||||
TWS_DETACH_BY_REMOVE_NO_RECONN,
|
||||
};
|
||||
|
||||
|
||||
#define TWS_CONN_CHANNEL 0
|
||||
#define TWS_LINK_SYNC_CHANNEL 1
|
||||
#define TWS_LMP_SYNC_CHANNEL 2
|
||||
#define TWS_AFH_SYNC_CHANNEL 3
|
||||
#define TWS_TX_SYNC_CHANNEL 4
|
||||
#define TWS_LOW_LATENCY_CHANNEL 5
|
||||
#define TWS_DATA_SYNC_CHANNEL 6
|
||||
#define TWS_SBC_SYNC_CHANNEL 7
|
||||
#define TWS_EVENT_SYNC_CHANNEL 8
|
||||
#define TWS_SYNC_CALL_CHANNEL 9
|
||||
#define TWS_POWER_BALANCE_CHANNEL 10
|
||||
#define TWS_CI_DATA_SYNC_CHANNEL 11
|
||||
#define TWS_LOCAL_MEIDA_SYNC_CHANNEL 12
|
||||
#define TWS_LMP_SLOT_CHANNEL 13
|
||||
#define TWS_DATA_TRANS_CHANNEL 14
|
||||
|
||||
enum {
|
||||
TWS_EVENT_SEARCH_TIMEOUT = 1,
|
||||
TWS_EVENT_CONNECTED,
|
||||
TWS_EVENT_CONNECTION_TIMEOUT,
|
||||
TWS_EVENT_CONNECTION_DETACH,
|
||||
TWS_EVENT_REMOVE_PAIRS,
|
||||
TWS_EVENT_PHONE_LINK_DETACH,
|
||||
TWS_EVENT_SYNC_FUN_CMD,
|
||||
TWS_EVENT_SYNC_FUN_TRANID,
|
||||
TWS_EVENT_CONNECT_TEST,
|
||||
TWS_EVENT_ROLE_SWITCH,
|
||||
TWS_EVENT_LOCAL_MEDIA_START,
|
||||
TWS_EVENT_LOCAL_MEDIA_STOP,
|
||||
TWS_EVENT_ESCO_ADD_CONNECT,
|
||||
TWS_EVENT_SETUP_MONITOR_LINK,
|
||||
TWS_EVENT_MONITOR_START,
|
||||
TWS_EVENT_DATA_TRANS_OPEN,
|
||||
TWS_EVENT_DATA_TRANS_START,
|
||||
TWS_EVENT_DATA_TRANS_STOP,
|
||||
TWS_EVENT_DATA_TRANS_CLOSE,
|
||||
|
||||
TWS_EVENT_MODE_CHANGE, //sniff without phone
|
||||
|
||||
TWS_EVENT_ROLE_SWITCH_START,
|
||||
TWS_EVENT_TONE_TEST = 0xff,
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
48
include_lib/btctrler/classic/tws_local_media_sync.h
Normal file
48
include_lib/btctrler/classic/tws_local_media_sync.h
Normal file
@ -0,0 +1,48 @@
|
||||
#ifndef TWS_LOCAL_MEDIA_SYNC_H
|
||||
#define TWS_LOCAL_MEDIA_SYNC_H
|
||||
|
||||
#include "generic/list.h"
|
||||
#include "generic/typedef.h"
|
||||
|
||||
|
||||
|
||||
void tws_api_local_media_trans_start();
|
||||
|
||||
void tws_api_local_media_trans_set_buf(void *buf, int size);
|
||||
|
||||
void *tws_api_local_media_trans_alloc(int len);
|
||||
|
||||
void tws_api_local_media_trans_free(void *frame);
|
||||
|
||||
void tws_api_local_media_trans_push(void *frame, int len);
|
||||
|
||||
void *tws_api_local_media_trans_pop(int *len);
|
||||
|
||||
void *tws_api_local_media_trans_fetch(void *prev, int *len);
|
||||
|
||||
void tws_api_local_media_trans_stop();
|
||||
|
||||
void tws_api_local_media_trans_packet_del(void *_frame);
|
||||
int tws_api_local_media_trans_check_total(u8 head);
|
||||
int tws_api_local_media_trans_check_ready_total(void);
|
||||
void tws_api_local_media_trans_clear(void);
|
||||
int tws_api_local_media_packet_cnt(u8 *rx_packet_cnt, u8 *wait_send_pcaket_cnt);
|
||||
|
||||
// 填数超过了一定值才可以发送
|
||||
void tws_api_local_media_set_limit_size(int size);
|
||||
|
||||
int tws_api_local_media_trans_bulk_push(u8 *buf, int len);
|
||||
|
||||
int tws_api_local_media_push_with_sequence(u8 *buf, int len, u16 seqn);
|
||||
|
||||
int tws_api_local_media_push_with_timestamp(u8 *buf, int len, u32 timestamp);
|
||||
|
||||
int tws_api_local_media_trans_open(u16 buf_size);
|
||||
|
||||
int tws_api_local_media_dec_start(u8 *arg, u8 len);
|
||||
|
||||
int tws_api_local_media_dec_stop();
|
||||
|
||||
void tws_api_auto_drop_frame_enable(int enable);
|
||||
#endif
|
||||
|
||||
249
include_lib/btctrler/hci_transport.h
Normal file
249
include_lib/btctrler/hci_transport.h
Normal file
@ -0,0 +1,249 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : hci_transport.h
|
||||
|
||||
* Description :
|
||||
|
||||
* Author : Bingquan
|
||||
|
||||
* Email : bingquan_cai@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2017-01-17 15:14
|
||||
|
||||
* Copyright:(c)JIELI 2011-2016 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
#ifndef __BTCONTROLLER_HCI_TRANSPORT_H
|
||||
#define __BTCONTROLLER_HCI_TRANSPORT_H
|
||||
|
||||
//#include <stdint.h>
|
||||
#include "generic/typedef.h"
|
||||
|
||||
#if defined __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* API_START */
|
||||
typedef struct {
|
||||
uint32_t baudrate;
|
||||
int flowcontrol;
|
||||
const char *device_name;
|
||||
} btstack_uart_config_t;
|
||||
|
||||
typedef enum {
|
||||
// UART active, sleep off
|
||||
BTSTACK_UART_SLEEP_OFF = 0,
|
||||
// used for eHCILL
|
||||
BTSTACK_UART_SLEEP_RTS_HIGH_WAKE_ON_CTS_PULSE,
|
||||
// used for H5 and for eHCILL without support for wake on CTS pulse
|
||||
BTSTACK_UART_SLEEP_RTS_LOW_WAKE_ON_RX_EDGE,
|
||||
|
||||
} btstack_uart_sleep_mode_t;
|
||||
|
||||
typedef enum {
|
||||
BTSTACK_UART_SLEEP_MASK_RTS_HIGH_WAKE_ON_CTS_PULSE = 1 << BTSTACK_UART_SLEEP_RTS_HIGH_WAKE_ON_CTS_PULSE,
|
||||
BTSTACK_UART_SLEEP_MASK_RTS_LOW_WAKE_ON_RX_EDGE = 1 << BTSTACK_UART_SLEEP_RTS_LOW_WAKE_ON_RX_EDGE
|
||||
} btstack_uart_sleep_mode_mask_t;
|
||||
|
||||
typedef struct {
|
||||
/**
|
||||
* init transport
|
||||
* @param uart_config
|
||||
*/
|
||||
int (*init)(const btstack_uart_config_t *uart_config);
|
||||
|
||||
/**
|
||||
* open transport connection
|
||||
*/
|
||||
int (*open)(void);
|
||||
|
||||
/**
|
||||
* close transport connection
|
||||
*/
|
||||
int (*close)(void);
|
||||
|
||||
/**
|
||||
* set callback for block received. NULL disables callback
|
||||
*/
|
||||
void (*set_block_received)(void (*block_handler)(void));
|
||||
|
||||
/**
|
||||
* set callback for sent. NULL disables callback
|
||||
*/
|
||||
void (*set_block_sent)(void (*block_handler)(void));
|
||||
|
||||
/**
|
||||
* set baudrate
|
||||
*/
|
||||
int (*set_baudrate)(uint32_t baudrate);
|
||||
|
||||
/**
|
||||
* set parity
|
||||
*/
|
||||
int (*set_parity)(int parity);
|
||||
|
||||
/**
|
||||
* set flowcontrol
|
||||
*/
|
||||
int (*set_flowcontrol)(int flowcontrol);
|
||||
|
||||
/**
|
||||
* receive block
|
||||
*/
|
||||
void (*receive_block)(uint8_t *buffer, uint16_t len);
|
||||
|
||||
/**
|
||||
* send block
|
||||
*/
|
||||
void (*send_block)(const uint8_t *buffer, uint16_t length);
|
||||
|
||||
// support for sleep modes in TI's H4 eHCILL and H5
|
||||
|
||||
/**
|
||||
* query supported wakeup mechanisms
|
||||
* @return supported_sleep_modes mask
|
||||
*/
|
||||
int (*get_supported_sleep_modes)(void);
|
||||
|
||||
/**
|
||||
* set UART sleep mode - allows to turn off UART and it's clocks to save energy
|
||||
* Supported sleep modes:
|
||||
* - off: UART active, RTS low if receive_block was called and block not read yet
|
||||
* - RTS high, wake on CTS: RTS should be high. On CTS pulse, UART gets enabled again and RTS goes to low
|
||||
* - RTS low, wake on RX: data on RX will trigger UART enable, bytes might get lost
|
||||
*/
|
||||
void (*set_sleep)(btstack_uart_sleep_mode_t sleep_mode);
|
||||
|
||||
/**
|
||||
* set wakeup handler - needed to notify hci transport of wakeup requests by Bluetooth controller
|
||||
* Called upon CTS pulse or RX data. See sleep modes.
|
||||
*/
|
||||
void (*set_wakeup_handler)(void (*wakeup_handler)(void));
|
||||
|
||||
} btstack_uart_block_t;
|
||||
|
||||
// common implementations
|
||||
const btstack_uart_block_t *btstack_uart_block_posix_instance(void);
|
||||
const btstack_uart_block_t *btstack_uart_block_windows_instance(void);
|
||||
const btstack_uart_block_t *btstack_uart_block_embedded_instance(void);
|
||||
const btstack_uart_block_t *btstack_uart_block_freertos_instance(void);
|
||||
|
||||
/* HCI packet types */
|
||||
typedef struct {
|
||||
/**
|
||||
* transport name
|
||||
*/
|
||||
const char *name;
|
||||
|
||||
/**
|
||||
* init transport
|
||||
* @param transport_config
|
||||
*/
|
||||
void (*init)(const void *transport_config);
|
||||
|
||||
/**
|
||||
* open transport connection
|
||||
*/
|
||||
int (*open)(void);
|
||||
|
||||
/**
|
||||
* close transport connection
|
||||
*/
|
||||
int (*close)(void);
|
||||
|
||||
/**
|
||||
* register packet handler for HCI packets: ACL, SCO, and Events
|
||||
*/
|
||||
void (*register_packet_handler)(void (*handler)(int packet_type, const u8 *packet, int size));
|
||||
|
||||
/**
|
||||
* support async transport layers, e.g. IRQ driven without buffers
|
||||
*/
|
||||
int (*can_send_packet_now)(uint8_t packet_type);
|
||||
|
||||
/**
|
||||
* send packet
|
||||
*/
|
||||
int (*send_packet)(int packet_type, const u8 *packet, int size);
|
||||
|
||||
/**
|
||||
* extension for UART transport implementations
|
||||
*/
|
||||
int (*set_baudrate)(uint32_t baudrate);
|
||||
|
||||
/**
|
||||
* extension for UART H5 on CSR: reset BCSP/H5 Link
|
||||
*/
|
||||
void (*reset_link)(void);
|
||||
|
||||
/**
|
||||
* extension for USB transport implementations: config SCO connections
|
||||
*/
|
||||
void (*set_sco_config)(uint16_t voice_setting, int num_connections);
|
||||
|
||||
} hci_transport_t;
|
||||
|
||||
typedef enum {
|
||||
HCI_TRANSPORT_CONFIG_UART,
|
||||
HCI_TRANSPORT_CONFIG_USB
|
||||
} hci_transport_config_type_t;
|
||||
|
||||
typedef struct {
|
||||
hci_transport_config_type_t type;
|
||||
} hci_transport_config_t;
|
||||
|
||||
typedef struct {
|
||||
hci_transport_config_type_t type; // == HCI_TRANSPORT_CONFIG_UART
|
||||
uint32_t baudrate_init; // initial baud rate
|
||||
uint32_t baudrate_main; // = 0: same as initial baudrate
|
||||
int flowcontrol; //
|
||||
const char *device_name;
|
||||
} hci_transport_config_uart_t;
|
||||
|
||||
|
||||
// inline various hci_transport_X.h files
|
||||
|
||||
/*
|
||||
* @brief Setup H4 instance with uart_driver
|
||||
* @param uart_driver to use
|
||||
*/
|
||||
const hci_transport_t *hci_transport_h4_instance(const btstack_uart_block_t *uart_driver);
|
||||
|
||||
/*
|
||||
* @brief Setup H5 instance with uart_driver
|
||||
* @param uart_driver to use
|
||||
*/
|
||||
const hci_transport_t *hci_transport_h5_instance(const btstack_uart_block_t *uart_driver);
|
||||
|
||||
/*
|
||||
* @brief Enable H5 Low Power Mode: enter sleep mode after x ms of inactivity
|
||||
* @param inactivity_timeout_ms or 0 for off
|
||||
*/
|
||||
void hci_transport_h5_set_auto_sleep(uint16_t inactivity_timeout_ms);
|
||||
|
||||
/*
|
||||
* @brief Enable BSCP mode H5, by enabling event parity
|
||||
*/
|
||||
void hci_transport_h5_enable_bcsp_mode(void);
|
||||
|
||||
/*
|
||||
* @brief
|
||||
*/
|
||||
const hci_transport_t *hci_transport_usb_instance(void);
|
||||
|
||||
const hci_transport_t *hci_transport_uart_instance(void);
|
||||
|
||||
const hci_transport_t *hci_transport_h4_controller_instance(void);
|
||||
|
||||
const hci_transport_t *hci_transport_h4_host_instance(void);
|
||||
/**
|
||||
* @brief Specify USB Bluetooth device via port numbers from root to device
|
||||
*/
|
||||
void hci_transport_usb_set_path(int len, uint8_t *port_numbers);
|
||||
|
||||
/* API_END */
|
||||
extern const hci_transport_t *hci_transport;
|
||||
|
||||
#if defined __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __HCI_TRANSPORT_H
|
||||
56
include_lib/btctrler/port/br28/btcontroller_config.h
Normal file
56
include_lib/btctrler/port/br28/btcontroller_config.h
Normal file
@ -0,0 +1,56 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : btcontroller_config.h
|
||||
|
||||
* Description : 优化代码需要，libs 依赖app 定义变量，由app 定义变量值决定libs 优化
|
||||
|
||||
* Author : Bingquan
|
||||
|
||||
* Email : bingquan_cai@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2018-12-19 16:10
|
||||
|
||||
* Copyright:(c)JIELI 2011-2017 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
#ifndef _BTCONTROLLER_CONFIG_H_
|
||||
#define _BTCONTROLLER_CONFIG_H_
|
||||
|
||||
#include "btcontroller_modules.h"
|
||||
|
||||
#include "ble/ll_config.h"
|
||||
|
||||
// #define CONFIG_LE_FEATURES \
|
||||
(\
|
||||
LE_ENCRYPTION | \
|
||||
LE_CORE_V50_FEATURES \
|
||||
)
|
||||
|
||||
#define CONFIG_LE_FEATURES 0//(LE_ENCRYPTION)
|
||||
|
||||
// #define CONFIG_LE_ROLES (LE_ADV|LE_SCAN|LE_INIT|LE_SLAVE|LE_MASTER)
|
||||
// #define CONFIG_LE_ROLES (LE_ADV|LE_SCAN)
|
||||
#define CONFIG_LE_ROLES (LE_ADV)
|
||||
|
||||
#include "classic/lmp_config.h"
|
||||
|
||||
#define CONFIG_CL_FEATURES
|
||||
|
||||
#define CONFIG_CL_EX_FEATURES
|
||||
|
||||
|
||||
#define TWS_BLE_ESCO_CONNECT //通话过程进行连接使能
|
||||
|
||||
|
||||
/*
|
||||
*-------------------
|
||||
* 蓝牙基带运行的模式
|
||||
*/
|
||||
|
||||
struct lp_ws_t {
|
||||
u16 lrc_ws_inc;
|
||||
u16 lrc_ws_init;
|
||||
u16 bt_osc_ws_inc;
|
||||
u16 bt_osc_ws_init;
|
||||
u8 osc_change_mode;
|
||||
};
|
||||
|
||||
#endif
|
||||
209
include_lib/btctrler/port/br28/btctler_lib.ld
Normal file
209
include_lib/btctrler/port/br28/btctler_lib.ld
Normal file
@ -0,0 +1,209 @@
|
||||
SECTIONS
|
||||
{
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
btctler_data_start = .;
|
||||
|
||||
BTCTLER_CONTROLLER_DATA_START = .;
|
||||
*(.bt_rf_data)
|
||||
*(.vendor_manager_data)
|
||||
*(.device_manager_data)
|
||||
*(.hci_controller_data)
|
||||
*(.hci_interface_data)
|
||||
BTCTLER_CONTROLLER_DATA_SIZE = ABSOLUTE(. - BTCTLER_CONTROLLER_DATA_START);
|
||||
|
||||
BTCTLER_LE_CONTROLLER_DATA_START = .;
|
||||
*(.ble_ll_data)
|
||||
*(.ble_hci_data)
|
||||
*(.ble_rf_data)
|
||||
BTCTLER_LE_CONTROLLER_DATA_SIZE = ABSOLUTE(. - BTCTLER_LE_CONTROLLER_DATA_START);
|
||||
|
||||
BTCTLER_CL_DATA_START = .;
|
||||
*(.classic_hci_data)
|
||||
*(.classic_lmp_data)
|
||||
*(.classic_lmp_auth_data)
|
||||
*(.classic_lmp_bigint_data)
|
||||
*(.classic_lmp_crypt_data)
|
||||
*(.classic_lmp_ecdh_data)
|
||||
*(.classic_lmp_linkbulk_data)
|
||||
*(.classic_lmp_hmac_data)
|
||||
*(.classic_rf_data)
|
||||
*(.classic_bb_data)
|
||||
BTCTLER_CL_DATA_SIZE = ABSOLUTE(. - BTCTLER_CL_DATA_START);
|
||||
|
||||
btctler_data_end = .;
|
||||
|
||||
} > ram0
|
||||
|
||||
.bss (NOLOAD) :ALIGN(4)
|
||||
{
|
||||
btctler_bss_start = .;
|
||||
|
||||
BTCTLER_CONTROLLER_BSS_START = .;
|
||||
|
||||
*(.bd_base)
|
||||
*(.bredr_rxtx_bulk)
|
||||
*(.bredr_tx_bulk)
|
||||
*(.bt_rf_bss)
|
||||
*(.hci_controller_bss)
|
||||
*(.hci_interface_bss)
|
||||
*(.device_manager_bss)
|
||||
*(.vendor_manager_bss)
|
||||
BTCTLER_CONTROLLER_BSS_SIZE = ABSOLUTE(. - BTCTLER_CONTROLLER_BSS_START);
|
||||
|
||||
BTCTLER_LE_CONTROLLER_BSS_START = .;
|
||||
*(.ble_hci_bss)
|
||||
*(.ble_ll_bss)
|
||||
*(.ble_rf_bss)
|
||||
BTCTLER_LE_CONTROLLER_BSS_SIZE = ABSOLUTE(. - BTCTLER_LE_CONTROLLER_BSS_START);
|
||||
|
||||
BTCTLER_CL_BSS_START = .;
|
||||
*(.classic_rf_bss)
|
||||
*(.classic_lmp_bss)
|
||||
*(.classic_lmp_auth_bss)
|
||||
*(.classic_lmp_bigint_bss)
|
||||
*(.classic_lmp_crypt_bss)
|
||||
*(.classic_lmp_ecdh_bss)
|
||||
*(.classic_lmp_linkbulk_bss)
|
||||
*(.classic_lmp_hmac_bss)
|
||||
*(.classic_bb_bss)
|
||||
*(.classic_hci_bss)
|
||||
BTCTLER_CL_BSS_SIZE = ABSOLUTE(. - BTCTLER_CL_BSS_START);
|
||||
|
||||
btctler_bss_end = .;
|
||||
} > ram0
|
||||
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
btctler_code_start = .;
|
||||
|
||||
BTCTLER_CONTROLLER_CODE_START = .;
|
||||
*(.bt_rf_const)
|
||||
*(.bt_rf_code)
|
||||
*(.vendor_manager_const)
|
||||
*(.vendor_manager_code)
|
||||
*(.device_manager_const)
|
||||
*(.device_manager_code)
|
||||
*(.hci_controller_const)
|
||||
*(.hci_controller_code)
|
||||
*(.hci_interface_const)
|
||||
*(.hci_interface_code)
|
||||
BTCTLER_CONTROLLER_CODE_SIZE = ABSOLUTE(. - BTCTLER_CONTROLLER_CODE_START);
|
||||
|
||||
BTCTLER_LE_CONTROLLER_CODE_START = .;
|
||||
*(.ble_rf_const)
|
||||
*(.ble_rf_code)
|
||||
|
||||
*(.ble_ll_const)
|
||||
*(.ble_ll_code)
|
||||
*(.ble_hci_const)
|
||||
*(.ble_hci_code)
|
||||
BTCTLER_LE_CONTROLLER_CODE_SIZE = ABSOLUTE(. - BTCTLER_LE_CONTROLLER_CODE_START);
|
||||
|
||||
BTCTLER_CL_CODE_START = .;
|
||||
*(.bredr_irq)
|
||||
*(.bredr_irq_code)
|
||||
*(.bredr_irq_const)
|
||||
|
||||
*(.classic_hci_const)
|
||||
*(.classic_hci_code)
|
||||
*(.classic_lmp_const)
|
||||
*(.classic_lmp_auth_const)
|
||||
*(.classic_lmp_bigint_const)
|
||||
*(.classic_lmp_crypt_const)
|
||||
*(.classic_lmp_ecdh_const)
|
||||
*(.classic_lmp_hmac_const)
|
||||
*(.classic_lmp_code)
|
||||
*(.classic_lmp_auth_code)
|
||||
*(.classic_lmp_bigint_code)
|
||||
*(.classic_lmp_crypt_code)
|
||||
*(.classic_lmp_ecdh_code)
|
||||
*(.classic_lmp_hmac_code)
|
||||
*(.classic_rf_const)
|
||||
*(.classic_rf_code)
|
||||
*(.classic_bb_const)
|
||||
*(.classic_bb_code)
|
||||
BTCTLER_CL_CODE_SIZE = ABSOLUTE(. - BTCTLER_CL_CODE_START);
|
||||
|
||||
*(.classic_tws_const)
|
||||
*(.classic_tws_code)
|
||||
*(.classic_tws_code.esco)
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
} > code0
|
||||
|
||||
|
||||
.data_code ALIGN(32):
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
*(.lmp_irq_code)
|
||||
*(.link_bulk_code)
|
||||
*(.frame_irq_code)
|
||||
|
||||
. = ALIGN(4);
|
||||
*(.link_task_const)
|
||||
*(.link_task_code)
|
||||
|
||||
. = ALIGN(4);
|
||||
*(.classic_irq_const)
|
||||
*(.classic_irq_code)
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
*(.tws_irq_code)
|
||||
|
||||
. = ALIGN(4);
|
||||
tws_sync_call_begin = .;
|
||||
KEEP(*(.tws_sync_call))
|
||||
tws_sync_call_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
tws_func_stub_begin = .;
|
||||
KEEP(*(.tws_func_stub))
|
||||
tws_func_stub_end = .;
|
||||
|
||||
*(.tws_media_sync_code)
|
||||
*(.tws_media_sync_const)
|
||||
|
||||
*(.tws_data_forward_code)
|
||||
*(.tws_data_forward_const)
|
||||
|
||||
. = ALIGN(4);
|
||||
tws_sync_channel_begin = .;
|
||||
KEEP(*(.tws_sync_channel.0))
|
||||
KEEP(*(.tws_sync_channel.1))
|
||||
KEEP(*(.tws_sync_channel.2))
|
||||
KEEP(*(.tws_sync_channel.3))
|
||||
KEEP(*(.tws_sync_channel.4))
|
||||
KEEP(*(.tws_sync_channel.5))
|
||||
KEEP(*(.tws_sync_channel.6))
|
||||
KEEP(*(.tws_sync_channel.7))
|
||||
KEEP(*(.tws_sync_channel.8))
|
||||
KEEP(*(.tws_sync_channel.9))
|
||||
KEEP(*(.tws_sync_channel.10))
|
||||
KEEP(*(.tws_sync_channel.11))
|
||||
KEEP(*(.tws_sync_channel.12))
|
||||
KEEP(*(.tws_sync_channel.13))
|
||||
tws_sync_channel_end = .;
|
||||
|
||||
btctler_code_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
} > ram0
|
||||
|
||||
/*代码统计 Code & RAM : 蓝牙协议栈*/
|
||||
BTCTLER_LE_RAM_TOTAL = BTCTLER_LE_CONTROLLER_DATA_SIZE + BTCTLER_LE_CONTROLLER_BSS_SIZE;
|
||||
BTCTLER_LE_CODE_TOTAL = BTCTLER_LE_CONTROLLER_CODE_SIZE;
|
||||
|
||||
BTCTLER_CL_RAM_TOTAL = BTCTLER_CL_DATA_SIZE + BTCTLER_CL_BSS_SIZE;
|
||||
BTCTLER_CL_CODE_TOTAL = BTCTLER_CL_CODE_SIZE;
|
||||
|
||||
BTCTLER_COMMON_RAM_TOTAL = BTCTLER_CONTROLLER_BSS_SIZE + BTCTLER_CONTROLLER_DATA_SIZE;
|
||||
BTCTLER_COMMON_CODE_TOTAL = BTCTLER_CONTROLLER_CODE_SIZE ;
|
||||
|
||||
BTCTLER_RAM_TOTAL = (btctler_data_end - btctler_data_start) + (btctler_bss_end - btctler_bss_start);
|
||||
BTCTLER_CODE_TOTAL = (btctler_code_end - btctler_code_start);
|
||||
}
|
||||
53
include_lib/btstack/a2dp_media_codec.h
Normal file
53
include_lib/btstack/a2dp_media_codec.h
Normal file
@ -0,0 +1,53 @@
|
||||
#ifndef A2DP_MEDIA_CODEC_H
|
||||
#define A2DP_MEDIA_CODEC_H
|
||||
|
||||
|
||||
#include "generic/typedef.h"
|
||||
|
||||
#define seqn_after(a, b) ((s16)((s16)(b) - (s16)(a)) < 0)
|
||||
#define seqn_before(a, b) seqn_after(b, a)
|
||||
|
||||
extern int a2dp_media_get_packet(u8 **frame);
|
||||
|
||||
extern int a2dp_media_try_get_packet(u8 **frame);
|
||||
|
||||
extern int a2dp_media_get_remain_buffer_size();
|
||||
|
||||
extern int a2dp_media_get_remain_play_time(u8 include_tws);
|
||||
|
||||
extern int a2dp_media_get_total_data_len();
|
||||
|
||||
extern int a2dp_media_get_packet_num();
|
||||
|
||||
extern int a2dp_media_clear_packet_before_seqn(u16 seqn_number);
|
||||
|
||||
extern void *a2dp_media_fetch_packet(int *len, void *prev_packet);
|
||||
|
||||
extern void *a2dp_media_fetch_packet_and_wait(int *len, void *prev_packet, int msec);
|
||||
|
||||
extern void a2dp_media_free_packet(void *_packet);
|
||||
|
||||
extern int a2dp_media_channel_exist(void);
|
||||
|
||||
extern int a2dp_media_is_clearing_frame(void);
|
||||
|
||||
extern int a2dp_media_get_codec_type();
|
||||
|
||||
extern u32 a2dp_media_dump_rx_time(u8 *frame);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
733
include_lib/btstack/avctp_user.h
Normal file
733
include_lib/btstack/avctp_user.h
Normal file
@ -0,0 +1,733 @@
|
||||
#ifndef __AVCTP_USER_H__
|
||||
#define __AVCTP_USER_H__
|
||||
|
||||
|
||||
#include "typedef.h"
|
||||
#include "btstack_typedef.h"
|
||||
|
||||
|
||||
|
||||
///***注意：该文件的枚举与库编译密切相关，主要是给用户提供调用所用。用户不能自己在中间添加值。*/
|
||||
////----user (command) codes----////
|
||||
typedef enum {
|
||||
/*
|
||||
使用user_send_cmd_prepare(USER_CMD_TYPE cmd,u16 param_len,u8 *param)发送命令
|
||||
//返回0表支持参数个数正确，返回1表不支持，2是参数错误
|
||||
要三个参数，没参数说明的命令参数param_len传0，param传NULL
|
||||
例子A、USER_CTRL_HFP_CALL_SET_VOLUME命令需要1个参数的使用例子：
|
||||
u8 vol = 8;
|
||||
user_send_cmd_prepare(USER_CTRL_HFP_CALL_SET_VOLUME,1, &vol);
|
||||
|
||||
例子B、USER_CTRL_DIAL_NUMBER 参数要用数组先存起来，param_len是号码长度，param可传参数数组指针，
|
||||
user_val->income_phone_num已经存好号码
|
||||
user_send_cmd_prepare(USER_CTRL_DIAL_NUMBER,user_val->phone_num_len,user_val->income_phone_num);
|
||||
|
||||
*/
|
||||
|
||||
//链路操作部分
|
||||
//回连,使用的是VM的地址，一般按键操作不使用该接口
|
||||
USER_CTRL_START_CONNECTION,
|
||||
//通过地址去连接，如果知道地址想去连接使用该接口
|
||||
USER_CTRL_START_CONNEC_VIA_ADDR,
|
||||
//通过指定地址手动回连，该地址是最后一个断开设备的地址
|
||||
USER_CTRL_START_CONNEC_VIA_ADDR_MANUALLY,
|
||||
//通过地址去连接spp，如果知道地址想去连接使用该接口
|
||||
USER_CTRL_START_CONNEC_SPP_VIA_ADDR,
|
||||
|
||||
//断开连接，断开当前所有蓝牙连接
|
||||
USER_CTRL_DISCONNECTION_HCI,
|
||||
|
||||
//取消链接
|
||||
USER_CTRL_CONNECTION_CANCEL,
|
||||
|
||||
//读取远端名字
|
||||
USER_CTRL_READ_REMOTE_NAME,
|
||||
//连接或断开SCO或esco,选择这个命令会自动判断要断开还是连接sco
|
||||
USER_CTRL_PAUSE_MUSIC,
|
||||
//连接或断开SCO或esco,选择这个命令会自动判断要断开还是连接sco
|
||||
USER_CTRL_SCO_LINK,
|
||||
//连接SCO或esco
|
||||
USER_CTRL_CONN_SCO,
|
||||
//断开sco或esco
|
||||
USER_CTRL_DISCONN_SCO,
|
||||
//断开SDP，一般按键操作不使用该接口
|
||||
USER_CTRL_DISCONN_SDP_MASTER,
|
||||
|
||||
//关闭蓝牙可发现
|
||||
USER_CTRL_WRITE_SCAN_DISABLE,
|
||||
//打开蓝牙可发现
|
||||
USER_CTRL_WRITE_SCAN_ENABLE,
|
||||
// USER_CTRL_WRITE_SCAN_ENABLE_KEY ,
|
||||
//关闭蓝牙可连接
|
||||
USER_CTRL_WRITE_CONN_DISABLE,
|
||||
//打开蓝牙可连接
|
||||
USER_CTRL_WRITE_CONN_ENABLE,
|
||||
// USER_CTRL_WRITE_CONN_ENABLE_KEY ,
|
||||
//控制蓝牙搜索，需要搜索附件设备做功能的连续说明情况在补充完善功能
|
||||
USER_CTRL_SEARCH_DEVICE,
|
||||
//取消搜索
|
||||
USER_CTRL_INQUIRY_CANCEL,
|
||||
//取消配对
|
||||
USER_CTRL_PAGE_CANCEL,
|
||||
///进入sniff模式，一般按键操作不使用该接口
|
||||
USER_CTRL_SNIFF_IN,
|
||||
USER_CTRL_SNIFF_EXIT,
|
||||
USER_CTRL_ALL_SNIFF_EXIT,
|
||||
|
||||
//hfp链路部分
|
||||
//控制打电话音量，注意可能有些手机进度条有变化音量大小没变化，同步要设置样机DAC音量
|
||||
/*跟电话音量操作有关的操作最终都执行回调函数call_vol_change*/
|
||||
USER_CTRL_HFP_CMD_BEGIN, /* 接口扩展用来做HFP 连接 */
|
||||
USER_CTRL_HFP_CALL_VOLUME_UP, /*音量加1，手机可以同步显示*/
|
||||
USER_CTRL_HFP_CALL_VOLUME_DOWN, /*音量减1，手机可以同步显示*/
|
||||
USER_CTRL_HFP_CALL_SET_VOLUME, /*设置固定值，手机可以同步显示，需要传1个音量值*/
|
||||
USER_CTRL_HFP_CALL_GET_VOLUME, /*获取音量，默认从call_vol_change返回*/
|
||||
|
||||
//来电接听电话
|
||||
USER_CTRL_HFP_CALL_ANSWER,
|
||||
//挂断电话
|
||||
USER_CTRL_HFP_CALL_HANGUP,
|
||||
//回拨上一个打出电话
|
||||
USER_CTRL_HFP_CALL_LAST_NO,
|
||||
//获取当前通话电话号码
|
||||
USER_CTRL_HFP_CALL_CURRENT,
|
||||
//通话过程中根据提示输入控制
|
||||
/*例子
|
||||
char num = '1';
|
||||
user_send_cmd_prepare(USER_CTRL_HFP_DTMF_TONES,1,(u8 *)&num);
|
||||
*/
|
||||
//发送打电话时的信号选择DTMF tones ,有一个参数，参数支持{0-9, *, #, A, B, C, D}
|
||||
USER_CTRL_HFP_DTMF_TONES,
|
||||
//根据电话号码拨号
|
||||
/**USER_CTRL_DIAL_NUMBER命令有参数，参数要用数组先存起来，
|
||||
param_len是号码长度，param可传参数数组指针*/
|
||||
USER_CTRL_DIAL_NUMBER,
|
||||
//发送电量 /**要连接上HFP才有用*/
|
||||
USER_CTRL_SEND_BATTERY,
|
||||
//*控制siri状态*//*可以注册回调函数获取返回值*/
|
||||
USER_CTRL_HFP_GET_SIRI_STATUS,
|
||||
//*开启siri*/
|
||||
USER_CTRL_HFP_GET_SIRI_OPEN,
|
||||
//*关闭siri,一般说完话好像自动关闭了,如果要提前终止可调用*/
|
||||
USER_CTRL_HFP_GET_SIRI_CLOSE,
|
||||
/*获取手机的日期和时间，苹果可以，一般安卓机好像都不行*/
|
||||
USER_CTRL_HFP_GET_PHONE_DATE_TIME,
|
||||
USER_CTRL_HFP_CMD_SEND_BIA,
|
||||
/*获取手机厂商的命令 */
|
||||
USER_CTRL_HFP_CMD_GET_MANUFACTURER,
|
||||
/*更新当前的电量给手机*/
|
||||
USER_CTRL_HFP_CMD_UPDATE_BATTARY,
|
||||
//三方通话操作
|
||||
//应答
|
||||
USER_CTRL_HFP_THREE_WAY_ANSWER1, //挂断当前去听另一个（未接听或者在保留状态都可以）
|
||||
USER_CTRL_HFP_THREE_WAY_ANSWER2, //保留当前去接听, 或者用于两个通话的切换
|
||||
USER_CTRL_HFP_THREE_WAY_ANSWER1X, //目前没有用
|
||||
USER_CTRL_HFP_THREE_WAY_ANSWER2X, //目前没有用
|
||||
USER_CTRL_HFP_THREE_WAY_ANSWER3, //可以发完USER_CTRL_HFP_THREE_WAY_ANSWER2,又发ANSWER3，自己看看效果
|
||||
//拒听
|
||||
USER_CTRL_HFP_THREE_WAY_REJECT, //拒绝后台来电
|
||||
USER_CTRL_HFP_DISCONNECT, //断开HFP连接
|
||||
USER_CTRL_HFP_CMD_END,
|
||||
|
||||
//音乐控制部分
|
||||
USER_CTRL_AVCTP_CMD_BEGIN,
|
||||
//音乐播放
|
||||
USER_CTRL_AVCTP_OPID_PLAY,
|
||||
//音乐暂停
|
||||
USER_CTRL_AVCTP_OPID_PAUSE,
|
||||
//音乐停止
|
||||
USER_CTRL_AVCTP_OPID_STOP,
|
||||
//音乐下一首
|
||||
USER_CTRL_AVCTP_OPID_NEXT,
|
||||
//音乐上一首
|
||||
USER_CTRL_AVCTP_OPID_PREV,
|
||||
//音乐快进
|
||||
USER_CTRL_AVCTP_OPID_FORWARD,
|
||||
//音乐快退
|
||||
USER_CTRL_AVCTP_OPID_REWIND,
|
||||
//音乐循环模式
|
||||
USER_CTRL_AVCTP_OPID_REPEAT_MODE,
|
||||
USER_CTRL_AVCTP_OPID_SHUFFLE_MODE,
|
||||
//获取播放歌曲总时间和当前时间接口
|
||||
USER_CTRL_AVCTP_OPID_GET_PLAY_TIME,
|
||||
|
||||
//同步音量接口
|
||||
USER_CTRL_AVCTP_OPID_SEND_VOL,
|
||||
// //AVCTP断开，是音乐控制链路，一般不使用
|
||||
USER_CTRL_AVCTP_DISCONNECT,
|
||||
// //AVCTP连接，是音乐控制链路，一般不使用
|
||||
USER_CTRL_AVCTP_CONN,
|
||||
|
||||
USER_CTRL_AVCTP_CMD_END,
|
||||
|
||||
//高级音频部分
|
||||
USER_CTRL_A2DP_CMD_BEGIN,
|
||||
//有判断条件的，回连过程连接高级音频，避免手机连也自动发起连接，一般按键操作不使用该接口
|
||||
USER_CTRL_AUTO_CONN_A2DP,
|
||||
//连接高级音频，回来最后一个断开设备的地址
|
||||
USER_CTRL_CONN_A2DP,
|
||||
//断开高级音频，只断开高级音频链路，如果有电话还会保留
|
||||
USER_CTRL_DISCONN_A2DP,
|
||||
//maybe BQB test will use
|
||||
USER_CTRL_A2DP_CMD_START ,
|
||||
USER_CTRL_A2DP_CMD_CLOSE ,
|
||||
USER_CTRL_A2DP_CMD_SUSPEND ,
|
||||
USER_CTRL_A2DP_CMD_GET_CONFIGURATION ,
|
||||
USER_CTRL_A2DP_CMD_ABORT ,
|
||||
USER_CTRL_A2DP_CMD_END,
|
||||
//蓝牙关闭
|
||||
USER_CTRL_POWER_OFF,
|
||||
//蓝牙开启
|
||||
USER_CTRL_POWER_ON,
|
||||
///*hid操作定义*/
|
||||
USER_CTRL_HID_CMD_BEGIN,
|
||||
//按键连接
|
||||
USER_CTRL_HID_CONN,
|
||||
// //只发一个按键，安卓手机使用
|
||||
USER_CTRL_HID_ANDROID,
|
||||
//只发一个按键，苹果和部分安卓手机适用
|
||||
USER_CTRL_HID_IOS,
|
||||
// //发两个拍照按键
|
||||
USER_CTRL_HID_BOTH,
|
||||
//HID断开
|
||||
USER_CTRL_HID_DISCONNECT,
|
||||
//Home Key,apply to IOS and Android
|
||||
USER_CTRL_HID_HOME ,
|
||||
//Return Key,only support Android
|
||||
USER_CTRL_HID_RETURN ,
|
||||
//LeftArrow Key
|
||||
USER_CTRL_HID_LEFTARROW ,
|
||||
//RightArrow Key
|
||||
USER_CTRL_HID_RIGHTARROW ,
|
||||
//Volume Up
|
||||
USER_CTRL_HID_VOL_UP ,
|
||||
//Volume Down
|
||||
USER_CTRL_HID_VOL_DOWN ,
|
||||
|
||||
USER_CTRL_HID_SEND_DATA ,
|
||||
|
||||
USER_CTRL_HID_CMD_END,
|
||||
|
||||
/**有TWS命名的都不用了*/
|
||||
/*对箱操作命令*/
|
||||
USER_CTRL_TWS_CMD_BEGIN,
|
||||
USER_CTRL_SYNC_TRAIN,
|
||||
USER_CTRL_SYNC_TRAIN_SCAN,
|
||||
USER_CTRL_MONITOR,
|
||||
USER_CTRL_TWS_CONNEC_VIA_ADDR,
|
||||
USER_CTRL_TWS_COTROL_CDM,
|
||||
//清除对箱连接信息
|
||||
USER_CTRL_TWS_CLEAR_INFO,
|
||||
//断开对箱连接
|
||||
USER_CTRL_TWS_DISCONNECTION_HCI,
|
||||
//发起对箱连接
|
||||
USER_CTRL_TWS_START_CONNECTION,
|
||||
USER_CTRL_TWS_SYNC_CDM,
|
||||
USER_CTRL_TWS_SYNC_SBC_CDM,
|
||||
USER_CTRL_TWS_RESTART_SBC_CDM,
|
||||
USER_CTRL_SYNC_TRAIN_CANCEL,
|
||||
USER_CTRL_SYNC_TRAIN_SCAN_CANCEL,
|
||||
USER_CTRL_TWS_SYNC_CDM_FUN,
|
||||
USER_CTRL_TWS_LINEIN_START,
|
||||
USER_CTRL_TWS_LINEIN_CLOSE,
|
||||
USER_CTRL_TWS_CMD_END,
|
||||
|
||||
///蓝牙串口发送命令
|
||||
USER_CTRL_SPP_CMD_BEGIN,
|
||||
/**USER_CTRL_SPP_SEND_DATA命令有参数，参数会先存起来，
|
||||
param_len是数据长度，param发送数据指针
|
||||
返回0,表示准备成功，会PENDing发完才返回
|
||||
3表示上一包数据没发完，*/
|
||||
USER_CTRL_SPP_SEND_DATA, //len <= 512
|
||||
USER_CTRL_SPP_TRY_SEND_DATA,//
|
||||
USER_CTRL_SPP_UPDATA_DATA,
|
||||
//serial port profile disconnect command
|
||||
USER_CTRL_SPP_DISCONNECT,
|
||||
USER_CTRL_SPP_CMD_END,
|
||||
|
||||
|
||||
///pbg发送命令
|
||||
USER_CTRL_PBG_CMD_BEGIN,
|
||||
USER_CTRL_PBG_SEND_DATA,//len <= 512
|
||||
USER_CTRL_PBG_TRY_SEND_DATA,//
|
||||
USER_CTRL_PBG_CMD_END,
|
||||
|
||||
///adt 发送命令
|
||||
USER_CTRL_ADT_CMD_BEGIN,
|
||||
USER_CTRL_ADT_CONNECT,
|
||||
USER_CTRL_ADT_KEY_MIC_OPEN,
|
||||
USER_CTRL_ADT_SEND_DATA,//len <= 512
|
||||
USER_CTRL_ADT_TRY_SEND_DATA,//
|
||||
USER_CTRL_ADT_CMD_END,
|
||||
|
||||
///蓝牙电话本功能发送命令
|
||||
USER_CTRL_PBAP_CMD_BEGIN,
|
||||
//电话本功能读取通话记录的前n条
|
||||
USER_CTRL_PBAP_READ_PART,
|
||||
//电话本功能读全部记录
|
||||
USER_CTRL_PBAP_READ_ALL,
|
||||
//电话本功能中断读取记录
|
||||
USER_CTRL_PBAP_STOP_READING,
|
||||
|
||||
USER_CTRL_PBAP_CMD_END,
|
||||
|
||||
|
||||
//蓝牙其他操作
|
||||
// //删除最新的一个设备记忆
|
||||
// USER_CTRL_DEL_LAST_REMOTE_INFO ,
|
||||
// //删除所有设备记忆
|
||||
USER_CTRL_DEL_ALL_REMOTE_INFO,
|
||||
USER_CTRL_TEST_KEY,
|
||||
USER_CTRL_SEND_USER_INFO,
|
||||
|
||||
USER_CTRL_KEYPRESS,
|
||||
USER_CTRL_PAIR,
|
||||
USER_CTRL_AFH_CHANNEL,
|
||||
USER_CTRL_HALF_SEC_LOOP_CREATE,
|
||||
USER_CTRL_HALF_SEC_LOOP_DEL,
|
||||
/**音量同步接口，自动选择通过HID还是AVRCP来发送*/
|
||||
USER_CTRL_CMD_SYNC_VOL_INC,
|
||||
/**音量同步接口，自动选择通过HID还是AVRCP来发送*/
|
||||
USER_CTRL_CMD_SYNC_VOL_DEC,
|
||||
/*单独HID和普通蓝牙模式的切换接口,音箱SDK才有完整流程*/
|
||||
USER_CTRL_CMD_CHANGE_PROFILE_MODE,
|
||||
USER_CTRL_CMD_RESERVE_INDEX4,
|
||||
USER_CTRL_CMD_RESUME_STACK,
|
||||
//获取当前音乐的一些信息
|
||||
USER_CTRL_AVCTP_OPID_GET_MUSIC_INFO,
|
||||
|
||||
//MAP功能发送命令
|
||||
USER_CTRL_MAP_CMD_BEGIN,
|
||||
//MAP读取时间
|
||||
USER_CTRL_MAP_READ_TIME,
|
||||
//MAP读取未读短信
|
||||
USER_CTRL_MAP_READ_INDOX,
|
||||
//MAP读取已读短信
|
||||
USER_CTRL_MAP_READ_OUTDOX,
|
||||
//MAP读取已发读短信
|
||||
USER_CTRL_MAP_READ_SENT,
|
||||
//MAP读取删除短信
|
||||
USER_CTRL_MAP_READ_DELETED,
|
||||
//MAP读取草稿箱短信
|
||||
USER_CTRL_MAP_READ_DRAFT,
|
||||
//MAP停止读取
|
||||
USER_CTRL_MAP_STOP_READING,
|
||||
USER_CTRL_MAP_CMD_END,
|
||||
//不看协议栈的状态去调一次exit，关机的时候可能消息被阻塞住推上来导致SNIFF无法退出，影响后续的关机流程
|
||||
USER_CTRL_ALL_SNIFF_EXIT_BY_POWEROFF,
|
||||
|
||||
// 一拖二通话操作
|
||||
USER_CTRL_MULTI_HFP_CMD_BEGIN,
|
||||
// 设备间通话切换
|
||||
USER_CTRL_MULTI_ESCO_SWITCH,
|
||||
// 挂断打断设备通话
|
||||
USER_CTRL_MULTI_HFP_CALL_HANGUP_BREAK,
|
||||
//挂断当前通话，接听来电设备
|
||||
USER_CTRL_MULTI_HFP_CALL_HANGUP_BREAK_ACTIVE,
|
||||
//前台设备三方通话，挂断当前并接听
|
||||
USER_CTRL_MULTI_HFP_THREE_WAY_ANSWER1,
|
||||
//前台设备三方通话，保留当前并接听
|
||||
USER_CTRL_MULTI_HFP_THREE_WAY_ANSWER2,
|
||||
// 被打断设备三方通话，挂断当前接通来电
|
||||
USER_CTRL_MULTI_HFP_THREE_WAY_ANSWER1_BREAK,
|
||||
// 被打断设备三方通话，挂断当前接通来电并切换到耳机通话
|
||||
USER_CTRL_MULTI_HFP_THREE_WAY_ANSWER1_BREAK_SWITCH,
|
||||
// 被打断设备三方通话，保留当前接通来电
|
||||
USER_CTRL_MULTI_HFP_THREE_WAY_ANSWER2_BREAK,
|
||||
// 被打断设备三方通话，保留当前接通来电并切换到耳机通话
|
||||
USER_CTRL_MULTI_HFP_THREE_WAY_ANSWER2_BREAK_SWITCH,
|
||||
// 被打断设备三方通话，拒绝后台来电
|
||||
USER_CTRL_MULTI_HFP_THREE_WAY_ANSWER3_BREAK,
|
||||
USER_CTRL_MULTI_HFP_CMD_END,
|
||||
|
||||
USER_CTRL_LAST
|
||||
} USER_CMD_TYPE;
|
||||
|
||||
|
||||
////----反馈给客户使用的状态----////
|
||||
typedef enum {
|
||||
/*下面是一些即时反馈的状态，无法重复获取的状态*/
|
||||
BT_STATUS_POWER_ON = 1, /*上电*/
|
||||
BT_STATUS_POWER_OFF = 2,
|
||||
BT_STATUS_INIT_OK, /*初始化完成*/
|
||||
BT_STATUS_EXIT_OK, /*蓝牙退出完成*/
|
||||
BT_STATUS_START_CONNECTED, /*开始连接*/
|
||||
BT_STATUS_FIRST_CONNECTED, /*连接成功*/
|
||||
BT_STATUS_SECOND_CONNECTED, /*连接成功*/
|
||||
BT_STATUS_ENCRY_COMPLETE, /*加密完成*/
|
||||
BT_STATUS_FIRST_DISCONNECT, /*断开连接*/
|
||||
BT_STATUS_SECOND_DISCONNECT, /*断开连接*/
|
||||
BT_STATUS_PHONE_INCOME, /*来电*/
|
||||
BT_STATUS_PHONE_NUMBER, /*来电话号码*/
|
||||
BT_STATUS_PHONE_MANUFACTURER, /*获取手机的厂商*/
|
||||
|
||||
BT_STATUS_PHONE_OUT, /*打出电话*/
|
||||
BT_STATUS_PHONE_ACTIVE, /*接通电话*/
|
||||
BT_STATUS_PHONE_HANGUP, /*挂断电话*/
|
||||
BT_STATUS_BEGIN_AUTO_CON, /*发起回连*/
|
||||
BT_STATUS_MUSIC_SOUND_COME, /*库中加入auto mute判断音乐播放开始*/
|
||||
BT_STATUS_MUSIC_SOUND_GO, /*库中加入auto mute判断音乐播放暂停*/
|
||||
BT_STATUS_RESUME, /*后台有效，手动切回蓝牙*/
|
||||
BT_STATUS_RESUME_BTSTACK, /*后台有效，后台时来电切回蓝牙*/
|
||||
BT_STATUS_SUSPEND, /*蓝牙挂起，退出蓝牙*/
|
||||
BT_STATUS_LAST_CALL_TYPE_CHANGE, /*最后拨打电话的类型，只区分打入和打出两种状态*/
|
||||
|
||||
BT_STATUS_CALL_VOL_CHANGE, /*通话过程中设置音量会产生这个状态变化*/
|
||||
BT_STATUS_SCO_STATUS_CHANGE, /*当esco/sco连接或者断开时会产生这个状态变化*/
|
||||
BT_STATUS_CONNECT_WITHOUT_LINKKEY, /*判断是首次连接还是配对后的连接，主要依据要不要简易配对或者pin code*/
|
||||
BT_STATUS_PHONE_BATTERY_CHANGE, /*电话电量变化，该状态仅6个等级，0-5*/
|
||||
BT_STATUS_RECONNECT_LINKKEY_LOST, /*回连时发现linkkey丢失了，即手机取消配对了*/
|
||||
BT_STATUS_RECONN_OR_CONN, /*回连成功还是被连接*/
|
||||
BT_STATUS_BT_TEST_BOX_CMD, /*蓝牙收到测试盒消息。1-升级，2-fast test*/
|
||||
BT_STATUS_BT_TWS_CONNECT_CMD,
|
||||
BT_STATUS_SNIFF_STATE_UPDATE, /*SNIFF STATE UPDATE*/
|
||||
BT_STATUS_TONE_BY_FILE_NAME, /*直接使用文件名播放提示音*/
|
||||
|
||||
BT_STATUS_PHONE_DATE_AND_TIME, /*获取到手机的时间和日期，注意会有兼容性问题*/
|
||||
BT_STATUS_INBAND_RINGTONE,
|
||||
BT_STATUS_VOICE_RECOGNITION,
|
||||
BT_STATUS_AVRCP_INCOME_OPID, /*收到远端设备发过来的AVRCP命令*/
|
||||
BT_STATUS_HFP_SERVICE_LEVEL_CONNECTION_OK,
|
||||
BT_STATUS_CONN_A2DP_CH,
|
||||
BT_STATUS_CONN_HFP_CH,
|
||||
BT_STATUS_INQUIRY_TIMEOUT,
|
||||
/*下面是1个持续的状态，是get_stereo_bt_connect_status获取*/
|
||||
|
||||
/*下面是6个持续的状态，是get_bt_connect_status()获取*/
|
||||
BT_STATUS_INITING, /*正在初始化*/
|
||||
BT_STATUS_WAITINT_CONN, /*等待连接*/
|
||||
BT_STATUS_AUTO_CONNECTINT, /*正在回连*/
|
||||
BT_STATUS_CONNECTING, /*已连接，没有电话和音乐在活动*/
|
||||
BT_STATUS_TAKEING_PHONE, /*正在电话*/
|
||||
BT_STATUS_PLAYING_MUSIC, /*正在音乐*/
|
||||
BT_STATUS_A2DP_MEDIA_START,
|
||||
BT_STATUS_A2DP_MEDIA_STOP,
|
||||
|
||||
|
||||
BT_STATUS_BROADCAST_STATE,/*braoadcaset中*/
|
||||
|
||||
BT_STATUS_TRIM_OVER, /*测试盒TRIM完成*/
|
||||
} STATUS_FOR_USER;
|
||||
|
||||
typedef enum {
|
||||
BT_CALL_BATTERY_CHG = 0, //电池电量改变
|
||||
BT_CALL_SIGNAL_CHG, //网络信号改变
|
||||
BT_CALL_INCOMING, //电话打入
|
||||
BT_CALL_OUTGOING, //电话打出
|
||||
BT_CALL_ACTIVE, //接通电话
|
||||
BT_CALL_HANGUP, //电话挂断
|
||||
BT_CALL_ALERT, //远端reach
|
||||
BT_CALL_VOL_CHANGED,
|
||||
} BT_CALL_IND_STA;
|
||||
|
||||
typedef enum {
|
||||
BT_MUSIC_STATUS_IDLE = 0,
|
||||
BT_MUSIC_STATUS_STARTING,
|
||||
BT_MUSIC_STATUS_SUSPENDING,
|
||||
} BT_MUSIC_STATE; //音乐状态
|
||||
|
||||
#define SYS_BT_EVENT_TYPE_CON_STATUS (('C' << 24) | ('O' << 16) | ('N' << 8) | '\0')
|
||||
#define SYS_BT_EVENT_TYPE_HCI_STATUS (('H' << 24) | ('C' << 16) | ('I' << 8) | '\0')
|
||||
|
||||
|
||||
|
||||
#define REMOTE_DEFAULT 0x00
|
||||
#define REMOTE_SINK 0x01
|
||||
#define REMOTE_SOURCE 0x02
|
||||
|
||||
|
||||
#define SPP_CH 0x01
|
||||
#define HFP_CH 0x02
|
||||
#define A2DP_CH 0x04 //media
|
||||
#define AVCTP_CH 0x08
|
||||
#define HID_CH 0x10
|
||||
#define AVDTP_CH 0x20
|
||||
#define PBAP_CH 0x40
|
||||
#define HFP_AG_CH 0x80
|
||||
#define A2DP_SRC_CH 0x2000
|
||||
#define MAP_CH 0x8000
|
||||
struct sniff_ctrl_config_t {
|
||||
u16 sniff_max_interval;
|
||||
u16 sniff_mix_interval;
|
||||
u16 sniff_attemp;
|
||||
u16 sniff_timeout;
|
||||
u8 sniff_addr[6];
|
||||
};
|
||||
extern u32 user_send_cmd_prepare(USER_CMD_TYPE cmd, u16 param_len, u8 *param);
|
||||
extern int user_send_at_cmd_prepare(u8 *data, u16 len);
|
||||
/**发射器操作的几个接口*/
|
||||
extern u32 user_emitter_cmd_prepare(USER_CMD_TYPE cmd, u16 param_len, u8 *param);
|
||||
u8 get_emitter_connect_status(void);
|
||||
u16 get_emitter_curr_channel_state();
|
||||
u8 get_emitter_a2dp_status(void);
|
||||
|
||||
|
||||
/*
|
||||
u16 get_curr_channel_state(); 与 channel 判断区分
|
||||
主动获取当前链路的连接状态，可以用来判断有哪些链路连接上了
|
||||
*/
|
||||
extern u16 get_curr_channel_state();
|
||||
/*
|
||||
u8 get_call_status(); 与BT_CALL_IND_STA 枚举的值判断
|
||||
用于获取当前蓝牙电话的状态
|
||||
*/
|
||||
extern u8 get_call_status();
|
||||
extern void user_cmd_ctrl_init(void *var);
|
||||
|
||||
/******当前连接的设备是jl测试盒**********/
|
||||
extern bool get_remote_test_flag();
|
||||
extern void set_remote_test_flag(u8 own_remote_test);
|
||||
extern void bt_fast_test_handle_register(void (*handle)(void));
|
||||
extern void bt_dut_test_handle_register(void (*handle)(u8));
|
||||
extern void inquiry_result_handle_register(void (*handle)(char *name, u8 name_len, u8 *addr, u32 dev_class, char rssi));
|
||||
|
||||
/*个性化参数设置*/
|
||||
/*用户调试设置地址，6个byte*/
|
||||
extern void __set_bt_mac_addr(u8 *addr);
|
||||
|
||||
/*用户调试设置name,最长32个字符*/
|
||||
extern void __set_host_name(const char *name, u8 len);
|
||||
/*用户调试设置pin code*/
|
||||
extern void __set_pin_code(const char *code);
|
||||
/*该接口用于设置上电回连需要依次搜索设备的个数。*/
|
||||
extern void __set_auto_conn_device_num(u8 num);
|
||||
|
||||
/*//回连的超时设置。ms单位。但是对手机发起的连接是没作用的*/
|
||||
extern void __set_super_timeout_value(u16 time);
|
||||
/*外部设置支持什么协议*/
|
||||
extern void bt_cfg_default_init(u8 support);
|
||||
|
||||
/*设置电量显示发送更新的周期时间，为0表示关闭电量显示功能*/
|
||||
extern void __bt_set_update_battery_time(u8 time);
|
||||
/*给用户设置蓝牙支持连接的个数，主要用于控制控制可发现可连接和回连流程*/
|
||||
extern void __set_user_ctrl_conn_num(u8 num);
|
||||
/*提供接口外部设置要保留hfp不要蓝牙通话*/
|
||||
extern void __set_disable_sco_flag(bool flag);
|
||||
|
||||
/*提供接口外部设置简易配对参数*/
|
||||
extern void __set_simple_pair_param(u8 io_cap, u8 oob_data, u8 mitm);
|
||||
|
||||
/*有些自选接口用来实现个性化功能流程，回调函数注册，记得常来看看哟*/
|
||||
extern void get_battery_value_register(int (*handle)(void)); /*电量发送时获取电量等级的接口注册*/
|
||||
extern void music_vol_change_handle_register(void (*handle)(int vol), int (*handle2)(void)); /*手机更样机音乐模式的音量同步*/
|
||||
extern void read_remote_name_handle_register(void (*handle)(u8 status, u8 *addr, u8 *name)); /*获取到名字后的回调函数接口注册函数*/
|
||||
extern void spp_data_deal_handle_register(void (*handler)(u8 packet_type, u16 channel, u8 *packet, u16 size)); /*支持串口功能的数据处理接口*/
|
||||
extern void discon_complete_handle_register(void (*handle)(u8 *addr, int reason)); /*断开或者连接上会调用的函数，给客户反馈信息*/
|
||||
|
||||
extern void update_bt_current_status(u8 *addr, u8 new_status, u8 conn_status);
|
||||
extern u8 get_bt_connect_status(void);
|
||||
extern u8 a2dp_get_status(void);
|
||||
|
||||
/*//回连的超时设置。ms单位。但是对手机发起的连接是没作用的*/
|
||||
extern void __set_super_timeout_value(u16 time);
|
||||
/*//回连page的超时设置。ms单位*/
|
||||
extern void __set_page_timeout_value(u16 time);
|
||||
/*获取的值上限是bt_set_auto_conn_device_num接口配置的值,一般用于做回连策略*/
|
||||
extern int btstack_get_num_of_remote_device_recorded();
|
||||
/*上电自动搜索设备的个数*/
|
||||
extern u8 get_current_poweron_memory_search_index(u8 *temp_mac_addr);
|
||||
extern void clear_current_poweron_memory_search_index(u8 inc);
|
||||
|
||||
extern void __set_user_background_goback(u8 en);
|
||||
|
||||
extern bool user_sniff_check_req(u8 sniff_cnt_time);
|
||||
|
||||
extern int tws_updata_phone_wait_con_addr(u8 *addr);
|
||||
extern int tws_updata_internal_addr(u8 *internal_addr_local, u8 *internal_addr_remote);
|
||||
|
||||
|
||||
extern void bt_discon_complete_handle(u8 *addr, int reason);
|
||||
/*这个接口只用来判断回连或者开可发现可连接的状态*/
|
||||
extern bool is_1t2_connection(void);
|
||||
/*用来获取蓝牙连接的设备个数，不包含page状态的计数*/
|
||||
extern u8 get_total_connect_dev(void);
|
||||
/*可以通过地址查询HFP的状态*/
|
||||
extern u8 is_bt_conn_hfp_hangup(u8 *addr);
|
||||
|
||||
extern void infor_2_user_handle_register(int (*handle)(u8 *info, u16 len), u8 *buffer_ptr);
|
||||
/*音乐的ID3信息返回接口注册函数*/
|
||||
extern void bt_music_info_handle_register(void (*handler)(u8 type, u32 time, u8 *info, u16 len));
|
||||
/*用户层不需要用了*/
|
||||
extern void set_bt_vm_interface(u32 vm_index, void *interface);
|
||||
extern void bredr_stack_init(void);
|
||||
/*sniff 的计数查询*/
|
||||
extern bool bt_api_conn_mode_check(u8 enable, u8 *addr);
|
||||
extern u8 bt_api_enter_sniff_status_check(u16 time_cnt, u8 *addr);
|
||||
extern void user_cmd_timer_init();
|
||||
extern void remove_user_cmd_timer();
|
||||
//get_auto_connect_state有时效性，一般不用。可以用消息BT_STATUS_RECONN_OR_CONN
|
||||
extern u8 get_auto_connect_state(u8 *addr);
|
||||
//判断SCO/esco有没有正在使用,两个接口一样的
|
||||
extern u8 get_esco_coder_busy_flag();
|
||||
extern bool get_esco_busy_flag();
|
||||
/*有可能低层刚开始走了连接，但是上层还没有消息，不维护蓝牙的不要随便用*/
|
||||
extern u8 hci_standard_connect_check(void);
|
||||
/*设置一个标识给库里面说明正在退出蓝牙*/
|
||||
extern void set_stack_exiting(u8 exit);
|
||||
/*根据规则生产BLE的随机地址*/
|
||||
extern void lib_make_ble_address(u8 *ble_address, u8 *edr_address);
|
||||
/*查询最后一个VM记录的地址进行回连*/
|
||||
extern u8 connect_last_device_from_vm();
|
||||
/*配置协议栈支持HID功能，为了兼容以前的HID独立模式，音箱SDK有使用流程*/
|
||||
extern void __bt_set_hid_independent_flag(bool flag);
|
||||
extern int btstack_exit();
|
||||
/*能量检测之后有一些判断流程要走，非蓝牙开发不用*/
|
||||
extern int sbc_energy_check(u8 *packet, u16 size);
|
||||
extern int aac_energy_check(u8 *packet, u16 size);
|
||||
/**发射器和接收器按键切换的时候要申请和释放资源**/
|
||||
extern int a2dp_source_init(void *buf, u16 len, int deal_flag);
|
||||
/**发射器和接收器按键切换的时候要申请和释放资源**/
|
||||
extern int hfp_ag_buf_init(void *buf, int size, int deal_flag);
|
||||
/*配置蓝牙协议栈处于发射器流程*/
|
||||
extern void __set_emitter_enable_flag(u8 flag);
|
||||
/*用户使用USER_CTRL_INQUIRY_CANCEL就行，下面的用户层不直接使用*/
|
||||
extern void hci_cancel_inquiry();
|
||||
/*发射器启动还是暂停数据发送的接口，会发start和suspend命令*/
|
||||
extern void __emitter_send_media_toggle(u8 *addr, u8 toggle);
|
||||
/*查询当前有没有a2dp source（发射器的音频发送链路）在连接状态*/
|
||||
extern u8 is_a2dp_source_dev_null();
|
||||
/*选择用哪一块VM存储信息，非蓝牙维护人员不用*/
|
||||
extern u8 get_remote_dev_info_index();
|
||||
extern u8 check_tws_le_aa(void);
|
||||
extern void tws_api_set_connect_aa(int);
|
||||
extern void tws_le_acc_generation_init(void);
|
||||
extern void tws_api_clear_connect_aa();
|
||||
extern void clear_sniff_cnt(void);
|
||||
/**删除VM记录的最后一个设备信息*/
|
||||
extern u8 delete_last_device_from_vm();
|
||||
|
||||
#define BD_CLASS_WEARABLE_HEADSET 0x240404/*ios10.2 display headset icon*/
|
||||
#define BD_CLASS_HANDS_FREE 0x240408/*ios10.2 display bluetooth icon*/
|
||||
#define BD_CLASS_MICROPHONE 0x240410
|
||||
#define BD_CLASS_LOUDSPEAKER 0x240414
|
||||
#define BD_CLASS_HEADPHONES 0x240418
|
||||
#define BD_CLASS_CAR_AUDIO 0x240420
|
||||
#define BD_CLASS_HIFI_AUDIO 0x240428
|
||||
#define BD_CLASS_PHONEBOOK 0x340404
|
||||
#define BD_CLASS_PAN_DEV 0X020118
|
||||
|
||||
#define BD_CLASS_SMART_PHONE 0x5A020C//0x40020C
|
||||
|
||||
#define BD_CLASS_MOUSE 0x002580
|
||||
#define BD_CLASS_KEYBOARD 0x002540
|
||||
#define BD_CLASS_KEYBOARD_MOUSE 0x0025C0
|
||||
#define BD_CLASS_REMOTE_CONTROL 0x00254C
|
||||
|
||||
#define BD_CLASS_TRANSFER_HEALTH 0x10091C
|
||||
|
||||
//LDAC采样率
|
||||
#define LDAC_SAMPLING_FREQ_44100 0x20
|
||||
#define LDAC_SAMPLING_FREQ_48000 0x10
|
||||
#define LDAC_SAMPLING_FREQ_88200 0x08
|
||||
#define LDAC_SAMPLING_FREQ_96000 0x04
|
||||
// 配置LDAC支持的采样率
|
||||
extern void __set_a2dp_ldac_sampling_freq(u8 a2dp_ldac_sampling_freq);
|
||||
|
||||
/*修改什么的类型，会影响到手机显示的图标*/
|
||||
extern void __change_hci_class_type(u32 class);
|
||||
/*配置通话使用16k的msbc还是8k的cvsd*/
|
||||
extern void __set_support_msbc_flag(bool flag);
|
||||
/*配置协议栈使用支持AAC的信息*/
|
||||
extern void __set_support_aac_flag(bool flag);
|
||||
|
||||
/*设置1拖2时电话是否抢断标识*/
|
||||
extern void __set_hfp_switch(u8 switch_en);
|
||||
/*
|
||||
*设置1拖2时电话是否恢复标识
|
||||
*通话结束的时候，如果还有手机在通话，自动切到蓝牙端
|
||||
*/
|
||||
extern void __set_hfp_restore(u8 restore_en);
|
||||
/*当前设备被打断时是否自动暂停*/
|
||||
extern void __set_auto_pause_flag(u8 flag);
|
||||
/*当前设备被打断时是否自动暂停*/
|
||||
extern void __set_auto_pause_flag(u8 flag);
|
||||
/*高级音频设置标志是否允许后者打断前者*/
|
||||
extern void __set_music_break_in_flag(u8 flag);
|
||||
/*高级音频打断检测数据包阈值设置*/
|
||||
extern void __set_a2dp_sound_detect_counter(u8 sound_come, u8 sound_go);
|
||||
/*pan的控制接口和发数接口,
|
||||
addr指定就按指定的查找，NULL就默认正在使用那个
|
||||
cmd 下面定义的宏用户可以使用
|
||||
param 传参数需要的值或者data包的长度
|
||||
data 传的是要发数据的包指针
|
||||
*/
|
||||
#define USER_PAN_CMD_SEND_DATA 0xff
|
||||
int user_pan_send_cmd(u8 *addr, u32 cmd, u32 param, u8 *data);
|
||||
|
||||
enum {
|
||||
BD_ESCO_IDLE = 0, /*当前没有设备通话中*/
|
||||
BD_ESCO_BUSY_CURRENT, /*当前地址对应的设备通话中*/
|
||||
BD_ESCO_BUSY_OTHER, /*通话中的设备非当前地址*/
|
||||
};
|
||||
|
||||
enum {
|
||||
BD_GET_SECOND_ACTIVE = 0, /*获取当前设备的三方通话状态*/
|
||||
BD_GET_SECOND_BREAK, /*获取后台设备的三方通话状态*/
|
||||
};
|
||||
|
||||
extern u8 check_esco_state_via_addr(u8 *addr);
|
||||
/*判断是否主动回连*/
|
||||
extern u8 get_auto_connect_state(u8 *addr);
|
||||
|
||||
typedef struct __hid_sdp_info {
|
||||
u16 vid_private;
|
||||
u16 pid_private;
|
||||
u16 ver_private;
|
||||
|
||||
u8 sub_class;
|
||||
u8 country_code;
|
||||
bool virtual_cable;
|
||||
bool reconnect_initiate;
|
||||
bool sdp_disable;
|
||||
bool battery_power;
|
||||
bool remote_wake;
|
||||
bool normally_connectable;
|
||||
bool boot_device;
|
||||
u16 version;
|
||||
u16 parser_version;
|
||||
u16 profile_version;
|
||||
u16 supervision_timeout;
|
||||
u16 language;
|
||||
u16 bt_string_offset;
|
||||
u16 descriptor_len;
|
||||
u8 *descriptor;
|
||||
char *service_name;
|
||||
char *service_description;
|
||||
char *provide_name;
|
||||
void (*sdp_request_respone_callback)(u8 type);
|
||||
u8 *extra_buf;
|
||||
u8 extra_len;
|
||||
} hid_sdp_info_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
u16 chl_id;
|
||||
u16 data_len;
|
||||
u8 *data_ptr;
|
||||
} hid_s_param_t;
|
||||
|
||||
extern u16 sdp_create_diy_device_ID_service(u8 *buffer, u16 buffer_size);
|
||||
extern u16 sdp_create_diy_hid_service(u8 *buffer, u16 buffer_size, const u8 *hid_descriptor, u16 hid_descriptor_size);
|
||||
u8 get_remote_vol_sync(void);
|
||||
void set_start_search_spp_device(u8 spp);
|
||||
|
||||
|
||||
u8 restore_remote_device_info_opt(bd_addr_t *mac_addr, u8 conn_device_num, u8 id);
|
||||
u8 restore_remote_device_info_profile(bd_addr_t *mac_addr, u8 device_num, u8 id, u8 profile);
|
||||
/*remote dev type*/
|
||||
/*0:unknow,1-android,2:apple_inc,0x03-xiaomi*/
|
||||
enum {
|
||||
REMOTE_DEV_UNKNOWN = 0,
|
||||
REMOTE_DEV_ANDROID ,
|
||||
REMOTE_DEV_IOS ,
|
||||
REMOTE_DEV_XIAOMI ,
|
||||
};
|
||||
u8 remote_dev_company_ioctrl(bd_addr_t dev_addr, u8 op_flag, u8 value);
|
||||
u8 hci_standard_link_check(void);
|
||||
|
||||
//获取当前是否有conn处于sniff状态
|
||||
bool bt_api_get_sniff_state();
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
582
include_lib/btstack/bluetooth.h
Normal file
582
include_lib/btstack/bluetooth.h
Normal file
@ -0,0 +1,582 @@
|
||||
#ifndef _BLUETOOTH_H_
|
||||
#define _BLUETOOTH_H_
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
//LE
|
||||
#include "le/ble_data_types.h"
|
||||
#include "le/ble_api.h"
|
||||
#include "le/le_user.h"
|
||||
#include "le/att.h"
|
||||
#include "le/gatt.h"
|
||||
#include "le/sm.h"
|
||||
|
||||
#define ISO_SDU_DTAT_LENGTH 0x032c //812byte
|
||||
#define ISO_PDU_DTAT_LENGTH 251 //251byte
|
||||
#define ISO_PDU_INTERVAL_M_S 0x4e20 //20ms
|
||||
#define ISO_PDU_INTERVAL_S_M 0x4e20 //20ms
|
||||
#define HCI_ISO_DATA_PACKET 0x05
|
||||
|
||||
//Classic
|
||||
|
||||
|
||||
|
||||
|
||||
//Common
|
||||
#include "btstack_event.h"
|
||||
|
||||
|
||||
#define HCI_COMMAND_DATA_PACKET 0x01
|
||||
#define HCI_ACL_DATA_PACKET 0x02
|
||||
#define HCI_SCO_DATA_PACKET 0x03
|
||||
#define HCI_EVENT_PACKET 0x04
|
||||
|
||||
// OGFs
|
||||
#define OGF_LINK_CONTROL 0x01
|
||||
#define OGF_LINK_POLICY 0x02
|
||||
#define OGF_CONTROLLER_BASEBAND 0x03
|
||||
#define OGF_INFORMATIONAL_PARAMETERS 0x04
|
||||
#define OGF_STATUS_PARAMETERS 0x05
|
||||
#define OGF_TESTING 0x06
|
||||
#define OGF_LE_CONTROLLER 0x08
|
||||
#define OGF_VENDOR_LE_CONTROLLER 0x3e
|
||||
#define OGF_VENDOR 0x3f
|
||||
|
||||
|
||||
// Events from host controller to host
|
||||
|
||||
/**
|
||||
* @format 1
|
||||
* @param status
|
||||
*/
|
||||
#define HCI_EVENT_INQUIRY_COMPLETE 0x01
|
||||
|
||||
/**
|
||||
* @format 1B11132
|
||||
* @param num_responses
|
||||
* @param bd_addr
|
||||
* @param page_scan_repetition_mode
|
||||
* @param reserved1
|
||||
* @param reserved2
|
||||
* @param class_of_device
|
||||
* @param clock_offset
|
||||
*/
|
||||
#define HCI_EVENT_INQUIRY_RESULT 0x02
|
||||
|
||||
/**
|
||||
* @format 12B11
|
||||
* @param status
|
||||
* @param connection_handle
|
||||
* @param bd_addr
|
||||
* @param link_type
|
||||
* @param encryption_enabled
|
||||
*/
|
||||
#define HCI_EVENT_CONNECTION_COMPLETE 0x03
|
||||
/**
|
||||
* @format B31
|
||||
* @param bd_addr
|
||||
* @param class_of_device
|
||||
* @param link_type
|
||||
*/
|
||||
#define HCI_EVENT_CONNECTION_REQUEST 0x04
|
||||
/**
|
||||
* @format 121
|
||||
* @param status
|
||||
* @param connection_handle
|
||||
* @param reason
|
||||
*/
|
||||
#define HCI_EVENT_DISCONNECTION_COMPLETE 0x05
|
||||
/**
|
||||
* @format 12
|
||||
* @param status
|
||||
* @param connection_handle
|
||||
*/
|
||||
#define HCI_EVENT_AUTHENTICATION_COMPLETE 0x06
|
||||
/**
|
||||
* @format 1BN
|
||||
* @param status
|
||||
* @param bd_addr
|
||||
* @param remote_name
|
||||
*/
|
||||
#define HCI_EVENT_REMOTE_NAME_REQUEST_COMPLETE 0x07
|
||||
/**
|
||||
* @format 121
|
||||
* @param status
|
||||
* @param connection_handle
|
||||
* @param encryption_enabled
|
||||
*/
|
||||
#define HCI_EVENT_ENCRYPTION_CHANGE 0x08
|
||||
/**
|
||||
* @format 12
|
||||
* @param status
|
||||
* @param connection_handle
|
||||
*/
|
||||
#define HCI_EVENT_CHANGE_CONNECTION_LINK_KEY_COMPLETE 0x09
|
||||
/**
|
||||
* @format 121
|
||||
* @param status
|
||||
* @param connection_handle
|
||||
* @param key_flag
|
||||
*/
|
||||
#define HCI_EVENT_MASTER_LINK_KEY_COMPLETE 0x0A
|
||||
|
||||
#define HCI_EVENT_READ_REMOTE_SUPPORTED_FEATURES_COMPLETE 0x0B
|
||||
|
||||
#define HCI_EVENT_READ_REMOTE_VERSION_INFORMATION_COMPLETE 0x0C
|
||||
|
||||
#define HCI_EVENT_QOS_SETUP_COMPLETE 0x0D
|
||||
|
||||
/**
|
||||
* @format 12R
|
||||
* @param num_hci_command_packets
|
||||
* @param command_opcode
|
||||
* @param return_parameters
|
||||
*/
|
||||
#define HCI_EVENT_COMMAND_COMPLETE 0x0E
|
||||
/**
|
||||
* @format 112
|
||||
* @param status
|
||||
* @param num_hci_command_packets
|
||||
* @param command_opcode
|
||||
*/
|
||||
#define HCI_EVENT_COMMAND_STATUS 0x0F
|
||||
|
||||
/**
|
||||
* @format 1
|
||||
* @param hardware_code
|
||||
*/
|
||||
#define HCI_EVENT_HARDWARE_ERROR 0x10
|
||||
|
||||
#define HCI_EVENT_FLUSH_OCCURRED 0x11
|
||||
|
||||
/**
|
||||
* @format 1B1
|
||||
* @param status
|
||||
* @param bd_addr
|
||||
* @param role
|
||||
*/
|
||||
#define HCI_EVENT_ROLE_CHANGE 0x12
|
||||
|
||||
// TODO: number_of_handles 1, connection_handle[H*i], hc_num_of_completed_packets[2*i]
|
||||
#define HCI_EVENT_NUMBER_OF_COMPLETED_PACKETS 0x13
|
||||
|
||||
/**
|
||||
* @format 1H12
|
||||
* @param status
|
||||
* @param handle
|
||||
* @param mode
|
||||
* @param interval
|
||||
*/
|
||||
#define HCI_EVENT_MODE_CHANGE_EVENT 0x14
|
||||
|
||||
// TODO: num_keys, bd_addr[B*i], link_key[16 octets * i]
|
||||
#define HCI_EVENT_RETURN_LINK_KEYS 0x15
|
||||
|
||||
/**
|
||||
* @format B
|
||||
* @param bd_addr
|
||||
*/
|
||||
#define HCI_EVENT_PIN_CODE_REQUEST 0x16
|
||||
|
||||
/**
|
||||
* @format B
|
||||
* @param bd_addr
|
||||
*/
|
||||
#define HCI_EVENT_LINK_KEY_REQUEST 0x17
|
||||
|
||||
// TODO: bd_addr B, link_key 16octets, key_type 1
|
||||
#define HCI_EVENT_LINK_KEY_NOTIFICATION 0x18
|
||||
|
||||
/**
|
||||
* @format 1
|
||||
* @param link_type
|
||||
*/
|
||||
#define HCI_EVENT_DATA_BUFFER_OVERFLOW 0x1A
|
||||
|
||||
/**
|
||||
* @format H1
|
||||
* @param handle
|
||||
* @param lmp_max_slots
|
||||
*/
|
||||
#define HCI_EVENT_MAX_SLOTS_CHANGED 0x1B
|
||||
|
||||
/**
|
||||
* @format 1H2
|
||||
* @param status
|
||||
* @param handle
|
||||
* @param clock_offset
|
||||
*/
|
||||
#define HCI_EVENT_READ_CLOCK_OFFSET_COMPLETE 0x1C
|
||||
|
||||
/**
|
||||
* @format 1H2
|
||||
* @param status
|
||||
* @param handle
|
||||
* @param packet_types
|
||||
* @pnote packet_type is in plural to avoid clash with Java binding Packet.getPacketType()
|
||||
*/
|
||||
#define HCI_EVENT_CONNECTION_PACKET_TYPE_CHANGED 0x1D
|
||||
|
||||
#define HCI_EVENT_PAGE_SCAN_REPETITION_MODE_CHANGE 0x20
|
||||
/**
|
||||
* @format 1B11321
|
||||
* @param num_responses
|
||||
* @param bd_addr
|
||||
* @param page_scan_repetition_mode
|
||||
* @param reserved
|
||||
* @param class_of_device
|
||||
* @param clock_offset
|
||||
* @param rssi
|
||||
*/
|
||||
#define HCI_EVENT_INQUIRY_RESULT_WITH_RSSI 0x22
|
||||
|
||||
#define HCI_EVENT_READ_REMOTE_EXTERNED_FEATURES_COMPLETE 0x23
|
||||
/**
|
||||
* @format 1HB111221
|
||||
* @param status
|
||||
* @param handle
|
||||
* @param bd_addr
|
||||
* @param link_type
|
||||
* @param transmission_interval
|
||||
* @param retransmission_interval
|
||||
* @param rx_packet_length
|
||||
* @param tx_packet_length
|
||||
* @param air_mode
|
||||
*/
|
||||
#define HCI_EVENT_SYNCHRONOUS_CONNECTION_COMPLETE 0x2C
|
||||
|
||||
// TODO: serialize extended_inquiry_response and provide parser
|
||||
/**
|
||||
* @format 1B11321
|
||||
* @param num_responses
|
||||
* @param bd_addr
|
||||
* @param page_scan_repetition_mode
|
||||
* @param reserved
|
||||
* @param class_of_device
|
||||
* @param clock_offset
|
||||
* @param rssi
|
||||
*/
|
||||
#define HCI_EVENT_EXTENDED_INQUIRY_RESPONSE 0x2F
|
||||
#define HCI_EVENT_EXTENDED_INQUIRY_RESULT 0x2F
|
||||
|
||||
/**
|
||||
* @format 1H
|
||||
* @param status
|
||||
* @param handle
|
||||
*/
|
||||
#define HCI_EVENT_ENCRYPTION_KEY_REFRESH_COMPLETE 0x30
|
||||
|
||||
#define HCI_EVENT_IO_CAPABILITY_REQUEST 0x31
|
||||
#define HCI_EVENT_IO_CAPABILITY_RESPONSE 0x32
|
||||
|
||||
/**
|
||||
* @format B4
|
||||
* @param bd_addr
|
||||
* @param numeric_value
|
||||
*/
|
||||
#define HCI_EVENT_USER_CONFIRMATION_REQUEST 0x33
|
||||
|
||||
/**
|
||||
* @format B
|
||||
* @param bd_addr
|
||||
*/
|
||||
#define HCI_EVENT_USER_PASSKEY_REQUEST 0x34
|
||||
|
||||
/**
|
||||
* @format B
|
||||
* @param bd_addr
|
||||
*/
|
||||
#define HCI_EVENT_REMOTE_OOB_DATA_REQUEST 0x35
|
||||
|
||||
/**
|
||||
* @format 1B
|
||||
* @param status
|
||||
* @param bd_addr
|
||||
*/
|
||||
#define HCI_EVENT_SIMPLE_PAIRING_COMPLETE 0x36
|
||||
#define HCI_EVENT_LINK_SUPPERVISION_TIMEOUT_CHANGE_EVENT 0x38
|
||||
|
||||
#define HCI_EVENT_USER_PRESSKEY_NOTIFICATION 0x3B
|
||||
#define HCI_EVENT_REMOTE_KEYPRESS_NOTIFICATION 0x3C
|
||||
#define HCI_EVENT_REMOTE_SUPPORTED_FEATURES_NOTIFICATION 0x3D
|
||||
#define HCI_EVENT_LE_META 0x3E
|
||||
|
||||
// last used HCI_EVENT in 2.1 is 0x3d
|
||||
// last used HCI_EVENT in 4.1 is 0x57
|
||||
|
||||
#define HCI_EVENT_VENDOR_CONNECTION_COMPLETE 0xEF
|
||||
|
||||
//event definition for new vendor sub event
|
||||
#define HCI_EVENT_VENDOR_META 0xF5
|
||||
#define HCI_SUBEVENT_VENDOR_TEST_MODE_CFG 0x01
|
||||
|
||||
#define HCI_EVENT_VENDOR_FRE_OFFSET_TRIM 0xF6
|
||||
#define HCI_EVENT_VENDOR_ENCRY_COMPLETE 0xF7
|
||||
#define HCI_EVENT_VENDOR_NO_RECONN_ADDR 0xF8
|
||||
#define HCI_EVENT_VENDOR_SETUP_COMPLETE 0xF9
|
||||
#define HCI_EVENT_VENDOR_DUT 0xFA
|
||||
#define HCI_EVENT_VENDOR_OSC_INTERNAL 0xFB
|
||||
#define HCI_EVENT_VENDOR_FAST_TEST 0xFC
|
||||
#define HCI_EVENT_VENDOR_REMOTE_UPDATE 0xFD
|
||||
#define HCI_EVENT_VENDOR_REMOTE_TEST 0xFE
|
||||
#define HCI_EVENT_VENDOR_SPECIFIC 0xFF
|
||||
|
||||
#define BTSTACK_EVENT_HCI_CONNECTIONS_DELETE 0x6D
|
||||
|
||||
/**
|
||||
* @format 11H11B2221
|
||||
* @param subevent_code
|
||||
* @param status
|
||||
* @param connection_handle
|
||||
* @param role
|
||||
* @param peer_address_type
|
||||
* @param peer_address
|
||||
* @param conn_interval
|
||||
* @param conn_latency
|
||||
* @param supervision_timeout
|
||||
* @param master_clock_accuracy
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_CONNECTION_COMPLETE 0x01
|
||||
|
||||
// array of advertisements, not handled by event accessor generator
|
||||
#define HCI_SUBEVENT_LE_ADVERTISING_REPORT 0x02
|
||||
|
||||
/**
|
||||
* @format 11H222
|
||||
* @param subevent_code
|
||||
* @param status
|
||||
* @param connection_handle
|
||||
* @param conn_interval
|
||||
* @param conn_latency
|
||||
* @param supervision_timeout
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_CONNECTION_UPDATE_COMPLETE 0x03
|
||||
|
||||
/**
|
||||
* @format 1HD2
|
||||
* @param subevent_code
|
||||
* @param connection_handle
|
||||
* @param random_number
|
||||
* @param encryption_diversifier
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_READ_REMOTE_USED_FEATURES_COMPLETE 0x04
|
||||
|
||||
/**
|
||||
* @format 1HD2
|
||||
* @param subevent_code
|
||||
* @param connection_handle
|
||||
* @param random_number
|
||||
* @param encryption_diversifier
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_LONG_TERM_KEY_REQUEST 0x05
|
||||
|
||||
/**
|
||||
* @format 1H2222
|
||||
* @param subevent_code
|
||||
* @param connection_handle
|
||||
* @param interval_min
|
||||
* @param interval_max
|
||||
* @param latency
|
||||
* @param timeout
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_REMOTE_CONNECTION_PARAMETER_REQUEST 0x06
|
||||
|
||||
/**
|
||||
* @format 1H2222
|
||||
* @param subevent_code
|
||||
* @param connection_handle
|
||||
* @param max_tx_octets
|
||||
* @param max_tx_time
|
||||
* @param max_rx_octets
|
||||
* @param max_rx_time
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_DATA_LENGTH_CHANGE 0x07
|
||||
|
||||
/**
|
||||
* @format 11QQ
|
||||
* @param subevent_code
|
||||
* @param status
|
||||
* @param dhkey_x x coordinate of P256 public key
|
||||
* @param dhkey_y y coordinate of P256 public key
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_READ_LOCAL_P256_PUBLIC_KEY_COMPLETE 0x08
|
||||
/**
|
||||
* @format 11Q
|
||||
* @param subevent_code
|
||||
* @param status
|
||||
* @param dhkey Diffie-Hellman key
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_GENERATE_DHKEY_COMPLETE 0x09
|
||||
|
||||
/**
|
||||
* @format 11H11BBB2221
|
||||
* @param subevent_code
|
||||
* @param status
|
||||
* @param connection_handle
|
||||
* @param role
|
||||
* @param peer_address_type
|
||||
* @param perr_addresss
|
||||
* @param local_resolvable_private_addres
|
||||
* @param peer_resolvable_private_addres
|
||||
* @param conn_interval
|
||||
* @param conn_latency
|
||||
* @param supervision_timeout
|
||||
* @param master_clock_accuracy
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_ENHANCED_CONNECTION_COMPLETE 0x0A
|
||||
|
||||
// array of advertisements, not handled by event accessor generator
|
||||
#define HCI_SUBEVENT_LE_DIRECT_ADVERTISING_REPORT 0x0B
|
||||
|
||||
/**
|
||||
* @format 11211
|
||||
* @param subevent_code
|
||||
* @param status
|
||||
* @param connection_handle
|
||||
* @param TX_PHY
|
||||
* @param RX_PHY
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_PHY_UPDATE_COMPLETE 0x0C
|
||||
|
||||
// array of advertisements, not handled by event accessor generator
|
||||
#define HCI_SUBEVENT_LE_EXTENDED_ADVERTISING_REPORT 0x0D
|
||||
|
||||
#define HCI_SUBEVENT_LE_PERIODIC_ADVERTISING_SYNC_ESTABLISHED 0x0E
|
||||
|
||||
/**
|
||||
* @format 1211111B
|
||||
* @param subevent_code
|
||||
* @param sync_handle
|
||||
* @param tx_power
|
||||
* @param rssi
|
||||
* @param unused
|
||||
* @param data_status
|
||||
* @param data_length
|
||||
* @param data
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_PERIODIC_ADVERTISING_REPORT 0x0F
|
||||
|
||||
/**
|
||||
* @format 2
|
||||
* @param sync_handle
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_PERIODIC_ADVERTISING_SYNC_LOST 0x10
|
||||
|
||||
/**
|
||||
* @format
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_SCAN_TIMEOUT 0x11
|
||||
|
||||
/**
|
||||
* @format 1121
|
||||
* @param subevent_code
|
||||
* @param status
|
||||
* @param advertising_handle
|
||||
* @param connection_handle
|
||||
* @param num_completed_extended_advertising_events
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_ADVERTISING_SET_TERMINATED 0x12
|
||||
|
||||
/**
|
||||
* @format 1116
|
||||
* @param subevent_code
|
||||
* @param advertising_handle
|
||||
* @param scanner_address_type
|
||||
* @param scanner_address
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_SCAN_REQUEST_RECEIVED 0x13
|
||||
|
||||
/**
|
||||
* @format 21
|
||||
* @param subevent_code
|
||||
* @param connection_handle
|
||||
* @param channel_selection_algorithm
|
||||
*/
|
||||
#define HCI_SUBEVENT_LE_CHANNEL_SELECTION_ALGORITHM 0x14
|
||||
|
||||
|
||||
#define HCI_SUBEVENT_LE_VENDOR_INTERVAL_COMPLETE 0xF0
|
||||
|
||||
/**
|
||||
* @format
|
||||
*/
|
||||
#define HCI_EVENT_ANCS_META 0xEA
|
||||
|
||||
|
||||
/**
|
||||
* compact HCI Command packet description
|
||||
*/
|
||||
typedef struct {
|
||||
uint16_t opcode;
|
||||
const char *format;
|
||||
} hci_cmd_t;
|
||||
|
||||
int hci_send_cmd(const hci_cmd_t *cmd, ...);
|
||||
|
||||
|
||||
extern const hci_cmd_t hci_reset;
|
||||
extern const hci_cmd_t hci_read_bd_addr;
|
||||
extern const hci_cmd_t hci_read_local_supported_features;
|
||||
extern const hci_cmd_t hci_read_buffer_size;
|
||||
extern const hci_cmd_t hci_read_local_supported_commands;
|
||||
extern const hci_cmd_t hci_read_local_version_information;
|
||||
extern const hci_cmd_t hci_read_le_host_supported;
|
||||
extern const hci_cmd_t hci_read_local_name;
|
||||
extern const hci_cmd_t hci_write_class_of_device;
|
||||
extern const hci_cmd_t hci_write_local_name;
|
||||
extern const hci_cmd_t hci_write_scan_enable;
|
||||
extern const hci_cmd_t hci_set_event_mask;
|
||||
extern const hci_cmd_t hci_le_add_device_to_white_list;
|
||||
extern const hci_cmd_t hci_le_clear_white_list;
|
||||
extern const hci_cmd_t hci_le_connection_update;
|
||||
extern const hci_cmd_t hci_le_create_connection;
|
||||
extern const hci_cmd_t hci_le_create_connection_cancel;
|
||||
extern const hci_cmd_t hci_le_encrypt;
|
||||
extern const hci_cmd_t hci_le_generate_dhkey;
|
||||
extern const hci_cmd_t hci_le_long_term_key_negative_reply;
|
||||
extern const hci_cmd_t hci_le_long_term_key_request_reply;
|
||||
extern const hci_cmd_t hci_le_rand;
|
||||
extern const hci_cmd_t hci_le_read_advertising_channel_tx_power;
|
||||
extern const hci_cmd_t hci_le_read_buffer_size;
|
||||
extern const hci_cmd_t hci_le_read_channel_map;
|
||||
extern const hci_cmd_t hci_le_read_local_p256_public_key;
|
||||
extern const hci_cmd_t hci_le_read_maximum_data_length;
|
||||
extern const hci_cmd_t hci_le_read_remote_used_features;
|
||||
extern const hci_cmd_t hci_le_read_suggested_default_data_length;
|
||||
extern const hci_cmd_t hci_le_read_supported_features;
|
||||
extern const hci_cmd_t hci_le_read_supported_states;
|
||||
extern const hci_cmd_t hci_le_read_white_list_size;
|
||||
extern const hci_cmd_t hci_le_receiver_test;
|
||||
extern const hci_cmd_t hci_le_remove_device_from_white_list;
|
||||
extern const hci_cmd_t hci_le_set_advertise_enable;
|
||||
extern const hci_cmd_t hci_le_set_advertising_data;
|
||||
extern const hci_cmd_t hci_le_set_advertising_parameters;
|
||||
extern const hci_cmd_t hci_le_set_data_length;
|
||||
extern const hci_cmd_t hci_le_set_event_mask;
|
||||
extern const hci_cmd_t hci_le_set_host_channel_classification;
|
||||
extern const hci_cmd_t hci_le_set_random_address;
|
||||
extern const hci_cmd_t hci_le_set_scan_enable;
|
||||
extern const hci_cmd_t hci_le_set_scan_parameters;
|
||||
extern const hci_cmd_t hci_le_set_scan_response_data;
|
||||
extern const hci_cmd_t hci_le_start_encryption;
|
||||
extern const hci_cmd_t hci_le_test_end;
|
||||
extern const hci_cmd_t hci_le_transmitter_test;
|
||||
extern const hci_cmd_t hci_le_write_suggested_default_data_length;
|
||||
extern const hci_cmd_t hci_le_set_phy;
|
||||
|
||||
extern const hci_cmd_t hci_le_set_ext_advertising_parameters;
|
||||
extern const hci_cmd_t hci_le_set_ext_advertising_data;
|
||||
extern const hci_cmd_t hci_le_set_ext_advertise_enable;
|
||||
extern const hci_cmd_t hci_le_set_ext_scan_parameters;
|
||||
extern const hci_cmd_t hci_le_set_ext_scan_enable;
|
||||
|
||||
enum VENDOR_REMOTE_TEST_VALUE {
|
||||
VENDOR_TEST_DISCONNECTED = 0,
|
||||
VENDOR_TEST_LEGACY_CONNECTED_BY_BT_CLASSIC,
|
||||
VENDOR_TEST_LEGACY_CONNECTED_BY_BLE,
|
||||
VENDOR_TEST_CONNECTED_WITH_TWS,
|
||||
};
|
||||
|
||||
|
||||
#endif
|
||||
38
include_lib/btstack/bt_profile_config.h
Normal file
38
include_lib/btstack/bt_profile_config.h
Normal file
@ -0,0 +1,38 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : bt_profile_config.h
|
||||
|
||||
* Description :
|
||||
|
||||
* Author : Tongai
|
||||
|
||||
* Email : laotongai@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2020-07-01 16:31
|
||||
|
||||
* Copyright:(c)JIELI 2011-2019 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
#ifndef BT_PROFILE_H
|
||||
#define BT_PROFILE_H
|
||||
|
||||
|
||||
#define BT_BTSTACK_CLASSIC BIT(0)
|
||||
#define BT_BTSTACK_LE_ADV BIT(1)
|
||||
#define BT_BTSTACK_LE BIT(2)
|
||||
|
||||
extern const int config_stack_modules;
|
||||
#define STACK_MODULES_IS_SUPPORT(x) (config_stack_modules & (x))
|
||||
|
||||
|
||||
|
||||
extern u8 app_bredr_pool[];
|
||||
extern u8 app_le_pool[];
|
||||
extern u8 app_l2cap_pool[];
|
||||
extern u8 app_bredr_profile[];
|
||||
|
||||
extern u16 get_bredr_pool_len(void);
|
||||
extern u16 get_le_pool_len(void);
|
||||
extern u16 get_l2cap_stack_len(void);
|
||||
extern u16 get_profile_pool_len(void);
|
||||
|
||||
|
||||
#endif
|
||||
38
include_lib/btstack/btstack_error.h
Normal file
38
include_lib/btstack/btstack_error.h
Normal file
@ -0,0 +1,38 @@
|
||||
#ifndef BTSTACK_ERROR_H
|
||||
#define BTSTACK_ERROR_H
|
||||
|
||||
|
||||
#define ERROR_CODE_SUCCESS 0x00
|
||||
#define ERROR_CODE_PAGE_TIMEOUT 0x04
|
||||
#define ERROR_CODE_AUTHENTICATION_FAILURE 0x05
|
||||
#define ERROR_CODE_PIN_OR_KEY_MISSING 0x06
|
||||
#define ERROR_CODE_CONNECTION_TIMEOUT 0x08
|
||||
#define ERROR_CODE_SYNCHRONOUS_CONNECTION_LIMIT_TO_A_DEVICE_EXCEEDED 0x0A
|
||||
#define ERROR_CODE_ACL_CONNECTION_ALREADY_EXISTS 0x0B
|
||||
#define ERROR_CODE_CONNECTION_REJECTED_DUE_TO_LIMITED_RESOURCES 0x0D
|
||||
#define ERROR_CODE_CONNECTION_REJECTED_DUE_TO_UNACCEPTABLE_BD_ADDR 0x0F
|
||||
#define ERROR_CODE_CONNECTION_ACCEPT_TIMEOUT_EXCEEDED 0x10
|
||||
#define ERROR_CODE_REMOTE_USER_TERMINATED_CONNECTION 0x13
|
||||
#define ERROR_CODE_CONNECTION_TERMINATED_BY_LOCAL_HOST 0x16
|
||||
|
||||
#define CUSTOM_BB_AUTO_CANCEL_PAGE 0xFD //// app cancle page
|
||||
#define BB_CANCEL_PAGE 0xFE //// bb cancle page
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
6625
include_lib/btstack/btstack_event.h
Normal file
6625
include_lib/btstack/btstack_event.h
Normal file
File diff suppressed because it is too large
Load Diff
103
include_lib/btstack/btstack_lib.ld
Normal file
103
include_lib/btstack/btstack_lib.ld
Normal file
@ -0,0 +1,103 @@
|
||||
SECTIONS
|
||||
{
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
btstack_data_start = .;
|
||||
*(.bt_stack_data)
|
||||
*(.ble_db_data)
|
||||
*(.ble_sm_data)
|
||||
*(.ble_att_data)
|
||||
*(.ble_gatt_data)
|
||||
|
||||
/*mesh*/
|
||||
BTSTACK_LE_HOST_MESH_DATA_START = .;
|
||||
. = (. +3) & ~ 3;
|
||||
_net_buf_pool_list = .;
|
||||
*(._net_buf_pool.static.*)
|
||||
|
||||
*(.ble_mesh_data)
|
||||
*(.ble_mesh_tinycrypt_data)
|
||||
BTSTACK_LE_HOST_MESH_DATA_SIZE = ABSOLUTE(. - BTSTACK_LE_HOST_MESH_DATA_START);
|
||||
|
||||
btstack_data_end = .;
|
||||
|
||||
} > ram0
|
||||
|
||||
.bss (NOLOAD) :ALIGN(4)
|
||||
{
|
||||
btstack_bss_start = .;
|
||||
*(.bt_stack_bss)
|
||||
*(.ble_db_bss)
|
||||
*(.ble_sm_bss)
|
||||
*(.ble_att_bss)
|
||||
*(.ble_gatt_bss)
|
||||
*(.btstack_pool)
|
||||
|
||||
/*mesh*/
|
||||
BTSTACK_LE_HOST_MESH_BSS_START = .;
|
||||
*(.ble_mesh_bss)
|
||||
*(.ble_mesh_tinycrypt_bss)
|
||||
BTSTACK_LE_HOST_MESH_BSS_SIZE = ABSOLUTE(. - BTSTACK_LE_HOST_MESH_BSS_START);
|
||||
|
||||
btstack_bss_end = .;
|
||||
} > ram0
|
||||
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
btstack_code_start = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
a2dp_source_media_codec_begin = .;
|
||||
KEEP(*(.a2dp_source_media_codec))
|
||||
a2dp_source_media_codec_end = .;
|
||||
a2dp_sink_media_probe_begin = .;
|
||||
KEEP(*(.a2dp_sink_media_probe))
|
||||
a2dp_sink_media_probe_end = .;
|
||||
|
||||
a2dp_sink_media_codec_begin = .;
|
||||
KEEP(*(.a2dp_sink_media_codec))
|
||||
a2dp_sink_media_codec_end = .;
|
||||
|
||||
a2dp_event_handler_begin = .;
|
||||
KEEP(*(.a2dp_event_handler))
|
||||
a2dp_event_handler_end = .;
|
||||
|
||||
sdp_record_item_begin = .;
|
||||
KEEP(*(.sdp_record_item))
|
||||
sdp_record_item_end = .;
|
||||
|
||||
bt_sleep_begin = .;
|
||||
KEEP(*(.bt_sleep))
|
||||
bt_sleep_end = .;
|
||||
|
||||
*(.bt_stack_const)
|
||||
*(.bt_stack_code)
|
||||
*(.ble_db_const)
|
||||
*(.ble_db_code)
|
||||
*(.ble_sm_const)
|
||||
*(.ble_sm_code)
|
||||
*(.ble_att_const)
|
||||
*(.ble_att_code)
|
||||
*(.ble_gatt_const)
|
||||
*(.ble_gatt_code)
|
||||
|
||||
/*mesh*/
|
||||
BTSTACK_LE_HOST_MESH_CODE_START = .;
|
||||
*(.ble_mesh_code)
|
||||
*(.ble_mesh_tinycrypt_code)
|
||||
|
||||
*(.ble_mesh_const)
|
||||
*(.ble_mesh_tinycrypt_const)
|
||||
BTSTACK_LE_HOST_MESH_CODE_SIZE = ABSOLUTE(. - BTSTACK_LE_HOST_MESH_CODE_START);
|
||||
|
||||
btstack_code_end = .;
|
||||
. = ALIGN(4);
|
||||
} > code0
|
||||
}
|
||||
|
||||
BTSTACK_LE_HOST_MESH_RAM_TOTAL = BTSTACK_LE_HOST_MESH_DATA_SIZE + BTSTACK_LE_HOST_MESH_BSS_SIZE;
|
||||
BTSTACK_LE_HOST_MESH_FLASH_TOTAL = BTSTACK_LE_HOST_MESH_CODE_SIZE;
|
||||
|
||||
BTSTACK_CODE_SIZE = (btstack_code_end - btstack_code_start) + (btstack_data_end - btstack_data_start);
|
||||
|
||||
9
include_lib/btstack/btstack_task.h
Normal file
9
include_lib/btstack/btstack_task.h
Normal file
@ -0,0 +1,9 @@
|
||||
#ifndef BTSTACK_TASK_H
|
||||
#define BTSTACK_TASK_H
|
||||
|
||||
int btstack_init();
|
||||
int btstack_exit();
|
||||
|
||||
void ble_bqb_test_thread_init(void);
|
||||
|
||||
#endif
|
||||
26
include_lib/btstack/btstack_typedef.h
Normal file
26
include_lib/btstack/btstack_typedef.h
Normal file
@ -0,0 +1,26 @@
|
||||
#ifndef _BTSTACK_TYPEDEF_H_
|
||||
#define _BTSTACK_TYPEDEF_H_
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
#define BD_ADDR_LEN 6
|
||||
typedef uint8_t bd_addr_t[BD_ADDR_LEN];
|
||||
|
||||
typedef uint16_t hci_con_handle_t;
|
||||
|
||||
typedef int (*sm_stack_packet_handler_t)(uint8_t packet_type, uint8_t *packet, uint16_t size);
|
||||
|
||||
typedef void (*btstack_packet_handler_t)(u8 packet_type, u16 channel, u8 *packet, u16 size);
|
||||
|
||||
typedef void (*ble_cbk_handler_t)(void);
|
||||
|
||||
void reverse_bd_addr(const bd_addr_t src, bd_addr_t dest);
|
||||
|
||||
void reverse_bytes(const u8 *src, u8 *dst, u32 len);
|
||||
|
||||
uint16_t little_endian_read_16(const uint8_t *buffer, int pos);
|
||||
uint32_t little_endian_read_24(const uint8_t *buffer, int pos);
|
||||
uint32_t little_endian_read_32(const uint8_t *buffer, int pos);
|
||||
|
||||
|
||||
#endif
|
||||
65
include_lib/btstack/frame_queque.h
Normal file
65
include_lib/btstack/frame_queque.h
Normal file
@ -0,0 +1,65 @@
|
||||
#ifndef __FRAME_QUEQUE_H
|
||||
#define __FRAME_QUEQUE_H
|
||||
#include<string.h>
|
||||
#include <stdint.h>
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
typedef unsigned char WORD8;
|
||||
typedef unsigned short int WORD16;
|
||||
typedef unsigned int WORD32;
|
||||
typedef unsigned long long WORD64;
|
||||
|
||||
typedef signed char SWORD8;
|
||||
typedef signed short int SWORD16;
|
||||
typedef signed int SWORD32;
|
||||
typedef signed long long SWORD64;
|
||||
|
||||
typedef unsigned char uint8_t;
|
||||
|
||||
#define FRAME_QUEQUE_MUTEX_ID semlock_t
|
||||
#define FRAME_QUEQUE_MUTEX_DEF semlock_t
|
||||
#define FRAME_QUEQUE_MUTEX_P(mutex_id) frame_mute_p(mutex_id)
|
||||
#define FRAME_QUEQUE_MUTEX_V(mutex_id) frame_mute_v(mutex_id)
|
||||
|
||||
typedef enum {
|
||||
APP_DUEROS_VER,
|
||||
APP_DUEROS_SEND,
|
||||
APP_TWS_BLE_SLAVE_SPEECH_START,
|
||||
APP_SPEECH_START_FROM_TWS,
|
||||
APP_SPEECH_STOP_FROM_TWS,
|
||||
APP_TWS_DUEROS_RAND_SET,
|
||||
APP_TWS_BLE_DUEROS_CONNECT,
|
||||
APP_TWS_BLE_DUEROS_DISCONNECT,
|
||||
} APP_CMD_TYPE ;
|
||||
|
||||
|
||||
typedef struct {
|
||||
int counter;
|
||||
} semlock_t;
|
||||
|
||||
typedef struct send_frame {
|
||||
void *buffer;
|
||||
WORD32 len;
|
||||
struct send_frame *next;
|
||||
} _GNU_PACKED_ SEND_FRAME;
|
||||
|
||||
typedef struct __frame_queque {
|
||||
SEND_FRAME *head;
|
||||
SEND_FRAME *tail;
|
||||
unsigned int depth;
|
||||
FRAME_QUEQUE_MUTEX_ID mutex;
|
||||
} _GNU_PACKED_ FRAME_QUEQUE;
|
||||
|
||||
|
||||
int frame_queque_is_empty(FRAME_QUEQUE *queque);
|
||||
int frame_push_queque(FRAME_QUEQUE *queque, SEND_FRAME *frame);
|
||||
SEND_FRAME *frame_pop_queque(FRAME_QUEQUE *queque);
|
||||
SEND_FRAME *frame_pop_queque_alloc(FRAME_QUEQUE *queque);
|
||||
int frame_queque_clear(FRAME_QUEQUE *queque);
|
||||
int frame_queque_init(FRAME_QUEQUE *queque);
|
||||
|
||||
void run_loop_register_for_app();
|
||||
void app_remove_stack_run(void);
|
||||
|
||||
#endif
|
||||
147
include_lib/btstack/le/att.h
Normal file
147
include_lib/btstack/le/att.h
Normal file
@ -0,0 +1,147 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : att.h
|
||||
|
||||
* Description :
|
||||
|
||||
* Author : minxian
|
||||
|
||||
* Email : liminxian@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2020-07-01 16:33
|
||||
|
||||
* Copyright:(c)JIELI 2011-2020 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
#ifndef _BT_ATT_H_
|
||||
#define _BT_ATT_H_
|
||||
|
||||
#include "typedef.h"
|
||||
#include "btstack/btstack_typedef.h"
|
||||
|
||||
#if defined __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// Minimum/default MTU
|
||||
#define ATT_DEFAULT_MTU 23
|
||||
|
||||
#define ATT_EVENT_MTU_EXCHANGE_COMPLETE 0xB5
|
||||
#define ATT_EVENT_HANDLE_VALUE_INDICATION_COMPLETE 0xB6
|
||||
#define ATT_EVENT_CAN_SEND_NOW 0xB7
|
||||
|
||||
#define ATT_TRANSACTION_MODE_NONE 0x0
|
||||
#define ATT_TRANSACTION_MODE_ACTIVE 0x1
|
||||
#define ATT_TRANSACTION_MODE_EXECUTE 0x2
|
||||
#define ATT_TRANSACTION_MODE_CANCEL 0x3
|
||||
#define ATT_TRANSACTION_MODE_VALIDATE 0x4
|
||||
|
||||
#define ATT_PROPERTY_BROADCAST 0x01
|
||||
#define ATT_PROPERTY_READ 0x02
|
||||
#define ATT_PROPERTY_WRITE_WITHOUT_RESPONSE 0x04
|
||||
#define ATT_PROPERTY_WRITE 0x08
|
||||
#define ATT_PROPERTY_NOTIFY 0x10
|
||||
#define ATT_PROPERTY_INDICATE 0x20
|
||||
|
||||
|
||||
typedef enum {
|
||||
ATT_OP_AUTO_READ_CCC = 0, //server端 检查对方使能通知CCC来控制 notify or indicate发送
|
||||
ATT_OP_NOTIFY = 1, //server端 默认notify方式发送，不检查使能通知CCC (不需要对方回应答包,没有流控)
|
||||
ATT_OP_INDICATE = 2, //server端 默认INDICATE方式发送，不检查使能通知CCC (需要对方回应答包,有流控)
|
||||
ATT_OP_READ, //client端 单次读, 用于获取<=MTU 的数据包 (需要对方回应答包,有流控)
|
||||
ATT_OP_READ_LONG, //client端 多次读，用于支持获取>MTU 的数据包 (需要对方回应答包,有流控)
|
||||
ATT_OP_WRITE, //client端 写发送 (需要对方回应答包,有流控)
|
||||
ATT_OP_WRITE_WITHOUT_RESPOND,//client端 写发送 (不需要对方回应答包,没有流控)
|
||||
//add here
|
||||
|
||||
ATT_OP_CMD_MAX = 15,
|
||||
} att_op_type_e;
|
||||
|
||||
//------
|
||||
typedef struct {
|
||||
uint16_t start_group_handle;//
|
||||
uint16_t end_group_handle;
|
||||
uint16_t uuid16; //为0则是 uuid128
|
||||
uint8_t uuid128[16];
|
||||
} service_report_t; //==le_service_t
|
||||
|
||||
typedef struct {
|
||||
uint16_t start_handle;
|
||||
uint16_t value_handle; //属性操作handle
|
||||
uint16_t end_handle;
|
||||
uint16_t properties; //属性对应 ATT_PROPERTY_XXX
|
||||
uint16_t uuid16; //为0则是 uuid128
|
||||
uint8_t uuid128[16];
|
||||
} charact_report_t; //==le_characteristic_t
|
||||
|
||||
typedef struct {
|
||||
u16 packet_type; //数据包类型(notify,indicate,read_respone,...)
|
||||
u16 value_handle; //属性操作handle
|
||||
u16 value_offset; //包偏移
|
||||
u16 blob_length; //包长度
|
||||
u8 *blob; //包内容
|
||||
u16 conn_handle; //连接handle
|
||||
} att_data_report_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
service_report_t services;
|
||||
charact_report_t characteristic;
|
||||
u16 service_index;
|
||||
u16 characteristic_index;
|
||||
} search_result_t;
|
||||
|
||||
typedef struct {
|
||||
u16 handle;//descriptor's handle
|
||||
u16 uuid16;//为0则是 uuid128
|
||||
u8 uuid128[16];
|
||||
} charact_descriptor_t;
|
||||
|
||||
|
||||
void att_ccc_config_init(void);
|
||||
void att_set_ccc_config(uint16_t handle, uint16_t cfg);
|
||||
uint16_t att_get_ccc_config(uint16_t handle);
|
||||
void att_server_set_exchange_mtu(u16 con_handle);
|
||||
void att_set_db(uint8_t const *db);//change profile_data
|
||||
|
||||
//多机接口
|
||||
//初始化 CCC管理
|
||||
void multi_att_ccc_config_init(void);
|
||||
//设置CCC
|
||||
void multi_att_set_ccc_config(uint16_t conn_handle, uint16_t att_handle, uint16_t cfg);
|
||||
//获取CCC的值
|
||||
uint16_t multi_att_get_ccc_config(uint16_t conn_handle, uint16_t att_handle);
|
||||
//断开, 清链路CCC
|
||||
int multi_att_clear_ccc_config(uint16_t conn_handle);
|
||||
|
||||
// ATT Client Read Callback for Dynamic Data
|
||||
// - if buffer == NULL, don't copy data, just return size of value
|
||||
// - if buffer != NULL, copy data and return number bytes copied
|
||||
// @param con_handle of hci le connection
|
||||
// @param attribute_handle to be read
|
||||
// @param offset defines start of attribute value
|
||||
// @param buffer
|
||||
// @param buffer_size
|
||||
typedef uint16_t (*att_read_callback_t)(uint16_t con_handle, uint16_t attribute_handle, uint16_t offset, uint8_t *buffer, uint16_t buffer_size);
|
||||
|
||||
// ATT Client Write Callback for Dynamic Data
|
||||
// @param con_handle of hci le connection
|
||||
// @param attribute_handle to be written
|
||||
// @param transaction - ATT_TRANSACTION_MODE_NONE for regular writes, ATT_TRANSACTION_MODE_ACTIVE for prepared writes and ATT_TRANSACTION_MODE_EXECUTE
|
||||
// @param offset into the value - used for queued writes and long attributes
|
||||
// @param buffer
|
||||
// @param buffer_size
|
||||
// @param signature used for signed write commmands
|
||||
// @returns 0 if write was ok, ATT_ERROR_PREPARE_QUEUE_FULL if no space in queue, ATT_ERROR_INVALID_OFFSET if offset is larger than max buffer
|
||||
typedef int (*att_write_callback_t)(uint16_t con_handle, uint16_t attribute_handle, uint16_t transaction_mode, uint16_t offset, uint8_t *buffer, uint16_t buffer_size);
|
||||
|
||||
void ble_att_server_setup_init(const u8 *profile_db, att_read_callback_t read_cbk, att_write_callback_t write_cbk);
|
||||
|
||||
void att_server_request_can_send_now_event(hci_con_handle_t con_handle);
|
||||
|
||||
int att_server_notify(hci_con_handle_t con_handle, uint16_t attribute_handle, uint8_t *value, uint16_t value_len);
|
||||
|
||||
int att_server_indicate(hci_con_handle_t con_handle, uint16_t attribute_handle, uint8_t *value, uint16_t value_len);
|
||||
|
||||
extern void att_server_init(uint8_t const *db, att_read_callback_t read_callback, att_write_callback_t write_callback);
|
||||
extern void att_server_register_packet_handler(btstack_packet_handler_t handler);
|
||||
|
||||
#endif
|
||||
1347
include_lib/btstack/le/ble_api.h
Normal file
1347
include_lib/btstack/le/ble_api.h
Normal file
File diff suppressed because it is too large
Load Diff
57
include_lib/btstack/le/ble_data_types.h
Normal file
57
include_lib/btstack/le/ble_data_types.h
Normal file
@ -0,0 +1,57 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : bluetooth_data_types.h
|
||||
|
||||
* Description :
|
||||
|
||||
* Author :
|
||||
*********************************************************************************************/
|
||||
|
||||
/**
|
||||
*/
|
||||
|
||||
#ifndef __BLUETOOTH_DATA_TYPES_H
|
||||
#define __BLUETOOTH_DATA_TYPES_H
|
||||
|
||||
#define BLUETOOTH_DATA_TYPE_FLAGS 0x01 // Flags
|
||||
#define BLUETOOTH_DATA_TYPE_INCOMPLETE_LIST_OF_16_BIT_SERVICE_CLASS_UUIDS 0x02 // Incomplete List of 16-bit Service Class UUIDs
|
||||
#define BLUETOOTH_DATA_TYPE_COMPLETE_LIST_OF_16_BIT_SERVICE_CLASS_UUIDS 0x03 // Complete List of 16-bit Service Class UUIDs
|
||||
#define BLUETOOTH_DATA_TYPE_INCOMPLETE_LIST_OF_32_BIT_SERVICE_CLASS_UUIDS 0x04 // Incomplete List of 32-bit Service Class UUIDs
|
||||
#define BLUETOOTH_DATA_TYPE_COMPLETE_LIST_OF_32_BIT_SERVICE_CLASS_UUIDS 0x05 // Complete List of 32-bit Service Class UUIDs
|
||||
#define BLUETOOTH_DATA_TYPE_INCOMPLETE_LIST_OF_128_BIT_SERVICE_CLASS_UUIDS 0x06 // Incomplete List of 128-bit Service Class UUIDs
|
||||
#define BLUETOOTH_DATA_TYPE_COMPLETE_LIST_OF_128_BIT_SERVICE_CLASS_UUIDS 0x07 // Complete List of 128-bit Service Class UUIDs
|
||||
#define BLUETOOTH_DATA_TYPE_SHORTENED_LOCAL_NAME 0x08 // Shortened Local Name
|
||||
#define BLUETOOTH_DATA_TYPE_COMPLETE_LOCAL_NAME 0x09 // Complete Local Name
|
||||
#define BLUETOOTH_DATA_TYPE_TX_POWER_LEVEL 0x0A // Tx Power Level
|
||||
#define BLUETOOTH_DATA_TYPE_CLASS_OF_DEVICE 0x0D // Class of Device
|
||||
#define BLUETOOTH_DATA_TYPE_SIMPLE_PAIRING_HASH_C 0x0E // Simple Pairing Hash C
|
||||
#define BLUETOOTH_DATA_TYPE_SIMPLE_PAIRING_HASH_C_192 0x0E // Simple Pairing Hash C-192
|
||||
#define BLUETOOTH_DATA_TYPE_SIMPLE_PAIRING_RANDOMIZER_R 0x0F // Simple Pairing Randomizer R
|
||||
#define BLUETOOTH_DATA_TYPE_SIMPLE_PAIRING_RANDOMIZER_R_192 0x0F // Simple Pairing Randomizer R-192
|
||||
#define BLUETOOTH_DATA_TYPE_DEVICE_ID 0x10 // Device ID
|
||||
#define BLUETOOTH_DATA_TYPE_SECURITY_MANAGER_TK_VALUE 0x10 // Security Manager TK Value
|
||||
#define BLUETOOTH_DATA_TYPE_SECURITY_MANAGER_OUT_OF_BAND_FLAGS 0x11 // Security Manager Out of Band Flags
|
||||
#define BLUETOOTH_DATA_TYPE_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 // Slave Connection Interval Range
|
||||
#define BLUETOOTH_DATA_TYPE_LIST_OF_16_BIT_SERVICE_SOLICITATION_UUIDS 0x14 // List of 16-bit Service Solicitation UUIDs
|
||||
#define BLUETOOTH_DATA_TYPE_LIST_OF_32_BIT_SERVICE_SOLICITATION_UUIDS 0x1F // List of 32-bit Service Solicitation UUIDs
|
||||
#define BLUETOOTH_DATA_TYPE_LIST_OF_128_BIT_SERVICE_SOLICITATION_UUIDS 0x15 // List of 128-bit Service Solicitation UUIDs
|
||||
#define BLUETOOTH_DATA_TYPE_SERVICE_DATA 0x16 // Service Data
|
||||
#define BLUETOOTH_DATA_TYPE_SERVICE_DATA_16_BIT_UUID 0x16 // Service Data - 16-bit UUID
|
||||
#define BLUETOOTH_DATA_TYPE_SERVICE_DATA_32_BIT_UUID 0x20 // Service Data - 32-bit UUID
|
||||
#define BLUETOOTH_DATA_TYPE_SERVICE_DATA_128_BIT_UUID 0x21 // Service Data - 128-bit UUID
|
||||
#define BLUETOOTH_DATA_TYPE_LE_SECURE_CONNECTIONS_CONFIRMATION_VALUE 0x22 // LE Secure Connections Confirmation Value
|
||||
#define BLUETOOTH_DATA_TYPE_LE_SECURE_CONNECTIONS_RANDOM_VALUE 0x23 // LE Secure Connections Random Value
|
||||
#define BLUETOOTH_DATA_TYPE_URI 0x24 // URI
|
||||
#define BLUETOOTH_DATA_TYPE_INDOOR_POSITIONING 0x25 // Indoor Positioning
|
||||
#define BLUETOOTH_DATA_TYPE_TRANSPORT_DISCOVERY_DATA 0x26 // Transport Discovery Data
|
||||
#define BLUETOOTH_DATA_TYPE_PUBLIC_TARGET_ADDRESS 0x17 // Public Target Address
|
||||
#define BLUETOOTH_DATA_TYPE_RANDOM_TARGET_ADDRESS 0x18 // Random Target Address
|
||||
#define BLUETOOTH_DATA_TYPE_APPEARANCE 0x19 // Appearance
|
||||
#define BLUETOOTH_DATA_TYPE_ADVERTISING_INTERVAL 0x1A // Advertising Interval
|
||||
#define BLUETOOTH_DATA_TYPE_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B // LE Bluetooth Device Address
|
||||
#define BLUETOOTH_DATA_TYPE_LE_ROLE 0x1C // LE Role
|
||||
#define BLUETOOTH_DATA_TYPE_SIMPLE_PAIRING_HASH_C_256 0x1D // Simple Pairing Hash C-256
|
||||
#define BLUETOOTH_DATA_TYPE_SIMPLE_PAIRING_RANDOMIZER_R_256 0x1E // Simple Pairing Randomizer R-256
|
||||
#define BLUETOOTH_DATA_TYPE_3D_INFORMATION_DATA 0x3D // 3D Information Data
|
||||
#define BLUETOOTH_DATA_TYPE_MANUFACTURER_SPECIFIC_DATA 0xFF // Manufacturer Specific Data
|
||||
|
||||
#endif
|
||||
58
include_lib/btstack/le/gatt.h
Normal file
58
include_lib/btstack/le/gatt.h
Normal file
@ -0,0 +1,58 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : btstack_event.h
|
||||
|
||||
* Description :
|
||||
|
||||
* Author : Minxian
|
||||
|
||||
* Email : liminxian@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2020-07-01 16:23
|
||||
|
||||
* Copyright:(c)JIELI 2011-2020 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
#ifndef __BT_GATT_H
|
||||
#define __BT_GATT_H
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
typedef struct {
|
||||
uint16_t start_group_handle;
|
||||
uint16_t end_group_handle;
|
||||
uint16_t uuid16;
|
||||
uint8_t uuid128[16];
|
||||
} le_service_t, gatt_client_service_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
uint16_t start_handle;
|
||||
uint16_t value_handle;
|
||||
uint16_t end_handle;
|
||||
uint16_t properties;
|
||||
uint16_t uuid16;
|
||||
uint8_t uuid128[16];
|
||||
} le_characteristic_t, gatt_client_characteristic_t;
|
||||
|
||||
typedef struct {
|
||||
uint16_t handle;
|
||||
uint16_t uuid16;
|
||||
uint8_t uuid128[16];
|
||||
} gatt_client_characteristic_descriptor_t;
|
||||
|
||||
void gatt_client_deserialize_service(const uint8_t *packet, int offset, gatt_client_service_t *service);
|
||||
|
||||
void gatt_client_deserialize_characteristic(const uint8_t *packet, int offset, gatt_client_characteristic_t *characteristic);
|
||||
|
||||
void gatt_client_deserialize_characteristic_descriptor(const uint8_t *packet, int offset, gatt_client_characteristic_descriptor_t *descriptor);
|
||||
|
||||
uint8_t gatt_client_read_long_value_of_characteristic_using_value_handle_with_offset(btstack_packet_handler_t callback, hci_con_handle_t con_handle, uint16_t characteristic_value_handle, uint16_t offset);
|
||||
|
||||
uint8_t gatt_client_read_value_of_characteristic_using_value_handle(btstack_packet_handler_t callback, hci_con_handle_t con_handle, uint16_t value_handle);
|
||||
|
||||
uint8_t gatt_client_write_value_of_characteristic_without_response(hci_con_handle_t con_handle, uint16_t value_handle, uint16_t value_length, uint8_t *value);
|
||||
|
||||
uint8_t gatt_client_write_value_of_characteristic(btstack_packet_handler_t callback, hci_con_handle_t con_handle, uint16_t value_handle, uint16_t value_length, uint8_t *data);
|
||||
|
||||
void gatt_client_request_can_send_now_event(hci_con_handle_t con_handle);
|
||||
|
||||
#endif
|
||||
201
include_lib/btstack/le/le_common_define.h
Normal file
201
include_lib/btstack/le/le_common_define.h
Normal file
@ -0,0 +1,201 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : le_counter.h
|
||||
|
||||
* Description :
|
||||
|
||||
* Author : Bingquan
|
||||
|
||||
* Email : bingquan_cai@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2017-01-17 15:17
|
||||
|
||||
* Copyright:(c)JIELI 2011-2016 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
|
||||
#ifndef __LE_COMMON_DEFINE_H_
|
||||
#define __LE_COMMON_DEFINE_H_
|
||||
|
||||
#include "typedef.h"
|
||||
#include <stdint.h>
|
||||
#include "btstack/bluetooth.h"
|
||||
|
||||
//--------------------------------------------
|
||||
|
||||
#define ADV_SET_1M_PHY 1
|
||||
#define ADV_SET_2M_PHY 2
|
||||
#define ADV_SET_CODED_PHY 3
|
||||
|
||||
#define SCAN_SET_1M_PHY BIT(0)
|
||||
#define SCAN_SET_2M_PHY BIT(1)
|
||||
#define SCAN_SET_CODED_PHY BIT(2)
|
||||
|
||||
#define INIT_SET_1M_PHY BIT(0)
|
||||
#define INIT_SET_2M_PHY BIT(1)
|
||||
#define INIT_SET_CODED_PHY BIT(2)
|
||||
|
||||
#define CONN_SET_1M_PHY BIT(0)
|
||||
#define CONN_SET_2M_PHY BIT(1)
|
||||
#define CONN_SET_CODED_PHY BIT(2)
|
||||
|
||||
#define CONN_SET_PHY_OPTIONS_NONE 0
|
||||
#define CONN_SET_PHY_OPTIONS_S2 1
|
||||
#define CONN_SET_PHY_OPTIONS_S8 2
|
||||
|
||||
struct conn_param_t {
|
||||
u16 interval;
|
||||
u16 latency;
|
||||
u16 timeout;
|
||||
};
|
||||
|
||||
// #define NOTIFY_TYPE 1
|
||||
// #define INDICATION_TYPE 2
|
||||
// Minimum/default MTU
|
||||
|
||||
#define ATT_CTRL_BLOCK_SIZE (188) //note: fixed,libs use
|
||||
#define ATT_PACKET_HEAD_SIZE (6) //note: fixed,libs use
|
||||
|
||||
/*adv type*/
|
||||
enum {
|
||||
ADV_IND = 0, /*Connectable and scannable undirected advertising*/
|
||||
ADV_DIRECT_IND, /*Connectable high duty cycle directed advertising */
|
||||
ADV_SCAN_IND, /*Scannable undirected advertising*/
|
||||
ADV_NONCONN_IND, /*Non connectable undirected advertising*/
|
||||
ADV_DIRECT_IND_LOW, /*Connectable low duty cycle directed advertising*/
|
||||
};
|
||||
|
||||
|
||||
/*adv channel*/
|
||||
#define ADV_CHANNEL_37 BIT(0)
|
||||
#define ADV_CHANNEL_38 BIT(1)
|
||||
#define ADV_CHANNEL_39 BIT(2)
|
||||
#define ADV_CHANNEL_ALL (ADV_CHANNEL_37 | ADV_CHANNEL_38 | ADV_CHANNEL_39)
|
||||
|
||||
/*scan type*/
|
||||
enum {
|
||||
SCAN_PASSIVE = 0,
|
||||
SCAN_ACTIVE,
|
||||
};
|
||||
|
||||
/*advertising report,event type*/
|
||||
#define EVENT_ADV_IND ADV_IND
|
||||
#define EVENT_ADV_DIRECT_IND ADV_DIRECT_IND
|
||||
#define EVENT_ADV_SCAN_IND ADV_SCAN_IND
|
||||
#define EVENT_ADV_NONCONN_IND ADV_NONCONN_IND
|
||||
#define EVENT_SCAN_RSP (4)
|
||||
|
||||
#define EVENT_DEFAULT_REPORT_BITMAP (0x1f)
|
||||
|
||||
|
||||
/*flags*/
|
||||
#define FLAGS_LIMITED_DISCOVERABLE_MODE BIT(0)
|
||||
#define FLAGS_GENERAL_DISCOVERABLE_MODE BIT(1)
|
||||
#define FLAGS_EDR_NOT_SUPPORTED BIT(2)
|
||||
#define FLAGS_LE_AND_EDR_SAME_CONTROLLER BIT(3)
|
||||
#define FLAGS_LE_AND_EDR_SAME_HOST BIT(4)
|
||||
|
||||
/*eir packet_type*/
|
||||
typedef enum {
|
||||
HCI_EIR_DATATYPE_FLAGS = 0x01,
|
||||
HCI_EIR_DATATYPE_MORE_16BIT_SERVICE_UUIDS = 0x02,
|
||||
HCI_EIR_DATATYPE_COMPLETE_16BIT_SERVICE_UUIDS = 0x03,
|
||||
HCI_EIR_DATATYPE_MORE_32BIT_SERVICE_UUIDS = 0x04,
|
||||
HCI_EIR_DATATYPE_COMPLETE_32BIT_SERVICE_UUIDS = 0x05,
|
||||
HCI_EIR_DATATYPE_MORE_128BIT_SERVICE_UUIDS = 0x06,
|
||||
HCI_EIR_DATATYPE_COMPLETE_128BIT_SERVICE_UUIDS = 0x07,
|
||||
HCI_EIR_DATATYPE_SHORTENED_LOCAL_NAME = 0x08,
|
||||
HCI_EIR_DATATYPE_COMPLETE_LOCAL_NAME = 0x09,
|
||||
HCI_EIR_DATATYPE_TX_POWER_LEVEL = 0x0A,
|
||||
HCI_EIR_DATATYPE_CLASS_OF_DEVICE = 0x0D,
|
||||
HCI_EIR_DATATYPE_SIMPLE_PAIRING_HASH_C = 0x0E,
|
||||
HCI_EIR_DATATYPE_SIMPLE_PAIRING_RANDOMIZER_R = 0x0F,
|
||||
HCI_EIR_DATATYPE_SECURITY_MANAGER_TK_VALUE = 0x10,
|
||||
HCI_EIR_DATATYPE_SECURITY_MANAGER_OOB_FLAGS = 0x11,
|
||||
HCI_EIR_DATATYPE_SLAVE_CONNECTION_INTERVAL_RANGE = 0x12,
|
||||
HCI_EIR_DATATYPE_16BIT_SERVICE_SOLICITATION_UUIDS = 0x14,
|
||||
HCI_EIR_DATATYPE_128BIT_SERVICE_SOLICITATION_UUIDS = 0x15,
|
||||
HCI_EIR_DATATYPE_SERVICE_DATA = 0x16,
|
||||
HCI_EIR_DATATYPE_APPEARANCE_DATA = 0x19,
|
||||
HCI_EIR_DATATYPE_MANUFACTURER_SPECIFIC_DATA = 0xFF
|
||||
} HCI_EIR_datatype_t;
|
||||
|
||||
|
||||
//按(长度 + 类型 + 内容)这样的格,组合填入广播包数据
|
||||
static inline u8 make_eir_packet_data(u8 *buf, u16 offset, u8 data_type, u8 *data, u8 data_len)
|
||||
{
|
||||
if (ADV_RSP_PACKET_MAX - offset < data_len + 2) {
|
||||
return offset + data_len + 2;
|
||||
}
|
||||
|
||||
buf[0] = data_len + 1;
|
||||
buf[1] = data_type;
|
||||
memcpy(buf + 2, data, data_len);
|
||||
return data_len + 2;
|
||||
}
|
||||
|
||||
//按(长度 + 类型 + 内容)这样的格,组合填入广播包数据
|
||||
static inline u8 make_eir_packet_val(u8 *buf, u16 offset, u8 data_type, u32 val, u8 val_size)
|
||||
{
|
||||
if (ADV_RSP_PACKET_MAX - offset < val_size + 2) {
|
||||
return offset + val_size + 2;
|
||||
}
|
||||
|
||||
buf[0] = val_size + 1;
|
||||
buf[1] = data_type;
|
||||
memcpy(buf + 2, &val, val_size);
|
||||
return val_size + 2;
|
||||
}
|
||||
|
||||
#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */
|
||||
#define BLE_APPEARANCE_GENERIC_PHONE 64 /* Generic Phone. */
|
||||
#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /* Generic Computer. */
|
||||
#define BLE_APPEARANCE_GENERIC_WATCH 192 /* Generic Watch. */
|
||||
#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /* Watch: Sports Watch. */
|
||||
#define BLE_APPEARANCE_GENERIC_CLOCK 256 /* Generic Clock. */
|
||||
#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /* Generic Display. */
|
||||
#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /* Generic Remote Control. */
|
||||
#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /* Generic Eye-glasses. */
|
||||
#define BLE_APPEARANCE_GENERIC_TAG 512 /* Generic Tag. */
|
||||
#define BLE_APPEARANCE_GENERIC_KEYRING 576 /* Generic Keyring. */
|
||||
#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /* Generic Media Player. */
|
||||
#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /* Generic Barcode Scanner. */
|
||||
#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /* Generic Thermometer. */
|
||||
#define BLE_APPEARANCE_THERMOMETER_EAR 769 /* Thermometer: Ear. */
|
||||
#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /* Generic Heart rate Sensor. */
|
||||
#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /* Heart Rate Sensor: Heart Rate Belt. */
|
||||
#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /* Generic Blood Pressure. */
|
||||
#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /* Blood Pressure: Arm. */
|
||||
#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /* Blood Pressure: Wrist. */
|
||||
#define BLE_APPEARANCE_GENERIC_HID 960 /* Human Interface Device (HID). */
|
||||
#define BLE_APPEARANCE_HID_KEYBOARD 961 /* Keyboard (HID Subtype). */
|
||||
#define BLE_APPEARANCE_HID_MOUSE 962 /* Mouse (HID Subtype). */
|
||||
#define BLE_APPEARANCE_HID_JOYSTICK 963 /* Joystick (HID Subtype). */
|
||||
#define BLE_APPEARANCE_HID_GAMEPAD 964 /* Gamepad (HID Subtype). */
|
||||
#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /* Digitizer Tablet (HID Subtype). */
|
||||
#define BLE_APPEARANCE_HID_CARD_READER 966 /* Card Reader (HID Subtype). */
|
||||
#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /* Digital Pen (HID Subtype). */
|
||||
#define BLE_APPEARANCE_HID_BARCODE 968 /* Barcode Scanner (HID Subtype). */
|
||||
#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /* Generic Glucose Meter. */
|
||||
#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /* Generic Running Walking Sensor. */
|
||||
#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /* Running Walking Sensor: In-Shoe. */
|
||||
#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /* Running Walking Sensor: On-Shoe. */
|
||||
#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /* Running Walking Sensor: On-Hip. */
|
||||
#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /* Generic Cycling. */
|
||||
#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /* Cycling: Cycling Computer. */
|
||||
#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /* Cycling: Speed Sensor. */
|
||||
#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /* Cycling: Cadence Sensor. */
|
||||
#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /* Cycling: Power Sensor. */
|
||||
#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /* Cycling: Speed and Cadence Sensor. */
|
||||
#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /* Generic Pulse Oximeter. */
|
||||
#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /* Fingertip (Pulse Oximeter subtype). */
|
||||
#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /* Wrist Worn(Pulse Oximeter subtype). */
|
||||
#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /* Generic Weight Scale. */
|
||||
#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /* Generic Outdoor Sports Activity. */
|
||||
#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /* Location Display Device (Outdoor Sports Activity subtype). */
|
||||
#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /* Location and Navigation Display Device (Outdoor Sports Activity subtype). */
|
||||
#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /* Location Pod (Outdoor Sports Activity subtype). */
|
||||
#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /* Location and Navigation Pod (Outdoor Sports Activity subtype). */
|
||||
|
||||
extern void le_l2cap_register_packet_handler(void (*handler)(uint8_t packet_type, uint16_t channel, uint8_t *packet, uint16_t size));
|
||||
#endif
|
||||
|
||||
|
||||
140
include_lib/btstack/le/le_user.h
Normal file
140
include_lib/btstack/le/le_user.h
Normal file
@ -0,0 +1,140 @@
|
||||
|
||||
#ifndef _LE_USER_H_
|
||||
#define _LE_USER_H_
|
||||
|
||||
#include "typedef.h"
|
||||
#include "btstack/btstack_typedef.h"
|
||||
#include "ble_api.h"
|
||||
|
||||
#if defined __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#define BT_NAME_LEN_MAX 29
|
||||
#define ADV_RSP_PACKET_MAX 31
|
||||
|
||||
// hci con handles (12 bit): 0x0000..0x0fff
|
||||
#define HCI_CON_HANDLE_INVALID 0xffff
|
||||
|
||||
#define BTSTACK_EVENT_STATE 0x60
|
||||
#define L2CAP_EVENT_CONNECTION_PARAMETER_UPDATE_RESPONSE 0x77
|
||||
|
||||
#define SM_EVENT_NUMERIC_COMPARISON_REQUEST 0xD6
|
||||
|
||||
#define SM_EVENT_JUST_WORKS_REQUEST 0xD0
|
||||
#define SM_EVENT_JUST_WORKS_CANCEL 0xD1
|
||||
#define SM_EVENT_PASSKEY_DISPLAY_NUMBER 0xD2
|
||||
#define SM_EVENT_PASSKEY_DISPLAY_CANCEL 0xD3
|
||||
#define SM_EVENT_PASSKEY_INPUT_NUMBER 0xD4
|
||||
#define SM_EVENT_PASSKEY_INPUT_CANCEL 0xD5
|
||||
#define SM_EVENT_PAIR_PROCESS 0xDF
|
||||
//0xdf 's sub
|
||||
#define SM_EVENT_PAIR_SUB_RECONNECT_START 0x01
|
||||
#define SM_EVENT_PAIR_SUB_PIN_KEY_MISS 0x02
|
||||
#define SM_EVENT_PAIR_SUB_PAIR_FAIL 0x03
|
||||
#define SM_EVENT_PAIR_SUB_PAIR_TIMEOUT 0x04
|
||||
#define SM_EVENT_PAIR_SUB_ENCRYPTION_FAIL 0x05
|
||||
#define SM_EVENT_PAIR_SUB_SEND_DISCONN 0x0f
|
||||
#define SM_EVENT_PAIR_SUB_ADD_LIST_SUCCESS 0x10
|
||||
#define SM_EVENT_PAIR_SUB_ADD_LIST_FAILED 0x11
|
||||
|
||||
|
||||
#define GATT_CLIENT_CHARACTERISTICS_CONFIGURATION_NONE 0
|
||||
#define GATT_CLIENT_CHARACTERISTICS_CONFIGURATION_NOTIFICATION 1
|
||||
#define GATT_CLIENT_CHARACTERISTICS_CONFIGURATION_INDICATION 2
|
||||
|
||||
|
||||
#define GATT_EVENT_NOTIFICATION 0xA7
|
||||
#define GATT_EVENT_INDICATION 0xA8
|
||||
#define GATT_EVENT_CHARACTERISTIC_VALUE_QUERY_RESULT 0xA5
|
||||
#define GATT_EVENT_LONG_CHARACTERISTIC_VALUE_QUERY_RESULT 0xA6
|
||||
// #define GATT_EVENT_SERVICE_QUERY_RESULT 0xA1
|
||||
// #define GATT_EVENT_CHARACTERISTIC_QUERY_RESULT 0xA2
|
||||
#define GATT_EVENT_QUERY_COMPLETE 0xA0
|
||||
#define GAP_EVENT_ADVERTISING_REPORT 0xE2
|
||||
|
||||
// Authentication requirement flags
|
||||
#define SM_AUTHREQ_NO_BONDING 0x00
|
||||
#define SM_AUTHREQ_BONDING 0x01
|
||||
#define SM_AUTHREQ_MITM_PROTECTION 0x04
|
||||
#define SM_AUTHREQ_SECURE_CONNECTION 0x08
|
||||
#define SM_AUTHREQ_KEYPRESS 0x10
|
||||
#define SM_AUTHREQ_CT2 0x20
|
||||
|
||||
|
||||
#define L2CAP_EVENT_CONNECTION_PARAMETER_UPDATE_RESPONSE 0x77
|
||||
|
||||
|
||||
#define BT_OP_SUCCESS 0x00
|
||||
#define BT_ERR_ADVERTISING_TIMEOUT 0x3C
|
||||
|
||||
|
||||
//--------------------------------------------
|
||||
|
||||
struct ble_server_operation_t {
|
||||
int(*adv_enable)(void *priv, u32 enable);
|
||||
int(*disconnect)(void *priv);
|
||||
int(*get_buffer_vaild)(void *priv);
|
||||
int(*send_data)(void *priv, void *buf, u16 len);
|
||||
int(*regist_wakeup_send)(void *priv, void *cbk);
|
||||
int(*regist_recieve_cbk)(void *priv, void *cbk);
|
||||
int(*regist_state_cbk)(void *priv, void *cbk);
|
||||
int(*latency_enable)(void *priv, u32 enable);
|
||||
};
|
||||
|
||||
void ble_get_server_operation_table(struct ble_server_operation_t **interface_pt);
|
||||
|
||||
//--------------------------------------------
|
||||
|
||||
struct ble_client_operation_t {
|
||||
int(*scan_enable)(void *priv, u32 enable);
|
||||
int(*disconnect)(void *priv);
|
||||
int(*get_buffer_vaild)(void *priv);
|
||||
int(*write_data)(void *priv, void *buf, u16 len);
|
||||
int(*read_do)(void *priv);
|
||||
int(*regist_wakeup_send)(void *priv, void *cbk);
|
||||
int(*regist_recieve_cbk)(void *priv, void *cbk);
|
||||
int(*regist_state_cbk)(void *priv, void *cbk);
|
||||
int (*init_config)(void *priv, void *cfg);
|
||||
int (*opt_comm_send)(u16 handle, u8 *data, u16 len, u8 att_op_type);
|
||||
int (*set_force_search)(u8 onoff, s8 rssi);
|
||||
int (*create_connect)(u8 *addr, u8 addr_type, u8 mode);
|
||||
int (*create_connect_cannel)(void);
|
||||
int (*get_work_state)(void);
|
||||
int (*opt_comm_send_ext)(u16 conn_handle, u16 handle, u8 *data, u16 len, u8 att_op_type);
|
||||
};
|
||||
|
||||
struct ble_client_operation_t *ble_get_client_operation_table(void);
|
||||
|
||||
|
||||
static inline uint32_t ble_min(uint32_t a, uint32_t b)
|
||||
{
|
||||
return a < b ? a : b;
|
||||
}
|
||||
|
||||
//---------------------------------------------------------------------------------------------------
|
||||
|
||||
|
||||
//----------------------------------------
|
||||
//----------------------------------------
|
||||
|
||||
|
||||
|
||||
extern int get_ble_btstack_state(void);
|
||||
extern int get_indicate_state(void);
|
||||
|
||||
|
||||
extern u8 get_ble_local_name(u8 *name_buf);
|
||||
extern u8 get_ble_local_name_len();
|
||||
|
||||
|
||||
|
||||
|
||||
extern void hci_event_callback_set(void(*cbk_ph)(uint8_t packet_type, uint16_t channel, uint8_t *packet, uint16_t size));
|
||||
extern void ll_hci_connection_updata(u8 *data);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
69
include_lib/btstack/le/sm.h
Normal file
69
include_lib/btstack/le/sm.h
Normal file
@ -0,0 +1,69 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : sm.h
|
||||
|
||||
* Description :
|
||||
|
||||
* Author : Minxian
|
||||
|
||||
* Email : liminxian@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2020-07-01 16:36
|
||||
|
||||
* Copyright:(c)JIELI 2011-2020 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
#ifndef _BT_SM_H_
|
||||
#define _BT_SM_H_
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
// IO Capability Values
|
||||
typedef enum {
|
||||
IO_CAPABILITY_DISPLAY_ONLY = 0,
|
||||
IO_CAPABILITY_DISPLAY_YES_NO,
|
||||
IO_CAPABILITY_KEYBOARD_ONLY,
|
||||
IO_CAPABILITY_NO_INPUT_NO_OUTPUT,
|
||||
IO_CAPABILITY_KEYBOARD_DISPLAY, // not used by secure simple pairing
|
||||
} io_capability_t;
|
||||
|
||||
void ble_sm_setup_init(io_capability_t io_type, u8 auth_req, uint8_t min_key_size, u8 security_en);
|
||||
|
||||
void ble_cbk_handler_register(btstack_packet_handler_t packet_cbk, sm_stack_packet_handler_t sm_cbk);
|
||||
|
||||
void sm_just_works_confirm(hci_con_handle_t con_handle);
|
||||
|
||||
void sm_init(void);
|
||||
|
||||
/*接口同时设置master 和 slave的配置*/
|
||||
void sm_set_io_capabilities(io_capability_t io_capability);
|
||||
|
||||
/*接口只设置master配置*/
|
||||
void sm_set_master_io_capabilities(io_capability_t io_capability);
|
||||
|
||||
/*接口同时设置master 和 slave的配置*/
|
||||
void sm_set_authentication_requirements(uint8_t auth_req);
|
||||
|
||||
/*接口只设置master配置*/
|
||||
void sm_set_master_authentication_requirements(uint8_t auth_req);
|
||||
|
||||
void sm_set_encryption_key_size_range(uint8_t min_size, uint8_t max_size);
|
||||
|
||||
void sm_set_request_security(int enable);
|
||||
|
||||
void sm_event_callback_set(void(*cbk_sm_ph)(uint8_t packet_type, uint16_t channel, uint8_t *packet, uint16_t size));
|
||||
|
||||
//配从机默认发请求加密命令
|
||||
void sm_set_request_security(int enable);
|
||||
|
||||
//配主机默认发加密请求命令
|
||||
void sm_set_master_request_pair(int enable);
|
||||
|
||||
//指定链接发加密请求命令
|
||||
bool sm_api_request_pairing(hci_con_handle_t con_handle);
|
||||
|
||||
//设置回连出现key missing后,流程重新发起加密
|
||||
void sm_set_master_pair_redo(int enable);
|
||||
|
||||
//设置回连时，延时发起加密流程的时间，可用于兼容一些设备连接
|
||||
void sm_set_master_reconnect_enc_delay(u16 delay_ms);
|
||||
void sm_passkey_input(hci_con_handle_t con_handle, uint32_t passkey);
|
||||
#endif
|
||||
136
include_lib/btstack/third_party/app_protocol_event.h
vendored
Normal file
136
include_lib/btstack/third_party/app_protocol_event.h
vendored
Normal file
@ -0,0 +1,136 @@
|
||||
|
||||
|
||||
#ifndef _3TH_PROTOCOL_EVENT_H
|
||||
#define _3TH_PROTOCOL_EVENT_H
|
||||
|
||||
//该文件只定义库里面和库外面都需要用得的第三方APP协议的消息和状态
|
||||
#include<string.h>
|
||||
#include <stdint.h>
|
||||
#include "typedef.h"
|
||||
|
||||
#define DEMO_HANDLER_ID 0x300 /*作为一个使用的例子，同时也可作为客户自己添加协议的ID*/
|
||||
#define GMA_HANDLER_ID 0x400 /*阿里天猫协议接口ID*/
|
||||
#define MMA_HANDLER_ID 0x500 /*小米MMA协议接口ID*/
|
||||
#define DMA_HANDLER_ID 0x600 /*百度DMA协议接口ID*/
|
||||
#define TME_HANDLER_ID 0x700 /*腾讯酷狗TME协议接口ID*/
|
||||
#define AMA_HANDLER_ID 0x800 /*亚马逊的AMA协议接口ID*/
|
||||
#define GFPS_HANDLER_ID 0x900 /*谷歌快对的协议接口ID*/
|
||||
//app protocol公共消息
|
||||
enum {
|
||||
APP_PROTOCOL_COMMON_NOTICE = 0,
|
||||
APP_PROTOCOL_CONNECTING, /*保留，暂未使用*/
|
||||
APP_PROTOCOL_CONNECTED_BLE, /*APP通过BLE连接成功状态更新*/
|
||||
APP_PROTOCOL_CONNECTED_SPP, /*APP通过SPP连接成功状态更新*/
|
||||
APP_PROTOCOL_DISCONNECT, /*APP连接断开状态更新*/
|
||||
APP_PROTOCOL_AUTH_PASS, /*连接认证通过标识更新*/
|
||||
APP_PROTOCOL_SPEECH_ENCODER_TYPE,
|
||||
APP_PROTOCOL_SPEECH_START, /*语音识别功能启动状态*/
|
||||
APP_PROTOCOL_SPEECH_STOP, /*语音识别功能停止状态*/
|
||||
APP_PROTOCOL_SET_VOLUME, /*app配置音量*/
|
||||
APP_PROTOCOL_GET_VOLUME, /*app读取音量*/
|
||||
APP_PROTOCOL_GET_AUX_STATUS, /*保留，暂未使用*/
|
||||
APP_PROTOCOL_LIB_TWS_DATA_SYNC, /*需要更新给另一端tws数据*/
|
||||
APP_PROTOCOL_COMMON_NOTICE_END = 0x14F,
|
||||
};
|
||||
//OTA消息
|
||||
enum {
|
||||
APP_PROTOCOL_OTA_COMMON_NOTICE = APP_PROTOCOL_COMMON_NOTICE_END + 1,
|
||||
APP_PROTOCOL_OTA_CHECK,
|
||||
APP_PROTOCOL_OTA_GET_APP_VERSION,
|
||||
APP_PROTOCOL_OTA_CHECK_CRC,
|
||||
APP_PROTOCOL_OTA_BEGIN,
|
||||
APP_PROTOCOL_OTA_TRANS_DATA,
|
||||
APP_PROTOCOL_OTA_PERCENT,
|
||||
APP_PROTOCOL_OTA_END,
|
||||
APP_PROTOCOL_OTA_SUCCESS,
|
||||
APP_PROTOCOL_OTA_FAIL,
|
||||
APP_PROTOCOL_OTA_CANCLE,
|
||||
APP_PROTOCOL_OTA_REBOOT,
|
||||
APP_PROTOCOL_OTA_COMMON_NOTICE_END = 0x1FF,
|
||||
};
|
||||
//GMA私有消息
|
||||
enum {
|
||||
APP_PROTOCOL_GMA_NOTICE_BEGIN = GMA_HANDLER_ID,
|
||||
APP_PROTOCOL_GMA_FMTX_SETFRE, /*样机支持FM功能的APP配置fm参数*/
|
||||
APP_PROTOCOL_GMA_FMTX_GETFRE, /*app获取当前的fm配置参数*/
|
||||
APP_PROTOCOL_GMA_NOTICE_END = GMA_HANDLER_ID + 0xFF,
|
||||
};
|
||||
//MMA私有消息
|
||||
enum {
|
||||
APP_PROTOCOL_MMA_NOTICE = MMA_HANDLER_ID,
|
||||
APP_PROTOCOL_MMA_SAVE_INFO, //库里面不直接访问VM接口，有些信息保存外面做
|
||||
APP_PROTOCOL_MMA_READ_INFO,
|
||||
APP_PROTOCOL_MMA_SAVE_ADV_COUNTER,
|
||||
APP_PROTOCOL_MMA_READ_ADV_COUNTER,
|
||||
APP_PROTOCOL_MMA_NOTICE_END = MMA_HANDLER_ID + 0xFF,
|
||||
};
|
||||
|
||||
//DMA私有消息
|
||||
enum {
|
||||
APP_PROTOCOL_DMA_NOTICE = DMA_HANDLER_ID,
|
||||
APP_PROTOCOL_DMA_SAVE_RAND, //库里面不直接访问VM接口，有些信息保存外面做
|
||||
APP_PROTOCOL_DMA_READ_RAND,
|
||||
APP_PROTOCOL_DMA_TWS_SNED_RAND,
|
||||
APP_PROTOCOL_DMA_TTS_TYPE,
|
||||
APP_PROTOCOL_DMA_SAVE_OTA_INFO, //库里面不直接访问VM接口，有些信息保存外面做
|
||||
APP_PROTOCOL_DMA_READ_OTA_INFO,
|
||||
APP_PROTOCOL_DMA_NOTICE_END = DMA_HANDLER_ID + 0xFF,
|
||||
};
|
||||
|
||||
// GFPS私有消息
|
||||
enum {
|
||||
APP_PROTOCOL_GFPS_RING_STOP_ALL = GFPS_HANDLER_ID,
|
||||
APP_PROTOCOL_GFPS_RING_RIGHT,
|
||||
APP_PROTOCOL_GFPS_RING_LEFT,
|
||||
APP_PROTOCOL_GFPS_RING_ALL,
|
||||
APP_PROTOCOL_GFPS_HEARABLE_CONTROLS,
|
||||
};
|
||||
|
||||
#define GFP_TWS_ENABLE 1
|
||||
|
||||
//APP_PROTOCOL获取电量的类型
|
||||
#define APP_PROTOCOL_BAT_T_CHARGE_FLAG 0
|
||||
#define APP_PROTOCOL_BAT_T_MAIN 1
|
||||
#define APP_PROTOCOL_BAT_T_BOX 2
|
||||
#define APP_PROTOCOL_BAT_T_TWS_LEFT 3
|
||||
#define APP_PROTOCOL_BAT_T_TWS_RIGHT 4
|
||||
#define APP_PROTOCOL_BAT_T_TWS_SIBLING 5
|
||||
#define APP_PROTOCOL_BAT_T_LOW_POWER 6
|
||||
#define APP_PROTOCOL_BAT_T_MAX 8
|
||||
|
||||
typedef struct _ota_frame_info_t {
|
||||
u16 max_pkt_len;
|
||||
u16 frame_crc;
|
||||
u32 frame_size;
|
||||
} ota_frame_info;
|
||||
|
||||
//*****//
|
||||
typedef enum {
|
||||
USER_NOTIFY_STATE_CONNECTED = 0, /**< 手机APP与设备建立连接 */
|
||||
USER_NOTIFY_STATE_DISCONNECTED, /**< 手机APP与设备的连接断开 */
|
||||
USER_NOTIFY_STATE_MOBILE_CONNECTED, /**< 手机与设备建立BT连接（A2DP、HFP、AVRCP） */
|
||||
USER_NOTIFY_STATE_MOBILE_DISCONNECTED, /**< 手机与设备BT连接（A2DP、HFP、AVRCP）断开 */
|
||||
USER_NOTIFY_STATE_SEND_PREPARE_DONE, /**< 设备端进入可向手机发送数据的状态 */
|
||||
USER_NOTIFY_STATE_TWS_CONNECT, /**< TWS类设备两端连接成功 */
|
||||
USER_NOTIFY_STATE_TWS_DISCONNECT, /**< TWS类设备两端断开连接 */
|
||||
USER_NOTIFY_STATE_BOX_OPEN, /**< 盒仓开启 */
|
||||
USER_NOTIFY_STATE_BOX_CLOSE, /**< 盒仓关闭 */
|
||||
USER_NOTIFY_STATE_ROLE_SWITCH_START, /**< TWS类设备开始进入主从切换流程 */
|
||||
USER_NOTIFY_STATE_ROLE_SWITCH_FINISH, /**< TWS类设备主从切换完成 */
|
||||
USER_NOTIFY_STATE_ROLE_SWITCH_REQUEST, /**< TWS类设备向APP发起主从切换请求 */
|
||||
USER_NOTIFY_STATE_DOUBLE_CLICK, /**< 设备双击按键 */
|
||||
USER_NOTIFY_STATE_KEYWORD_DETECTED, /**< 设备语音唤醒 */
|
||||
USER_NOTIFY_STATE_BATTERY_LEVEL_UPDATE, /**< 通知耳机电量更新 */
|
||||
USER_NOTIFY_STATE_ONE_CLICK, /**< 设备单击按键 */
|
||||
} USER_NOTIFY_STATE;
|
||||
|
||||
typedef enum {
|
||||
/*尽量返回简单的1或者0*/
|
||||
CHECK_STATUS_TWS_MASTER,
|
||||
CHECK_STATUS_TWS_SLAVE,
|
||||
CHECK_STATUS_TWS_PAIR_STA, /*1是tws已经配对了，0是未配对*/
|
||||
CHECK_STATUS_TWS_SIDE, /*0是单耳，1是左耳，2是右耳*/
|
||||
CHECK_STATUS_TWS_REV,
|
||||
CHECK_STATUS_TWS_REV1,
|
||||
} CHECK_STATUS;
|
||||
#endif
|
||||
146
include_lib/btstack/third_party/app_protocol_libs_api.h
vendored
Normal file
146
include_lib/btstack/third_party/app_protocol_libs_api.h
vendored
Normal file
@ -0,0 +1,146 @@
|
||||
|
||||
#ifndef __APP_PRO_LIBS_API_H__
|
||||
#define __APP_PRO_LIBS_API_H__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
///***************************************///
|
||||
//GMA的函数接口汇集,begin
|
||||
int gma_prev_init(void);
|
||||
int gma_opus_voice_mic_send(uint8_t *voice_buf, uint16_t voice_len);
|
||||
/*gma的总初始化函数**/
|
||||
void gma_all_init(void);
|
||||
/*gma的总的释放函数**/
|
||||
void gma_all_exit(void);
|
||||
bool gma_connect_success(void);
|
||||
void gma_set_active_ali_para(void *addr);
|
||||
/*TWS的公共地址配置*/
|
||||
void gma_set_sibling_mac_para(void *mac);
|
||||
void gma_ble_adv_enable(u8 enable);
|
||||
void gma_ble_ibeacon_adv(u8 enable);
|
||||
//gma接收的数据处理函数
|
||||
int gma_rx_loop(void);
|
||||
/*gma命令和数据发送处理*/
|
||||
int tm_data_send_process_thread(void);
|
||||
int gma_start_voice_recognition(int flag);
|
||||
|
||||
|
||||
int gma_disconnect(void *addr);
|
||||
|
||||
void gma_message_callback_register(int (*handler)(int opcode, u8 *data, u32 len));
|
||||
void gma_is_tws_master_callback_register(bool (*handler)(void));
|
||||
void gma_tx_resume_register(bool (*handler)(void));
|
||||
void gma_rx_resume_register(bool (*handler)(void));
|
||||
/*注册电量的获取回调函数*/
|
||||
void gma_get_battery_callback_register(bool (*handler)(u8 battery_type, u8 *value));
|
||||
|
||||
//ota interface
|
||||
int gma_ota_requset_next_packet(void *priv, u32 offset, u16 len);
|
||||
void gma_replay_ota_result(u8 result);
|
||||
|
||||
int tws_ota_get_data_from_sibling(u8 opcode, u8 *data, u8 len);
|
||||
u8 tws_ota_control(int type, ...);
|
||||
void tws_ota_app_event_deal(u8 evevt);
|
||||
//gma apis ends
|
||||
|
||||
///***************************************///
|
||||
//DMA apis begin
|
||||
extern int dueros_process();
|
||||
extern int dma_all_init(void);
|
||||
extern int dma_all_exit(void);
|
||||
extern void dma_message_callback_register(int (*handler)(int id, int opcode, u8 *data, u32 len));
|
||||
extern void dma_check_status_callback_register(int (*handler)(int state_flag));
|
||||
extern void dma_tx_resume_register(bool (*handler)(void));
|
||||
extern void dma_rx_resume_register(bool (*handler)(void));
|
||||
extern void dma_ble_adv_enable(u8 enable);
|
||||
extern u16 dma_speech_data_send(u8 *buf, u16 len);
|
||||
extern int dueros_send_process(void);
|
||||
extern void dma_set_product_id_key(void *data);
|
||||
extern bool dma_pair_state();
|
||||
extern int dma_start_voice_recognition(u8 en);
|
||||
extern void dueros_dma_manufacturer_info_init();
|
||||
extern int dma_disconnect(void *addr);
|
||||
extern int dma_update_tws_state_to_lib(int state);
|
||||
extern void dma_get_battery_callback_register(bool (*handler)(u8 battery_type, u8 *value));
|
||||
extern void dma_set_pid(u32 pid);
|
||||
extern void dma_tws_data_deal(u8 *data, int len);
|
||||
|
||||
|
||||
//DMA apis ends
|
||||
|
||||
///***************************************///
|
||||
//TME apis begins
|
||||
extern void tme_get_battery_callback_register(bool (*handler)(u8 battery_type, u8 *value));
|
||||
extern void tme_message_callback_register(int (*handler)(int id, int opcode, const u8 *data, u32 len));
|
||||
extern void tme_is_tws_master_callback_register(bool (*handler)(void));
|
||||
extern void tme_tx_resume_register(bool (*handler)(void));
|
||||
extern void tme_rx_resume_register(bool (*handler)(void));
|
||||
extern void TME_protocol_process(void *parm);
|
||||
extern int tme_all_init(void);
|
||||
extern int tme_all_exit(void);
|
||||
/* extern u16 tme_speech_data_send(buf, len); */
|
||||
extern void tme_ble_adv_enable(u8 enable);
|
||||
extern void TME_send_packet_process(void);
|
||||
extern void TME_recieve_packet_parse_process(void);
|
||||
extern bool tme_connect_success(void);
|
||||
extern int tme_send_voice_data(void *buf, u16 len);
|
||||
extern int tme_start_voice_recognition(int flag);
|
||||
extern void tme_set_configuration_info(void *addr);
|
||||
extern int tme_protocol_disconnect(void *priv);
|
||||
extern void tme_set_pid(u32 pid);
|
||||
extern void tme_set_bid(u32 bid);
|
||||
extern u32 TME_request_ota_data(void *priv, u32 offset, u16 len);
|
||||
extern void TME_notify_file_size(u32 file_size);
|
||||
|
||||
//TME api ends
|
||||
|
||||
///***************************************///
|
||||
//MMA api begins
|
||||
extern void mma_all_init(void);
|
||||
extern void mma_all_exit(void);
|
||||
extern void mma_ble_adv_enable(u8 enable);
|
||||
extern int XM_speech_data_send(u8 *buf, u16 len);
|
||||
extern bool XM_protocal_auth_pass(void);
|
||||
extern int mma_start_voice_recognition(int ctrl);
|
||||
extern void mma_message_callback_register(int (*handler)(int id, int opcode, u8 *data, u32 len));
|
||||
extern void mma_is_tws_master_callback_register(bool (*handler)(void));
|
||||
extern void mma_tx_resume_register(void (*handler)(void));
|
||||
extern void mma_rx_resume_register(void (*handler)(void));
|
||||
extern void mma_set_verdor_id(u16 pid);
|
||||
extern void mma_set_product_id(u16 pid);
|
||||
extern void mma_set_local_version(u16 version);
|
||||
extern int mma_protocol_loop_process();
|
||||
extern u32 mma_request_ota_data(void *priv, u32 offset, u16 len);
|
||||
extern int mma_notify_file_size(u32 size);
|
||||
extern u32 mma_report_ota_status(u8 state);
|
||||
extern int mma_disconnect(void *addr);
|
||||
extern void mma_tws_data_deal(u8 *data, int len);
|
||||
extern void mma_get_battery_callback_register(bool (*handler)(u8 battery_type, u8 *value));
|
||||
|
||||
//MMA API END
|
||||
|
||||
///***************************************///
|
||||
//GFPS apis begins
|
||||
extern int gfps_all_init();
|
||||
extern int gfps_all_exit();
|
||||
extern int gfps_disconnect(void);
|
||||
extern int gfps_ble_adv_enable(int enable);
|
||||
extern void gfps_set_model_id(uint8_t *model_id);
|
||||
extern void gfps_set_anti_spoofing_public_key(char *public_key);
|
||||
extern void gfps_set_anti_spoofing_private_key(char *private_key);
|
||||
extern void gfps_get_battery_callback_register(bool (*handler)(u8 battery_type, u8 *value));
|
||||
extern void gfps_message_callback_register(int (*handler)(int id, int opcode, u8 *data, u32 len));
|
||||
extern void gfps_set_pair_mode(void);
|
||||
extern void gfps_battery_update(void);
|
||||
extern void gfps_personalized_name_set(u8 *data, u8 len);
|
||||
extern void gfps_is_tws_master_callback_register(bool (*handler)(void));
|
||||
extern void gfps_tws_data_deal(u8 *data, int len);
|
||||
extern int gfps_update_tws_state_to_lib(int state);
|
||||
extern void gfps_factory_reset(void);
|
||||
extern void gfps_set_battery_ui_enable(uint8_t enable);
|
||||
extern void update_channel_map_do_in_irq_flag_set(uint8_t en);
|
||||
//GFPS API END
|
||||
#endif /* __APP_PRO_LIBS_API_H__ */
|
||||
|
||||
|
||||
15
include_lib/btstack/third_party/common/ble_config.h
vendored
Normal file
15
include_lib/btstack/third_party/common/ble_config.h
vendored
Normal file
@ -0,0 +1,15 @@
|
||||
#ifndef __BLE_CONFIG_H__
|
||||
#define __BLE_CONFIG_H__
|
||||
|
||||
#include "typedef.h"
|
||||
#include "ble_user.h"
|
||||
|
||||
bool bt_3th_ble_ready(void *priv);
|
||||
s32 bt_3th_ble_send(void *priv, void *data, u16 len);
|
||||
void bt_3th_ble_callback_set(void (*resume)(void), void (*recieve)(void *, void *, u16), void (*status)(void *, ble_state_e));
|
||||
void bt_3th_ble_status_callback(void *priv, ble_state_e status);
|
||||
int bt_3th_ble_data_send(void *priv, u8 *buf, u16 len);
|
||||
void bt_3th_ble_get_operation_table(void);
|
||||
ble_state_e bt_3th_get_jl_ble_status(void);
|
||||
|
||||
#endif//__BLE_CONFG_H__
|
||||
43
include_lib/btstack/third_party/common/ble_user.h
vendored
Normal file
43
include_lib/btstack/third_party/common/ble_user.h
vendored
Normal file
@ -0,0 +1,43 @@
|
||||
#ifndef __BLE_USER_H__
|
||||
#define __BLE_USER_H__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
typedef enum {
|
||||
BLE_ST_NULL = 0,
|
||||
BLE_ST_INIT_OK, //协议栈初始化ok
|
||||
BLE_ST_IDLE, //关闭广播或扫描状态
|
||||
BLE_ST_CONNECT, //链路刚连上
|
||||
BLE_ST_SEND_DISCONN, //发送断开命令，等待链路断开
|
||||
BLE_ST_DISCONN, //链路断开状态
|
||||
BLE_ST_CONNECT_FAIL, //连接失败
|
||||
BLE_ST_CONNECTION_UPDATE_OK,//更新连接参数完成
|
||||
|
||||
BLE_ST_ADV = 0x20, //设备处于广播状态
|
||||
BLE_ST_NOTIFY_IDICATE, //设备已连上,允许发数(已被主机使能通知)
|
||||
|
||||
BLE_ST_SCAN = 0x40, //设备处于搜索状态
|
||||
BLE_ST_CREATE_CONN, //发起设备连接
|
||||
BLE_ST_SEND_CREATE_CONN_CANNEL, //取消发起设备连接
|
||||
BLE_ST_SEARCH_COMPLETE, //链路连上，已搜索完profile，可以发送数据操作
|
||||
|
||||
BLE_ST_SEND_STACK_EXIT = 0x60, //发送退出协议栈命令，等待完成
|
||||
BLE_ST_STACK_EXIT_COMPLETE, //协议栈退出成功
|
||||
|
||||
} ble_state_e;
|
||||
|
||||
enum {
|
||||
APP_BLE_NO_ERROR = 0,
|
||||
APP_BLE_BUFF_FULL, //buffer 满，会丢弃当前发送的数据包
|
||||
APP_BLE_BUFF_ERROR, //
|
||||
APP_BLE_OPERATION_ERROR, //操作错误
|
||||
APP_BLE_IS_DISCONN, //链路已断开
|
||||
APP_BLE_NO_WRITE_CCC, //主机没有 write Client Characteristic Configuration
|
||||
};
|
||||
|
||||
struct BLE_CONFIG_VAR {
|
||||
ble_state_e JL_ble_status;
|
||||
struct ble_server_operation_t *rcsp_ble;
|
||||
};
|
||||
|
||||
#endif//__BLE_USER_H__
|
||||
72
include_lib/btstack/third_party/common/btstack_3th_protocol_user.h
vendored
Normal file
72
include_lib/btstack/third_party/common/btstack_3th_protocol_user.h
vendored
Normal file
@ -0,0 +1,72 @@
|
||||
#ifndef __BTSTACK_3TH_PROTOCAL_H__
|
||||
#define __BTSTACK_3TH_PROTOCAL_H__
|
||||
|
||||
#include "spp_config.h"
|
||||
#include "ble_config.h"
|
||||
#include "JL_rcsp_api.h"
|
||||
#include "JL_rcsp_protocol.h"
|
||||
#include "JL_rcsp_packet.h"
|
||||
#include "attr.h"
|
||||
|
||||
|
||||
#define APP_TYPE_RCSP 0x01
|
||||
#define APP_TYPE_DUEROS 0x02
|
||||
#define APP_TYPE_BTSTACK 0xFF
|
||||
|
||||
|
||||
#define BT_CONFIG_BLE BIT(0)
|
||||
#define BT_CONFIG_SPP BIT(1)
|
||||
|
||||
typedef enum {
|
||||
BT_3TH_EVENT_COMMON_INIT,
|
||||
BT_3TH_EVENT_COMMON_BLE_STATUS,
|
||||
BT_3TH_EVENT_COMMON_SPP_STATUS,
|
||||
|
||||
BT_3TH_EVENT_RCSP_DEV_SELECT = 100,
|
||||
|
||||
|
||||
|
||||
|
||||
BT_3TH_EVENT_DUEROS_CONNECT = 200,
|
||||
|
||||
|
||||
} BT_3TH_EVENT_TYPE;
|
||||
|
||||
enum {
|
||||
RCSP_BLE,
|
||||
RCSP_SPP,
|
||||
};
|
||||
|
||||
|
||||
typedef struct __BT_3TH_USER_CB {
|
||||
int type;
|
||||
int bt_config;
|
||||
JL_PRO_CB bt_3th_handler;
|
||||
void (*BT_3TH_event_handler)(u16 opcode, u8 *packet, int size);
|
||||
void (*BT_3TH_data_handler)(u8 *packet, int size);
|
||||
int (*BT_3TH_spp_state_specific)(u8 type);
|
||||
} BT_3TH_USER_CB;
|
||||
|
||||
typedef struct __BT_3TH_PROTOCOL_CB {
|
||||
int type;
|
||||
void (*BT_3TH_type_dev_select)(u8 type);
|
||||
void (*resume)(void);
|
||||
void (*recieve)(void *, void *, u16);
|
||||
} BT_3TH_PROTOCOL_CB;
|
||||
|
||||
int btstack_3th_protocol_user_init(BT_3TH_USER_CB *protocol_callback);
|
||||
int btstack_3th_protocol_lib_init(BT_3TH_PROTOCOL_CB *protocol_lib_callback);
|
||||
|
||||
JL_PRO_CB *bt_3th_get_spp_callback(void);
|
||||
void bt_3th_set_spp_callback_priv(void *priv);
|
||||
JL_PRO_CB *bt_3th_get_ble_callback(void);
|
||||
void bt_3th_set_ble_callback_priv(void *priv);
|
||||
void bt_3th_dev_type_spp(void);
|
||||
void bt_3th_type_dev_select(u8 type);
|
||||
u8 bt_3th_get_cur_bt_channel_sel(void);
|
||||
void bt_3th_spp_state_handle(u8 type);
|
||||
void bt_3th_event_send_to_user(u16 opcode, u8 *packet, int size);
|
||||
void bt_3th_data_send_to_user(u8 *packet, int size);
|
||||
#endif// __BTSTACK_3TH_PROTOCAL_H__
|
||||
|
||||
|
||||
15
include_lib/btstack/third_party/common/spp_config.h
vendored
Normal file
15
include_lib/btstack/third_party/common/spp_config.h
vendored
Normal file
@ -0,0 +1,15 @@
|
||||
#ifndef __SPP_CONFIG_H__
|
||||
#define __SPP_CONFIG_H__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
bool bt_3th_spp_fw_ready(void *priv);
|
||||
s32 bt_3th_spp_send(void *priv, void *data, u16 len);
|
||||
void bt_3th_spp_callback_set(void (*resume)(void), void (*recieve)(void *, void *, u16), void (*status)(u8));
|
||||
u8 bt_3th_get_jl_spp_status(void);
|
||||
void bt_3th_spp_status_callback(u8 status);
|
||||
int bt_3th_spp_data_send(void *priv, u8 *buf, u16 len);
|
||||
void bt_3th_spp_init(void);
|
||||
void bt_3th_spp_get_operation_table(void);
|
||||
|
||||
#endif//__SPP_CONFIG_H__
|
||||
37
include_lib/btstack/third_party/common/spp_user.h
vendored
Normal file
37
include_lib/btstack/third_party/common/spp_user.h
vendored
Normal file
@ -0,0 +1,37 @@
|
||||
#ifndef __SPP_USER_H__
|
||||
#define __SPP_USER_H__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
extern void (*spp_state_cbk)(u8 state);
|
||||
extern void (*spp_recieve_cbk)(void *priv, u8 *buf, u16 len);
|
||||
extern void user_spp_data_handler(u8 packet_type, u16 ch, u8 *packet, u16 size);
|
||||
|
||||
struct spp_operation_t {
|
||||
int(*disconnect)(void *priv);
|
||||
int(*send_data)(void *priv, void *buf, u16 len);
|
||||
int(*regist_wakeup_send)(void *priv, void *cbk);
|
||||
int(*regist_recieve_cbk)(void *priv, void *cbk);
|
||||
int(*regist_state_cbk)(void *priv, void *cbk);
|
||||
int(*busy_state)(void);
|
||||
};
|
||||
|
||||
enum {
|
||||
SPP_USER_ERR_NONE = 0x0,
|
||||
SPP_USER_ERR_SEND_BUFF_BUSY,
|
||||
SPP_USER_ERR_SEND_OVER_LIMIT,
|
||||
SPP_USER_ERR_SEND_FAIL,
|
||||
};
|
||||
|
||||
enum {
|
||||
SPP_USER_ST_NULL = 0x0,
|
||||
SPP_USER_ST_CONNECT,
|
||||
SPP_USER_ST_DISCONN,
|
||||
SPP_USER_ST_WAIT_DISC,
|
||||
SPP_USER_ST_CONNECT_OTA,
|
||||
SPP_USER_ST_DISCONN_OTA,
|
||||
};
|
||||
|
||||
void spp_get_operation_table(struct spp_operation_t **interface_pt);
|
||||
|
||||
#endif//__SPP_USER_H__
|
||||
43
include_lib/btstack/third_party/rcsp/JL_rcsp_api.h
vendored
Normal file
43
include_lib/btstack/third_party/rcsp/JL_rcsp_api.h
vendored
Normal file
@ -0,0 +1,43 @@
|
||||
|
||||
#ifndef _JL_RCSP_LIB_API_H_
|
||||
#define _JL_RCSP_LIB_API_H_
|
||||
|
||||
#include "typedef.h"
|
||||
#include "uart.h"
|
||||
|
||||
#define USE_LITTLE_ENDIAN 0
|
||||
#define USE_BIG_ENDIAN 1
|
||||
|
||||
#define USE_ENDIAN_TYPE USE_LITTLE_ENDIAN
|
||||
|
||||
|
||||
#define AI_LICENCE_LEN 16
|
||||
|
||||
enum {
|
||||
TULING = 0,
|
||||
DEEPBRAIN,
|
||||
};
|
||||
|
||||
#pragma pack(1)
|
||||
struct _AI_platform {
|
||||
u8 platform;
|
||||
u8 license[AI_LICENCE_LEN];
|
||||
};
|
||||
#pragma pack()
|
||||
|
||||
u16 app_htons(u16 n);
|
||||
u16 app_ntohs(u16 n);
|
||||
|
||||
u32 app_htonl(u32 n);
|
||||
u32 app_ntohl(u32 n);
|
||||
|
||||
void JL_rcsp_auth_init(int (*send)(void *, u8 *, u16), u8 *link_key, u8 *addr);
|
||||
void JL_rcsp_auth_reset(void);
|
||||
u8 JL_rcsp_get_auth_flag(void);
|
||||
void JL_rcsp_set_auth_flag(u8 auth_flag);
|
||||
void JL_rcsp_auth_recieve(u8 *buffer, u16 len);
|
||||
|
||||
u8 get_rcsp_version(void);
|
||||
void get_ai_platform(struct _AI_platform *p, u8 platform);
|
||||
void smart_auth_res_pass(void);
|
||||
#endif //_JL_RCSP_LIB_H_
|
||||
102
include_lib/btstack/third_party/rcsp/JL_rcsp_packet.h
vendored
Normal file
102
include_lib/btstack/third_party/rcsp/JL_rcsp_packet.h
vendored
Normal file
@ -0,0 +1,102 @@
|
||||
#ifndef __JL_PACKET_H__
|
||||
#define __JL_PACKET_H__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
#define READ_BIG_U16(a) ((*((u8*)(a)) <<8) + *((u8*)(a)+1))
|
||||
#define READ_BIG_U32(a) ((*((u8*)(a)) <<24) + (*((u8*)(a)+1)<<16) + (*((u8*)(a)+2)<<8) + *((u8*)(a)+3))
|
||||
|
||||
#define READ_LIT_U16(a) (*((u8*)(a)) + (*((u8*)(a)+1)<<8))
|
||||
#define READ_LIT_U32(a) (*((u8*)(a)) + (*((u8*)(a)+1)<<8) + (*((u8*)(a)+2)<<16) + (*((u8*)(a)+3)<<24))
|
||||
|
||||
|
||||
#define WRITE_BIG_U16(a,src) {*((u8*)(a)+0) = (u8)(src>>8); *((u8*)(a)+1) = (u8)(src&0xff); }
|
||||
#define WRITE_BIG_U32(a,src) {*((u8*)(a)+0) = (u8)((src)>>24); *((u8*)(a)+1) = (u8)(((src)>>16)&0xff);*((u8*)(a)+2) = (u8)(((src)>>8)&0xff);*((u8*)(a)+3) = (u8)((src)&0xff);}
|
||||
|
||||
#define WRITE_LIT_U16(a,src) {*((u8*)(a)+1) = (u8)(src>>8); *((u8*)(a)+0) = (u8)(src&0xff); }
|
||||
#define WRITE_LIT_U32(a,src) {*((u8*)(a)+3) = (u8)((src)>>24); *((u8*)(a)+2) = (u8)(((src)>>16)&0xff);*((u8*)(a)+1) = (u8)(((src)>>8)&0xff);*((u8*)(a)+0) = (u8)((src)&0xff);}
|
||||
|
||||
|
||||
#pragma pack(1)
|
||||
typedef union __HEAD_BIT {
|
||||
struct {
|
||||
u16 _OpCode: 8; //OpCode val
|
||||
u16 _unsed : 6; //unsed
|
||||
u16 _resp : 1; //request for response
|
||||
u16 _type : 1; //command or response
|
||||
} _i;
|
||||
u16 _t;
|
||||
} HEAD_BIT;
|
||||
|
||||
struct __JL_PACKET {
|
||||
u8 tag[3];
|
||||
HEAD_BIT head;
|
||||
u16 length;
|
||||
u8 data[0];
|
||||
};
|
||||
#pragma pack()
|
||||
typedef struct __JL_PACKET JL_PACKET;
|
||||
|
||||
|
||||
#define JL_PACK_START_TAG0 (0xfe)
|
||||
#define JL_PACK_START_TAG1 (0xdc)
|
||||
#define JL_PACK_START_TAG2 (0xba)
|
||||
#define JL_PACK_END_TAG (0xef)
|
||||
#define JL_ONE_PACKET_LEN(n) (sizeof(JL_PACKET) + n + 1)
|
||||
|
||||
#ifdef JL_RCSP_UBOOT_LIB
|
||||
#define JL_MTU_RESV (540L)
|
||||
#define JL_MTU_SEND (128L)
|
||||
#define JL_RECIEVE_BUF_SIZE ((JL_MTU_RESV + sizeof(JL_PACKET))*2)
|
||||
#define JL_CMD_POOL_SIZE (JL_MTU_SEND)
|
||||
#define JL_RESP_POOL_SIZE (JL_MTU_SEND*2)
|
||||
#define JL_WAIT_RESP_POOL_SIZE (JL_MTU_SEND)
|
||||
#else
|
||||
#define JL_MTU_RESV (540L)
|
||||
#define JL_MTU_SEND (128L)
|
||||
#define JL_RECIEVE_BUF_SIZE (JL_MTU_RESV + sizeof(JL_PACKET) + 128)
|
||||
#define JL_CMD_POOL_SIZE (JL_MTU_SEND*4)
|
||||
#define JL_RESP_POOL_SIZE (JL_MTU_SEND*2)
|
||||
#define JL_WAIT_RESP_POOL_SIZE (JL_MTU_SEND*2)
|
||||
#endif
|
||||
|
||||
void set_jl_rcsp_recieve_buf_size(u16 size);
|
||||
u16 rcsp_packet_write_alloc_len(void);
|
||||
|
||||
u32 rcsp_packet_need_buf_size(void);
|
||||
u32 rcsp_packet_buf_init(u8 *buf, u32 len);
|
||||
|
||||
u16 JL_packet_get_rx_max_mtu(void);
|
||||
u16 JL_packet_get_tx_max_mtu(void);
|
||||
u16 JL_packet_set_mtu(u16 mtu);
|
||||
void JL_packet_recieve(void *buf, u16 len);
|
||||
u32 JL_pack_data_read_all(void *buf, u16 len);
|
||||
void JL_packet_clear_all_data(void);
|
||||
bool JL_packet_find(u8 *r_buf, JL_PACKET **packet);
|
||||
void JL_packet_init(void);
|
||||
void JL_packet_clear(void);
|
||||
|
||||
void JL_packet_packing(
|
||||
JL_PACKET *packet,
|
||||
u8 OpCode,
|
||||
u8 type,
|
||||
u8 request_rsp,
|
||||
u8 *extra_param,
|
||||
u16 extra_len,
|
||||
u8 *data,
|
||||
u16 len);
|
||||
|
||||
void set_jl_mtu_resv(u16 jl_mtu_resv_var);
|
||||
void set_jl_mtu_send(u16 jl_mtu_send_var);
|
||||
|
||||
extern u16 jl_mtu_resv;
|
||||
extern u16 jl_mtu_send;
|
||||
extern u16 jl_recieve_buf_size;
|
||||
extern u16 jl_cmd_pool_size;
|
||||
extern u16 jl_rcsp_pool_size;
|
||||
extern u16 jl_wait_rcsp_pool_size;
|
||||
|
||||
#endif//__JL_PACKET_H__
|
||||
|
||||
|
||||
217
include_lib/btstack/third_party/rcsp/JL_rcsp_protocol.h
vendored
Normal file
217
include_lib/btstack/third_party/rcsp/JL_rcsp_protocol.h
vendored
Normal file
@ -0,0 +1,217 @@
|
||||
#ifndef __JL_PROTOCOL_H__
|
||||
#define __JL_PROTOCOL_H__
|
||||
|
||||
#include "typedef.h"
|
||||
#include "JL_rcsp_packet.h"
|
||||
|
||||
#define ATTR_TYPE_PROTOCOL_VERSION (0)
|
||||
#define ATTR_TYPE_SYS_INFO (1)
|
||||
#define ATTR_TYPE_EDR_ADDR (2)
|
||||
#define ATTR_TYPE_PLATFORM (3)
|
||||
#define ATTR_TYPE_FUNCTION_INFO (4)
|
||||
#define ATTR_TYPE_DEV_VERSION (5)
|
||||
#define ATTR_TYPE_SDK_TYPE (6)
|
||||
#define ATTR_TYPE_UBOOT_VERSION (7)
|
||||
#define ATTR_TYPE_DOUBLE_PARITION (8)
|
||||
#define ATTR_TYPE_UPDATE_STATUS (9)
|
||||
#define ATTR_TYPE_DEV_VID_PID (10)
|
||||
#define ATTR_TYPE_DEV_AUTHKEY (11)
|
||||
#define ATTR_TYPE_DEV_PROCODE (12)
|
||||
#define ATTR_TYPE_DEV_MAX_MTU (13)
|
||||
#define ATTR_TEYP_BLE_ADDR (17)
|
||||
#define ATTR_TYPE_MD5_GAME_SUPPORT (19)
|
||||
|
||||
|
||||
|
||||
#define COMMON_INFO_ATTR_BATTERY (0)
|
||||
#define COMMON_INFO_ATTR_VOL (1)
|
||||
#define COMMON_INFO_ATTR_DEV (2)
|
||||
#define COMMON_INFO_ATTR_ERR_REPORT (3)
|
||||
#define COMMON_INFO_ATTR_EQ (4)
|
||||
#define COMMON_INFO_ATTR_FILE_BROWSE_TYPE (5)
|
||||
#define COMMON_INFO_ATTR_FUN_TYPE (6)
|
||||
#define COMMON_INFO_ATTR_LIGHT (7)
|
||||
#define COMMON_INFO_ATTR_FMTX (8)
|
||||
#define COMMON_INFO_ATTR_HIGH_LOW_SET (11)
|
||||
#define COMMON_INFO_ATTR_PRE_FETCH_ALL_EQ_INFO (12)
|
||||
#define COMMON_INFO_ATTR_ANC_VOICE (13)
|
||||
#define COMMON_INFO_ATTR_FETCH_ALL_ANC_VOICE (14)
|
||||
#define COMMON_INFO_ATTR_PHONE_SCO_STATE_INFO (15)
|
||||
#define COMMON_INFO_ATTR_ASSISTED_HEARING (20)
|
||||
#define COMMON_INFO_ATTR_ADAPTIVE_NOISE_REDUCTION (21)
|
||||
#define COMMON_INFO_ATTR_AI_NO_PICK (22)
|
||||
#define COMMON_INFO_ATTR_SCENE_NOISE_REDUCTION (23)
|
||||
#define COMMON_INFO_ATTR_WIND_NOISE_DETECTION (24)
|
||||
#define COMMON_INFO_ATTR_VOICE_ENHANCEMENT_MODE (25)
|
||||
|
||||
|
||||
|
||||
#define BT_INFO_ATTR_MUSIC_TITLE (0)
|
||||
#define BT_INFO_ATTR_MUSIC_ARTIST (1)
|
||||
#define BT_INFO_ATTR_MUSIC_ALBUM (2)
|
||||
#define BT_INFO_ATTR_MUSIC_NUMBER (3)
|
||||
#define BT_INFO_ATTR_MUSIC_TOTAL (4)
|
||||
#define BT_INFO_ATTR_MUSIC_GENRE (5)
|
||||
#define BT_INFO_ATTR_MUSIC_TIME (6)
|
||||
#define BT_INFO_ATTR_MUSIC_STATE (7)
|
||||
#define BT_INFO_ATTR_MUSIC_CURR_TIME (8)
|
||||
|
||||
#define BT_INFO_ATTR_01 (0)
|
||||
|
||||
#define MUSIC_INFO_ATTR_STATUS (0)
|
||||
#define MUSIC_INFO_ATTR_FILE_NAME (1)
|
||||
#define MUSIC_INFO_ATTR_FILE_PLAY_MODE (2)
|
||||
|
||||
#define RTC_INFO_ATTR_RTC_TIME (0)
|
||||
#define RTC_INFO_ATTR_RTC_ALRAM (1)
|
||||
|
||||
#define LINEIN_INFO_ATTR_STATUS (0)
|
||||
|
||||
|
||||
/***************************************/
|
||||
/* 注意：不能在这个枚举里加代码 */
|
||||
/* 注意：不能在这个枚举里加代码 */
|
||||
/* 注意：不能在这个枚举里加代码 */
|
||||
/***************************************/
|
||||
enum {
|
||||
JL_OPCODE_DATA = 0x01,
|
||||
JL_OPCODE_GET_TARGET_FEATURE_MAP = 0x02,
|
||||
JL_OPCODE_GET_TARGET_FEATURE = 0x03,
|
||||
// JL_OPCODE_SWITCH_DEVICE = 0x04,
|
||||
JL_OPCODE_DISCONNECT_EDR = 0x06,
|
||||
JL_OPCODE_SYS_INFO_GET = 0x07,
|
||||
JL_OPCODE_SYS_INFO_SET = 0x08,
|
||||
JL_OPCODE_SYS_INFO_AUTO_UPDATE = 0x09,
|
||||
JL_OPCODE_CALL_REQUEST = 0xa,
|
||||
JL_OPCODE_SWITCH_DEVICE = 0x0b,
|
||||
JL_OPCODE_FILE_BROWSE_REQUEST_START = 0x0C,
|
||||
JL_OPCODE_FILE_BROWSE_REQUEST_STOP = 0x0D,
|
||||
JL_OPCODE_FUNCTION_CMD = 0x0E,
|
||||
|
||||
JL_OPCODE_SYS_OPEN_BT_SCAN = 0x12,
|
||||
JL_OPCODE_SYS_UPDATE_BT_STATUS = 0X13,
|
||||
JL_OPCODE_SYS_STOP_BT_SCAN = 0X14,
|
||||
JL_OPCODE_SYS_BT_CONNECT_SPEC = 0X15,
|
||||
JL_OPCODE_SYS_EMITTER_BT_CONNECT_STATUS = 0XD3, // 临时调整， 被遗忘的指令
|
||||
JL_OPCODE_SYS_FIND_DEVICE = 0X19,
|
||||
|
||||
JL_OPCODE_EXTRA_FLASH_OPT = 0X1A,
|
||||
|
||||
//文件传输相关命令
|
||||
JL_OPCODE_FILE_TRANSFER_START = 0X1B,
|
||||
JL_OPCODE_FILE_TRANSFER_END = 0X1C,
|
||||
JL_OPCODE_FILE_TRANSFER = 0X1D,
|
||||
JL_OPCODE_FILE_TRANSFER_CANCEL = 0X1E,
|
||||
JL_OPCODE_FILE_DELETE = 0X1F,
|
||||
JL_OPCODE_FILE_RENAME = 0X20,
|
||||
|
||||
JL_OPCODE_ACTION_PREPARE = 0X21,//APP操作预处理
|
||||
JL_OPCODE_DEVICE_FORMAT = 0X22,//设备格式化
|
||||
JL_OPCODE_ONE_FILE_DELETE = 0x23,//删除一个文件
|
||||
JL_OPCODE_ONE_FILE_TRANS_BACK = 0x24,//回传一个文件
|
||||
JL_OPCODE_ALARM_EXTRA = 0x25,
|
||||
JL_OPCODE_FILE_BLUK_TRANSFER = 0x26,//批量大文件前准备
|
||||
JL_OPCODE_DEVICE_PARM_EXTRA = 0x27,//设备操作，如文件传输、文件删除、设备格式化参数扩展
|
||||
|
||||
JL_OPCODE_SIMPLE_FILE_TRANS = 0x28,
|
||||
|
||||
JL_OPCODE_SPORTS_DATA_INFO_GET = 0xA0,
|
||||
JL_OPCODE_SPORTS_DATA_INFO_SET = 0xA1,
|
||||
JL_OPCODE_SPORTS_DATA_INFO_AUTO_UPDATE = 0xA2,
|
||||
JL_OPCODE_SENSOR_LOG_DATA_AUTO_UPDATE = 0xA3,
|
||||
JL_OPCODE_SENSOR_NFC_FUNCTION_OPT = 0xA4,
|
||||
JL_OPCODE_SPORTS_DATA_INFO_OPT = 0xA5,
|
||||
JL_OPCODE_SPORTS_DATA_SYNC = 0xA6,
|
||||
|
||||
JL_OPCODE_NOTIFY_MTU = 0xD1,
|
||||
JL_OPCODE_GET_MD5 = 0xD4,
|
||||
JL_OPCODE_LOW_LATENCY_PARAM = 0xD5,
|
||||
JL_OPTCODE_EXTRA_FLASH_INFO = 0XD6,
|
||||
|
||||
JL_OPCODE_CUSTOMER_USER = 0xFF,
|
||||
};
|
||||
/***************************************/
|
||||
/***************************************/
|
||||
|
||||
enum {
|
||||
JL_NOT_NEED_RESPOND = 0,
|
||||
JL_NEED_RESPOND,
|
||||
};
|
||||
|
||||
enum {
|
||||
JL_AUTH_NOTPASS = 0,
|
||||
JL_AUTH_PASS,
|
||||
};
|
||||
|
||||
typedef enum __JL_ERR {
|
||||
JL_ERR_NONE = 0x0,
|
||||
JL_ERR_SEND_DATA_OVER_LIMIT,
|
||||
JL_ERR_SEND_BUSY,
|
||||
JL_ERR_SEND_NOT_READY,
|
||||
JL_ERR_EXIT,
|
||||
} JL_ERR;
|
||||
|
||||
typedef enum __JL_PRO_STATUS {
|
||||
JL_PRO_STATUS_SUCCESS = 0x0,
|
||||
JL_PRO_STATUS_FAIL,
|
||||
JL_PRO_STATUS_UNKOWN_CMD,
|
||||
JL_PRO_STATUS_BUSY,
|
||||
JL_PRO_STATUS_NO_RESPONSE,
|
||||
JL_PRO_STATUS_CRC_ERR,
|
||||
JL_PRO_STATUS_ALL_DATA_CRC_ERR,
|
||||
JL_PRO_STATUS_PARAM_ERR,
|
||||
JL_PRO_STATUS_RESP_DATA_OVER_LIMIT,
|
||||
|
||||
} JL_PRO_STATUS;
|
||||
|
||||
///*< JL_CMD、JL_CMD_response、JL_DATA、JL_DATA_response packet send functions>*/
|
||||
JL_ERR JL_CMD_send(u8 OpCode, u8 *data, u16 len, u8 request_rsp);
|
||||
JL_ERR JL_CMD_response_send(u8 OpCode, u8 status, u8 sn, u8 *data, u16 len);
|
||||
JL_ERR JL_DATA_send(u8 OpCode, u8 CMD_OpCode, u8 *data, u16 len, u8 request_rsp);
|
||||
JL_ERR JL_DATA_response_send(u8 OpCode, u8 status, u8 sn, u8 CMD_OpCode, u8 *data, u16 len);
|
||||
|
||||
///*<JL_CMD、JL_CMD_response、JL_DATA、JL_DATA_response recieve>*/
|
||||
typedef struct __JL_PRO_CB {
|
||||
/*send function callback, SPP or ble*/
|
||||
void *priv;
|
||||
bool (*fw_ready)(void *priv);
|
||||
s32(*fw_send)(void *priv, void *buf, u16 len);
|
||||
/*JL_CMD、JL_CMD_response、JL_DATA、JL_DATA_response packet recieve callback*/
|
||||
void (*CMD_resp)(void *priv, u8 OpCode, u8 OpCode_SN, u8 *data, u16 len);
|
||||
void (*DATA_resp)(void *priv, u8 OpCode_SN, u8 CMD_OpCode, u8 *data, u16 len);
|
||||
void (*CMD_no_resp)(void *priv, u8 OpCode, u8 *data, u16 len);
|
||||
void (*DATA_no_resp)(void *priv, u8 CMD_OpCode, u8 *data, u16 len);
|
||||
void (*CMD_recieve_resp)(void *priv, u8 OpCode, u8 status, u8 *data, u16 len);
|
||||
void (*DATA_recieve_resp)(void *priv, u8 status, u8 CMD_OpCode, u8 *data, u16 len);
|
||||
u8(*wait_resp_timeout)(void *priv, u8 OpCode, u8 counter);
|
||||
void (*auth_pass_callback)(void *priv);
|
||||
} JL_PRO_CB;
|
||||
|
||||
|
||||
extern u32 rcsp_fw_ready(void);
|
||||
extern u32 rcsp_protocol_need_buf_size(void);
|
||||
|
||||
extern void JL_protocol_init(u8 *buf, u32 len);
|
||||
extern void JL_protocol_exit(void);
|
||||
|
||||
extern void JL_protocol_dev_switch(const JL_PRO_CB *cb);
|
||||
|
||||
extern void JL_protocol_data_recieve(void *priv, void *buf, u16 len);
|
||||
extern void JL_protocol_resume(void);
|
||||
|
||||
extern void JL_protocol_process(void);
|
||||
|
||||
extern void set_auth_pass(u8 auth_pass);
|
||||
|
||||
extern void JL_set_cur_tick(u16 tick);
|
||||
|
||||
extern bool rcsp_send_list_is_empty(void);
|
||||
|
||||
|
||||
extern void JL_send_packet_process(void);
|
||||
extern void JL_recieve_packet_parse_process(void);
|
||||
|
||||
|
||||
#endif//__JL_PROTOCOL_H__
|
||||
|
||||
|
||||
15
include_lib/btstack/third_party/rcsp/attr.h
vendored
Normal file
15
include_lib/btstack/third_party/rcsp/attr.h
vendored
Normal file
@ -0,0 +1,15 @@
|
||||
#ifndef __ATTR_H__
|
||||
#define __ATTR_H__
|
||||
#include "typedef.h"
|
||||
|
||||
typedef u32(*attr_get_func)(void *priv, u8 attr, u8 *buf, u16 buf_size, u32 offset);
|
||||
typedef void (*attr_set_func)(void *priv, u8 attr, u8 *data, u16 len);
|
||||
|
||||
u16 add_one_attr_huge(u8 *buf, u16 max_len, u8 offset, u8 type, u8 *data, u16 size);
|
||||
u8 add_one_attr(u8 *buf, u16 max_len, u8 offset, u8 type, u8 *data, u8 size);
|
||||
u8 add_one_attr_ex(u8 *buf, u16 max_len, u8 offset, u8 type, u8 *data, u8 size, u8 att_size);
|
||||
u8 add_one_attr_continue(u8 *buf, u16 max_len, u8 offset, u8 type, u8 *data, u8 size);
|
||||
u32 attr_get(void *priv, u8 *buf, u16 buf_size, const attr_get_func *func_tab, u8 attr_max, u32 mask);
|
||||
void attr_set(void *priv, u8 *data, u16 len, const attr_set_func *func_tab, u8 attr_max);
|
||||
|
||||
#endif//__ATTR_H__
|
||||
119
include_lib/driver/cpu/br28/asm/adc_api.h
Normal file
119
include_lib/driver/cpu/br28/asm/adc_api.h
Normal file
@ -0,0 +1,119 @@
|
||||
#ifndef __ADC_API_H__
|
||||
#define __ADC_API_H__
|
||||
|
||||
|
||||
//AD channel define
|
||||
#define AD_CH_PA0 (0x0)
|
||||
#define AD_CH_PA5 (0x1)
|
||||
#define AD_CH_PA6 (0x2)
|
||||
#define AD_CH_PA8 (0x3)
|
||||
#define AD_CH_PC4 (0x4)
|
||||
#define AD_CH_PC5 (0x5)
|
||||
#define AD_CH_PB1 (0x6)
|
||||
#define AD_CH_PB2 (0x7)
|
||||
#define AD_CH_PB5 (0x8)
|
||||
#define AD_CH_PB9 (0x9)
|
||||
#define AD_CH_DP (0xa)
|
||||
#define AD_CH_DM (0xb)
|
||||
#define AD_CH_PG0 (0xc)
|
||||
#define AD_CH_PG1 (0xd)
|
||||
#define AD_CH_PG5 (0xe)
|
||||
#define AD_CH_PG7 (0xf)
|
||||
|
||||
#define AD_CH_BT (0x10)
|
||||
#define AD_CH_PMU (0x11)
|
||||
#define AD_CH_AUDIO (0x12)
|
||||
#define AD_CH_LPCTM (0x13)
|
||||
#define AD_CH_X32K (0x14)
|
||||
#define AD_CH_PLL1 (0x15)
|
||||
|
||||
#define ADC_PMU_CH_VBG (0x0<<16)//MVBG/WVBG
|
||||
#define ADC_PMU_CH_VSW (0x1<<16)
|
||||
#define ADC_PMU_CH_PROGI (0x2<<16)
|
||||
#define ADC_PMU_CH_PROGF (0x3<<16)
|
||||
#define ADC_PMU_CH_VTEMP (0x4<<16)
|
||||
#define ADC_PMU_CH_VPWR (0x5<<16) //1/4vpwr
|
||||
#define ADC_PMU_CH_VBAT (0x6<<16) //1/4vbat
|
||||
// #define ADC_PMU_CH_VBAT_2 (0x7<<16)
|
||||
#define ADC_PMU_CH_VB17 (0x8<<16)
|
||||
#define ADC_PMU_CH_IOVDD2 (0x9<<16)
|
||||
#define ADC_PMU_CH_VDC15 (0xa<<16)
|
||||
#define ADC_PMU_CH_DVDD (0xb<<16)
|
||||
#define ADC_PMU_CH_RVDD (0xc<<16)
|
||||
#define ADC_PMU_CH_TWVDD (0xd<<16)
|
||||
#define ADC_PMU_CH_PVDD (0xe<<16)
|
||||
#define ADC_PMU_CH_EVDD (0xf<<16)
|
||||
|
||||
|
||||
#define AD_CH_PMU_VBG (AD_CH_PMU | ADC_PMU_CH_VBG)
|
||||
#define AD_CH_VDC15 (AD_CH_PMU | ADC_PMU_CH_VDC15)
|
||||
#define AD_CH_SYSVDD (AD_CH_PMU | ADC_PMU_CH_DVDD)
|
||||
#define AD_CH_DTEMP (AD_CH_PMU | ADC_PMU_CH_VTEMP)
|
||||
#define AD_CH_VBAT (AD_CH_PMU | ADC_PMU_CH_VBAT)
|
||||
#define AD_CH_LDO5V (AD_CH_PMU | ADC_PMU_CH_VPWR)
|
||||
#define AD_CH_WVDD (AD_CH_PMU | ADC_PMU_CH_TWVDD)
|
||||
#define AD_CH_PVDD (AD_CH_PMU | ADC_PMU_CH_PVDD)
|
||||
|
||||
|
||||
#define AD_CH_LDOREF AD_CH_PMU_VBG
|
||||
|
||||
|
||||
// #define AD_CH_BT_VBG (AD_CH_BT | (0x8<<11)) //WLA_CON0[14:11]= 0b1000
|
||||
|
||||
// #define AD_CH_LDOREF AD_CH_BT_VBG
|
||||
|
||||
// #define AD_CH_PMU_VBG (AD_CH_PMU | ADC_PMU_CH_VBG)
|
||||
// #define AD_CH_VDC13 (AD_CH_PMU | ADC_PMU_CH_VDC13)
|
||||
// #define AD_CH_SYSVDD (AD_CH_PMU | ADC_PMU_CH_SYSVDD)
|
||||
// #define AD_CH_DTEMP (AD_CH_PMU | ADC_PMU_CH_DTEMP)
|
||||
// #define AD_CH_VBAT (AD_CH_PMU | ADC_PMU_CH_VBAT)
|
||||
// #define AD_CH_LDO5V (AD_CH_PMU | ADC_PMU_CH_LDO5V)
|
||||
// #define AD_CH_WVDD (AD_CH_PMU | ADC_PMU_CH_WVDD)
|
||||
|
||||
#define AD_AUDIO_VADADC ((BIT(0))<<16)
|
||||
#define AD_AUDIO_VCM ((BIT(1))<<16)
|
||||
#define AD_AUDIO_VBGLDO ((BIT(2))<<16)
|
||||
#define AD_AUDIO_HPVDD ((BIT(3))<<16)
|
||||
#define AD_AUDIO_RN ((BIT(4))<<16)
|
||||
#define AD_AUDIO_RP ((BIT(5))<<16)
|
||||
#define AD_AUDIO_LN ((BIT(6))<<16)
|
||||
#define AD_AUDIO_LP ((BIT(7))<<16)
|
||||
#define AD_AUDIO_DACVDD ((BIT(8))<<16)
|
||||
|
||||
#define AD_CH_AUDIO_VADADC (AD_CH_AUDIO | AD_AUDIO_VADADC)
|
||||
#define AD_CH_AUDIO_VCM (AD_CH_AUDIO | AD_AUDIO_VCM)
|
||||
#define AD_CH_AUDIO_VBGLDO (AD_CH_AUDIO | AD_AUDIO_VBGLDO)
|
||||
#define AD_CH_AUDIO_HPVDD (AD_CH_AUDIO | AD_AUDIO_HPVDD)
|
||||
#define AD_CH_AUDIO_RN (AD_CH_AUDIO | AD_AUDIO_RN)
|
||||
#define AD_CH_AUDIO_RP (AD_CH_AUDIO | AD_AUDIO_RP)
|
||||
#define AD_CH_AUDIO_LN (AD_CH_AUDIO | AD_AUDIO_LN)
|
||||
#define AD_CH_AUDIO_LP (AD_CH_AUDIO | AD_AUDIO_LP)
|
||||
#define AD_CH_AUDIO_DACVDD (AD_CH_AUDIO | AD_AUDIO_DACVDD)
|
||||
|
||||
#define ADC_MAX_CH 10
|
||||
|
||||
|
||||
extern void adc_init();
|
||||
extern void adc_vbg_init();
|
||||
//p33 define
|
||||
|
||||
extern void adc_pmu_ch_select(u32 ch);
|
||||
extern void adc_pmu_detect_en(u32 ch);
|
||||
extern void adc_vdc13_save();
|
||||
extern void adc_vdc13_restore();
|
||||
|
||||
//
|
||||
u32 adc_get_value(u32 ch);
|
||||
u32 adc_add_sample_ch(u32 ch);
|
||||
u32 adc_remove_sample_ch(u32 ch);
|
||||
u32 adc_get_voltage(u32 ch);
|
||||
u32 adc_check_vbat_lowpower();
|
||||
u32 adc_set_sample_freq(u32 ch, u32 ms);
|
||||
u32 adc_sample(u32 ch);
|
||||
|
||||
int get_hpvdd_voltage(void);
|
||||
|
||||
u32 get_vdd_voltage(u32 ch);
|
||||
u32 get_vddio_voltage();
|
||||
|
||||
#endif
|
||||
1277
include_lib/driver/cpu/br28/asm/br28.h
Normal file
1277
include_lib/driver/cpu/br28/asm/br28.h
Normal file
File diff suppressed because it is too large
Load Diff
101
include_lib/driver/cpu/br28/asm/cache.h
Normal file
101
include_lib/driver/cpu/br28/asm/cache.h
Normal file
@ -0,0 +1,101 @@
|
||||
//*********************************************************************************//
|
||||
// Module name : cache.h //
|
||||
// Description : q32DSP cache control head file //
|
||||
// By Designer : zequan_liu //
|
||||
// Dat changed : //
|
||||
//*********************************************************************************//
|
||||
|
||||
#ifndef __Q32DSP_CACHE__
|
||||
#define __Q32DSP_CACHE__
|
||||
|
||||
//#include "generic/typedef.h"
|
||||
#if 0
|
||||
//------------------------------------------------------//
|
||||
// icache function
|
||||
//------------------------------------------------------//
|
||||
|
||||
void IcuEnable(void);
|
||||
void IcuDisable(void);
|
||||
void IcuInitial(void);
|
||||
|
||||
//void IcuFlushAll(void);
|
||||
void IcuFlushinvAll(void);
|
||||
//void IcuFlushRegion(int *beg, int len); // note len!=0
|
||||
void IcuFlushinvRegion(int *beg, int len); // note len!=0
|
||||
|
||||
void IcuUnlockAll(void);
|
||||
void IcuUnlockRegion(int *beg, int len); // note len!=0
|
||||
void IcuPfetchRegion(int *beg, int len); // note len!=0
|
||||
void IcuLockRegion(int *beg, int len); // note len!=0
|
||||
|
||||
void IcuReportEnable(void);
|
||||
void IcuReportDisable(void);
|
||||
void IcuReportPrintf(void);
|
||||
void IcuReportClear(void);
|
||||
|
||||
void IcuEmuEnable(void);
|
||||
void IcuEmuDisable(void);
|
||||
void IcuEmuMessage(void);
|
||||
|
||||
#define WAIT_ICACHE_IDLE do{asm volatile("csync"); \
|
||||
while(!(q32DSP_icu(core_num())->CON & BIT(31)));} while(0);
|
||||
|
||||
//------------------------------------------------------//
|
||||
// dcache function
|
||||
//------------------------------------------------------//
|
||||
void DcuEnable(void);
|
||||
void DcuDisable(void);
|
||||
void DcuInitial(void);
|
||||
|
||||
//void DcuFlushAll(void);
|
||||
void DcuFlushinvAll(void);
|
||||
//void DcuFlushRegion(int *beg, int len); // note len!=0
|
||||
void DcuFlushinvRegion(int *beg, int len); // note len!=0
|
||||
|
||||
void DcuUnlockAll(void);
|
||||
void DcuUnlockRegion(int *beg, int len); // note len!=0
|
||||
void DcuPfetchRegion(int *beg, int len); // note len!=0
|
||||
void DcuLockRegion(int *beg, int len); // note len!=0
|
||||
|
||||
void DcuReportEnable(void);
|
||||
void DcuReportDisable(void);
|
||||
void DcuReportPrintf(void);
|
||||
void DcuReportClear(void);
|
||||
|
||||
void DcuEmuEnable(void);
|
||||
void DcuEmuDisable(void);
|
||||
void DcuEmuMessage(void);
|
||||
|
||||
#define WAIT_DCACHE_IDLE do{asm volatile("csync"); while(!(JL_DCU->CON & BIT(31)));} while(0);
|
||||
#endif
|
||||
|
||||
void flush_dcache(void *ptr, int len);
|
||||
void flushinv_dcache(void *ptr, int len);
|
||||
void IcuEnable(void);
|
||||
void DcuEnable(void);
|
||||
void IcuWaitIdle(void);
|
||||
void DcuWaitIdle(void);
|
||||
void IcuDisable(void);
|
||||
void DcuDisable(void);
|
||||
void IcuFlushinvAll(void);
|
||||
void IcuUnlockAll(void);
|
||||
void IcuFlushinvRegion(int *beg, int len);
|
||||
void IcuUnlockRegion(int *beg, int len);
|
||||
void IcuLockRegion(int *beg, int len);
|
||||
void IcuPfetchRegion(int *beg, int len);
|
||||
void DcuFlushinvAll(void);
|
||||
void DcuFlushinvRegion(int *beg, int len);
|
||||
void DcuPfetchRegion(int *beg, int len);
|
||||
void IcuInitial(void);
|
||||
void DcuInitial(void);
|
||||
|
||||
#define WAIT_DCACHE_IDLE do {DcuWaitIdle();} while(0);
|
||||
#define WAIT_ICACHE_IDLE do {IcuWaitIdle();} while(0);
|
||||
//#define WAIT_DCACHE_IDLE do{asm volatile("csync"); while(!(JL_DCU->CON & BIT(31)));} while(0);
|
||||
|
||||
#endif /* #ifndef __Q32DSP_CACHE__ */
|
||||
//*********************************************************************************//
|
||||
// //
|
||||
// end of this module //
|
||||
// //
|
||||
//*********************************************************************************//
|
||||
169
include_lib/driver/cpu/br28/asm/charge.h
Normal file
169
include_lib/driver/cpu/br28/asm/charge.h
Normal file
@ -0,0 +1,169 @@
|
||||
#ifndef _CHARGE_H_
|
||||
#define _CHARGE_H_
|
||||
|
||||
#include "typedef.h"
|
||||
#include "device.h"
|
||||
|
||||
/*------充满电电压选择 4.041V-4.534V-------*/
|
||||
//低压压电池配置0~15
|
||||
#define CHARGE_FULL_V_4041 0
|
||||
#define CHARGE_FULL_V_4061 1
|
||||
#define CHARGE_FULL_V_4081 2
|
||||
#define CHARGE_FULL_V_4101 3
|
||||
#define CHARGE_FULL_V_4119 4
|
||||
#define CHARGE_FULL_V_4139 5
|
||||
#define CHARGE_FULL_V_4159 6
|
||||
#define CHARGE_FULL_V_4179 7
|
||||
#define CHARGE_FULL_V_4199 8
|
||||
#define CHARGE_FULL_V_4219 9
|
||||
#define CHARGE_FULL_V_4238 10
|
||||
#define CHARGE_FULL_V_4258 11
|
||||
#define CHARGE_FULL_V_4278 12
|
||||
#define CHARGE_FULL_V_4298 13
|
||||
#define CHARGE_FULL_V_4318 14
|
||||
#define CHARGE_FULL_V_4338 15
|
||||
//高压电池配置16~31
|
||||
#define CHARGE_FULL_V_4237 16
|
||||
#define CHARGE_FULL_V_4257 17
|
||||
#define CHARGE_FULL_V_4275 18
|
||||
#define CHARGE_FULL_V_4295 19
|
||||
#define CHARGE_FULL_V_4315 20
|
||||
#define CHARGE_FULL_V_4335 21
|
||||
#define CHARGE_FULL_V_4354 22
|
||||
#define CHARGE_FULL_V_4374 23
|
||||
#define CHARGE_FULL_V_4394 24
|
||||
#define CHARGE_FULL_V_4414 25
|
||||
#define CHARGE_FULL_V_4434 26
|
||||
#define CHARGE_FULL_V_4454 27
|
||||
#define CHARGE_FULL_V_4474 28
|
||||
#define CHARGE_FULL_V_4494 29
|
||||
#define CHARGE_FULL_V_4514 30
|
||||
#define CHARGE_FULL_V_4534 31
|
||||
#define CHARGE_FULL_V_MAX 32
|
||||
/*****************************************/
|
||||
|
||||
/*充满电电流选择 2mA-30mA*/
|
||||
#define CHARGE_FULL_mA_2 0
|
||||
#define CHARGE_FULL_mA_5 1
|
||||
#define CHARGE_FULL_mA_7 2
|
||||
#define CHARGE_FULL_mA_10 3
|
||||
#define CHARGE_FULL_mA_15 4
|
||||
#define CHARGE_FULL_mA_20 5
|
||||
#define CHARGE_FULL_mA_25 6
|
||||
#define CHARGE_FULL_mA_30 7
|
||||
|
||||
/*
|
||||
充电电流选择
|
||||
恒流：20-220mA
|
||||
*/
|
||||
#define CHARGE_mA_15 0
|
||||
#define CHARGE_mA_20 1
|
||||
#define CHARGE_mA_25 2
|
||||
#define CHARGE_mA_30 3
|
||||
#define CHARGE_mA_35 4
|
||||
#define CHARGE_mA_40 5
|
||||
#define CHARGE_mA_50 6
|
||||
#define CHARGE_mA_60 7
|
||||
#define CHARGE_mA_80 8
|
||||
#define CHARGE_mA_100 9
|
||||
#define CHARGE_mA_120 10
|
||||
#define CHARGE_mA_140 11
|
||||
#define CHARGE_mA_160 12
|
||||
#define CHARGE_mA_200 13
|
||||
#define CHARGE_mA_250 14
|
||||
#define CHARGE_mA_300 15
|
||||
#define CHARGE_mA_1P5 (BIT(4)|CHARGE_mA_15)
|
||||
#define CHARGE_mA_2 (BIT(4)|CHARGE_mA_20)
|
||||
#define CHARGE_mA_2P5 (BIT(4)|CHARGE_mA_25)
|
||||
#define CHARGE_mA_3 (BIT(4)|CHARGE_mA_30)
|
||||
#define CHARGE_mA_3P5 (BIT(4)|CHARGE_mA_35)
|
||||
#define CHARGE_mA_4 (BIT(4)|CHARGE_mA_40)
|
||||
#define CHARGE_mA_5 (BIT(4)|CHARGE_mA_50)
|
||||
#define CHARGE_mA_6 (BIT(4)|CHARGE_mA_60)
|
||||
#define CHARGE_mA_8 (BIT(4)|CHARGE_mA_80)
|
||||
#define CHARGE_mA_10 (BIT(4)|CHARGE_mA_100)
|
||||
#define CHARGE_mA_12 (BIT(4)|CHARGE_mA_120)
|
||||
#define CHARGE_mA_14 (BIT(4)|CHARGE_mA_140)
|
||||
#define CHARGE_mA_16 (BIT(4)|CHARGE_mA_160)
|
||||
|
||||
/*
|
||||
充电口下拉选择
|
||||
电阻 50k ~ 200k
|
||||
*/
|
||||
#define CHARGE_PULLDOWN_50K 0
|
||||
#define CHARGE_PULLDOWN_100K 1
|
||||
#define CHARGE_PULLDOWN_150K 2
|
||||
#define CHARGE_PULLDOWN_200K 3
|
||||
|
||||
|
||||
#define CHARGE_CCVOL_V 300 //涓流充电向恒流充电的转换点
|
||||
|
||||
#define DEVICE_EVENT_FROM_CHARGE (('C' << 24) | ('H' << 16) | ('G' << 8) | '\0')
|
||||
|
||||
struct charge_platform_data {
|
||||
u8 charge_en; //内置充电使能
|
||||
u8 charge_poweron_en; //开机充电使能
|
||||
u8 charge_full_V; //充满电电压大小
|
||||
u8 charge_full_mA; //充满电电流大小
|
||||
u8 charge_mA; //恒流充电电流大小
|
||||
u8 charge_trickle_mA; //涓流充电电流大小
|
||||
u8 ldo5v_pulldown_en; //下拉使能位
|
||||
u8 ldo5v_pulldown_lvl; //ldo5v的下拉电阻配置项,若充电舱需要更大的负载才能检测到插入时，请将该变量置为对应阻值
|
||||
u8 ldo5v_pulldown_keep; //下拉电阻在softoff时是否保持,ldo5v_pulldown_en=1时有效
|
||||
u16 ldo5v_off_filter; //ldo5v拔出过滤值，过滤时间 = (filter*2 + 20)ms,ldoin<0.6V且时间大于过滤时间才认为拔出,对于充满直接从5V掉到0V的充电仓，该值必须设置成0，对于充满由5V先掉到0V之后再升压到xV的充电仓，需要根据实际情况设置该值大小
|
||||
u16 ldo5v_on_filter; //ldo5v>vbat插入过滤值,电压的过滤时间 = (filter*2)ms
|
||||
u16 ldo5v_keep_filter; //1V<ldo5v<vbat维持电压过滤值,过滤时间= (filter*2)ms
|
||||
u16 charge_full_filter; //充满过滤值,连续检测充满信号恒为1才认为充满,过滤时间 = (filter*2)ms
|
||||
};
|
||||
|
||||
#define CHARGE_PLATFORM_DATA_BEGIN(data) \
|
||||
struct charge_platform_data data = {
|
||||
|
||||
#define CHARGE_PLATFORM_DATA_END() \
|
||||
};
|
||||
|
||||
|
||||
enum {
|
||||
CHARGE_FULL_33V = 0, //充满标记位
|
||||
TERMA_33V, //模拟测试信号
|
||||
VBGOK_33V, //模拟测试信号
|
||||
CICHARGE_33V, //涓流转恒流信号
|
||||
};
|
||||
|
||||
enum {
|
||||
CHARGE_EVENT_CHARGE_START,
|
||||
CHARGE_EVENT_CHARGE_CLOSE,
|
||||
CHARGE_EVENT_CHARGE_FULL,
|
||||
CHARGE_EVENT_LDO5V_KEEP,
|
||||
CHARGE_EVENT_LDO5V_IN,
|
||||
CHARGE_EVENT_LDO5V_OFF,
|
||||
CHARGE_EVENT_USB_CHARGE_IN,
|
||||
CHARGE_EVENT_USB_CHARGE_OFF,
|
||||
};
|
||||
|
||||
|
||||
extern void set_charge_event_flag(u8 flag);
|
||||
extern void set_charge_online_flag(u8 flag);
|
||||
extern void set_charge_event_flag(u8 flag);
|
||||
extern u8 get_charge_online_flag(void);
|
||||
extern u8 get_charge_poweron_en(void);
|
||||
extern void set_charge_poweron_en(u32 onOff);
|
||||
extern void charge_start(void);
|
||||
extern void charge_close(void);
|
||||
extern u8 get_charge_mA_config(void);
|
||||
extern void set_charge_mA(u8 charge_mA);
|
||||
extern u8 get_ldo5v_pulldown_en(void);
|
||||
extern u8 get_ldo5v_pulldown_res(void);
|
||||
extern u8 get_ldo5v_online_hw(void);
|
||||
extern u8 get_lvcmp_det(void);
|
||||
extern void charge_check_and_set_pinr(u8 mode);
|
||||
extern u16 get_charge_full_value(void);
|
||||
extern void charge_module_stop(void);
|
||||
extern void charge_module_restart(void);
|
||||
extern void ldoin_wakeup_isr(void);
|
||||
extern void charge_wakeup_isr(void);
|
||||
extern int charge_init(const struct dev_node *node, void *arg);
|
||||
extern const struct device_operations charge_dev_ops;
|
||||
extern void charge_set_ldo5v_detect_stop(u8 stop);
|
||||
|
||||
#endif //_CHARGE_H_
|
||||
74
include_lib/driver/cpu/br28/asm/chargestore.h
Normal file
74
include_lib/driver/cpu/br28/asm/chargestore.h
Normal file
@ -0,0 +1,74 @@
|
||||
#ifndef __BR28_CHARGESTORE_H__
|
||||
#define __BR28_CHARGESTORE_H__
|
||||
|
||||
enum {
|
||||
CMD_COMPLETE,
|
||||
CMD_RECVDATA,
|
||||
};
|
||||
|
||||
enum {
|
||||
MODE_RECVDATA,
|
||||
MODE_SENDDATA,
|
||||
};
|
||||
|
||||
enum {
|
||||
TYPE_NORMAL,
|
||||
TYPE_F95,
|
||||
};
|
||||
|
||||
#define LDOIN_BIND_IO IO_PORTP_00
|
||||
|
||||
struct chargestore_platform_data {
|
||||
u32 baudrate;
|
||||
u32 io_port;
|
||||
u8 uart_irq;
|
||||
void (*init)(const struct chargestore_platform_data *);
|
||||
void (*open)(u8 mode);
|
||||
void (*close)(void);
|
||||
void (*write)(u8 *, u8);
|
||||
};
|
||||
|
||||
struct chargestore_data_handler {
|
||||
int (*data_cb)(u8 *buf, u8 len);
|
||||
};
|
||||
|
||||
#define CHARGESTORE_HANDLE_REG(name, data_callback) \
|
||||
const struct chargestore_data_handler chargestore_##name \
|
||||
SEC_USED(.chargestore_callback_txt) = {data_callback};
|
||||
|
||||
extern struct chargestore_data_handler chargestore_handler_begin[];
|
||||
extern struct chargestore_data_handler chargestore_handler_end[];
|
||||
|
||||
#define list_for_each_loop_chargestore(h) \
|
||||
for (h=chargestore_handler_begin; h<chargestore_handler_end; h++)
|
||||
|
||||
|
||||
#define CHARGESTORE_PLATFORM_DATA_BEGIN(data) \
|
||||
static const struct chargestore_platform_data data = {
|
||||
|
||||
#define CHARGESTORE_PLATFORM_DATA_END() \
|
||||
.baudrate = 9600, \
|
||||
.init = chargestore_init, \
|
||||
.open = chargestore_open, \
|
||||
.close = chargestore_close, \
|
||||
.write = chargestore_write, \
|
||||
};
|
||||
|
||||
extern void chargestore_open(u8 mode);
|
||||
extern void chargestore_close(void);
|
||||
extern void chargestore_write(u8 *data, u8 len);
|
||||
extern void chargestore_init(const struct chargestore_platform_data *);
|
||||
extern void chargestore_set_update_ram(void);
|
||||
extern u8 chargestore_get_det_level(u8 chip_type);
|
||||
|
||||
//app层使用的接口
|
||||
extern void chargestore_api_close(void);
|
||||
extern int chargestore_api_write(u8 *buf, u8 len);
|
||||
extern void chargestore_api_init(const struct chargestore_platform_data *arg);
|
||||
extern void chargestore_api_wait_complete(void);
|
||||
extern void chargestore_api_set_timeout(u16 timeout);
|
||||
extern void chargestore_api_stop(void);
|
||||
extern void chargestore_api_restart(void);
|
||||
extern u8 chargestore_api_crc8(u8 *ptr, u8 len);
|
||||
|
||||
#endif
|
||||
153
include_lib/driver/cpu/br28/asm/clock.h
Normal file
153
include_lib/driver/cpu/br28/asm/clock.h
Normal file
@ -0,0 +1,153 @@
|
||||
#ifndef _CPU_CLOCK_
|
||||
#define _CPU_CLOCK_
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
#include "clock_hw.h"
|
||||
#include "asm/clock_define.h"
|
||||
|
||||
|
||||
typedef int SYS_CLOCK_INPUT;
|
||||
|
||||
typedef enum {
|
||||
SYS_ICLOCK_INPUT_BTOSC, //BTOSC 双脚(12-26M)
|
||||
SYS_ICLOCK_INPUT_RTOSCH,
|
||||
SYS_ICLOCK_INPUT_RTOSCL,
|
||||
SYS_ICLOCK_INPUT_PAT,
|
||||
} SYS_ICLOCK_INPUT;
|
||||
|
||||
typedef enum {
|
||||
ALINK_CLOCK_12M288K, //160M div 13, 48k采样率类型
|
||||
ALINK_CLOCK_11M2896K, //192M div 17, 44.1k采样率类型
|
||||
} ALINK_INPUT_CLK_TYPE;
|
||||
|
||||
typedef enum {
|
||||
TDM_CLOCK_12M288K, //160M div 13, 48k采样率类型
|
||||
TDM_CLOCK_11M2896K, //192M div 17, 44.1k采样率类型
|
||||
} TDM_INPUT_CLK_TYPE;
|
||||
|
||||
|
||||
/*
|
||||
* system enter critical and exit critical handle
|
||||
* */
|
||||
struct clock_critical_handler {
|
||||
void (*enter)();
|
||||
void (*exit)();
|
||||
};
|
||||
|
||||
#define CLOCK_CRITICAL_HANDLE_REG(name, enter, exit) \
|
||||
const struct clock_critical_handler clock_##name \
|
||||
SEC_USED(.clock_critical_txt) = {enter, exit};
|
||||
|
||||
extern struct clock_critical_handler clock_critical_handler_begin[];
|
||||
extern struct clock_critical_handler clock_critical_handler_end[];
|
||||
|
||||
#define list_for_each_loop_clock_critical(h) \
|
||||
for (h=clock_critical_handler_begin; h<clock_critical_handler_end; h++)
|
||||
|
||||
|
||||
int clk_early_init(u8 sys_in, u32 input_freq, u32 out_freq);
|
||||
|
||||
int clk_get(const char *name);
|
||||
|
||||
int clk_set(const char *name, int clk);
|
||||
|
||||
int clk_set_sys_lock(int clk, int lock_en);
|
||||
|
||||
enum CLK_OUT_SOURCE {
|
||||
LRC_CLK_OUT,
|
||||
P33_RCLK_CLK_OUT,
|
||||
RC16M_CLK_OUT,
|
||||
RTC_OSC_CLK_OUT,
|
||||
BTOSC_24M_CLK_OUT,
|
||||
BTOSC_48M_CLK_OUT,
|
||||
STD_12M_CLK_OUT,
|
||||
STD_24M_CLK_OUT,
|
||||
STD_48M_CLK_OUT,
|
||||
HSB_CLK_OUT,
|
||||
LSB_CLK_OUT,
|
||||
PLL_96M_CLK_OUT,
|
||||
XXX_CLK_OUT_0,
|
||||
XXX_CLK_OUT_1,
|
||||
XXX_CLK_OUT_2,
|
||||
XXX_CLK_OUT_3,
|
||||
};
|
||||
|
||||
enum XXX_CLK_OUT_0_1_SOURCE {
|
||||
SRC_CLK_OUT = 12,
|
||||
IMD_CLK_OUT,
|
||||
PSRAM_CLK_OUT,
|
||||
XOSC_CLK_OUT,
|
||||
};
|
||||
|
||||
enum XXX_CLK_OUT_2_3_SOURCE {
|
||||
PLL_ALNK0_CLK_OUT = 12,
|
||||
RF_CLKO75M_CLK_OUT,
|
||||
DCDC_CLK_OUT,
|
||||
DPLL_CLK_OUT,
|
||||
};
|
||||
|
||||
void clk_out(u8 gpio, enum CLK_OUT_SOURCE clk);
|
||||
|
||||
void clock_dump(void);
|
||||
|
||||
#define MHz (1000000L)
|
||||
enum sys_clk {
|
||||
SYS_24M = 24 * MHz,
|
||||
SYS_32M = 32 * MHz,
|
||||
SYS_48M = 48 * MHz,
|
||||
SYS_64M = 64 * MHz,
|
||||
SYS_76M = 76800000,
|
||||
SYS_80M = 80 * MHz,
|
||||
SYS_96M = 96 * MHz,
|
||||
SYS_120M = 120 * MHz,
|
||||
SYS_128M = 128 * MHz,
|
||||
SYS_160M = 160 * MHz,
|
||||
};
|
||||
|
||||
enum clk_mode {
|
||||
CLOCK_MODE_ADAPTIVE = 0,
|
||||
CLOCK_MODE_USR,
|
||||
};
|
||||
|
||||
//clk : SYS_48M / SYS_24M
|
||||
void sys_clk_set(enum sys_clk clk);
|
||||
|
||||
void clk_voltage_init(u8 mode, u8 sys_dvdd);
|
||||
|
||||
int xosc_hcs_trim(void);
|
||||
|
||||
void clk_set_osc_cap(u8 sel_l, u8 sel_r);
|
||||
|
||||
u32 clk_get_osc_cap();
|
||||
|
||||
void audio_link_clock_sel(ALINK_INPUT_CLK_TYPE type);
|
||||
|
||||
void tdm_clock_sel(TDM_INPUT_CLK_TYPE type);
|
||||
|
||||
/**
|
||||
* @brief clock_set_sfc_max_freq
|
||||
* 使用前需要保证所使用的flash支持4bit 100Mhz 模式
|
||||
*
|
||||
* @param dual_max_freq for cmd 3BH BBH
|
||||
* @param quad_max_freq for cmd 6BH EBH
|
||||
*/
|
||||
void clock_set_sfc_max_freq(u32 dual_max_freq, u32 quad_max_freq);
|
||||
/**
|
||||
* @brief clock_set_lowest_voltage 设置dvdd工作的最低 工作电压
|
||||
*
|
||||
* @param dvdd_lev mic 工作时候 建议 SYSVDD_VOL_SEL_105V，关闭的时候设置为 SYSVDD_VOL_SEL_084V
|
||||
*/
|
||||
void clock_set_lowest_voltage(u32 dvdd_lev);
|
||||
|
||||
|
||||
/**
|
||||
* @brief clock_set_pll_target_frequency
|
||||
*
|
||||
* @param freq *Mhz 支持192或者240
|
||||
*/
|
||||
void clock_set_pll_target_frequency(u32 freq);
|
||||
|
||||
u32 clock_get_pll_target_frequency(); //获取PLL_TARGET_FREQUENCY
|
||||
#endif
|
||||
|
||||
30
include_lib/driver/cpu/br28/asm/clock_define.h
Normal file
30
include_lib/driver/cpu/br28/asm/clock_define.h
Normal file
@ -0,0 +1,30 @@
|
||||
|
||||
|
||||
#ifndef _CPU_CLOCK_DEFINE__
|
||||
#define _CPU_CLOCK_DEFINE__
|
||||
|
||||
///原生时钟源作系统时钟源
|
||||
#define SYS_CLOCK_INPUT_RC 0
|
||||
#define SYS_CLOCK_INPUT_BT_OSC 1 //BTOSC 双脚(12-26M)
|
||||
#define SYS_CLOCK_INPUT_RTOSCH 2
|
||||
#define SYS_CLOCK_INPUT_RTOSCL 3
|
||||
#define SYS_CLOCK_INPUT_PAT 4
|
||||
|
||||
///衍生时钟源作系统时钟源
|
||||
#define SYS_CLOCK_INPUT_PLL_BT_OSC 5
|
||||
#define SYS_CLOCK_INPUT_PLL_RTOSCH 6
|
||||
#define SYS_CLOCK_INPUT_PLL_PAT 7
|
||||
#define SYS_CLOCK_INPUT_PLL_RCL 8
|
||||
|
||||
///VAD时钟源
|
||||
#define VAD_CLOCK_USE_BTOSC 0 //DVAD、ANALOG使用BTOSC
|
||||
#define VAD_CLOCK_USE_RC_AND_BTOSC 1 //DVAD使用RC、BTOSC直连ANALOG
|
||||
#define VAD_CLOCK_USE_PMU_STD12M 2 //DVAD使用BTOSC通过PMU配置的STD12M
|
||||
#define VAD_CLOCK_USE_LRC 3 //DVAD使用LRC
|
||||
|
||||
//ANC时钟源
|
||||
#define ANC_CLOCK_USE_CLOSE 0 //ANC关闭，无需保持相关时钟
|
||||
#define ANC_CLOCK_USE_BTOSC 1 //ANC使用BTOSCX2时钟
|
||||
#define ANC_CLOCK_USE_PLL 2 //ANC使用PLL时钟
|
||||
#endif
|
||||
|
||||
404
include_lib/driver/cpu/br28/asm/clock_hw.h
Normal file
404
include_lib/driver/cpu/br28/asm/clock_hw.h
Normal file
@ -0,0 +1,404 @@
|
||||
#ifndef __CLOCK_HW_H__
|
||||
#define __CLOCK_HW_H__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
#define RC_EN(x) SFR(JL_CLOCK->CLK_CON0, 0, 1, x)
|
||||
#define RCH_EN(x) SFR(JL_CLOCK->CLK_CON0, 0, 1, x)
|
||||
//for MACRO - RCH_EN
|
||||
enum {
|
||||
RCH_EN_250K = 0,
|
||||
RCH_EN_16M,
|
||||
};
|
||||
|
||||
#define OSC_CLOCK_IN(x) SFR(JL_CLOCK->CLK_CON0, 1, 3, x)
|
||||
//for MACRO - OSC_CLOCK_IN
|
||||
enum {
|
||||
OSC_CLOCK_IN_BT_OSC = 0,
|
||||
OSC_CLOCK_IN_BT_OSC_X2,
|
||||
OSC_CLOCK_IN_STD_24M,
|
||||
OSC_CLOCK_IN_RTC_OSC,
|
||||
OSC_CLOCK_IN_LRC_CLK,
|
||||
OSC_CLOCK_IN_PAT,
|
||||
};
|
||||
#define PLL_96M_SEL_END 6
|
||||
#define PLL_96M_SEL_GET() ((JL_CLOCK->CLK_CON0 >> 4) & 0xF)
|
||||
#define PLL_96M_SEL(x) SFR(JL_CLOCK->CLK_CON0, 4, 4, x)
|
||||
enum {
|
||||
PLL_96M_SEL_NULL = 0,
|
||||
|
||||
PLL_96M_SEL_7DIV2, //f5
|
||||
PLL_96M_SEL_5DIV2, //f4
|
||||
PLL_96M_SEL_4DIV2, //f3
|
||||
PLL_96M_SEL_3DIV2, //f2
|
||||
PLL_96M_SEL_1DIV1, //f1
|
||||
|
||||
|
||||
|
||||
PLL1_96M_SEL_7DIV2, //f5
|
||||
PLL1_96M_SEL_5DIV2, //f4
|
||||
PLL1_96M_SEL_4DIV2, //f3
|
||||
PLL1_96M_SEL_3DIV2, //f2
|
||||
PLL1_96M_SEL_1DIV1, //f1
|
||||
|
||||
};
|
||||
|
||||
#define PLL_48M_SEL_GET() ((JL_CLOCK->CLK_CON0 & BIT(8)) >> 8)
|
||||
#define PLL_48M_SEL(x) SFR(JL_CLOCK->CLK_CON0, 8, 1, x)
|
||||
enum {
|
||||
PLL_48M_SEL_DIV2 = 0,
|
||||
PLL_48M_SEL_DIV1,
|
||||
};
|
||||
|
||||
#define STD_48M_SEL(x) SFR(JL_CLOCK->CLK_CON0, 9, 1, x)
|
||||
#define PLL_48M_TO_STD_48M 0
|
||||
#define BTOSCX2_TO_STD_48M 1
|
||||
|
||||
#define STD_48M_SEL_GET() ((JL_CLOCK->CLK_CON0 & BIT(9)) >> 9)
|
||||
|
||||
#define STD_24M_SEL(x) SFR(JL_CLOCK->CLK_CON0, 10, 1, x)
|
||||
#define STD_48M_DIV2_TO_STD_24M 0
|
||||
#define BTOSC_TO_STD_24M 1
|
||||
|
||||
|
||||
|
||||
#define PLL_SYS_SEL(x) SFR(JL_CLOCK->CLK_CON1, 0, 4, x)
|
||||
#define PLL_SYS_SEL_GET() ((JL_CLOCK->CLK_CON1 & 0xF))
|
||||
|
||||
#define PLL_SYS_SEL_END 6
|
||||
//for MACRO - PLL_SYS_SEL
|
||||
enum {
|
||||
PLL_SYS_SEL_NULL = 0,
|
||||
PLL_SYS_SEL_7DIV2, //f5
|
||||
PLL_SYS_SEL_5DIV2, //f4
|
||||
PLL_SYS_SEL_4DIV2, //f3
|
||||
PLL_SYS_SEL_3DIV2, //f2
|
||||
PLL_SYS_SEL_1DIV1, //f1
|
||||
|
||||
|
||||
PLL1_SYS_SEL_7DIV2, //f5
|
||||
PLL1_SYS_SEL_5DIV2, //f4
|
||||
PLL1_SYS_SEL_4DIV2, //f3
|
||||
PLL1_SYS_SEL_3DIV2, //f2
|
||||
PLL1_SYS_SEL_1DIV1, //f1
|
||||
|
||||
};
|
||||
|
||||
#define PLL_SYS_DIV(x) SFR(JL_CLOCK->CLK_CON1, 4, 4, x)
|
||||
//for MACRO - PLL_SYS_DIV
|
||||
enum {
|
||||
PLL_SYS_DIV1 = 0,
|
||||
PLL_SYS_DIV3,
|
||||
PLL_SYS_DIV5,
|
||||
PLL_SYS_DIV7,
|
||||
|
||||
PLL_SYS_DIV1X2 = 4,
|
||||
PLL_SYS_DIV3X2,
|
||||
PLL_SYS_DIV5X2,
|
||||
PLL_SYS_DIV7X2,
|
||||
|
||||
PLL_SYS_DIV1X4 = 8,
|
||||
PLL_SYS_DIV3X4,
|
||||
PLL_SYS_DIV5X4,
|
||||
PLL_SYS_DIV7X4,
|
||||
|
||||
PLL_SYS_DIV1X8 = 12,
|
||||
PLL_SYS_DIV3X8,
|
||||
PLL_SYS_DIV5X8,
|
||||
PLL_SYS_DIV7X8,
|
||||
};
|
||||
#define MAIN_CLOCK_SEL(x) SFR(JL_CLOCK->CLK_CON1, 8, 3, x); \
|
||||
asm("csync")
|
||||
|
||||
//for MACRO - CLOCK_IN
|
||||
enum {
|
||||
MAIN_CLOCK_IN_RC_250K = 0,
|
||||
MAIN_CLOCK_IN_PAT,
|
||||
MAIN_CLOCK_IN_RTC_OSC,
|
||||
MAIN_CLOCK_IN_RC,
|
||||
MAIN_CLOCK_IN_BTOSC,
|
||||
MAIN_CLOCK_IN_BTOSC_X2,
|
||||
MAIN_CLOCK_IN_PLL,
|
||||
MAIN_CLOCK_IN_RTOSC_L, //keep to fix make
|
||||
};
|
||||
|
||||
|
||||
#define SFR_MODE(x) SFR(JL_CLOCK->CLK_CON1, 11, 1, x)
|
||||
enum {
|
||||
SFR_CLOCK_IDLE = 0,
|
||||
SFR_CLOCK_ALWAYS_ON,
|
||||
};
|
||||
|
||||
|
||||
#define BT_CLOCK_IN(x) SFR(JL_CLOCK->CLK_CON1, 14, 2, x)
|
||||
//for MACRO - BT_CLOCK_IN
|
||||
enum {
|
||||
BT_CLOCK_IN_PLL48M = 0,
|
||||
BT_CLOCK_IN_HSB,
|
||||
BT_CLOCK_IN_LSB,
|
||||
BT_CLOCK_IN_DISABLE,
|
||||
};
|
||||
|
||||
#define PLL_ALNK0_SEL(x) SFR(JL_CLOCK->CLK_CON2, 0, 3, x)
|
||||
#define PLL_ALNK0_DIV(x) SFR(JL_CLOCK->CLK_CON2, 3, 2, x)
|
||||
|
||||
#define PLL_ALNK_EN(x) SFR(JL_CLOCK->CLK_CON2, 6, 1, x)
|
||||
#define PLL_ALNK_SEL(x) SFR(JL_CLOCK->CLK_CON2, 7, 1, x)
|
||||
//for MACRO - PLL_ALNK_SEL
|
||||
enum {
|
||||
PLL_ALNK_192M_DIV17 = 0,
|
||||
PLL_ALNK_480M_DIV39,
|
||||
};
|
||||
|
||||
#define USB_CLOCK_IN(x) SFR(JL_CLOCK->CLK_CON2, 8, 2, x)
|
||||
//for MACRO - USB_CLOCK_IN
|
||||
enum {
|
||||
USB_CLOCK_IN_PLL48M = 0,
|
||||
USB_CLOCK_IN_OSC,
|
||||
USB_CLOCK_IN_LSB,
|
||||
USB_CLOCK_IN_DISABLE,
|
||||
};
|
||||
|
||||
#define UART_CLOCK_IN(x) SFR(JL_CLOCK->CLK_CON2, 10, 2, x)
|
||||
//for MACRO - UART_CLOCK_IN
|
||||
enum {
|
||||
UART_CLOCK_IN_PLL24M = 0,
|
||||
UART_CLOCK_IN_OSC,
|
||||
UART_CLOCK_IN_LSB,
|
||||
UART_CLOCK_IN_DISABLE,
|
||||
};
|
||||
|
||||
#define PLL_FM_SEL(x) SFR(JL_CLOCK->CLK_CON2, 12, 2, x)
|
||||
//for MACRO - PLL_APC_SEL
|
||||
enum {
|
||||
PLL_APC_SEL_PLL192M = 0,
|
||||
PLL_APC_SEL_PLL137M,
|
||||
PLL_APC_SEL_PLL107M,
|
||||
PLL_APC_SEL_DISABLE,
|
||||
};
|
||||
|
||||
#define PLL_FM_DIV(x) SFR(JL_CLOCK->CLK_CON2, 14, 4, x)
|
||||
//for MACRO - PLL_APC_DIV
|
||||
enum {
|
||||
PLL_FM_DIV1 = 0,
|
||||
PLL_FM_DIV3,
|
||||
PLL_FM_DIV5,
|
||||
PLL_FM_DIV7,
|
||||
|
||||
PLL_FM_DIV1X2 = 4,
|
||||
PLL_FM_DIV3X2,
|
||||
PLL_FM_DIV5X2,
|
||||
PLL_FM_DIV7X2,
|
||||
|
||||
PLL_FM_DIV1X4 = 8,
|
||||
PLL_FM_DIV3X4,
|
||||
PLL_FM_DIV5X4,
|
||||
PLL_FM_DIV7X4,
|
||||
|
||||
PLL_FM_DIV1X8 = 12,
|
||||
PLL_FM_DIV3X8,
|
||||
PLL_FM_DIV5X8,
|
||||
PLL_FM_DIV7X8,
|
||||
};
|
||||
#define GPCNT_CLOCK_IN(x) SFR(JL_CLOCK->CLK_CON2, 28, 4, x)
|
||||
//for MACRO - DAC_CLOCK_IN
|
||||
enum {
|
||||
GPCNT_CLOCK_IN_NULL = 0,
|
||||
GPCNT_CLOCK_IN_SRC,
|
||||
GPCNT_CLOCK_IN_ORG,
|
||||
GPCNT_CLOCK_IN_HSB,
|
||||
GPCNT_CLOCK_IN_XOSC_FSCK,
|
||||
GPCNT_CLOCK_IN_BTOSC_48M,
|
||||
GPCNT_CLOCK_IN_WL,
|
||||
GPCNT_CLOCK_IN_USB,
|
||||
GPCNT_CLOCK_IN_PMU_ANA,
|
||||
GPCNT_CLOCK_IN_VAD_VCON0,
|
||||
GPCNT_CLOCK_IN_VAD_VCOP0,
|
||||
GPCNT_CLOCK_IN_RC_16M,
|
||||
GPCNT_CLOCK_IN_P33_RC_250k,
|
||||
GPCNT_CLOCK_IN_LRC,
|
||||
GPCNT_CLOCK_IN_DPLL_OUT,
|
||||
GPCNT_CLOCK_IN_RTC_OSC,
|
||||
};
|
||||
|
||||
#define PLL_IMD_SEL_GET( ) ((JL_CLOCK->CLK_CON3 >> 8) & 0xF)
|
||||
#define PLL_IMD_SEL(x) SFR(JL_CLOCK->CLK_CON3, 8, 4, x)
|
||||
#define PLL_IMD_DIV(x) SFR(JL_CLOCK->CLK_CON3, 12, 4, x)
|
||||
|
||||
#define PLL_TDM_SEL_GET(x) ((JL_CLOCK->CLK_CON3 >> 24) & 0x7)
|
||||
#define PLL_TDM_SEL(x) SFR(JL_CLOCK->CLK_CON3, 24, 3, x)
|
||||
#define PLL_TDM_DIV(x) SFR(JL_CLOCK->CLK_CON3, 27, 2, x)
|
||||
|
||||
|
||||
#define PLL_EN(x) SFR(JL_PLL0->CON0, 0, 1, (x))
|
||||
#define PLL_REST(x) SFR(JL_PLL0->CON0, 1, 1, (x))
|
||||
#define PLL_MODE(x) SFR(JL_PLL0->CON0, 2, 1, (x))
|
||||
#define PLL_PFDS(x) SFR(JL_PLL0->CON0, 3, 2, (x))
|
||||
#define PLL_ICPS(x) SFR(JL_PLL0->CON0, 5, 3, (x))
|
||||
#define PLL_LPFR2(x) SFR(JL_PLL0->CON0, 8, 3, (x))
|
||||
#define PLL_IVCO(x) SFR(JL_PLL0->CON0, 11, 3, (x))
|
||||
#define PLL_LDO12A(x) SFR(JL_PLL0->CON0, 14, 3, (x))
|
||||
#define PLL_LDO12D(x) SFR(JL_PLL0->CON0, 17, 3, (x))
|
||||
#define PLL_LDO_BYPASS(x) SFR(JL_PLL0->CON0, 20, 1, (x))
|
||||
#define PLL_TSEL(x) SFR(JL_PLL0->CON0, 21, 2, x)
|
||||
#define PLL_TEST(x) SFR(JL_PLL0->CON0, 23, 1, x)
|
||||
#define PLL_VBG_TR(x) SFR(JL_PLL0->CON0, 27, 4, (x))
|
||||
|
||||
|
||||
|
||||
//REFDS
|
||||
#define PLL_DIVn(x) SFR(JL_PLL0->CON1, 0, 7, x)
|
||||
#define PLL_REF_SEL0(x) SFR(JL_PLL0->CON1, 7, 2, x)
|
||||
//for MACRO - PLL_RSEL0
|
||||
enum {
|
||||
PLL_RSEL_RCLK = 0, //
|
||||
PLL_RSEL_RCH,
|
||||
PLL_RSEL_DPLL_CLK,
|
||||
PLL_RSEL_PAT_CLK,
|
||||
};
|
||||
|
||||
#define PLL_REF_SEL1(x) SFR(JL_PLL0->CON1, 9, 1, x)
|
||||
//for MACRO - PLL_REF_SEL1
|
||||
enum {
|
||||
PLL_REF_SEL_BTOSC_DIFF = 0, //btosc_DIFF
|
||||
PLL_REF_SEL_RCLK,
|
||||
};
|
||||
|
||||
|
||||
#define PLL_DIVn_EN(x) SFR(JL_PLL0->CON1, 10, 2, x)
|
||||
//for MACRO - PLL_DIVn_EN
|
||||
enum {
|
||||
PLL_DIVn_EN_X2 = 0,
|
||||
PLL_DIVn_DIS_DIV1,
|
||||
PLL_DIVn_EN_DIVn,
|
||||
};
|
||||
|
||||
#define PLL_FBDS(x) SFR(JL_PLL0->CON2, 0, 12, x)
|
||||
|
||||
#define PLL_CLK_1DIV1_OE(x) SFR(JL_PLL0->CON3, 0, 1, x) //f1
|
||||
#define PLL_CLK_3DIV2_OE(x) SFR(JL_PLL0->CON3, 1, 1, x) //f2
|
||||
#define PLL_CLK_4DIV2_OE(x) SFR(JL_PLL0->CON3, 2, 1, x) //f3
|
||||
#define PLL_CLK_5DIV2_OE(x) SFR(JL_PLL0->CON3, 3, 1, x) //f4
|
||||
#define PLL_CLK_7DIV2_OE(x) SFR(JL_PLL0->CON3, 4, 1, x) //f5
|
||||
|
||||
#define PLL_CLK_EN(x) SFR(JL_PLL0->CON3, 9, 1, x)
|
||||
|
||||
|
||||
#define PLL1_EN(x) SFR(JL_PLL1->CON0, 0, 1, (x))
|
||||
#define PLL1_REST(x) SFR(JL_PLL1->CON0, 1, 1, (x))
|
||||
#define PLL1_MODE(x) SFR(JL_PLL1->CON0, 2, 1, (x))
|
||||
#define PLL1_PFDS(x) SFR(JL_PLL1->CON0, 3, 2, (x))
|
||||
#define PLL1_ICPS(x) SFR(JL_PLL1->CON0, 5, 3, (x))
|
||||
#define PLL1_LPFR2(x) SFR(JL_PLL1->CON0, 8, 3, (x))
|
||||
#define PLL1_IVCO(x) SFR(JL_PLL1->CON0, 11, 3, (x))
|
||||
#define PLL1_LDO12A(x) SFR(JL_PLL1->CON0, 14, 3, (x))
|
||||
#define PLL1_LDO12D(x) SFR(JL_PLL1->CON0, 17, 3, (x))
|
||||
#define PLL1_LDO_BYPASS(x) SFR(JL_PLL1->CON0, 20, 1, (x))
|
||||
#define PLL1_TSEL(x) SFR(JL_PLL1->CON0, 21, 2, x)
|
||||
#define PLL1_TEST(x) SFR(JL_PLL1->CON0, 23, 1, x)
|
||||
#define PLL1_VBG_TR(x) SFR(JL_PLL1->CON0, 27, 4, (x))
|
||||
|
||||
#define PLL1_DIVn(x) SFR(JL_PLL1->CON1, 0, 7, x)
|
||||
#define PLL1_REF_SEL0(x) SFR(JL_PLL1->CON1, 7, 2, x)
|
||||
#define PLL1_REF_SEL1(x) SFR(JL_PLL1->CON1, 9, 1, x)
|
||||
#define PLL1_DIVn_EN(x) SFR(JL_PLL1->CON1, 10, 2, x)
|
||||
|
||||
#define PLL1_FBDS(x) SFR(JL_PLL1->CON2, 0, 12, x)
|
||||
|
||||
#define PLL1_CLK_1DIV1_OE(x) SFR(JL_PLL1->CON3, 0, 1, x) //f1
|
||||
#define PLL1_CLK_3DIV2_OE(x) SFR(JL_PLL1->CON3, 1, 1, x) //f2
|
||||
#define PLL1_CLK_4DIV2_OE(x) SFR(JL_PLL1->CON3, 2, 1, x) //f3
|
||||
#define PLL1_CLK_5DIV2_OE(x) SFR(JL_PLL1->CON3, 3, 1, x) //f4
|
||||
#define PLL1_CLK_7DIV2_OE(x) SFR(JL_PLL1->CON3, 4, 1, x) //f5
|
||||
#define PLL1_CLK_EN(x) SFR(JL_PLL1->CON3, 9, 1, x)
|
||||
|
||||
|
||||
#define HSB_CLK_DIV(x) SFR(JL_CLOCK->SYS_DIV, 0, 8, x)
|
||||
#define LSB_CLK_DIV(x) SFR(JL_CLOCK->SYS_DIV, 8, 3, x)
|
||||
#define SFC_CLK_DIV(x) SFR(JL_CLOCK->SYS_DIV, 12, 3, x)
|
||||
|
||||
/********************************************************************************/
|
||||
#define GPCNT_EN(x) SFR(JL_GPCNT->CON, 0, 1, x)
|
||||
#define GPCNT_CSS(x) SFR(JL_GPCNT->CON, 1, 3, x)
|
||||
//for MACRO - GPCNT_CSS
|
||||
enum {
|
||||
GPCNT_CSS_LSB = 0,
|
||||
GPCNT_CSS_OSC,
|
||||
GPCNT_CSS_INPUT_CH2,
|
||||
GPCNT_CSS_INPUT_CH3,
|
||||
GPCNT_CSS_CLOCK_IN,
|
||||
GPCNT_CSS_RING,
|
||||
GPCNT_CSS_PLL,
|
||||
GPCNT_CSS_INTPUT_CH1,
|
||||
};
|
||||
|
||||
#define GPCNT_CLR_PEND(x) SFR(JL_GPCNT->CON, 6, 1, x)
|
||||
#define GPCNT_GTS(x) SFR(JL_GPCNT->CON, 8, 4, x)
|
||||
|
||||
#define GPCNT_GSS(x) SFR(JL_GPCNT->CON, 12, 3, x)
|
||||
//for MACRO - GPCNT_CSS
|
||||
enum {
|
||||
GPCNT_GSS_LSB = 0,
|
||||
GPCNT_GSS_OSC,
|
||||
GPCNT_GSS_INPUT_CH14, //iomap con1[27:24]
|
||||
GPCNT_GSS_INPUT_CH15, //iomap con1[31:28]
|
||||
GPCNT_GSS_CLOCK_IN, //CLK_CON2[31:28]
|
||||
GPCNT_GSS_RING,
|
||||
GPCNT_GSS_PLL,
|
||||
GPCNT_GSS_INPUT_CH13, //iomap con1[23:20]
|
||||
};
|
||||
|
||||
//wla_con16 xosc
|
||||
#define XOSC_BGTR_10v_4(x) ((x&0xf)<<15)
|
||||
|
||||
//wla_con8 xosc
|
||||
#define XOSC_EN_10v_1(x) ((x&0x1)<<0)
|
||||
#define XOSCLDO_PAS_10v_1(x) ((x&0x1)<<1)
|
||||
#define XOSCLDO_S_10v_3(x) ((x&0x7)<<2)
|
||||
#define XOSC_CPTEST_EN_10v_1(x) ((x&0x1)<<5)
|
||||
#define XOSC_HCS_10v_5(x) ((x&0x1f)<<6)
|
||||
#define XOSC_CLS_10v_4(x) ((x&0xf)<<11)
|
||||
#define XOSC_CRS_10v_4(x) ((x&0xf)<<15)
|
||||
#define XOSC_BT_HDS_10v_2(x) ((x&0x3)<<19)
|
||||
#define XOSC_ANATEST_EN_10v_1(x) ((x&0x1)<<21)
|
||||
#define XOSC_ANATEST_S_10v_3(x) ((x&0x7)<<22)
|
||||
#define XOSC_BT_OE_10v_1(x) ((x&0x1)<<25)
|
||||
#define XOSC_SYS1_OE_10v_1(x) ((x&0x1)<<26)
|
||||
#define XOSC_CORE48M_OE_10v_1(x) ((x&0x1)<<27)
|
||||
#define XOSC_CORE48M_S_10v_3(x) ((x&0x7)<<28)
|
||||
#define XOSC_FSCK_OE_10v_1(x) ((x&0x1)<<31)
|
||||
|
||||
//wla_con9 xosc
|
||||
#define XOSC_FTCS_10v_3(x) ((x&0x7)<<0)
|
||||
#define XOSC_FTOE_10v_1(x) ((x&0x1)<<3)
|
||||
#define XOSC_FTIS_10v_5(x) ((x&0x1f)<<4)
|
||||
#define XOSC_CORE24M_OE_10v_1(x) ((x&0x1)<<9)
|
||||
#define XOSC_CMP_MODE_10v_1(x) ((x&0x1)<<10)
|
||||
#define XOSC_FTEN_10v_1(x) ((x&0x1)<<11)
|
||||
#define XOSC_PMU_HDS_10v_2(x) ((x&0x3)<<12)
|
||||
#define XOSC_PMU_OE_10v_1(x) ((x&0x1)<<14)
|
||||
#define XOSC_SYS1_HDS_10v_2(x) ((x&0x3)<<15)
|
||||
#define XOSC_DAC_HDS_10v_2(x) ((x&0x3)<<17)
|
||||
#define XOSC_DAC_OE_10v_1(x) ((x&0x1)<<19)
|
||||
#define XOSC_LFSREN_10v_1(x) ((x&0x1)<<20)
|
||||
|
||||
//wla_con10
|
||||
//PLL
|
||||
#define XOSC_ADET_EN_10v_1(x) ((x&0x1)<<0)
|
||||
#define XOSC_ADET_S_10v_2(x) ((x&0x3)<<1)
|
||||
#define XOSC_VAD_DIVS_10v_4(x) ((x&0xf)<<3)
|
||||
#define XOSC_SYS0_HDS_10v_2(x) ((x&0x3)<<7)
|
||||
#define XOSC_SYS0_OE_10v_1(x) ((x&0x1)<<9)
|
||||
#define XOSC_VAD_HDS_10v_2(x) ((x&0x3)<<10)
|
||||
#define XOSC_VAD_OE_10v_1(x) ((x&0x1)<<12)
|
||||
|
||||
//wla_con21
|
||||
#define WLA_RD_MUX_4(x) ((x&0xf)<<0)
|
||||
|
||||
//wla_con30
|
||||
#define XOSC_ADET_GET_RESULT() ((JL_WLA->WLA_CON30 >> 4) & 1)
|
||||
|
||||
|
||||
//CORE
|
||||
#define ROM_MULTI_CYCLE(x) SFR(JL_CMNG->CON0,3,2,(x))
|
||||
#endif
|
||||
380
include_lib/driver/cpu/br28/asm/cpu.h
Normal file
380
include_lib/driver/cpu/br28/asm/cpu.h
Normal file
@ -0,0 +1,380 @@
|
||||
|
||||
#ifndef ASM_CPU_H
|
||||
#define ASM_CPU_H
|
||||
|
||||
|
||||
#include "br28.h"
|
||||
#include "csfr.h"
|
||||
#include "cache.h"
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
typedef unsigned char u8, bool, BOOL;
|
||||
typedef char s8;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int s32;
|
||||
typedef unsigned long long u64;
|
||||
typedef u32 FOURCC;
|
||||
typedef long long s64;
|
||||
typedef unsigned long long u64;
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#define ___trig __asm__ volatile ("trigger")
|
||||
|
||||
|
||||
#ifndef BIG_ENDIAN
|
||||
#define BIG_ENDIAN 0x3021
|
||||
#endif
|
||||
#ifndef LITTLE_ENDIAN
|
||||
#define LITTLE_ENDIAN 0x4576
|
||||
#endif
|
||||
#define CPU_ENDIAN LITTLE_ENDIAN
|
||||
|
||||
#ifdef BT_DUT_INTERFERE
|
||||
#define CPU_CORE_NUM 1 //dut interfere
|
||||
#else
|
||||
#define CPU_CORE_NUM 2 //sdk
|
||||
#endif
|
||||
|
||||
#define OS_CORE_AFFINITY_ENABLE 1
|
||||
|
||||
extern const int CONFIG_CPU_UNMASK_IRQ_ENABLE;
|
||||
|
||||
///屏蔽的优先级, < N的优先级不可以响应
|
||||
#define CPU_IRQ_IPMASK_LEVEL 6
|
||||
|
||||
#define CPU_TASK_CLR(a)
|
||||
#define CPU_TASK_SW(a) \
|
||||
do { \
|
||||
q32DSP(a)->ILAT_SET |= BIT(3-a); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define CPU_INT_NESTING 2
|
||||
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#if CPU_CORE_NUM > 1
|
||||
__attribute__((always_inline))
|
||||
static int current_cpu_id()
|
||||
{
|
||||
unsigned id;
|
||||
asm volatile("%0 = cnum" : "=r"(id) ::);
|
||||
return id ;
|
||||
}
|
||||
|
||||
__attribute__((always_inline))
|
||||
static int core_num(void)
|
||||
{
|
||||
u32 num;
|
||||
asm volatile("%0 = cnum" : "=r"(num) :);
|
||||
return num;
|
||||
}
|
||||
|
||||
#else
|
||||
static inline int current_cpu_id()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int core_num(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline int cpu_in_irq()
|
||||
{
|
||||
int flag;
|
||||
__asm__ volatile("%0 = icfg" : "=r"(flag));
|
||||
return flag & 0xff;
|
||||
}
|
||||
|
||||
extern int __cpu_irq_disabled(void);
|
||||
static inline int cpu_irq_disabled()
|
||||
{
|
||||
if (CONFIG_CPU_UNMASK_IRQ_ENABLE) {
|
||||
return __cpu_irq_disabled();
|
||||
} else {
|
||||
int flag;
|
||||
__asm__ volatile("%0 = icfg" : "=r"(flag));
|
||||
return ((flag & 0x300) != 0x300);
|
||||
}
|
||||
}
|
||||
|
||||
#if 0
|
||||
static inline int data_sat_s16(int ind)
|
||||
{
|
||||
if (ind > 32767) {
|
||||
ind = 32767;
|
||||
} else if (ind < -32768) {
|
||||
ind = -32768;
|
||||
}
|
||||
return ind;
|
||||
}
|
||||
|
||||
#else
|
||||
static inline int data_sat_s16(int ind)
|
||||
{
|
||||
__asm__ volatile(
|
||||
" %0 = sat16(%0)(s) \t\n"
|
||||
: "=&r"(ind)
|
||||
: "0"(ind)
|
||||
:);
|
||||
return ind;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
static inline u32 reverse_u32(u32 data32)
|
||||
{
|
||||
#if 0
|
||||
u8 *dataptr = (u8 *)(&data32);
|
||||
data32 = (((u32)dataptr[0] << 24) | ((u32)dataptr[1] << 16) | ((u32)dataptr[2] << 8) | (u32)dataptr[3]);
|
||||
#else
|
||||
__asm__ volatile("%0 = rev8(%0) \t\n" : "=&r"(data32) : "0"(data32) :);
|
||||
#endif
|
||||
return data32;
|
||||
}
|
||||
|
||||
static inline u32 reverse_u16(u16 data16)
|
||||
{
|
||||
u32 retv;
|
||||
#if 0
|
||||
u8 *dataptr = (u8 *)(&data16);
|
||||
retv = (((u32)dataptr[0] << 8) | ((u32)dataptr[1]));
|
||||
#else
|
||||
retv = ((u32)data16) << 16;
|
||||
__asm__ volatile("%0 = rev8(%0) \t\n" : "=&r"(retv) : "0"(retv) :);
|
||||
#endif
|
||||
return retv;
|
||||
}
|
||||
|
||||
static inline u32 rand32()
|
||||
{
|
||||
return JL_RAND->R64L;
|
||||
}
|
||||
|
||||
#define __asm_sine(s64, precision) \
|
||||
({ \
|
||||
u64 ret; \
|
||||
u8 sel = 0; \
|
||||
__asm__ volatile ("%0 = copex(%1) (%2)" : "=r"(ret) : "r"(s64), "i"(sel)); \
|
||||
ret = ret>>32; \
|
||||
ret;\
|
||||
})
|
||||
|
||||
void p33_soft_reset(void);
|
||||
static inline void cpu_reset(void)
|
||||
{
|
||||
// JL_CLOCK->PWR_CON |= (1 << 4);
|
||||
p33_soft_reset();
|
||||
}
|
||||
|
||||
#define __asm_csync() \
|
||||
do { \
|
||||
asm volatile("csync;"); \
|
||||
} while (0)
|
||||
|
||||
#include "asm/irq.h"
|
||||
#include "generic/printf.h"
|
||||
#include "system/generic/log.h"
|
||||
|
||||
|
||||
#define arch_atomic_read(v) \
|
||||
({ \
|
||||
__asm_csync(); \
|
||||
(*(volatile int *)&(v)->counter); \
|
||||
})
|
||||
#if 0
|
||||
extern volatile int cpu_lock_cnt[];
|
||||
extern volatile int irq_lock_cnt[];
|
||||
|
||||
|
||||
static inline void local_irq_disable()
|
||||
{
|
||||
__builtin_pi32v2_cli();
|
||||
irq_lock_cnt[current_cpu_id()]++;
|
||||
}
|
||||
|
||||
|
||||
static inline void local_irq_enable()
|
||||
{
|
||||
if (--irq_lock_cnt[current_cpu_id()] == 0) {
|
||||
__builtin_pi32v2_sti();
|
||||
}
|
||||
}
|
||||
#else
|
||||
|
||||
extern void __local_irq_disable() ;
|
||||
|
||||
extern void __local_irq_enable() ;
|
||||
|
||||
extern void local_irq_disable();
|
||||
extern void local_irq_enable();
|
||||
|
||||
#endif
|
||||
|
||||
#if(0 )
|
||||
|
||||
#define arch_spin_trylock(lock) \
|
||||
do { \
|
||||
__asm_csync(); \
|
||||
while ((lock)->rwlock); \
|
||||
(lock)->rwlock = 1; \
|
||||
}while(0)
|
||||
|
||||
#define arch_spin_lock(lock) \
|
||||
do { \
|
||||
int ret = false; \
|
||||
__asm_csync(); \
|
||||
if (!(lock)->rwlock) { \
|
||||
ret = true; \
|
||||
(lock)->rwlock = 1; \
|
||||
} \
|
||||
if (ret) \
|
||||
break; \
|
||||
}while(1)
|
||||
|
||||
#define arch_spin_unlock(lock) \
|
||||
do { \
|
||||
(lock)->rwlock = 0; \
|
||||
}while(0)
|
||||
|
||||
#else
|
||||
|
||||
|
||||
|
||||
static inline void q32DSP_testset(u8 volatile *ptr)
|
||||
{
|
||||
asm volatile(
|
||||
" 1: \n\t "
|
||||
" testset b[%0] \n\t "
|
||||
" ifeq goto 1b \n\t "
|
||||
:
|
||||
: "p"(ptr)
|
||||
: "memory"
|
||||
);
|
||||
}
|
||||
|
||||
static inline void q32DSP_testclr(u8 volatile *ptr)
|
||||
{
|
||||
asm volatile(
|
||||
" b[%0] = %1 \n\t "
|
||||
:
|
||||
: "p"(ptr), "r"(0)
|
||||
: "memory"
|
||||
);
|
||||
}
|
||||
|
||||
#define arch_spin_trylock(lock) \
|
||||
do { \
|
||||
q32DSP_testset((u8 *)(&lock->rwlock));\
|
||||
}while(0)
|
||||
|
||||
|
||||
#define arch_spin_lock(lock) arch_spin_trylock(lock)
|
||||
|
||||
#define arch_spin_unlock(lock) \
|
||||
do{ \
|
||||
q32DSP_testclr((u8 *)(&lock->rwlock)) ;\
|
||||
}while(0)
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#if 1 // CPU_CORE_NUM >1
|
||||
|
||||
extern volatile int cpu_lock_cnt[];
|
||||
extern volatile int irq_lock_cnt[];
|
||||
#if 0
|
||||
#define CPU_SR_ALLOC() \
|
||||
// int flags
|
||||
|
||||
|
||||
|
||||
|
||||
#define CPU_CRITICAL_ENTER() \
|
||||
do { extern u8 volatile cpulock;\
|
||||
local_irq_disable(); \
|
||||
if(cpu_lock_cnt[current_cpu_id()]++ == 0) \
|
||||
q32DSP_testset(&cpulock);\
|
||||
__asm_csync(); \
|
||||
}while(0)
|
||||
|
||||
// asm volatile("lockset;");
|
||||
|
||||
#define CPU_CRITICAL_EXIT() \
|
||||
do {extern u8 volatile cpulock; \
|
||||
if (--cpu_lock_cnt[current_cpu_id()] == 0) \
|
||||
q32DSP_testclr(&cpulock);\
|
||||
local_irq_enable();\
|
||||
}while(0)
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#define CPU_SR_ALLOC() \
|
||||
// int flags
|
||||
|
||||
#define CPU_CRITICAL_ENTER() \
|
||||
do { \
|
||||
local_irq_disable(); \
|
||||
}while(0)
|
||||
|
||||
|
||||
#define CPU_CRITICAL_EXIT() \
|
||||
do { \
|
||||
local_irq_enable(); \
|
||||
}while(0)
|
||||
|
||||
// asm volatile("lockclr;");
|
||||
#else
|
||||
|
||||
|
||||
#define CPU_SR_ALLOC() \
|
||||
// int flags
|
||||
|
||||
#define CPU_CRITICAL_ENTER() \
|
||||
do { \
|
||||
local_irq_disable(); \
|
||||
__asm_csync(); \
|
||||
}while(0)
|
||||
|
||||
|
||||
#define CPU_CRITICAL_EXIT() \
|
||||
do { \
|
||||
local_irq_enable(); \
|
||||
}while(0)
|
||||
|
||||
#endif
|
||||
|
||||
extern void cpu_assert_debug();
|
||||
extern const int config_asser;
|
||||
#define ASSERT(a,...) \
|
||||
do { \
|
||||
if(config_asser){\
|
||||
if(!(a)){ \
|
||||
printf("cpu %d file:%s, line:%d",current_cpu_id(), __FILE__, __LINE__); \
|
||||
printf("ASSERT-FAILD: "#a" "__VA_ARGS__); \
|
||||
cpu_assert_debug(); \
|
||||
} \
|
||||
}else {\
|
||||
if(!(a)){ \
|
||||
cpu_reset(); \
|
||||
}\
|
||||
}\
|
||||
}while(0);
|
||||
|
||||
|
||||
|
||||
#endif //__ASSEMBLY__
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
35
include_lib/driver/cpu/br28/asm/crc16.h
Normal file
35
include_lib/driver/cpu/br28/asm/crc16.h
Normal file
@ -0,0 +1,35 @@
|
||||
#ifndef __CPU_CRC16_H__
|
||||
#define __CPU_CRC16_H__
|
||||
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
|
||||
u16 CRC16(const void *ptr, u32 len);
|
||||
|
||||
/* i_val: CRC校验初值 */
|
||||
u16 CRC16_with_initval(const void *ptr, u32 len, u16 i_val);
|
||||
|
||||
u16 CRC16_with_code(const void *ptr, u32 len, u16 code);
|
||||
|
||||
void spi_crc16_set(u16 crc);
|
||||
u16 spi_crc16_get(void);
|
||||
|
||||
void CrcDecode(void *buf, u16 len);
|
||||
|
||||
u16 get_page_efuse(u32 page, u32 delay_cnt);
|
||||
void init_enc_key(u8 cmd);
|
||||
u32 get_sfc_enc_key(void);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
406
include_lib/driver/cpu/br28/asm/csfr.h
Normal file
406
include_lib/driver/cpu/br28/asm/csfr.h
Normal file
@ -0,0 +1,406 @@
|
||||
//*********************************************************************************//
|
||||
// Module name : csfr.h //
|
||||
// Description : q32DSP core sfr define //
|
||||
// By Designer : zequan_liu //
|
||||
// Dat changed : //
|
||||
//*********************************************************************************//
|
||||
|
||||
#ifndef __Q32DSP_CSFR__
|
||||
#define __Q32DSP_CSFR__
|
||||
|
||||
#define __RW volatile // read write
|
||||
#define __RO volatile const // only read
|
||||
#define __WO volatile // only write
|
||||
|
||||
#define __u8 unsigned int // u8 to u32 special for struct
|
||||
#define __u16 unsigned int // u16 to u32 special for struct
|
||||
#define __u32 unsigned int
|
||||
|
||||
#define csfr_base 0xff0000
|
||||
|
||||
//*********************************************************************************
|
||||
//
|
||||
// hcore_sfr
|
||||
//
|
||||
//*********************************************************************************
|
||||
|
||||
//............. 0x0000 - 0x00ff............
|
||||
typedef struct {
|
||||
__RW __u32 CON0;
|
||||
__RW __u32 CON1;
|
||||
__RW __u32 CON2;
|
||||
} JL_CMNG_TypeDef;
|
||||
|
||||
#define JL_CMNG_BASE (csfr_base + map_adr(0x00, 0x00))
|
||||
#define JL_CMNG ((JL_CMNG_TypeDef *)JL_CMNG_BASE)
|
||||
|
||||
//............. 0x0100 - 0x01ff............
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 KEY;
|
||||
} JL_SDTAP_TypeDef;
|
||||
|
||||
#define JL_SDTAP_BASE (csfr_base + map_adr(0x01, 0x00))
|
||||
#define JL_SDTAP ((JL_SDTAP_TypeDef *)JL_SDTAP_BASE)
|
||||
|
||||
//............. 0x0200 - 0x02ff............
|
||||
typedef struct {
|
||||
__RW __u32 WREN;
|
||||
__RW __u32 CON0;
|
||||
__RW __u32 CON1;
|
||||
__RW __u32 CON2;
|
||||
__RW __u32 CON3;
|
||||
__RW __u32 MSG0;
|
||||
__RW __u32 MSG1;
|
||||
__RW __u32 MSG2;
|
||||
__RW __u32 MSG3;
|
||||
__RO __u32 ID;
|
||||
} JL_CEMU_TypeDef;
|
||||
|
||||
#define JL_CEMU_BASE (csfr_base + map_adr(0x02, 0x00))
|
||||
#define JL_CEMU ((JL_CEMU_TypeDef *)JL_CEMU_BASE)
|
||||
|
||||
//............. 0x0300 - 0x03ff............
|
||||
#define MPU_INV (1<<31)
|
||||
#define MPU_PWEN (1<<16)
|
||||
#define MPU_PREN (1<<8)
|
||||
#define MPU_PEN (MPU_PWEN | MPU_PREN)
|
||||
#define MPU_XEN (1<<2)
|
||||
#define MPU_WEN (1<<1)
|
||||
#define MPU_REN (1<<0)
|
||||
|
||||
#define MPU_IDx_cfg(n, id) (id<<(n*8))
|
||||
#define MPU_IDx_pen(n, pr, pw) ((pr<<(9+n)) | (pw<<(17+n)))
|
||||
|
||||
typedef struct {
|
||||
__RW __u32 CON[15]; // 0-7 used in br28
|
||||
__RO __u32 REV0;
|
||||
__RW __u32 CID[15]; // 0-7 used in br28
|
||||
__RO __u32 REV1;
|
||||
__RW __u32 BEG[15]; // 0-7 used in br28
|
||||
__RO __u32 REV2;
|
||||
__RW __u32 END[15]; // 0-7 used in br28
|
||||
__RW __u32 WREN;
|
||||
} JL_MPU_TypeDef;
|
||||
|
||||
#define JL_MPU_BASE (csfr_base + map_adr(0x03, 0x00))
|
||||
#define JL_MPU ((JL_MPU_TypeDef *)JL_MPU_BASE)
|
||||
|
||||
//............. 0x0400 - 0x04ff............
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 TLB1_BEG;
|
||||
__RW __u32 TLB1_END;
|
||||
} JL_MMU_TypeDef;
|
||||
|
||||
#define JL_MMU_BASE (csfr_base + map_adr(0x04, 0x00))
|
||||
#define JL_MMU ((JL_MMU_TypeDef *)JL_MMU_BASE)
|
||||
|
||||
typedef struct {
|
||||
short page: 15;
|
||||
short vld: 1;
|
||||
} JL_MMU_TLB1_TypeDef;
|
||||
|
||||
#define JL_MMU_TLB1 ((JL_MMU_TLB1_TypeDef *)(JL_MMU->TLB1_BEG))
|
||||
|
||||
//............. 0x0500 - 0x05ff............
|
||||
//#define JL_TypeDef_L1P JL_TypeDef_q32DSP_ICU
|
||||
#define JL_TypeDef_L1P JL_TypeDef_q32DSP_DCU
|
||||
#define JL_L1P_BASE (csfr_base + map_adr(0x05, 0x00))
|
||||
#define JL_L1P ((JL_TypeDef_L1P *)JL_L1P_BASE)
|
||||
|
||||
//............. 0x0600 - 0x06ff............
|
||||
#define JL_TypeDef_L2I JL_TypeDef_q32DSP_ICU
|
||||
#define JL_L2I_BASE (csfr_base + map_adr(0x06, 0x00))
|
||||
#define JL_L2I ((JL_TypeDef_L2I *)JL_L2I_BASE)
|
||||
|
||||
//............. 0x0700 - 0x07ff............
|
||||
#define JL_TypeDef_L2D JL_TypeDef_q32DSP_DCU
|
||||
#define JL_L2D_BASE (csfr_base + map_adr(0x07, 0x00))
|
||||
#define JL_L2D ((JL_TypeDef_L2D *)JL_L2D_BASE)
|
||||
|
||||
//............. 0x0800 - 0x08ff............
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 SEL;
|
||||
__RW __u32 DP;
|
||||
__RW __u32 DAT_VLD0;
|
||||
__RW __u32 DAT_VLD1;
|
||||
__RW __u32 DAT_VLD2;
|
||||
__RW __u32 DAT_VLD3;
|
||||
__RW __u32 ROM_CRC;
|
||||
} JL_MBIST_TypeDef;
|
||||
|
||||
#define JL_MBIST_BASE (csfr_base + map_adr(0x08, 0x00))
|
||||
#define JL_MBIST ((JL_MBIST_TypeDef *)JL_MBIST_BASE)
|
||||
|
||||
//............. 0x0900 - 0x09ff............
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 CADR;
|
||||
__RW __u32 ACC0L;
|
||||
__RW __u32 ACC0H;
|
||||
__RW __u32 ACC1L;
|
||||
__RW __u32 ACC1H;
|
||||
__RW __u32 CONST;
|
||||
__RW __u32 TEST1;
|
||||
} JL_FFT_TypeDef;
|
||||
|
||||
#define JL_FFT_BASE (csfr_base + map_adr(0x09, 0x00))
|
||||
#define JL_FFT ((JL_FFT_TypeDef *)JL_FFT_BASE)
|
||||
|
||||
|
||||
//*********************************************************************************
|
||||
//
|
||||
// q32DSP_sfr
|
||||
//
|
||||
//*********************************************************************************
|
||||
|
||||
//---------------------------------------------//
|
||||
// q32DSP define
|
||||
//---------------------------------------------//
|
||||
|
||||
#define q32DSP_sfr_offset 0x000800
|
||||
#define q32DSP_sfr_base (csfr_base + 0xe000)
|
||||
|
||||
#define q32DSP_cpu_base (q32DSP_sfr_base + 0x0000)
|
||||
#define q32DSP_icu_base (q32DSP_sfr_base + 0x0400)
|
||||
#define q32DSP_dcu_base (q32DSP_sfr_base + 0x0500)
|
||||
|
||||
#define q32DSP(n) ((JL_TypeDef_q32DSP *)(q32DSP_sfr_base + q32DSP_sfr_offset*n))
|
||||
#define q32DSP_icu(n) ((JL_TypeDef_q32DSP_ICU *)(q32DSP_icu_base + q32DSP_sfr_offset*n))
|
||||
#define q32DSP_dcu(n) ((JL_TypeDef_q32DSP_DCU *)(q32DSP_dcu_base + q32DSP_sfr_offset*n))
|
||||
|
||||
//---------------------------------------------//
|
||||
// q32DSP core sfr
|
||||
//---------------------------------------------//
|
||||
|
||||
typedef struct {
|
||||
/* 00 */ __RO __u32 DR00;
|
||||
/* 01 */ __RO __u32 DR01;
|
||||
/* 02 */ __RO __u32 DR02;
|
||||
/* 03 */ __RO __u32 DR03;
|
||||
/* 04 */ __RO __u32 DR04;
|
||||
/* 05 */ __RO __u32 DR05;
|
||||
/* 06 */ __RO __u32 DR06;
|
||||
/* 07 */ __RO __u32 DR07;
|
||||
/* 08 */ __RO __u32 DR08;
|
||||
/* 09 */ __RO __u32 DR09;
|
||||
/* 0a */ __RO __u32 DR10;
|
||||
/* 0b */ __RO __u32 DR11;
|
||||
/* 0c */ __RO __u32 DR12;
|
||||
/* 0d */ __RO __u32 DR13;
|
||||
/* 0e */ __RO __u32 DR14;
|
||||
/* 0f */ __RO __u32 DR15;
|
||||
|
||||
/* 10 */ __RO __u32 RETI;
|
||||
/* 11 */ __RO __u32 RETE;
|
||||
/* 12 */ __RO __u32 RETX;
|
||||
/* 13 */ __RO __u32 RETS;
|
||||
/* 14 */ __RO __u32 SR04;
|
||||
/* 15 */ __RO __u32 PSR;
|
||||
/* 16 */ __RO __u32 CNUM;
|
||||
/* 17 */ __RO __u32 SR07;
|
||||
/* 18 */ __RO __u32 SR08;
|
||||
/* 19 */ __RO __u32 SR09;
|
||||
/* 1a */ __RO __u32 SR10;
|
||||
/* 1b */ __RO __u32 ICFG;
|
||||
/* 1c */ __RO __u32 USP;
|
||||
/* 1d */ __RO __u32 SSP;
|
||||
/* 1e */ __RO __u32 SP;
|
||||
/* 1f */ __RO __u32 PCRS;
|
||||
|
||||
/* 20 */ __RW __u32 BPCON;
|
||||
/* 21 */ __RW __u32 BSP;
|
||||
/* 22 */ __RW __u32 BP0;
|
||||
/* 23 */ __RW __u32 BP1;
|
||||
/* 24 */ __RW __u32 BP2;
|
||||
/* 25 */ __RW __u32 BP3;
|
||||
/* 26 */ __WO __u32 CMD_PAUSE;
|
||||
/* 27 */ __RW __u32 BP4;
|
||||
/* 28 */ __RW __u32 BP5;
|
||||
/* 29 */ __RW __u32 BP6;
|
||||
/* 2a */ __RW __u32 BP7;
|
||||
/* */ __RO __u32 REV2a[0x30 - 0x2a - 1];
|
||||
|
||||
/* 30 */ __RW __u32 PMU_CON0;
|
||||
/* 31 */ __RW __u32 PMU_CON1;
|
||||
/* */ __RO __u32 REV30[0x3b - 0x31 - 1];
|
||||
/* 3b */ __RW __u8 TTMR_CON;
|
||||
/* 3c */ __RW __u32 TTMR_CNT;
|
||||
/* 3d */ __RW __u32 TTMR_PRD;
|
||||
/* 3e */ __RW __u32 BANK_CON;
|
||||
/* 3f */ __RW __u32 BANK_NUM;
|
||||
|
||||
/* 40 */ __RW __u32 ICFG00;
|
||||
/* 41 */ __RW __u32 ICFG01;
|
||||
/* 42 */ __RW __u32 ICFG02;
|
||||
/* 43 */ __RW __u32 ICFG03;
|
||||
/* 44 */ __RW __u32 ICFG04;
|
||||
/* 45 */ __RW __u32 ICFG05;
|
||||
/* 46 */ __RW __u32 ICFG06;
|
||||
/* 47 */ __RW __u32 ICFG07;
|
||||
/* 48 */ __RW __u32 ICFG08;
|
||||
/* 49 */ __RW __u32 ICFG09;
|
||||
/* 4a */ __RW __u32 ICFG10;
|
||||
/* 4b */ __RW __u32 ICFG11;
|
||||
/* 4c */ __RW __u32 ICFG12;
|
||||
/* 4d */ __RW __u32 ICFG13;
|
||||
/* 4e */ __RW __u32 ICFG14;
|
||||
/* 4f */ __RW __u32 ICFG15;
|
||||
|
||||
/* 50 */ __RW __u32 ICFG16;
|
||||
/* 51 */ __RW __u32 ICFG17;
|
||||
/* 52 */ __RW __u32 ICFG18;
|
||||
/* 53 */ __RW __u32 ICFG19;
|
||||
/* 54 */ __RW __u32 ICFG20;
|
||||
/* 55 */ __RW __u32 ICFG21;
|
||||
/* 56 */ __RW __u32 ICFG22;
|
||||
/* 57 */ __RW __u32 ICFG23;
|
||||
/* 58 */ __RW __u32 ICFG24;
|
||||
/* 59 */ __RW __u32 ICFG25;
|
||||
/* 5a */ __RW __u32 ICFG26;
|
||||
/* 5b */ __RW __u32 ICFG27;
|
||||
/* 5c */ __RW __u32 ICFG28;
|
||||
/* 5d */ __RW __u32 ICFG29;
|
||||
/* 5e */ __RW __u32 ICFG30;
|
||||
/* 5f */ __RW __u32 ICFG31;
|
||||
|
||||
/* 60 */ __RO __u32 IPND0;
|
||||
/* 61 */ __RO __u32 IPND1;
|
||||
/* 62 */ __RO __u32 IPND2;
|
||||
/* 63 */ __RO __u32 IPND3;
|
||||
/* 64 */ __RO __u32 IPND4;
|
||||
/* 65 */ __RO __u32 IPND5;
|
||||
/* 66 */ __RO __u32 IPND6;
|
||||
/* 67 */ __RO __u32 IPND7;
|
||||
/* 68 */ __WO __u32 ILAT_SET;
|
||||
/* 69 */ __WO __u32 ILAT_CLR;
|
||||
/* 6a */ __RW __u32 IPMASK;
|
||||
/* 6b */ __RW __u32 GIEMASK;
|
||||
/* 6c */ __RW __u32 IWKUP_NUM;
|
||||
/* */ __RO __u32 REV6a[0x70 - 0x6c - 1];
|
||||
|
||||
/* 70 */ __RW __u32 ETM_CON;
|
||||
/* 71 */ __RO __u32 ETM_PC0;
|
||||
/* 72 */ __RO __u32 ETM_PC1;
|
||||
/* 73 */ __RO __u32 ETM_PC2;
|
||||
/* 74 */ __RO __u32 ETM_PC3;
|
||||
/* 75 */ __RW __u32 WP0_ADRH;
|
||||
/* 76 */ __RW __u32 WP0_ADRL;
|
||||
/* 77 */ __RW __u32 WP0_DATH;
|
||||
/* 78 */ __RW __u32 WP0_DATL;
|
||||
/* 79 */ __RW __u32 WP0_PC;
|
||||
/* */ __RO __u32 REV79[0x80 - 0x79 - 1];
|
||||
|
||||
/* 80 */ __RW __u32 EMU_CON;
|
||||
/* 81 */ __RW __u32 EMU_MSG;
|
||||
/* 82 */ __RW __u32 EMU_SSP_H;
|
||||
/* 83 */ __RW __u32 EMU_SSP_L;
|
||||
/* 84 */ __RW __u32 EMU_USP_H;
|
||||
/* 85 */ __RW __u32 EMU_USP_L;
|
||||
/* 86 */ __RW __u32 LIM_PC0_H;
|
||||
/* 87 */ __RW __u32 LIM_PC0_L;
|
||||
/* 88 */ __RW __u32 LIM_PC1_H;
|
||||
/* 89 */ __RW __u32 LIM_PC1_L;
|
||||
/* 8a */ __RW __u32 LIM_PC2_H;
|
||||
/* 8b */ __RW __u32 LIM_PC2_L;
|
||||
/* */ __RO __u32 REV8b[0x90 - 0x8b - 1];
|
||||
|
||||
/* 90 */ __RW __u32 ESU_CON;
|
||||
/* 91 */ __RO __u32 CNT_CHIT;
|
||||
/* 92 */ __RO __u32 CNT_CMIS;
|
||||
/* 93 */ __RO __u32 CNT_FILL;
|
||||
/* 94 */ __RO __u32 CNT_IHIT;
|
||||
/* 95 */ __RO __u32 CNT_IMIS;
|
||||
/* 96 */ __RO __u32 CNT_RHIT;
|
||||
/* 97 */ __RO __u32 CNT_RMIS;
|
||||
/* 98 */ __RO __u32 CNT_WHIT;
|
||||
/* 99 */ __RO __u32 CNT_WMIS;
|
||||
} JL_TypeDef_q32DSP;
|
||||
|
||||
//---------------------------------------------//
|
||||
// q32DSP icache sfr
|
||||
//---------------------------------------------//
|
||||
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 EMU_CON;
|
||||
__RW __u32 EMU_MSG;
|
||||
__RW __u32 EMU_ID;
|
||||
__RW __u32 CMD_CON;
|
||||
__RW __u32 CMD_BEG;
|
||||
__RW __u32 CMD_END;
|
||||
__RW __u32 CNT_RACK;
|
||||
__RW __u32 CNT_RNAK;
|
||||
__RW __u32 MBIST_CON;
|
||||
} JL_TypeDef_q32DSP_ICU;
|
||||
|
||||
//---------------------------------------------//
|
||||
// q32DSP dcache sfr
|
||||
//---------------------------------------------//
|
||||
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 EMU_CON;
|
||||
__RW __u32 EMU_MSG;
|
||||
__RW __u32 EMU_ID;
|
||||
__RW __u32 CNT_WACK;
|
||||
__RW __u32 CNT_WNAK;
|
||||
__RW __u32 CNT_RACK;
|
||||
__RW __u32 CNT_RNAK;
|
||||
__RW __u32 MBIST_CON;
|
||||
__RO __u32 REV0[0x10 - 0x8 - 1];
|
||||
__RW __u32 CMD_CON[4];
|
||||
__RW __u32 CMD_BEG[4];
|
||||
__RW __u32 CMD_END[4];
|
||||
__RO __u32 REV1[0x20 - 0x1b - 1];
|
||||
__WO __u32 CMO[32];
|
||||
} JL_TypeDef_q32DSP_DCU;
|
||||
|
||||
typedef struct _CPU_REGS {
|
||||
unsigned int reti;
|
||||
unsigned int rets;
|
||||
unsigned int psr;
|
||||
unsigned int r0;
|
||||
unsigned int r1;
|
||||
unsigned int r2;
|
||||
unsigned int r3;
|
||||
unsigned int r4;
|
||||
unsigned int r5;
|
||||
unsigned int r6;
|
||||
unsigned int r7;
|
||||
unsigned int r8;
|
||||
unsigned int r9;
|
||||
unsigned int r10;
|
||||
unsigned int r11;
|
||||
unsigned int r12;
|
||||
unsigned int r13;
|
||||
unsigned int r14;
|
||||
unsigned int r15;
|
||||
} CPU_REGS;
|
||||
|
||||
|
||||
#define TICK_CON (q32DSP(0)->TTMR_CON)
|
||||
#define TICK_PRD (q32DSP(0)->TTMR_PRD)
|
||||
#define TICK_CNT (q32DSP(0)->TTMR_CNT)
|
||||
|
||||
#define SOFT_CLEAR_PENDING (q32DSP(0)->ILAT_CLR)
|
||||
|
||||
#define CPU_MSG (q32DSP(0)->EMU_MSG)
|
||||
#define CPU_CON (q32DSP(0)->EMU_CON)
|
||||
|
||||
#undef __RW
|
||||
#undef __RO
|
||||
#undef __WO
|
||||
|
||||
#undef __u8
|
||||
#undef __u16
|
||||
#undef __u32
|
||||
|
||||
//*********************************************************************************//
|
||||
// //
|
||||
// end of this module //
|
||||
// //
|
||||
//*********************************************************************************//
|
||||
#endif
|
||||
45
include_lib/driver/cpu/br28/asm/ctmu.h
Normal file
45
include_lib/driver/cpu/br28/asm/ctmu.h
Normal file
@ -0,0 +1,45 @@
|
||||
#ifndef _CTMU_DRV_H_
|
||||
#define _CTMU_DRV_H_
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
#define CTMU_KEY_CH_MAX 3
|
||||
|
||||
typedef struct _CTMU_KEY_VAR {
|
||||
s32 touch_release_buf[CTMU_KEY_CH_MAX]; //按键释放值滤波器buffer
|
||||
u16 touch_cnt_buf[CTMU_KEY_CH_MAX]; //按键计数值滤波器buffer
|
||||
s16 FLT1CFG1; //滤波器1配置参数1
|
||||
s16 FLT1CFG2; //滤波器1配置参数2, 等于(-RELEASECFG0)<<FLT1CFG0
|
||||
s16 PRESSCFG; //按下判决门限
|
||||
s16 RELEASECFG0; //释放判决门限0
|
||||
s16 RELEASECFG1; //释放判决门限1
|
||||
s8 FLT0CFG; //滤波器0配置参数(0/1/2/3)
|
||||
s8 FLT1CFG0; //滤波器1配置参数0
|
||||
u16 touch_key_state; //按键状态标志，随时可能被中断改写，按键处理程序需要将此标志复制出来再行处理
|
||||
u8 touch_init_cnt[CTMU_KEY_CH_MAX]; //初始化计数器，非0时进行初始化
|
||||
} sCTMU_KEY_VAR;
|
||||
|
||||
|
||||
struct ctmu_key_port {
|
||||
u8 port; //触摸按键IO
|
||||
u8 key_value; //按键返回值
|
||||
};
|
||||
|
||||
struct ctmu_touch_key_platform_data {
|
||||
u8 num; //触摸按键个数
|
||||
s16 press_cfg; //按下判决门限
|
||||
s16 release_cfg0; //释放判决门限0
|
||||
s16 release_cfg1; //释放判决门限1
|
||||
const struct ctmu_key_port *port_list;
|
||||
};
|
||||
|
||||
/* =========== ctmu API ============= */
|
||||
//ctmu 初始化
|
||||
int ctmu_init(void *_data);
|
||||
|
||||
//获取plcnt按键状态
|
||||
u8 get_ctmu_value(void);
|
||||
|
||||
|
||||
#endif /* #ifndef _CTMU_DRV_H_ */
|
||||
|
||||
87
include_lib/driver/cpu/br28/asm/debug.h
Normal file
87
include_lib/driver/cpu/br28/asm/debug.h
Normal file
@ -0,0 +1,87 @@
|
||||
#ifndef __DEBUG_H__
|
||||
#define __DEBUG_H__
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief 异常检测模块初始化
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void debug_init();
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief 异常分析函数
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void exception_analyze();
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief 根据设备名获取设备ID
|
||||
*
|
||||
* @param name: 设备名称, 如:"DBG_SPI0"
|
||||
*
|
||||
* @return: 设备ID
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
u32 get_dev_id(char *name);
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief Memory权限保护设置
|
||||
*
|
||||
* @param idx: 保护框索引, 范围: 0 ~ 7, 目前系统默认使用0和3, 用户可用1, 2, 4, 5, 6, 7
|
||||
* @param begin: Memory开始地址
|
||||
* @param end: Memory结束地址
|
||||
* @param inv: 0: 保护框内, 1: 保护框外
|
||||
* @param format: "Cxwr0rw1rw2rw3rw", CPU:外设0:外设1:外设2:外设3,
|
||||
* @param ...: 外设ID号索引, 如: DBG_EQ, 见debug.h
|
||||
|
||||
* @example1: 设置内存保护框1, 保护地址为0x200 ~ 0x400 - 1, 令该地址只可以FFT和EQ设备访问:
|
||||
mpu_set(1, 0x200, 0x400 - 1, 0, "0rw1rw", get_dev_id("DBG_FFT"), get_dev_id("DBG_EQ"));
|
||||
* @example2: 设置内存保护框2, 保护地址为0x200 ~ 0x400 - 1, 令该地址只可以cpu读写和EQ设备访问:
|
||||
mpu_set(2, 0x200, 0x400 - 1, 0, "Crw0rw", get_dev_id("DBG_EQ"));
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void mpu_set(int idx, u32 begin, u32 end, u32 inv, const char *format, ...);
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief 取消指定框的mpu保护
|
||||
*
|
||||
* @param idx: 保护框索引号
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void mpu_disable_by_index(u8 idx);
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief :取消所有保护框mpu保护
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void mpu_diasble(void);
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief flash PC范围设置为Flash外区域, 调用该接口后调用flash里的函数将触发异常
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void flash_pc_limit_disable();
|
||||
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
/**
|
||||
* @brief flash PC范围限制恢复为flash代码区域, 调用该接口后可调用flash里的函数
|
||||
*/
|
||||
/* ---------------------------------------------------------------------------- */
|
||||
void flash_pc_limit_enable();
|
||||
|
||||
|
||||
#endif /* #ifndef __DEBUG_H__ */
|
||||
|
||||
|
||||
33
include_lib/driver/cpu/br28/asm/efuse.h
Normal file
33
include_lib/driver/cpu/br28/asm/efuse.h
Normal file
@ -0,0 +1,33 @@
|
||||
#ifndef __EFUSE_H__
|
||||
#define __EFUSE_H__
|
||||
|
||||
|
||||
void efuse_init();
|
||||
u16 get_chip_id();
|
||||
u16 get_vbat_trim();
|
||||
u16 get_vbat_trim_435();
|
||||
u16 get_vbg_trim();
|
||||
u8 get_sysdvdd_trim();
|
||||
u32 get_chip_version();
|
||||
/* struct lrc_config_t { */
|
||||
/* u16 lrc_ws_inc; //from uboot */
|
||||
/* u16 lrc_ws_init; //from uboot */
|
||||
/* u16 btosc_ws_inc; //from uboot */
|
||||
/* u16 btosc_ws_init; //from uboot */
|
||||
/* u8 lrc_change_mode; //from uboot */
|
||||
/* }; */
|
||||
u16 get_lrc_ws_inc(); //from uboot
|
||||
u16 get_lrc_ws_init(); //from uboot
|
||||
u16 get_btosc_ws_inc(); //from uboot
|
||||
u16 get_btosc_ws_init(); //from uboot
|
||||
u8 get_lrc_change_mode(); //from uboot
|
||||
u8 get_wvdd_level_trim();
|
||||
|
||||
u32 get_boot_flag();
|
||||
void set_boot_flag(u32 flag);
|
||||
|
||||
u8 get_btvbg_xosc_trim();
|
||||
|
||||
u8 get_vad_vbg_trim();
|
||||
|
||||
#endif /*EFUSE_H*/
|
||||
825
include_lib/driver/cpu/br28/asm/gpio.h
Normal file
825
include_lib/driver/cpu/br28/asm/gpio.h
Normal file
@ -0,0 +1,825 @@
|
||||
/**
|
||||
* @file gpio.h
|
||||
* @brief
|
||||
* @author @zh-jieli.com
|
||||
* @version 1.0.0
|
||||
* @date 2018-10-11
|
||||
*/
|
||||
|
||||
#ifndef __GPIO_H__
|
||||
#define __GPIO_H__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
#define IO_GROUP_NUM 16
|
||||
|
||||
|
||||
#define IO_PORTA_00 (IO_GROUP_NUM * 0 + 0)
|
||||
#define IO_PORTA_01 (IO_GROUP_NUM * 0 + 1)
|
||||
#define IO_PORTA_02 (IO_GROUP_NUM * 0 + 2)
|
||||
#define IO_PORTA_03 (IO_GROUP_NUM * 0 + 3)
|
||||
#define IO_PORTA_04 (IO_GROUP_NUM * 0 + 4)
|
||||
#define IO_PORTA_05 (IO_GROUP_NUM * 0 + 5)
|
||||
#define IO_PORTA_06 (IO_GROUP_NUM * 0 + 6)
|
||||
#define IO_PORTA_07 (IO_GROUP_NUM * 0 + 7)
|
||||
#define IO_PORTA_08 (IO_GROUP_NUM * 0 + 8)
|
||||
#define IO_PORTA_09 (IO_GROUP_NUM * 0 + 9)
|
||||
#define IO_PORTA_10 (IO_GROUP_NUM * 0 + 10)
|
||||
#define IO_PORTA_11 (IO_GROUP_NUM * 0 + 11)
|
||||
#define IO_PORTA_12 (IO_GROUP_NUM * 0 + 12)
|
||||
#define IO_PORTA_13 (IO_GROUP_NUM * 0 + 13)
|
||||
#define IO_PORTA_14 (IO_GROUP_NUM * 0 + 14)
|
||||
#define IO_PORTA_15 (IO_GROUP_NUM * 0 + 15)
|
||||
|
||||
#define IO_PORTB_00 (IO_GROUP_NUM * 1 + 0)
|
||||
#define IO_PORTB_01 (IO_GROUP_NUM * 1 + 1)
|
||||
#define IO_PORTB_02 (IO_GROUP_NUM * 1 + 2)
|
||||
#define IO_PORTB_03 (IO_GROUP_NUM * 1 + 3)
|
||||
#define IO_PORTB_04 (IO_GROUP_NUM * 1 + 4)
|
||||
#define IO_PORTB_05 (IO_GROUP_NUM * 1 + 5)
|
||||
#define IO_PORTB_06 (IO_GROUP_NUM * 1 + 6)
|
||||
#define IO_PORTB_07 (IO_GROUP_NUM * 1 + 7)
|
||||
#define IO_PORTB_08 (IO_GROUP_NUM * 1 + 8)
|
||||
#define IO_PORTB_09 (IO_GROUP_NUM * 1 + 9)
|
||||
#define IO_PORTB_10 (IO_GROUP_NUM * 1 + 10)
|
||||
#define IO_PORTB_11 (IO_GROUP_NUM * 1 + 11)
|
||||
|
||||
#define IO_PORTC_00 (IO_GROUP_NUM * 2 + 0)
|
||||
#define IO_PORTC_01 (IO_GROUP_NUM * 2 + 1)
|
||||
#define IO_PORTC_02 (IO_GROUP_NUM * 2 + 2)
|
||||
#define IO_PORTC_03 (IO_GROUP_NUM * 2 + 3)
|
||||
#define IO_PORTC_04 (IO_GROUP_NUM * 2 + 4)
|
||||
#define IO_PORTC_05 (IO_GROUP_NUM * 2 + 5)
|
||||
#define IO_PORTC_06 (IO_GROUP_NUM * 2 + 6)
|
||||
#define IO_PORTC_07 (IO_GROUP_NUM * 2 + 7)
|
||||
#define IO_PORTC_08 (IO_GROUP_NUM * 2 + 8)
|
||||
|
||||
#define IO_PORTD_00 (IO_GROUP_NUM * 3 + 0)
|
||||
#define IO_PORTD_01 (IO_GROUP_NUM * 3 + 1)
|
||||
#define IO_PORTD_02 (IO_GROUP_NUM * 3 + 2)
|
||||
#define IO_PORTD_03 (IO_GROUP_NUM * 3 + 3)
|
||||
#define IO_PORTD_04 (IO_GROUP_NUM * 3 + 4)
|
||||
#define IO_PORTD_05 (IO_GROUP_NUM * 3 + 5)
|
||||
#define IO_PORTD_06 (IO_GROUP_NUM * 3 + 6)
|
||||
|
||||
#define IO_PORTE_00 (IO_GROUP_NUM * 4 + 0)
|
||||
#define IO_PORTE_01 (IO_GROUP_NUM * 4 + 1)
|
||||
#define IO_PORTE_02 (IO_GROUP_NUM * 4 + 2)
|
||||
#define IO_PORTE_03 (IO_GROUP_NUM * 4 + 3)
|
||||
#define IO_PORTE_04 (IO_GROUP_NUM * 4 + 4)
|
||||
#define IO_PORTE_05 (IO_GROUP_NUM * 4 + 5)
|
||||
#define IO_PORTE_06 (IO_GROUP_NUM * 4 + 6)
|
||||
|
||||
#define IO_PORTG_00 (IO_GROUP_NUM * 5 + 0)
|
||||
#define IO_PORTG_01 (IO_GROUP_NUM * 5 + 1)
|
||||
#define IO_PORTG_02 (IO_GROUP_NUM * 5 + 2)
|
||||
#define IO_PORTG_03 (IO_GROUP_NUM * 5 + 3)
|
||||
#define IO_PORTG_04 (IO_GROUP_NUM * 5 + 4)
|
||||
#define IO_PORTG_05 (IO_GROUP_NUM * 5 + 5)
|
||||
#define IO_PORTG_06 (IO_GROUP_NUM * 5 + 6)
|
||||
#define IO_PORTG_07 (IO_GROUP_NUM * 5 + 7)
|
||||
#define IO_PORTG_08 (IO_GROUP_NUM * 5 + 8)
|
||||
|
||||
#define IO_PORTP_00 (IO_GROUP_NUM * 6 + 0)
|
||||
|
||||
#define IO_MAX_NUM (IO_PORTP_00 + 1)
|
||||
|
||||
#define IO_PORT_PR_00 (IO_MAX_NUM + 0)
|
||||
#define IO_PORT_PR_01 (IO_MAX_NUM + 1)
|
||||
#define IO_PORT_PR_02 (IO_MAX_NUM + 2)
|
||||
#define IO_PORT_PR_03 (IO_MAX_NUM + 3)
|
||||
#define IO_PORT_PR_04 (IO_MAX_NUM + 4)
|
||||
|
||||
#define USB_IO_OFFSET 5
|
||||
#define IO_PORT_DP (IO_MAX_NUM + USB_IO_OFFSET)
|
||||
#define IO_PORT_DM (IO_MAX_NUM + USB_IO_OFFSET + 1)
|
||||
|
||||
#define P33_IO_OFFSET 7
|
||||
#define IO_CHGFL_DET (IO_MAX_NUM + P33_IO_OFFSET + 0)
|
||||
#define IO_VBGOK_DET (IO_MAX_NUM + P33_IO_OFFSET + 1)
|
||||
#define IO_VBTCH_DET (IO_MAX_NUM + P33_IO_OFFSET + 2)
|
||||
#define IO_LDOIN_DET (IO_MAX_NUM + P33_IO_OFFSET + 3)
|
||||
|
||||
#define IO_PORT_MAX (IO_PORT_DM + 1)
|
||||
|
||||
#define GPIOA (IO_GROUP_NUM * 0)
|
||||
#define GPIOB (IO_GROUP_NUM * 1)
|
||||
#define GPIOC (IO_GROUP_NUM * 2)
|
||||
#define GPIOD (IO_GROUP_NUM * 3)
|
||||
#define GPIOE (IO_GROUP_NUM * 4)
|
||||
#define GPIOG (IO_GROUP_NUM * 5)
|
||||
#define GPIOP (IO_GROUP_NUM * 6)
|
||||
#define GPIOR (IO_MAX_NUM)
|
||||
#define GPIOUSB (IO_MAX_NUM + USB_IO_OFFSET)
|
||||
#define GPIOP33 (IO_MAX_NUM + P33_IO_OFFSET)
|
||||
|
||||
enum {
|
||||
INPUT_CH0,
|
||||
INPUT_CH1,
|
||||
INPUT_CH2,
|
||||
INPUT_CH3,
|
||||
};
|
||||
|
||||
enum {
|
||||
LOW_POWER_FREE = 0,
|
||||
LOW_POWER_KEEP = 1,
|
||||
};
|
||||
enum gpio_op_mode {
|
||||
GPIO_SET = 1,
|
||||
GPIO_AND,
|
||||
GPIO_OR,
|
||||
GPIO_XOR,
|
||||
};
|
||||
enum gpio_direction {
|
||||
GPIO_OUT = 0,
|
||||
GPIO_IN = 1,
|
||||
};
|
||||
struct gpio_reg {
|
||||
volatile unsigned int out;
|
||||
volatile unsigned int in;
|
||||
volatile unsigned int dir;
|
||||
volatile unsigned int die;
|
||||
volatile unsigned int pu;
|
||||
volatile unsigned int pd;
|
||||
volatile unsigned int hd0;
|
||||
volatile unsigned int hd;
|
||||
volatile unsigned int dieh;
|
||||
};
|
||||
|
||||
struct gpio_platform_data {
|
||||
unsigned int gpio;
|
||||
};
|
||||
|
||||
#define GPIO_PLATFORM_DATA_BEGIN(data) \
|
||||
static const struct gpio_platform_data data = { \
|
||||
|
||||
|
||||
#define GPIO_PLATFORM_DATA_END() \
|
||||
};
|
||||
#if 0
|
||||
#define IO_DEBUG_0(i,x) {JL_PORT##i->DIR &= ~BIT(x), JL_PORT##i->OUT &= ~BIT(x);}
|
||||
#define IO_DEBUG_1(i,x) {JL_PORT##i->DIR &= ~BIT(x), JL_PORT##i->OUT |= BIT(x);}
|
||||
#define IO_DEBUG_TOGGLE(i,x) {JL_PORT##i->DIR &= ~BIT(x), JL_PORT##i->OUT ^= BIT(x);}
|
||||
|
||||
|
||||
#else
|
||||
#define IO_DEBUG_0(i,x) {}
|
||||
#define IO_DEBUG_1(i,x) {}
|
||||
#define IO_DEBUG_TOGGLE(i,x) {}
|
||||
|
||||
#endif
|
||||
/**
|
||||
* @brief usb_iomode
|
||||
*
|
||||
* @param enable 1，使能；0，关闭
|
||||
*/
|
||||
void usb_iomode(u32 enable);
|
||||
/**
|
||||
* @brief gpio_direction_input
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
* @param dir 1，输入；0，输出
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
int gpio_set_direction(u32 gpio, u32 dir);
|
||||
|
||||
|
||||
/**
|
||||
* @brief gpio_direction_input
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
* @param value 1，输出1, 0，输出0
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
int gpio_set_output_value(u32 gpio, u32 dir);
|
||||
|
||||
/**
|
||||
* @brief gpio_dir
|
||||
*
|
||||
* @param gpio [GPIOA GPIOB GPIOC GPIOD GPIOR GPIOUSB]
|
||||
* @param start [0-15]，GPIOR[0-3]，GPIOUSB[0-1]
|
||||
* @param len [0-15]，GPIOR[0-3]，GPIOUSB[0-1]
|
||||
* @param dat 1，输入；0，输出
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_dir(u32 gpio, u32 start, u32 len, u32 dat, enum gpio_op_mode op);
|
||||
|
||||
/**
|
||||
* @brief gpio_direction_output
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
* @param value 1，输出1；0，输出0
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
int gpio_direction_output(u32 gpio, int value);
|
||||
|
||||
/**
|
||||
* @brief gpio_out
|
||||
*
|
||||
* @param gpio [GPIOA GPIOB GPIOC GPIOD GPIOR GPIOUSB]
|
||||
* @param start [0-15]，GPIOR[0-3]，GPIOUSB[0-1]
|
||||
* @param len [0-15]，GPIOR[0-3]，GPIOUSB[0-1]
|
||||
* @param dat 1，输入；0，输出
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_out(u32 gpio, u32 start, u32 len, u32 dat);
|
||||
|
||||
/**
|
||||
* @brief gpio_set_pull_up
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
* @param value 1，上拉；0，不上拉
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
int gpio_set_pull_up(u32 gpio, int value);
|
||||
|
||||
|
||||
/**
|
||||
* @brief gpio_set_pu
|
||||
*
|
||||
* @param gpio [GPIOA GPIOB GPIOC GPIOD GPIOR GPIOUSB]
|
||||
* @param start [0-15]，GPIOR[0-3]，GPIOUSB[0-1]
|
||||
* @param len [0-15]，GPIOR[0-3]，GPIOUSB[0-1]
|
||||
* @param dat 1，上拉；0，不上拉
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_set_pu(u32 gpio, u32 start, u32 len, u32 dat, enum gpio_op_mode op);
|
||||
|
||||
/**
|
||||
* @brief gpio_set_pull_down
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
* @param value 1，下拉；0，不下拉
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
int gpio_set_pull_down(u32 gpio, int value);
|
||||
|
||||
/**
|
||||
* @brief gpio_set_pd
|
||||
*
|
||||
* @param gpio [GPIOA GPIOB GPIOC GPIOD GPIOR GPIOUSB]
|
||||
* @param start [0-15]，GPIOR[0-3]，GPIOUSB[0-1]
|
||||
* @param len [0-15]，GPIOR[0-3]，GPIOUSB[0-1]
|
||||
* @param dat 1，下拉；0，不下拉
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_set_pd(u32 gpio, u32 start, u32 len, u32 dat, enum gpio_op_mode op);
|
||||
|
||||
/**
|
||||
* @brief gpio_set_hd0
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
* @param value 1，增强输出；0，不增强输出
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_set_hd0(u32 gpio, u32 value);
|
||||
|
||||
/**
|
||||
* @brief gpio_set_hd
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
* @param value 1，增强输出；0，不增强输出
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
int gpio_set_hd(u32 gpio, int value);
|
||||
|
||||
/**
|
||||
* @brief gpio_set_die
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
* @param value 1，IO普通输入；0，IO模拟输入
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
int gpio_set_die(u32 gpio, int value);
|
||||
|
||||
/**
|
||||
* @brief gpio_set_dieh
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
* @param value 1，IO普通输入；0，IO模拟输入
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_set_dieh(u32 gpio, u32 value);
|
||||
|
||||
/**
|
||||
* @brief gpio_die
|
||||
*
|
||||
* @param gpio [GPIOA GPIOB GPIOC GPIOD GPIOR GPIOUSB]
|
||||
* @param start [0-15]，GPIOR[0-3]，GPIOUSB[0-1]
|
||||
* @param len [0-15]，GPIOR[0-3]，GPIOUSB[0-1]
|
||||
* @param dat 1，IO普通输入；0，IO模拟输入
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_die(u32 gpio, u32 start, u32 len, u32 dat, enum gpio_op_mode op);
|
||||
|
||||
/**
|
||||
* @brief gpio_dieh
|
||||
*
|
||||
* @param gpio [GPIOA GPIOB GPIOC GPIOD GPIOR GPIOUSB]
|
||||
* @param start [0-15]，GPIOR[0-3]，GPIOUSB[0-1]
|
||||
* @param len [0-15]，GPIOR[0-3]，GPIOUSB[0-1]
|
||||
* @param dat 1，IO普通输入；0，IO模拟输入
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_dieh(u32 gpio, u32 start, u32 len, u32 dat, enum gpio_op_mode op);
|
||||
|
||||
/**
|
||||
* @brief gpio_set_output_channle
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
* @param clk 参考枚举CHx_UTx_TX，如CH0_UT0_TX
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_output_channle(u32 gpio, u32 clk);
|
||||
|
||||
/**
|
||||
* @brief gpio_read
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
int gpio_read(u32 gpio);
|
||||
|
||||
/**
|
||||
* @brief gpio_in
|
||||
*
|
||||
* @param gpio [GPIOA GPIOB GPIOC GPIOD GPIOR GPIOUSB]
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_in(u32 gpio);
|
||||
/**
|
||||
* @brief gpio_write
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
* @param value 1，输出1；0，输出0
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_write(u32 gpio, u32 value);
|
||||
|
||||
/**
|
||||
* @brief gpio_wakeup0 use IN_CHNL0_SEL
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_wakeup0(u32 gpio);
|
||||
|
||||
/**
|
||||
* @brief gpio_irflt_in use IN_CHNL1_SEL
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_irflt_in(u32 gpio);
|
||||
|
||||
/**
|
||||
* @brief gpio_cap_mux use IN_CHNL2_SEL
|
||||
*
|
||||
* @param gpio 参考宏IO_PORTx_xx，如IO_PORTA_00
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_cap_mux(u32 gpio);
|
||||
|
||||
|
||||
/**
|
||||
* @brief gpio_uart_rx_input
|
||||
*
|
||||
* @param gpio
|
||||
* @param ut
|
||||
* @param ch
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_uart_rx_input(u32 gpio, u32 ut, u32 ch);
|
||||
|
||||
/**
|
||||
* @brief
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_close_uart0(void);
|
||||
|
||||
/**
|
||||
* @brief
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_close_uart1(void);
|
||||
|
||||
/**
|
||||
* @brief
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_close_uart2(void);
|
||||
|
||||
/**
|
||||
* @brief gpio_set_uart0
|
||||
*
|
||||
* @param ch 0:3 选择对应IO br22
|
||||
* |ch|tx|rx|
|
||||
* |- |- |- |
|
||||
* |0|PA5_TX|PA6_RX|
|
||||
* |1|PB7_TX|PB8_RX|
|
||||
* |2|PA7_TX|PA8_RX|
|
||||
* |3|预留|预留|
|
||||
* |-1|关闭对应的IO口串口功能|no|
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_set_uart0(u32 ch);
|
||||
/**
|
||||
* @brief gpio_set_uart1
|
||||
*
|
||||
* @param ch 0:3 选择对应IO br22
|
||||
* |ch|tx|rx|
|
||||
* |- |- |- |
|
||||
* |0|PB5_TX|PB6_RX|
|
||||
* |1|预留|预留|
|
||||
* |2|PA1_TX|PA2_RX|
|
||||
* |3|USBDP |USBDM |
|
||||
* |-1|关闭对应的IO口串口功能|no|
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_set_uart1(u32 ch);
|
||||
/**
|
||||
* @brief gpio_set_uart2
|
||||
*
|
||||
* @param ch 0:3 选择对应IO br22
|
||||
* |ch|tx|rx|
|
||||
* |- |- |- |
|
||||
* |0|PA3_TX|PA4_RX|
|
||||
* |1|预留|预留|
|
||||
* |2|预留|预留|
|
||||
* |3|PA9_TX|PA10_RX|
|
||||
* |-1|关闭对应的IO口串口功能|no|
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_set_uart2(u32 ch);
|
||||
|
||||
enum {
|
||||
IRFLT_LSB,
|
||||
IRFLT_RC,
|
||||
IRFLT_OSC,
|
||||
IRFLT_PLL48M,
|
||||
};
|
||||
enum {
|
||||
IRFLT_DIV1,
|
||||
IRFLT_DIV2,
|
||||
IRFLT_DIV4,
|
||||
IRFLT_DIV8,
|
||||
IRFLT_DIV16,
|
||||
IRFLT_DIV32,
|
||||
IRFLT_DIV64,
|
||||
IRFLT_DIV128,
|
||||
IRFLT_DIV256,
|
||||
IRFLT_DIV512,
|
||||
IRFLT_DIV1024,
|
||||
IRFLT_DIV2048,
|
||||
IRFLT_DIV4096,
|
||||
IRFLT_DIV8192,
|
||||
IRFLT_DIV16384,
|
||||
IRFLT_DIV32768,
|
||||
};
|
||||
/* u32 irflt_config(u32 osc, u32 div); */
|
||||
|
||||
/**
|
||||
* @brief gpio_irflt_to_timer
|
||||
*
|
||||
* @param t: [0-3]
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 gpio_irflt_to_timer(u32 t);
|
||||
|
||||
|
||||
u32 get_gpio(const char *p);
|
||||
|
||||
|
||||
//===================================================//
|
||||
// BR30 Crossbar API
|
||||
//===================================================//
|
||||
enum PFI_TABLE {
|
||||
PFI_GP_ICH0 = ((u32)(&(JL_IMAP->FI_GP_ICH0))),
|
||||
PFI_GP_ICH1 = ((u32)(&(JL_IMAP->FI_GP_ICH1))),
|
||||
PFI_GP_ICH2 = ((u32)(&(JL_IMAP->FI_GP_ICH2))),
|
||||
PFI_GP_ICH3 = ((u32)(&(JL_IMAP->FI_GP_ICH3))),
|
||||
PFI_GP_ICH4 = ((u32)(&(JL_IMAP->FI_GP_ICH4))),
|
||||
PFI_GP_ICH5 = ((u32)(&(JL_IMAP->FI_GP_ICH5))),
|
||||
PFI_GP_ICH6 = ((u32)(&(JL_IMAP->FI_GP_ICH6))),
|
||||
PFI_GP_ICH7 = ((u32)(&(JL_IMAP->FI_GP_ICH7))),
|
||||
PFI_GP_ICH8 = ((u32)(&(JL_IMAP->FI_GP_ICH8))),
|
||||
PFI_GP_ICH9 = ((u32)(&(JL_IMAP->FI_GP_ICH9))),
|
||||
PFI_GP_ICH10 = ((u32)(&(JL_IMAP->FI_GP_ICH10))),
|
||||
PFI_GP_ICH11 = ((u32)(&(JL_IMAP->FI_GP_ICH11))),
|
||||
PFI_GP_ICH12 = ((u32)(&(JL_IMAP->FI_GP_ICH12))),
|
||||
PFI_GP_ICH13 = ((u32)(&(JL_IMAP->FI_GP_ICH13))),
|
||||
PFI_SPI0_CLK = ((u32)(&(JL_IMAP->FI_SPI0_CLK))),
|
||||
PFI_SPI0_DA0 = ((u32)(&(JL_IMAP->FI_SPI0_DA0))),
|
||||
PFI_SPI0_DA1 = ((u32)(&(JL_IMAP->FI_SPI0_DA1))),
|
||||
PFI_SPI0_DA2 = ((u32)(&(JL_IMAP->FI_SPI0_DA2))),
|
||||
PFI_SPI0_DA3 = ((u32)(&(JL_IMAP->FI_SPI0_DA3))),
|
||||
PFI_SPI1_CLK = ((u32)(&(JL_IMAP->FI_SPI1_CLK))),
|
||||
PFI_SPI1_DA0 = ((u32)(&(JL_IMAP->FI_SPI1_DA0))),
|
||||
PFI_SPI1_DA1 = ((u32)(&(JL_IMAP->FI_SPI1_DA1))),
|
||||
PFI_SPI1_DA2 = ((u32)(&(JL_IMAP->FI_SPI1_DA2))),
|
||||
PFI_SPI1_DA3 = ((u32)(&(JL_IMAP->FI_SPI1_DA3))),
|
||||
PFI_SPI2_CLK = ((u32)(&(JL_IMAP->FI_SPI2_CLK))),
|
||||
PFI_SPI2_DA0 = ((u32)(&(JL_IMAP->FI_SPI2_DA0))),
|
||||
PFI_SPI2_DA1 = ((u32)(&(JL_IMAP->FI_SPI2_DA1))),
|
||||
PFI_SPI2_DA2 = ((u32)(&(JL_IMAP->FI_SPI2_DA2))),
|
||||
PFI_SPI2_DA3 = ((u32)(&(JL_IMAP->FI_SPI2_DA3))),
|
||||
PFI_SD0_CMD = ((u32)(&(JL_IMAP->FI_SD0_CMD))),
|
||||
PFI_SD0_DA0 = ((u32)(&(JL_IMAP->FI_SD0_DA0))),
|
||||
PFI_SD0_DA1 = ((u32)(&(JL_IMAP->FI_SD0_DA1))),
|
||||
PFI_SD0_DA2 = ((u32)(&(JL_IMAP->FI_SD0_DA2))),
|
||||
PFI_SD0_DA3 = ((u32)(&(JL_IMAP->FI_SD0_DA3))),
|
||||
PFI_IIC_SCL = ((u32)(&(JL_IMAP->FI_IIC_SCL))),
|
||||
PFI_IIC_SDA = ((u32)(&(JL_IMAP->FI_IIC_SDA))),
|
||||
PFI_UART0_RX = ((u32)(&(JL_IMAP->FI_UART0_RX))),
|
||||
PFI_UART1_RX = ((u32)(&(JL_IMAP->FI_UART1_RX))),
|
||||
PFI_UART1_CTS = ((u32)(&(JL_IMAP->FI_UART1_CTS))),
|
||||
PFI_UART2_RX = ((u32)(&(JL_IMAP->FI_UART2_RX))),
|
||||
PFI_TDM_S_WCK = ((u32)(&(JL_IMAP->FI_TDM_S_WCK))),
|
||||
PFI_TDM_S_BCK = ((u32)(&(JL_IMAP->FI_TDM_S_BCK))),
|
||||
PFI_TDM_M_DA = ((u32)(&(JL_IMAP->FI_TDM_M_DA))),
|
||||
PFI_RDEC0_DAT0 = ((u32)(&(JL_IMAP->FI_RDEC0_DAT0))),
|
||||
PFI_RDEC0_DAT1 = ((u32)(&(JL_IMAP->FI_RDEC0_DAT1))),
|
||||
PFI_RDEC1_DAT0 = ((u32)(&(JL_IMAP->FI_RDEC1_DAT0))),
|
||||
PFI_RDEC1_DAT1 = ((u32)(&(JL_IMAP->FI_RDEC1_DAT1))),
|
||||
PFI_RDEC2_DAT0 = ((u32)(&(JL_IMAP->FI_RDEC2_DAT0))),
|
||||
PFI_RDEC2_DAT1 = ((u32)(&(JL_IMAP->FI_RDEC2_DAT1))),
|
||||
PFI_ALNK0_MCLK = ((u32)(&(JL_IMAP->FI_ALNK0_MCLK))),
|
||||
PFI_ALNK0_LRCK = ((u32)(&(JL_IMAP->FI_ALNK0_LRCK))),
|
||||
PFI_ALNK0_SCLK = ((u32)(&(JL_IMAP->FI_ALNK0_SCLK))),
|
||||
PFI_ALNK0_DAT0 = ((u32)(&(JL_IMAP->FI_ALNK0_DAT0))),
|
||||
PFI_ALNK0_DAT1 = ((u32)(&(JL_IMAP->FI_ALNK0_DAT1))),
|
||||
PFI_ALNK0_DAT2 = ((u32)(&(JL_IMAP->FI_ALNK0_DAT2))),
|
||||
PFI_ALNK0_DAT3 = ((u32)(&(JL_IMAP->FI_ALNK0_DAT3))),
|
||||
PFI_PLNK_DAT0 = ((u32)(&(JL_IMAP->FI_PLNK_DAT0))),
|
||||
PFI_PLNK_DAT1 = ((u32)(&(JL_IMAP->FI_PLNK_DAT1))),
|
||||
PFI_CHAIN_IN0 = ((u32)(&(JL_IMAP->FI_CHAIN_IN0))),
|
||||
PFI_CHAIN_IN1 = ((u32)(&(JL_IMAP->FI_CHAIN_IN1))),
|
||||
PFI_CHAIN_IN2 = ((u32)(&(JL_IMAP->FI_CHAIN_IN2))),
|
||||
PFI_CHAIN_IN3 = ((u32)(&(JL_IMAP->FI_CHAIN_IN3))),
|
||||
PFI_CHAIN_RST = ((u32)(&(JL_IMAP->FI_CHAIN_RST))),
|
||||
PFI_TOTAl = ((u32)(&(JL_IMAP->FI_TOTAL))),
|
||||
};
|
||||
|
||||
enum OUTPUT_CH_SIGNAL {
|
||||
OUTPUT_CH_SIGNAL_MC_PWM0_H = 0,
|
||||
OUTPUT_CH_SIGNAL_MC_PWM0_L,
|
||||
OUTPUT_CH_SIGNAL_MC_PWM1_H,
|
||||
OUTPUT_CH_SIGNAL_MC_PWM1_L,
|
||||
OUTPUT_CH_SIGNAL_MC_PWM2_H,
|
||||
OUTPUT_CH_SIGNAL_MC_PWM2_L,
|
||||
OUTPUT_CH_SIGNAL_MC_PWM3_H,
|
||||
OUTPUT_CH_SIGNAL_MC_PWM3_L,
|
||||
OUTPUT_CH_SIGNAL_TIMER0_PWM,
|
||||
OUTPUT_CH_SIGNAL_TIMER1_PWM,
|
||||
OUTPUT_CH_SIGNAL_TIMER2_PWM,
|
||||
OUTPUT_CH_SIGNAL_TIMER3_PWM,
|
||||
OUTPUT_CH_SIGNAL_TIMER4_PWM,
|
||||
OUTPUT_CH_SIGNAL_TIMER5_PWM,
|
||||
OUTPUT_CH_SIGNAL_CLOCK_OUT0,
|
||||
OUTPUT_CH_SIGNAL_CLOCK_OUT1,
|
||||
OUTPUT_CH_SIGNAL_CLOCK_OUT2,
|
||||
OUTPUT_CH_SIGNAL_CLOCK_OUT3,
|
||||
};
|
||||
|
||||
enum INPUT_CH_TYPE {
|
||||
INPUT_CH_TYPE_GP_ICH = 0,
|
||||
INPUT_CH_TYPE_TIME0_PWM = 14,
|
||||
INPUT_CH_TYPE_TIME1_PWM,
|
||||
};
|
||||
|
||||
enum INPUT_CH_SIGNAL {
|
||||
//ICH_CON0
|
||||
INPUT_CH_SIGNAL_TIMER0_CIN = 0,
|
||||
INPUT_CH_SIGNAL_TIMER0_CAPTURE,
|
||||
INPUT_CH_SIGNAL_TIMER1_CIN,
|
||||
INPUT_CH_SIGNAL_TIMER1_CAPTURE,
|
||||
INPUT_CH_SIGNAL_TIMER2_CIN,
|
||||
INPUT_CH_SIGNAL_TIMER2_CAPTURE,
|
||||
INPUT_CH_SIGNAL_TIMER3_CIN,
|
||||
INPUT_CH_SIGNAL_TIMER3_CAPTURE,
|
||||
|
||||
//ICH_CON1
|
||||
INPUT_CH_SIGNAL_TIMER4_CIN,
|
||||
INPUT_CH_SIGNAL_TIMER4_CAPTURE,
|
||||
INPUT_CH_SIGNAL_TIMER5_CIN,
|
||||
INPUT_CH_SIGNAL_TIMER5_CAPTURE,
|
||||
INPUT_CH_SIGNAL_WAKEUP,
|
||||
INPUT_CH_SIGNAL_IRFLT,
|
||||
INPUT_CH_SIGNAL_CAP,
|
||||
INPUT_CH_SIGNAL_CLK_PIN,
|
||||
|
||||
//ICH_CON2
|
||||
INPUT_CH_SIGNAL_WLC_EXT_ACT,
|
||||
INPUT_CH_SIGNAL_LCD_TE,
|
||||
INPUT_CH_SIGNAL_MC_CKPIN0,
|
||||
INPUT_CH_SIGNAL_MC_CKPIN1,
|
||||
INPUT_CH_SIGNAL_MC_CKPIN2,
|
||||
INPUT_CH_SIGNAL_MC_CKPIN3,
|
||||
INPUT_CH_SIGNAL_MC_FPIN0,
|
||||
INPUT_CH_SIGNAL_MC_FPIN1,
|
||||
|
||||
//ICH_CON3
|
||||
INPUT_CH_SIGNAL_MC_FPIN2,
|
||||
INPUT_CH_SIGNAL_MC_FPIN3,
|
||||
INPUT_CH_SIGNAL_RESERVE0,
|
||||
INPUT_CH_SIGNAL_RESERVE1,
|
||||
INPUT_CH_SIGNAL_RESERVE2,
|
||||
INPUT_CH_SIGNAL_RESERVE3,
|
||||
INPUT_CH_SIGNAL_RESERVE4,
|
||||
INPUT_CH_SIGNAL_RESERVE5,
|
||||
};
|
||||
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: CrossBar 获取某IO的输出映射寄存器
|
||||
//@input:
|
||||
// gpio: 需要输出外设信号的IO口; 如IO_PORTA_00
|
||||
//@return:
|
||||
// 输出映射寄存器地址; 如&(JL_OMAP->PA0_OUT)
|
||||
//=================================================================================//
|
||||
u32 *gpio2crossbar_outreg(u32 gpio);
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: CrossBar 获取某IO的输入映射序号
|
||||
//@input:
|
||||
// gpio: 需要输出外设信号的IO口; 如IO_PORTA_00
|
||||
//@return:
|
||||
// 输出映射序号; 如PA0_IN
|
||||
//=================================================================================//
|
||||
u32 gpio2crossbar_inport(u32 gpio);
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: CrossBar 输出设置 API, 将指定IO口设置为某个外设的输出
|
||||
//@input:
|
||||
// gpio: 需要输出外设信号的IO口;
|
||||
// fun_index: 需要输出到指定IO口的外设信号, 可以输出外设信号列表请查看io_omap.h文件;
|
||||
// dir_ctl: IO口方向由外设控制使能, 常设为1;
|
||||
// data_ctl: IO口电平状态由外设控制使能, 常设为1;
|
||||
// low_power_mode: 低功耗状态是否保持io功能;
|
||||
//@return:
|
||||
// 1)0: 执行正确;
|
||||
// 2)-EINVAL: 传参出错;
|
||||
//@note: 所映射的IO需要在设置IO状态为输出配置;
|
||||
//@example: 将UART0的Tx信号输出到IO_PORTA_05口:
|
||||
// gpio_direction_output(IO_PORTA_05, 1); //设置IO为输出状态
|
||||
// gpio_set_fun_output_port(IO_PORTA_05, FO_UART0_TX, 1, 1); //将UART0的Tx信号输出到IO_PORTA_05口
|
||||
//=================================================================================//
|
||||
int gpio_set_fun_output_port(u32 gpio, u32 fun_index, u8 dir_ctl, u8 data_ctl, u8 low_power_mode);
|
||||
|
||||
u32 gpio_get_ompap_low_power_mode(u32 offset);
|
||||
//=================================================================================//
|
||||
//@brief: CrossBar 输出设置 API, 将指定IO释放外设控制, 变为普通IO;
|
||||
//@input:
|
||||
// gpio: 需要释放外设控制IO口, 释放后变为普通IO模式;
|
||||
//@return:
|
||||
// 1)0: 执行正确;
|
||||
// 2)-EINVAL: 传参出错;
|
||||
//@note:
|
||||
//@example: 将IO_PORTA_05口被某一外设控制状态释放:
|
||||
// gpio_disable_fun_output_port(IO_PORTA_05);
|
||||
//=================================================================================//
|
||||
int gpio_disable_fun_output_port(u32 gpio);
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: CrossBar 输入设置 API, 将某个外设的输入设置为从某个IO输入
|
||||
//@input:
|
||||
// gpio: 需要输入外设信号的IO口;
|
||||
// pfun: 需要从指定IO输入的外设信号, 可以输入的外设信号列表请查看gpio.h文件enum PFI_TABLE枚举项;
|
||||
// low_power_mode: 低功耗状态是否保持io功能;
|
||||
//@return:
|
||||
// 1)0: 执行正确;
|
||||
// 2)-EINVAL: 传参出错;
|
||||
//@note: 所映射的IO需要在设置IO状态为输入配置;
|
||||
//@example: 将UART0的Rx信号设置为IO_PORTA_05口输入:
|
||||
// gpio_set_die(IO_PORTA_05, 1); //数字输入使能
|
||||
// gpio_set_pull_up(IO_PORTA_05, 1); //上拉输入使能
|
||||
// gpio_direction_input(IO_PORTA_05); //设置IO为输入状态
|
||||
// gpio_set_fun_input_port(IO_PORTA_05, PFI_UART0_RX); //将UART0的Rx信号设置为IO_PORTA_05口输入
|
||||
//=================================================================================//
|
||||
int gpio_set_fun_input_port(u32 gpio, enum PFI_TABLE pfun, u32 low_power_mode);
|
||||
u32 gpio_get_impap_low_power_mode(u32 offset);
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: CrossBar 输入设置 API, 将某个外设信号释放IO口控制, 变为普通IO;
|
||||
//@input:
|
||||
// pfun: 需要释放由某个IO口输入的外设信号, 外设信号列表请查看gpio.h文件enum PFI_TABLE枚举项;
|
||||
//@return: 默认为0, 无出错处理;
|
||||
//@note:
|
||||
//@example: 将外设信号PFI_UART0_RX释放由某个IO输入:
|
||||
// gpio_disable_fun_input_port(PFI_UART0_RX);
|
||||
//=================================================================================//
|
||||
int gpio_disable_fun_input_port(enum PFI_TABLE pfun);
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: Output Channel输出设置 API, 将指定IO口设置为某个外设的输出
|
||||
//@input:
|
||||
// gpio: 需要输出外设信号的IO口;
|
||||
// signal: 将enum OUTPUT_CH_SIGNAL列表中需要输出到指定IO口的外设信号, 可以输出的外设信号列表请查看gpio.h文件的enum OUTPUT_CH_SIGNAL枚举项;
|
||||
//@return: 默认为0, 出错内部触发ASSERT;
|
||||
//@note: 所映射的IO需要在设置IO状态为输出配置;
|
||||
//@example: 将OUTPUT_CH_SIGNAL_MC_PWM0_H的Tx信号输出到IO_PORTA_05口:
|
||||
// gpio_direction_output(IO_PORTA_05, 1); //设置IO为输出状态
|
||||
// gpio_och_sel_output_signal(IO_PORTA_05, OUTPUT_CH_SIGNAL_MC_PWM0_H); //将OUTPUT_CH_SIGNAL_MC_PWM0_H信号输出到IO_PORTA_05口
|
||||
//=================================================================================//
|
||||
int gpio_och_sel_output_signal(u32 gpio, enum OUTPUT_CH_SIGNAL signal);
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: Output Channel 输出设置 API, 将指定IO释放外设控制, 变为普通IO;
|
||||
//@input:
|
||||
// gpio: 需要释放外设控制IO口, 释放后变为普通IO模式;
|
||||
// signal: 将enum OUTPUT_CH_SIGNAL列表中需要取消输出的外设信号, 外设信号列表请查看gpio.h文件的enum OUTPUT_CH_SIGNAL枚举项;;
|
||||
//@return: 默认为0, 无出错处理;
|
||||
//@note:
|
||||
//@example: 将OUTPUT_CH_SIGNAL_MC_PWM0_H取消输出IO_PORTA_05:
|
||||
// gpio_och_disable_output_signal(IO_PORTA_05, OUTPUT_CH_SIGNAL_MC_PWM0_H);
|
||||
//=================================================================================//
|
||||
int gpio_och_disable_output_signal(u32 gpio, enum OUTPUT_CH_SIGNAL signal);
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: Input Channel 输入设置 API, 将某个外设的输入设置为从某个IO输入
|
||||
//@input:
|
||||
// gpio: 需要输入外设信号的IO口;
|
||||
// signal: 需要从指定IO输入的外设信号, 可以输入的外设信号列表请查看gpio.h文件enum INPUT_CH_SIGNAL枚举项;
|
||||
// type: INPUT_CH 类型, 常设为INPUT_CH_TYPE_GP_ICH;
|
||||
//@return: 默认为0, 出错内部触发ASSERT;
|
||||
//@note: 所映射的IO需要在设置IO状态为输入配置;
|
||||
//@example: 将INPUT_CH_SIGNAL_TIMER0_CIN信号设置为IO_PORTA_05口输入:
|
||||
// gpio_set_die(IO_PORTA_05, 1); //数字输入使能
|
||||
// gpio_set_pull_up(IO_PORTA_05, 1); //上拉输入使能
|
||||
// gpio_direction_input(IO_PORTA_05); //设置IO为输入状态
|
||||
// gpio_ich_sel_iutput_signal(IO_PORTA_05, INPUT_CH_SIGNAL_TIMER0_CIN, INPUT_CH_TYPE_GP_ICH); //将INPUT_CH_SIGNAL_TIMER0_CIN信号设置为IO_PORTA_05口输入
|
||||
//=================================================================================//
|
||||
int gpio_ich_sel_iutput_signal(u32 gpio, enum INPUT_CH_SIGNAL signal, enum INPUT_CH_TYPE type);
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: Input Channel 输入设置 API, 将某个外设信号释放IO口控制, 变为普通IO;
|
||||
//@input:
|
||||
// gpio: 需要取消输入外设信号的IO口;
|
||||
// signal: 需要取消输入的外设信号, 外设信号列表请查看gpio.h文件enum INPUT_CH_SIGNAL枚举项;
|
||||
// type: INPUT_CH 类型, 常设为INPUT_CH_TYPE_GP_ICH;
|
||||
//@return: 默认为0, 无出错处理;
|
||||
//@note:
|
||||
//@example: 将外设信号INPUT_CH_SIGNAL_TIMER0_CIN释放由某个IO输入:
|
||||
// gpio_ich_disable_iutput_signal(IO_PORTA_05, INPUT_CH_SIGNAL_TIMER0_CIN, INPUT_CH_TYPE_GP_ICH);
|
||||
//=================================================================================//
|
||||
int gpio_ich_disable_iutput_signal(u32 gpio, enum INPUT_CH_SIGNAL signal, enum INPUT_CH_TYPE type);
|
||||
|
||||
|
||||
/**
|
||||
* @brief gpio_longpress_pin0_reset_config
|
||||
*
|
||||
* @param pin 任意GPIO
|
||||
* @param level 0(下降沿触发) 1(上升沿触发)
|
||||
* @param time 0(disable) 1 2 4 8 16单位为秒
|
||||
*/
|
||||
void gpio_longpress_pin0_reset_config(u32 pin, u32 level, u32 time);
|
||||
|
||||
|
||||
/**
|
||||
* @brief gpio_longpress_pin1_reset_config
|
||||
*
|
||||
* @param pin IO_LDOIN_DET IO_VBTCH_DET
|
||||
* @param level 0(下降沿触发) 1(上升沿触发)
|
||||
* @param time 0(disable) 1 2 4 8 16单位为秒
|
||||
*/
|
||||
void gpio_longpress_pin1_reset_config(u32 pin, u32 level, u32 time);
|
||||
|
||||
|
||||
/**
|
||||
* @brief get_sfc_port 获取当前code flash的端口
|
||||
*
|
||||
* @return
|
||||
*/
|
||||
u32 get_sfc_port(void);
|
||||
#endif /*GPIO_H*/
|
||||
178
include_lib/driver/cpu/br28/asm/hwi.h
Normal file
178
include_lib/driver/cpu/br28/asm/hwi.h
Normal file
@ -0,0 +1,178 @@
|
||||
#ifndef HWI_H
|
||||
#define HWI_H
|
||||
|
||||
//=================================================
|
||||
#define IRQ_EMUEXCPT_IDX 0 //0
|
||||
#define IRQ_EXCEPTION_IDX 1 //0
|
||||
#define IRQ_SYSCALL_IDX 2 //0
|
||||
#define IRQ_TICK_TMR_IDX 3 //0
|
||||
#define IRQ_TIME0_IDX 4 //0
|
||||
#define IRQ_TIME1_IDX 5 //0
|
||||
#define IRQ_TIME2_IDX 6 //0
|
||||
#define IRQ_TIME3_IDX 7 //0
|
||||
#define IRQ_TIME4_IDX 8 //0
|
||||
#define IRQ_TIME5_IDX 9 //0
|
||||
|
||||
#define IRQ_UART0_IDX 12 //0
|
||||
#define IRQ_UART1_IDX 13 //0
|
||||
#define IRQ_UART2_IDX 14 //0
|
||||
|
||||
#define IRQ_SPI0_IDX 16 //0
|
||||
#define IRQ_SPI1_IDX 17 //0
|
||||
#define IRQ_SPI2_IDX 18 //0
|
||||
|
||||
#define IRQ_SD0_IDX 20 //0
|
||||
|
||||
#define IRQ_IIC_IDX 24 //0
|
||||
|
||||
#define IRQ_USB_SOF_IDX 28 //1
|
||||
#define IRQ_USB_CTRL_IDX 29 //1
|
||||
|
||||
#define IRQ_P2M_IDX 32 //0
|
||||
#define IRQ_LP_TIMER0_IDX 33
|
||||
#define IRQ_LP_TIMER1_IDX 34
|
||||
#define IRQ_LP_TIMER2_IDX 35
|
||||
#define IRQ_LP_TIMER3_IDX 36
|
||||
|
||||
#define IRQ_PORT_IDX 38 //0
|
||||
#define IRQ_GPADC_IDX 39 //0
|
||||
#define IRQ_CTM_IDX 40
|
||||
#define IRQ_PWM_LED_IDX 41 //1
|
||||
#define IRQ_OSA_IDX 42
|
||||
#define IRQ_LRCT_IDX 43 //1
|
||||
#define IRQ_GPC_IDX 44 //1
|
||||
#define IRQ_FMTX_IDX 45 //1
|
||||
#define IRQ_TDM_IDX 46 //1
|
||||
#define IRQ_RDEC0_IDX 47 //1
|
||||
#define IRQ_SBC_IDX 48 //1
|
||||
#define IRQ_AES_IDX 49
|
||||
#define IRQ_RDEC1_IDX 50 //1
|
||||
#define IRQ_RDEC2_IDX 51 //1
|
||||
#define IRQ_MCPWM_CHX_IDX 52
|
||||
#define IRQ_MCPWM_TMR_IDX 53
|
||||
|
||||
#define IRQ_ANC_IDX 67
|
||||
#define IRQ_AUDIO_IDX 68 //1
|
||||
#define IRQ_ALINK0_IDX 69 //1
|
||||
#define IRQ_PDM_LINK_IDX 70 //1
|
||||
|
||||
#define IRQ_BT_CLKN_IDX 76 //2
|
||||
#define IRQ_BT_DBG_IDX 77 //1
|
||||
#define IRQ_BLE_RX_IDX 78 //2
|
||||
#define IRQ_BLE_EVENT_IDX 79 //1
|
||||
|
||||
#define IRQ_BT_TIMEBASE_IDX 80 //1
|
||||
#define IRQ_WL_LOFC_IDX 81 //2
|
||||
#define IRQ_BREDR_IDX 82 //2
|
||||
|
||||
#define IRQ_SYNC_IDX 88 //2
|
||||
#define IRQ_SRC_SYNC_IDX 89 //1
|
||||
#define IRQ_SRC_IDX 90 //1
|
||||
#define IRQ_EQ_IDX 91 //1
|
||||
#define IRQ_DCP_IDX 93 //1
|
||||
|
||||
#define IRQ_IMG_CP_IDX 103 //1
|
||||
#define IRQ_IMD_IDX 104 //1
|
||||
#define IRQ_IMB_IDX 105 //1
|
||||
#define IRQ_JPG_IDX 106 //1
|
||||
|
||||
#define IRQ_FFT_IDX 116 //1
|
||||
|
||||
#define IRQ_SOFT0_IDX 124
|
||||
#define IRQ_SOFT1_IDX 125
|
||||
#define IRQ_SOFT2_IDX 126
|
||||
#define IRQ_SOFT3_IDX 127
|
||||
|
||||
#define MAX_IRQ_ENTRY_NUM 128
|
||||
|
||||
//=================================================
|
||||
|
||||
//=================================================
|
||||
|
||||
void interrupt_init();
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief 中断注册函数
|
||||
*
|
||||
* @param index 中断号
|
||||
* @param priority 优先级，范围0-6可用
|
||||
* @param handler 中断服务函数
|
||||
* @param cpu_id 相应中断服务函数的CPU
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void request_irq(u8 index, u8 priority, void (*handler)(void), u8 cpu_id);
|
||||
|
||||
void unrequest_irq(u8 index);
|
||||
|
||||
void reg_set_ip(unsigned char index, unsigned char priority, u8 cpu_id);
|
||||
|
||||
|
||||
/* --------------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief 设置不可屏蔽中断（不可屏蔽中断不区分优先级）
|
||||
* cpu多核同步默认使用0，其他使用1。
|
||||
*
|
||||
* @param index 中断号
|
||||
* @param priority 不可屏蔽优先级，范围 0、1 （CPU_IRQ_IPMASK_LEVEL == 6）
|
||||
* @param cpu_id 相应中断服务函数的CPU
|
||||
*/
|
||||
/* ----------------------------------------------------------------------------*/
|
||||
void irq_unmask_set(u8 index, u8 priority, u8 cpu_id);
|
||||
|
||||
void bit_clr_ie(unsigned char index);
|
||||
void bit_set_ie(unsigned char index);
|
||||
bool irq_read(u32 index);
|
||||
|
||||
#define irq_disable(x) bit_clr_ie(x)
|
||||
#define irq_enable(x) bit_set_ie(x)
|
||||
|
||||
void unmask_enter_critical(void);
|
||||
void unmask_exit_critical(void);
|
||||
//---------------------------------------------//
|
||||
// low power waiting
|
||||
//---------------------------------------------//
|
||||
__attribute__((always_inline))
|
||||
static void lp_waiting(int *ptr, int pnd, int cpd, char inum)
|
||||
{
|
||||
q32DSP(core_num())->IWKUP_NUM = inum;
|
||||
while (!(*ptr & pnd)) {
|
||||
asm volatile("idle");
|
||||
}
|
||||
*ptr |= cpd;
|
||||
}
|
||||
|
||||
//---------------------------------------------//
|
||||
// interrupt cli/sti
|
||||
//---------------------------------------------//
|
||||
|
||||
static inline int int_cli(void)
|
||||
{
|
||||
int msg;
|
||||
asm volatile("cli %0" : "=r"(msg) :);
|
||||
return msg;
|
||||
}
|
||||
|
||||
static inline void int_sti(int msg)
|
||||
{
|
||||
asm volatile("sti %0" :: "r"(msg));
|
||||
}
|
||||
|
||||
#ifdef IRQ_TIME_COUNT_EN
|
||||
void irq_handler_enter(int irq);
|
||||
|
||||
void irq_handler_exit(int irq);
|
||||
|
||||
void irq_handler_times_dump();
|
||||
#else
|
||||
|
||||
#define irq_handler_enter(irq) do { }while(0)
|
||||
#define irq_handler_exit(irq) do { }while(0)
|
||||
#define irq_handler_times_dump() do { }while(0)
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
82
include_lib/driver/cpu/br28/asm/iic_hw.h
Normal file
82
include_lib/driver/cpu/br28/asm/iic_hw.h
Normal file
@ -0,0 +1,82 @@
|
||||
#ifndef _IIC_HW_H_
|
||||
#define _IIC_HW_H_
|
||||
|
||||
#include "system/generic/typedef.h"
|
||||
|
||||
#define IIC_HW_NUM 1
|
||||
#define IIC_PORT_GROUP_NUM 4
|
||||
|
||||
#define iic_enable(reg) (reg->CON0 |= BIT(0))
|
||||
#define iic_disable(reg) (reg->CON0 &= ~BIT(0))
|
||||
#define iic_role_host(reg) (reg->CON0 &= ~BIT(1))
|
||||
#define iic_role_slave(reg) (reg->CON0 |= BIT(1))
|
||||
#define iic_cfg_done(reg) (reg->CON0 |= BIT(2))
|
||||
#define iic_dir_out(reg) (reg->CON0 &= ~BIT(3))
|
||||
#define iic_dir_in(reg) (reg->CON0 |= BIT(3))
|
||||
#define iic_preset_end(reg) (reg->CON0 |= BIT(4))
|
||||
#define iic_preset_restart(reg) (reg->CON0 |= BIT(5))
|
||||
#define iic_recv_ack(reg) (reg->CON0 &= ~BIT(6))
|
||||
#define iic_recv_nack(reg) (reg->CON0 |= BIT(6))
|
||||
#define iic_send_is_ack(reg) (!(reg->CON0 & BIT(7)))
|
||||
#define iic_isel_direct(reg) (reg->CON0 &= ~BIT(9))
|
||||
#define iic_isel_filter(reg) (reg->CON0 |= BIT(9))
|
||||
#define iic_si_mode_en(reg) (reg->CON1 |= BIT(13))
|
||||
#define iic_si_mode_dis(reg) (reg->CON1 &= ~BIT(13))
|
||||
|
||||
#define iic_set_ie(reg) (reg->CON0 |= BIT(8))
|
||||
#define iic_clr_ie(reg) (reg->CON0 &= ~BIT(8))
|
||||
#define iic_pnd(reg) (reg->CON0 & BIT(15))
|
||||
#define iic_pnd_clr(reg) (reg->CON0 |= BIT(14))
|
||||
|
||||
#define iic_set_end_ie(reg) (reg->CON0 |= BIT(10))
|
||||
#define iic_clr_end_ie(reg) (reg->CON0 &= BIT(10))
|
||||
#define iic_end_pnd(reg) (reg->CON0 & BIT(13))
|
||||
#define iic_end_pnd_clr(reg) (reg->CON0 |= BIT(12))
|
||||
|
||||
#define iic_start_pnd(reg) (reg->CON1 & BIT(15))
|
||||
#define iic_start_pnd_clr(reg) (reg->CON1 |= BIT(14))
|
||||
|
||||
#define iic_baud_reg(reg) (reg->BAUD)
|
||||
#define iic_buf_reg(reg) (reg->BUF)
|
||||
|
||||
|
||||
typedef const int hw_iic_dev;
|
||||
|
||||
enum {IIC_MASTER, IIC_SLAVE};
|
||||
|
||||
struct hw_iic_config {
|
||||
u8 port[2];
|
||||
u32 baudrate;
|
||||
u8 hdrive;
|
||||
u8 io_filter;
|
||||
u8 io_pu;
|
||||
u8 role;
|
||||
};
|
||||
|
||||
extern const struct hw_iic_config hw_iic_cfg[];
|
||||
|
||||
int hw_iic_init(hw_iic_dev iic);
|
||||
void hw_iic_uninit(hw_iic_dev iic);
|
||||
void hw_iic_suspend(hw_iic_dev iic);
|
||||
void hw_iic_resume(hw_iic_dev iic);
|
||||
void hw_iic_start(hw_iic_dev iic);
|
||||
void hw_iic_stop(hw_iic_dev iic);
|
||||
u8 hw_iic_tx_byte(hw_iic_dev iic, u8 byte);
|
||||
u8 hw_iic_rx_byte(hw_iic_dev iic, u8 ack);
|
||||
int hw_iic_read_buf(hw_iic_dev iic, void *buf, int len);
|
||||
int hw_iic_write_buf(hw_iic_dev iic, const void *buf, int len);
|
||||
int hw_iic_set_baud(hw_iic_dev iic, u32 baud);
|
||||
|
||||
void hw_iic_set_ie(hw_iic_dev iic, u8 en);
|
||||
u8 hw_iic_get_pnd(hw_iic_dev iic);
|
||||
void hw_iic_clr_pnd(hw_iic_dev iic);
|
||||
void hw_iic_set_end_ie(hw_iic_dev iic, u8 en);
|
||||
u8 hw_iic_get_end_pnd(hw_iic_dev iic);
|
||||
void hw_iic_clr_end_pnd(hw_iic_dev iic);
|
||||
void hw_iic_slave_set_addr(hw_iic_dev iic, u8 addr, u8 addr_ack);
|
||||
void hw_iic_slave_rx_prepare(hw_iic_dev iic, u8 ack);
|
||||
u8 hw_iic_slave_rx_byte(hw_iic_dev iic, bool *is_start_addr);
|
||||
void hw_iic_slave_tx_byte(hw_iic_dev iic, u8 byte);
|
||||
u8 hw_iic_slave_tx_check_ack(hw_iic_dev iic);
|
||||
|
||||
#endif
|
||||
28
include_lib/driver/cpu/br28/asm/iic_soft.h
Normal file
28
include_lib/driver/cpu/br28/asm/iic_soft.h
Normal file
@ -0,0 +1,28 @@
|
||||
#ifndef _IIC_SOFT_H_
|
||||
#define _IIC_SOFT_H_
|
||||
|
||||
#include "generic/typedef.h"
|
||||
|
||||
typedef const int soft_iic_dev;
|
||||
|
||||
struct soft_iic_config {
|
||||
int scl;
|
||||
int sda;
|
||||
u32 delay;
|
||||
u8 io_pu;
|
||||
};
|
||||
|
||||
extern const struct soft_iic_config soft_iic_cfg[];
|
||||
|
||||
int soft_iic_init(soft_iic_dev iic);
|
||||
void soft_iic_uninit(soft_iic_dev iic);
|
||||
void soft_iic_suspend(soft_iic_dev iic);
|
||||
void soft_iic_resume(soft_iic_dev iic);
|
||||
void soft_iic_start(soft_iic_dev iic);
|
||||
void soft_iic_stop(soft_iic_dev iic);
|
||||
u8 soft_iic_tx_byte(soft_iic_dev iic, u8 byte);
|
||||
u8 soft_iic_rx_byte(soft_iic_dev iic, u8 ack);
|
||||
int soft_iic_read_buf(soft_iic_dev iic, void *buf, int len);
|
||||
int soft_iic_write_buf(soft_iic_dev iic, const void *buf, int len);
|
||||
#endif
|
||||
|
||||
48
include_lib/driver/cpu/br28/asm/iis.h
Normal file
48
include_lib/driver/cpu/br28/asm/iis.h
Normal file
@ -0,0 +1,48 @@
|
||||
#ifndef __IIS_H__
|
||||
#define __IIS_H__
|
||||
|
||||
#include "generic/typedef.h"
|
||||
|
||||
|
||||
#define ALINK_SEL(module, reg) (((JL_ALNK_TypeDef *)(((u8 *)JL_ALNK0)))->reg)
|
||||
|
||||
#define ALNK_CON_RESET(module) do {ALINK_SEL(module, CON0) = 0; ALINK_SEL(module, CON1) = 0; ALINK_SEL(module, CON2) = 0; ALINK_SEL(module, CON3) = 0;} while(0)
|
||||
#define ALNK_HWPTR_RESET(module) do {ALINK_SEL(module, HWPTR0) = 0; ALINK_SEL(module, HWPTR1) = 0; ALINK_SEL(module, HWPTR2) = 0; ALINK_SEL(module, HWPTR3) = 0;} while(0)
|
||||
#define ALNK_SWPTR_RESET(module) do {ALINK_SEL(module, SWPTR0) = 0; ALINK_SEL(module, SWPTR1) = 0; ALINK_SEL(module, SWPTR2) = 0; ALINK_SEL(module, SWPTR3) = 0;} while(0)
|
||||
#define ALNK_SHN_RESET(module) do {ALINK_SEL(module, SHN0) = 0; ALINK_SEL(module, SHN1) = 0; ALINK_SEL(module, SHN2) = 0; ALINK_SEL(module, SHN3) = 0;} while(0)
|
||||
#define ALNK_ADR_RESET(module) do {ALINK_SEL(module, ADR0) = 0; ALINK_SEL(module, ADR1) = 0; ALINK_SEL(module, ADR2) = 0; ALINK_SEL(module, ADR3) = 0;} while(0)
|
||||
#define ALNK_PNS_RESET(module) do {ALINK_SEL(module, PNS) = 0;} while(0)
|
||||
|
||||
#define ALINK_DA2BTSRC_SEL(module, x) SFR(ALINK_SEL(module, CON0), 0, 2, x)
|
||||
#define ALINK_DMA_MODE_SEL(module, x) SFR(ALINK_SEL(module, CON0), 2, 1, x)
|
||||
#define ALINK_DSPE(module, x) SFR(ALINK_SEL(module, CON0), 6, 1, x)
|
||||
#define ALINK_SOE(module, x) SFR(ALINK_SEL(module, CON0), 7, 1, x)
|
||||
#define ALINK_MOE(module, x) SFR(ALINK_SEL(module, CON0), 8, 1, x)
|
||||
#define F32_EN(module, x) SFR(ALINK_SEL(module, CON0), 9, 1, x)
|
||||
#define SCLKINV(module, x) SFR(ALINK_SEL(module, CON0),10, 1, x)
|
||||
#define ALINK_EN(module, x) SFR(ALINK_SEL(module, CON0),11, 1, x)
|
||||
#define ALINK_24BIT_MODE(module) (ALINK_SEL(module, CON1) |= (BIT(2) | BIT(6) | BIT(10) | BIT(14)))
|
||||
#define ALINK_16BIT_MODE(module) (ALINK_SEL(module, CON1) &= (~(BIT(2) | BIT(6) | BIT(10) | BIT(14))))
|
||||
|
||||
|
||||
#define ALINK_CHx_DIR_MODE(module, ch, x) SFR(ALINK_SEL(module, CON1), 3 + 4 * ch, 1, x)
|
||||
#define ALINK_CHx_MODE_SEL(module, ch, x) SFR(ALINK_SEL(module, CON1), 4 * ch, 2, x)
|
||||
#define ALINK_CHx_CLOSE(module, ch) SFR(ALINK_SEL(module, CON1), 4 * ch, 2, 0)
|
||||
|
||||
|
||||
#define ALINK_CLR_ALL_PND(module) (ALINK_SEL(module, CON2) |= BIT(0) | BIT(1) | BIT(2) | BIT(3))
|
||||
#define ALINK_CLR_CHx_PND(module, ch) (ALINK_SEL(module, CON2) |= BIT(ch))
|
||||
#define ALINK_CHx_IE(module, ch, x) SFR(ALINK_SEL(module, CON2), ch + 12, 1, x)
|
||||
|
||||
#define ALINK_MSRC(module, x) SFR(ALINK_SEL(module, CON3), 0, 2, x)
|
||||
#define ALINK_MDIV(module, x) SFR(ALINK_SEL(module, CON3), 2, 3, x)
|
||||
#define ALINK_LRDIV(module, x) SFR(ALINK_SEL(module, CON3), 5, 3, x)
|
||||
|
||||
#define ALINK_OPNS(module) (ALINK_SEL(module, PNS) >> 16)
|
||||
#define ALINK_IPNS(module) (ALINK_SEL(module, PNS) & 0xffff)
|
||||
#define ALINK_OPNS_SET(module, x) SFR(ALINK_SEL(module, PNS), 16, 16, x)
|
||||
#define ALINK_IPNS_SET(module, x) SFR(ALINK_SEL(module, PNS), 0, 16, x)
|
||||
|
||||
#define ALINK_LEN_SET(module, x) (ALINK_SEL(module, LEN) = x)
|
||||
#define ALINK_FIFO_LEN(module) (ALINK_SEL(module, LEN))
|
||||
#endif
|
||||
31
include_lib/driver/cpu/br28/asm/includes.h
Normal file
31
include_lib/driver/cpu/br28/asm/includes.h
Normal file
@ -0,0 +1,31 @@
|
||||
#ifndef ASM_INCLUDES_H
|
||||
#define ASM_INCLUDES_H
|
||||
|
||||
#include "asm/cpu.h"
|
||||
#include "asm/crc16.h"
|
||||
#include "asm/clock.h"
|
||||
#include "asm/uart.h"
|
||||
#include "asm/uart_dev.h"
|
||||
#include "asm/gpio.h"
|
||||
#include "asm/spiflash.h"
|
||||
#include "asm/csfr.h"
|
||||
#include "asm/power_interface.h"
|
||||
#include "asm/efuse.h"
|
||||
#include "asm/wdt.h"
|
||||
#include "asm/debug.h"
|
||||
#include "asm/power/p33.h"
|
||||
#include "asm/timer.h"
|
||||
#include "asm/rtc.h"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
131
include_lib/driver/cpu/br28/asm/io_imap.h
Normal file
131
include_lib/driver/cpu/br28/asm/io_imap.h
Normal file
@ -0,0 +1,131 @@
|
||||
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// input IO define
|
||||
//
|
||||
//===============================================================================//
|
||||
#define PA0_IN 1
|
||||
#define PA1_IN 2
|
||||
#define PA2_IN 3
|
||||
#define PA3_IN 4
|
||||
#define PA4_IN 5
|
||||
#define PA5_IN 6
|
||||
#define PA6_IN 7
|
||||
#define PA7_IN 8
|
||||
#define PA8_IN 9
|
||||
#define PA9_IN 10
|
||||
#define PA10_IN 11
|
||||
#define PA11_IN 12
|
||||
#define PA12_IN 13
|
||||
#define PA13_IN 14
|
||||
#define PA14_IN 15
|
||||
#define PA15_IN 16
|
||||
#define PB0_IN 17
|
||||
#define PB1_IN 18
|
||||
#define PB2_IN 19
|
||||
#define PB3_IN 20
|
||||
#define PB4_IN 21
|
||||
#define PB5_IN 22
|
||||
#define PB6_IN 23
|
||||
#define PB7_IN 24
|
||||
#define PB8_IN 25
|
||||
#define PB9_IN 26
|
||||
#define PB10_IN 27
|
||||
#define PB11_IN 28
|
||||
#define PC0_IN 29
|
||||
#define PC1_IN 30
|
||||
#define PC2_IN 31
|
||||
#define PC3_IN 32
|
||||
#define PC4_IN 33
|
||||
#define PC5_IN 34
|
||||
#define PC6_IN 35
|
||||
#define PC7_IN 36
|
||||
#define PC8_IN 37
|
||||
#define PG0_IN 38
|
||||
#define PG1_IN 39
|
||||
#define PG2_IN 40
|
||||
#define PG3_IN 41
|
||||
#define PG4_IN 42
|
||||
#define PG5_IN 43
|
||||
#define PG6_IN 44
|
||||
#define PG7_IN 45
|
||||
#define PG8_IN 46
|
||||
#define USBDP_IN 47
|
||||
#define USBDM_IN 48
|
||||
#define PP0_IN 49
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// function input select sfr
|
||||
//
|
||||
//===============================================================================//
|
||||
typedef struct {
|
||||
__RW __u8 FI_GP_ICH0;
|
||||
__RW __u8 FI_GP_ICH1;
|
||||
__RW __u8 FI_GP_ICH2;
|
||||
__RW __u8 FI_GP_ICH3;
|
||||
__RW __u8 FI_GP_ICH4;
|
||||
__RW __u8 FI_GP_ICH5;
|
||||
__RW __u8 FI_GP_ICH6;
|
||||
__RW __u8 FI_GP_ICH7;
|
||||
__RW __u8 FI_GP_ICH8;
|
||||
__RW __u8 FI_GP_ICH9;
|
||||
__RW __u8 FI_GP_ICH10;
|
||||
__RW __u8 FI_GP_ICH11;
|
||||
__RW __u8 FI_GP_ICH12;
|
||||
__RW __u8 FI_GP_ICH13;
|
||||
__RW __u8 FI_SPI0_CLK;
|
||||
__RW __u8 FI_SPI0_DA0;
|
||||
__RW __u8 FI_SPI0_DA1;
|
||||
__RW __u8 FI_SPI0_DA2;
|
||||
__RW __u8 FI_SPI0_DA3;
|
||||
__RW __u8 FI_SPI1_CLK;
|
||||
__RW __u8 FI_SPI1_DA0;
|
||||
__RW __u8 FI_SPI1_DA1;
|
||||
__RW __u8 FI_SPI1_DA2;
|
||||
__RW __u8 FI_SPI1_DA3;
|
||||
__RW __u8 FI_SPI2_CLK;
|
||||
__RW __u8 FI_SPI2_DA0;
|
||||
__RW __u8 FI_SPI2_DA1;
|
||||
__RW __u8 FI_SPI2_DA2;
|
||||
__RW __u8 FI_SPI2_DA3;
|
||||
__RW __u8 FI_SD0_CMD;
|
||||
__RW __u8 FI_SD0_DA0;
|
||||
__RW __u8 FI_SD0_DA1;
|
||||
__RW __u8 FI_SD0_DA2;
|
||||
__RW __u8 FI_SD0_DA3;
|
||||
__RW __u8 FI_IIC_SCL;
|
||||
__RW __u8 FI_IIC_SDA;
|
||||
__RW __u8 FI_UART0_RX;
|
||||
__RW __u8 FI_UART1_RX;
|
||||
__RW __u8 FI_UART1_CTS;
|
||||
__RW __u8 FI_UART2_RX;
|
||||
__RW __u8 FI_TDM_S_WCK;
|
||||
__RW __u8 FI_TDM_S_BCK;
|
||||
__RW __u8 FI_TDM_M_DA;
|
||||
__RW __u8 FI_RDEC0_DAT0;
|
||||
__RW __u8 FI_RDEC0_DAT1;
|
||||
__RW __u8 FI_RDEC1_DAT0;
|
||||
__RW __u8 FI_RDEC1_DAT1;
|
||||
__RW __u8 FI_RDEC2_DAT0;
|
||||
__RW __u8 FI_RDEC2_DAT1;
|
||||
__RW __u8 FI_ALNK0_MCLK;
|
||||
__RW __u8 FI_ALNK0_LRCK;
|
||||
__RW __u8 FI_ALNK0_SCLK;
|
||||
__RW __u8 FI_ALNK0_DAT0;
|
||||
__RW __u8 FI_ALNK0_DAT1;
|
||||
__RW __u8 FI_ALNK0_DAT2;
|
||||
__RW __u8 FI_ALNK0_DAT3;
|
||||
__RW __u8 FI_PLNK_DAT0;
|
||||
__RW __u8 FI_PLNK_DAT1;
|
||||
__RW __u8 FI_CHAIN_IN0;
|
||||
__RW __u8 FI_CHAIN_IN1;
|
||||
__RW __u8 FI_CHAIN_IN2;
|
||||
__RW __u8 FI_CHAIN_IN3;
|
||||
__RW __u8 FI_CHAIN_RST;
|
||||
__RW __u8 FI_TOTAL;
|
||||
} JL_IMAP_TypeDef;
|
||||
|
||||
#define JL_IMAP_BASE (ls_base + map_adr(0x5c, 0x00))
|
||||
#define JL_IMAP ((JL_IMAP_TypeDef *)JL_IMAP_BASE)
|
||||
130
include_lib/driver/cpu/br28/asm/io_omap.h
Normal file
130
include_lib/driver/cpu/br28/asm/io_omap.h
Normal file
@ -0,0 +1,130 @@
|
||||
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// output function define
|
||||
//
|
||||
//===============================================================================//
|
||||
#define FO_GP_OCH0 ((0 << 2)|BIT(1))
|
||||
#define FO_GP_OCH1 ((1 << 2)|BIT(1))
|
||||
#define FO_GP_OCH2 ((2 << 2)|BIT(1))
|
||||
#define FO_GP_OCH3 ((3 << 2)|BIT(1))
|
||||
#define FO_GP_OCH4 ((4 << 2)|BIT(1))
|
||||
#define FO_GP_OCH5 ((5 << 2)|BIT(1))
|
||||
#define FO_GP_OCH6 ((6 << 2)|BIT(1))
|
||||
#define FO_GP_OCH7 ((7 << 2)|BIT(1))
|
||||
#define FO_GP_OCH8 ((8 << 2)|BIT(1))
|
||||
#define FO_GP_OCH9 ((9 << 2)|BIT(1))
|
||||
#define FO_GP_OCH10 ((10 << 2)|BIT(1))
|
||||
#define FO_GP_OCH11 ((11 << 2)|BIT(1))
|
||||
#define FO_GP_OCH12 ((12 << 2)|BIT(1))
|
||||
#define FO_GP_OCH13 ((13 << 2)|BIT(1))
|
||||
#define FO_GP_OCH14 ((14 << 2)|BIT(1))
|
||||
#define FO_GP_OCH15 ((15 << 2)|BIT(1))
|
||||
#define FO_SPI0_CLK ((16 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI0_DA0 ((17 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI0_DA1 ((18 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI0_DA2 ((19 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI0_DA3 ((20 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI1_CLK ((21 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI1_DA0 ((22 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI1_DA1 ((23 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI1_DA2 ((24 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI1_DA3 ((25 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI2_CLK ((26 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI2_DA0 ((27 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI2_DA1 ((28 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI2_DA2 ((29 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SPI2_DA3 ((30 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SD0_CLK ((31 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SD0_CMD ((32 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SD0_DA0 ((33 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SD0_DA1 ((34 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SD0_DA2 ((35 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_SD0_DA3 ((36 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_IIC_SCL ((37 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_IIC_SDA ((38 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_UART0_TX ((39 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_UART1_TX ((40 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_UART1_RTS ((41 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_UART2_TX ((42 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_TDM_M_MCK ((43 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_TDM_M_WCK ((44 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_TDM_M_BCK ((45 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_TDM_S_DA ((46 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_ALNK0_MCLK ((47 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_ALNK0_LRCK ((48 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_ALNK0_SCLK ((49 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_ALNK0_DAT0 ((50 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_ALNK0_DAT1 ((51 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_ALNK0_DAT2 ((52 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_ALNK0_DAT3 ((53 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_PLNK_SCLK ((54 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_WL_ANT_ID0 ((55 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_WL_ANT_ID1 ((56 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_WL_ANT_ID2 ((57 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_WL_ANT_ID3 ((58 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_CHAIN_OUT0 ((59 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_CHAIN_OUT1 ((60 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_CHAIN_OUT2 ((61 << 2)|BIT(1)|BIT(0))
|
||||
#define FO_CHAIN_OUT3 ((62 << 2)|BIT(1)|BIT(0))
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// IO output select sfr
|
||||
//
|
||||
//===============================================================================//
|
||||
typedef struct {
|
||||
__RW __u8 PA0_OUT;
|
||||
__RW __u8 PA1_OUT;
|
||||
__RW __u8 PA2_OUT;
|
||||
__RW __u8 PA3_OUT;
|
||||
__RW __u8 PA4_OUT;
|
||||
__RW __u8 PA5_OUT;
|
||||
__RW __u8 PA6_OUT;
|
||||
__RW __u8 PA7_OUT;
|
||||
__RW __u8 PA8_OUT;
|
||||
__RW __u8 PA9_OUT;
|
||||
__RW __u8 PA10_OUT;
|
||||
__RW __u8 PA11_OUT;
|
||||
__RW __u8 PA12_OUT;
|
||||
__RW __u8 PA13_OUT;
|
||||
__RW __u8 PA14_OUT;
|
||||
__RW __u8 PA15_OUT;
|
||||
__RW __u8 PB0_OUT;
|
||||
__RW __u8 PB1_OUT;
|
||||
__RW __u8 PB2_OUT;
|
||||
__RW __u8 PB3_OUT;
|
||||
__RW __u8 PB4_OUT;
|
||||
__RW __u8 PB5_OUT;
|
||||
__RW __u8 PB6_OUT;
|
||||
__RW __u8 PB7_OUT;
|
||||
__RW __u8 PB8_OUT;
|
||||
__RW __u8 PB9_OUT;
|
||||
__RW __u8 PB10_OUT;
|
||||
__RW __u8 PB11_OUT;
|
||||
__RW __u8 PC0_OUT;
|
||||
__RW __u8 PC1_OUT;
|
||||
__RW __u8 PC2_OUT;
|
||||
__RW __u8 PC3_OUT;
|
||||
__RW __u8 PC4_OUT;
|
||||
__RW __u8 PC5_OUT;
|
||||
__RW __u8 PC6_OUT;
|
||||
__RW __u8 PC7_OUT;
|
||||
__RW __u8 PC8_OUT;
|
||||
__RW __u8 PG0_OUT;
|
||||
__RW __u8 PG1_OUT;
|
||||
__RW __u8 PG2_OUT;
|
||||
__RW __u8 PG3_OUT;
|
||||
__RW __u8 PG4_OUT;
|
||||
__RW __u8 PG5_OUT;
|
||||
__RW __u8 PG6_OUT;
|
||||
__RW __u8 PG7_OUT;
|
||||
__RW __u8 PG8_OUT;
|
||||
__RW __u8 USBDP_OUT;
|
||||
__RW __u8 USBDM_OUT;
|
||||
__RW __u8 PP0_OUT;
|
||||
} JL_OMAP_TypeDef;
|
||||
|
||||
#define JL_OMAP_BASE (ls_base + map_adr(0x58, 0x00))
|
||||
#define JL_OMAP ((JL_OMAP_TypeDef *)JL_OMAP_BASE)
|
||||
231
include_lib/driver/cpu/br28/asm/irflt.h
Normal file
231
include_lib/driver/cpu/br28/asm/irflt.h
Normal file
@ -0,0 +1,231 @@
|
||||
#ifndef __KEY_DRV_IR_H__
|
||||
#define __KEY_DRV_IR_H__
|
||||
|
||||
#define IR_PORTA(x) (0x00 + x)
|
||||
#define IR_PORTB(x) (0x10 + x)
|
||||
#define IR_PORTC(x) (0x20 + x)
|
||||
#define IR_PORTD(x) (0x30 + x)
|
||||
#define IR_USBDP (0x3d)
|
||||
#define IR_USBDM (0x3e)
|
||||
|
||||
#define IR_IO IR_PORTA(9)
|
||||
|
||||
/*ir key define*/
|
||||
#define IR_00 0
|
||||
#define IR_01 1
|
||||
#define IR_02 2
|
||||
#define IR_03 3
|
||||
#define IR_04 4
|
||||
#define IR_05 5
|
||||
#define IR_06 6
|
||||
#define IR_07 7
|
||||
#define IR_08 8
|
||||
#define IR_09 9
|
||||
#define IR_10 10
|
||||
#define IR_11 11
|
||||
#define IR_12 12
|
||||
#define IR_13 13
|
||||
#define IR_14 14
|
||||
#define IR_15 15
|
||||
#define IR_16 16
|
||||
#define IR_17 17
|
||||
#define IR_18 18
|
||||
#define IR_19 19
|
||||
#define IR_20 20
|
||||
#define IR_21 21
|
||||
#define IR_22 22
|
||||
|
||||
//////////////////////////////////
|
||||
#define NKEY_00 0xff
|
||||
#define NKEY_01 0xff
|
||||
#define NKEY_02 0xff
|
||||
#define NKEY_03 0xff
|
||||
#define NKEY_04 0xff
|
||||
#define NKEY_05 0xff
|
||||
#define NKEY_06 0xff
|
||||
#define NKEY_07 0xff
|
||||
#define NKEY_08 0xff
|
||||
#define NKEY_09 0xff
|
||||
#define NKEY_0A 0xff
|
||||
#define NKEY_0B 0xff
|
||||
#define NKEY_0C 0xff
|
||||
#define NKEY_0D 0xff
|
||||
#define NKEY_0E 0xff
|
||||
#define NKEY_0F 0xff
|
||||
#define NKEY_10 0xff
|
||||
#define NKEY_11 0xff
|
||||
#define NKEY_12 0xff
|
||||
#define NKEY_13 0xff
|
||||
#define NKEY_14 0xff
|
||||
#define NKEY_15 0xff
|
||||
#define NKEY_16 0xff
|
||||
#define NKEY_17 0xff
|
||||
#define NKEY_18 0xff
|
||||
#define NKEY_19 0xff
|
||||
#define NKEY_1A 0xff
|
||||
#define NKEY_1B 0xff
|
||||
#define NKEY_1C 0xff
|
||||
#define NKEY_1D 0xff
|
||||
#define NKEY_1E 0xff
|
||||
#define NKEY_1F 0xff
|
||||
#define NKEY_20 0xff
|
||||
#define NKEY_21 0xff
|
||||
#define NKEY_22 0xff
|
||||
#define NKEY_23 0xff
|
||||
#define NKEY_24 0xff
|
||||
#define NKEY_25 0xff
|
||||
#define NKEY_26 0xff
|
||||
#define NKEY_27 0xff
|
||||
#define NKEY_28 0xff
|
||||
#define NKEY_29 0xff
|
||||
#define NKEY_2A 0xff
|
||||
#define NKEY_2B 0xff
|
||||
#define NKEY_2C 0xff
|
||||
#define NKEY_2D 0xff
|
||||
#define NKEY_2E 0xff
|
||||
#define NKEY_2F 0xff
|
||||
#define NKEY_30 0xff
|
||||
#define NKEY_31 0xff
|
||||
#define NKEY_32 0xff
|
||||
#define NKEY_33 0xff
|
||||
#define NKEY_34 0xff
|
||||
#define NKEY_35 0xff
|
||||
#define NKEY_36 0xff
|
||||
#define NKEY_37 0xff
|
||||
#define NKEY_38 0xff
|
||||
#define NKEY_39 0xff
|
||||
#define NKEY_3A 0xff
|
||||
#define NKEY_3B 0xff
|
||||
#define NKEY_3C 0xff
|
||||
#define NKEY_3D 0xff
|
||||
#define NKEY_3E 0xff
|
||||
#define NKEY_3F 0xff
|
||||
#define NKEY_40 0xff
|
||||
#define NKEY_41 0xff
|
||||
#define NKEY_42 0xff
|
||||
#define NKEY_43 0xff
|
||||
#define NKEY_44 0xff
|
||||
#define NKEY_45 0xff
|
||||
#define NKEY_46 0xff
|
||||
#define NKEY_47 0xff
|
||||
#define NKEY_48 0xff
|
||||
#define NKEY_49 0xff
|
||||
#define NKEY_4A 0xff
|
||||
#define NKEY_4B 0xff
|
||||
#define NKEY_4C 0xff
|
||||
#define NKEY_4D 0xff
|
||||
#define NKEY_4E 0xff
|
||||
#define NKEY_4F 0xff
|
||||
#define NKEY_50 0xff
|
||||
#define NKEY_51 0xff
|
||||
#define NKEY_52 0xff
|
||||
#define NKEY_53 0xff
|
||||
#define NKEY_54 0xff
|
||||
#define NKEY_55 0xff
|
||||
#define NKEY_56 0xff
|
||||
#define NKEY_57 0xff
|
||||
#define NKEY_58 0xff
|
||||
#define NKEY_59 0xff
|
||||
#define NKEY_5A 0xff
|
||||
#define NKEY_5B 0xff
|
||||
#define NKEY_5C 0xff
|
||||
#define NKEY_5D 0xff
|
||||
#define NKEY_5E 0xff
|
||||
#define NKEY_5F 0xff
|
||||
#define NKEY_60 0xff
|
||||
#define NKEY_61 0xff
|
||||
#define NKEY_62 0xff
|
||||
#define NKEY_63 0xff
|
||||
#define NKEY_64 0xff
|
||||
#define NKEY_65 0xff
|
||||
#define NKEY_66 0xff
|
||||
#define NKEY_67 0xff
|
||||
#define NKEY_68 0xff
|
||||
#define NKEY_69 0xff
|
||||
#define NKEY_6A 0xff
|
||||
#define NKEY_6B 0xff
|
||||
#define NKEY_6C 0xff
|
||||
#define NKEY_6D 0xff
|
||||
#define NKEY_6E 0xff
|
||||
#define NKEY_6F 0xff
|
||||
#define NKEY_70 0xff
|
||||
#define NKEY_71 0xff
|
||||
#define NKEY_72 0xff
|
||||
#define NKEY_73 0xff
|
||||
#define NKEY_74 0xff
|
||||
#define NKEY_75 0xff
|
||||
#define NKEY_76 0xff
|
||||
#define NKEY_77 0xff
|
||||
#define NKEY_78 0xff
|
||||
#define NKEY_79 0xff
|
||||
#define NKEY_7A 0xff
|
||||
#define NKEY_7B 0xff
|
||||
#define NKEY_7C 0xff
|
||||
#define NKEY_7D 0xff
|
||||
#define NKEY_7E 0xff
|
||||
#define NKEY_7F 0xff
|
||||
#define NKEY_80 0xff
|
||||
#define NKEY_81 0xff
|
||||
#define NKEY_82 0xff
|
||||
#define NKEY_83 0xff
|
||||
#define NKEY_84 0xff
|
||||
#define NKEY_85 0xff
|
||||
#define NKEY_86 0xff
|
||||
#define NKEY_87 0xff
|
||||
#define NKEY_88 0xff
|
||||
#define NKEY_89 0xff
|
||||
#define NKEY_8A 0xff
|
||||
#define NKEY_8B 0xff
|
||||
#define NKEY_8C 0xff
|
||||
#define NKEY_8D 0xff
|
||||
#define NKEY_8E 0xff
|
||||
#define NKEY_8F 0xff
|
||||
#define NKEY_90 0xff
|
||||
#define NKEY_91 0xff
|
||||
#define NKEY_92 0xff
|
||||
#define NKEY_93 0xff
|
||||
#define NKEY_94 0xff
|
||||
#define NKEY_95 0xff
|
||||
|
||||
|
||||
typedef struct _IR_CODE {
|
||||
u16 wData; //<键值
|
||||
u16 wUserCode; //<用户码
|
||||
u16 timer_pad;
|
||||
u8 bState; //<接收状态
|
||||
u8 boverflow; //<红外信号超时
|
||||
} IR_CODE;
|
||||
|
||||
enum timer_sel {
|
||||
TIMER0,
|
||||
TIMER1,
|
||||
TIMER2,
|
||||
TIMER3,
|
||||
TIMER4,
|
||||
TIMER5,
|
||||
};
|
||||
|
||||
struct irflt_platform_data {
|
||||
u8 irflt_io;
|
||||
u8 timer;
|
||||
};
|
||||
|
||||
#define IRFLT_PLATFORM_DATA_BEGIN(data) \
|
||||
static const struct irflt_platform_data data = {
|
||||
|
||||
#define IRFLT_PLATFORM_DATA_END() \
|
||||
};
|
||||
|
||||
|
||||
extern const struct device_operations irflt_dev_ops;
|
||||
|
||||
void set_ir_clk(void);
|
||||
void ir_input_io_sel(u8 port);
|
||||
void ir_output_timer_sel();
|
||||
void ir_timeout_set(void);
|
||||
void irflt_config();
|
||||
void log_irflt_info();
|
||||
u8 get_irflt_value(void);
|
||||
|
||||
#endif
|
||||
|
||||
20
include_lib/driver/cpu/br28/asm/irq.h
Normal file
20
include_lib/driver/cpu/br28/asm/irq.h
Normal file
@ -0,0 +1,20 @@
|
||||
#ifndef CPU_IRQ_H
|
||||
#define CPU_IRQ_H
|
||||
|
||||
|
||||
#include "asm/hwi.h"
|
||||
|
||||
#ifdef CONFIG_HWI_DEBUG
|
||||
#define ___interrupt
|
||||
#else
|
||||
#define ___interrupt __attribute__((interrupt("")))
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
20
include_lib/driver/cpu/br28/asm/lp_touch_key_alog.h
Normal file
20
include_lib/driver/cpu/br28/asm/lp_touch_key_alog.h
Normal file
@ -0,0 +1,20 @@
|
||||
#ifndef __LP_TOUCH_KEY_ALOG_H__
|
||||
#define __LP_TOUCH_KEY_ALOG_H__
|
||||
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
void TouchAlgo_Init(u8 ch, u16 min, u16 max);
|
||||
void TouchAlgo_Update(u8 ch, u16 x);
|
||||
void TouchAlgo_Reset(u8 ch, u16 min, u16 max);
|
||||
|
||||
u16 TouchAlgo_GetRange(u8 ch, u8 *valid);
|
||||
void TouchAlgo_SetRange(u8 ch, u16 range);
|
||||
|
||||
s32 TouchAlgo_GetSigma(u8 ch);
|
||||
void TouchAlgo_SetSigma(u8 ch, s32 sigma);
|
||||
|
||||
|
||||
#endif /*LP_TOUCH_KEY_ALOG_H*/
|
||||
|
||||
157
include_lib/driver/cpu/br28/asm/lp_touch_key_api.h
Normal file
157
include_lib/driver/cpu/br28/asm/lp_touch_key_api.h
Normal file
@ -0,0 +1,157 @@
|
||||
#ifndef _LP_TOUCH_KEY_API_
|
||||
#define _LP_TOUCH_KEY_API_
|
||||
|
||||
#include "typedef.h"
|
||||
#include "asm/lp_touch_key_hw.h"
|
||||
|
||||
|
||||
/**************************************************USER配置************************************************************************/
|
||||
//长按开机时间:
|
||||
#define CFG_M2P_CTMU_SOFTOFF_LONG_TIME 1000 //单位: ms
|
||||
|
||||
//触摸按键长按复位时间配置
|
||||
#define CTMU_RESET_TIME_CONFIG 8000 //长按复位时间(ms), 配置为0关闭
|
||||
|
||||
//debug
|
||||
#define CFG_CH0_DEBUG_ENABLE 0
|
||||
#define CFG_CH1_DEBUG_ENABLE 0
|
||||
#define CFG_CH2_DEBUG_ENABLE 0
|
||||
#define CFG_CH3_DEBUG_ENABLE 0
|
||||
#define CFG_CH4_DEBUG_ENABLE 0
|
||||
|
||||
#define CFG_CHx_DEBUG_ENABLE ((CFG_CH4_DEBUG_ENABLE<<4) | (CFG_CH3_DEBUG_ENABLE<<3) | (CFG_CH2_DEBUG_ENABLE<<2) | (CFG_CH1_DEBUG_ENABLE<<1) | (CFG_CH0_DEBUG_ENABLE))
|
||||
|
||||
#define CFG_DISABLE_KEY_EVENT 0
|
||||
|
||||
#define TWS_BT_SEND_KEY_CH_RES_DATA_ENABLE 0
|
||||
|
||||
#define TWS_BT_SEND_EARTCH_RES_DATA_ENABLE 0
|
||||
|
||||
#define TWS_BT_SEND_EVENT_ENABLE 0
|
||||
|
||||
|
||||
#if TWS_BT_SEND_KEY_CH_RES_DATA_ENABLE
|
||||
#if !CFG_CHx_DEBUG_ENABLE
|
||||
#undef CFG_CHx_DEBUG_ENABLE
|
||||
#define CFG_CHx_DEBUG_ENABLE 0b11111
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#if (CFG_CH0_DEBUG_ENABLE || CFG_CH1_DEBUG_ENABLE || CFG_CH2_DEBUG_ENABLE || CFG_CH3_DEBUG_ENABLE || CFG_CH4_DEBUG_ENABLE)
|
||||
#if !CFG_DISABLE_KEY_EVENT
|
||||
#undef CFG_DISABLE_KEY_EVENT
|
||||
#define CFG_DISABLE_KEY_EVENT 1
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#define ERATCH_KEY_MSG_LOCK_TIME 3000 //ms 入耳检测状态发生改变时，多长时间内不能发送按键消息
|
||||
|
||||
|
||||
/*************************************************** Lpctmu API **********************************************************/
|
||||
#define LP_CTMU_CHANNEL_SIZE 5
|
||||
|
||||
enum LP_TOUCH_SOFTOFF_MODE {
|
||||
LP_TOUCH_SOFTOFF_MODE_LEGACY = 0, //普通关机
|
||||
LP_TOUCH_SOFTOFF_MODE_ADVANCE = 1, //带触摸关机
|
||||
};
|
||||
|
||||
enum ctmu_key_event {
|
||||
CTMU_KEY_NULL,
|
||||
CTMU_KEY_SHORT_CLICK,
|
||||
CTMU_KEY_LONG_CLICK,
|
||||
CTMU_KEY_HOLD_CLICK,
|
||||
};
|
||||
|
||||
|
||||
enum {
|
||||
TOUCH_KEY_EVENT_SLIDE_UP,
|
||||
TOUCH_KEY_EVENT_SLIDE_DOWN,
|
||||
TOUCH_KEY_EVENT_SLIDE_LEFT,
|
||||
TOUCH_KEY_EVENT_SLIDE_RIGHT,
|
||||
TOUCH_KEY_EVENT_MAX,
|
||||
};
|
||||
|
||||
|
||||
struct ctmu_ch_cfg {
|
||||
u8 enable;
|
||||
u8 wakeup_enable;
|
||||
u8 key_value;
|
||||
u8 port;
|
||||
u8 sensitivity;
|
||||
};
|
||||
|
||||
struct lp_touch_key_platform_data {
|
||||
u8 slide_mode_en;
|
||||
u8 slide_mode_key_value;
|
||||
u8 eartch_en;
|
||||
u8 eartch_ch;
|
||||
u8 eartch_ref_ch;
|
||||
u16 eartch_soft_inear_val;
|
||||
u16 eartch_soft_outear_val;
|
||||
struct ctmu_ch_cfg ch[LP_CTMU_CHANNEL_SIZE];
|
||||
};
|
||||
|
||||
enum ch1_event_list {
|
||||
EAR_IN,
|
||||
EAR_OUT,
|
||||
};
|
||||
|
||||
enum {
|
||||
EPD_IN,
|
||||
EPD_OUT,
|
||||
EPD_STATE_NO_CHANCE
|
||||
};
|
||||
|
||||
struct ch_ana_cfg {
|
||||
u8 isel;
|
||||
u8 vhsel;
|
||||
u8 vlsel;
|
||||
};
|
||||
|
||||
struct ch_adjust_table {
|
||||
u16 cfg0;
|
||||
u16 cfg1;
|
||||
u16 cfg2;
|
||||
};
|
||||
|
||||
struct ctmu_key {
|
||||
u8 init;
|
||||
u8 softoff_mode;
|
||||
u8 slide_dir;
|
||||
u8 click_cnt[LP_CTMU_CHANNEL_SIZE];
|
||||
u8 last_key[LP_CTMU_CHANNEL_SIZE];
|
||||
u16 short_timer[LP_CTMU_CHANNEL_SIZE];
|
||||
|
||||
u8 key_ch_msg_lock;
|
||||
u16 key_ch_msg_lock_timer;
|
||||
|
||||
u8 eartch_inear_ok;
|
||||
u8 eartch_last_state;
|
||||
u8 eartch_trim_flag;
|
||||
u16 eartch_trim_value;
|
||||
|
||||
const struct lp_touch_key_platform_data *config;
|
||||
};
|
||||
|
||||
extern struct ctmu_key _ctmu_key;
|
||||
|
||||
|
||||
void lp_touch_key_init(const struct lp_touch_key_platform_data *config);
|
||||
|
||||
u8 lp_touch_key_power_on_status();
|
||||
|
||||
void lp_touch_key_disable(void);
|
||||
|
||||
void lp_touch_key_enable(void);
|
||||
|
||||
u8 lp_touch_key_alog_range_display(u8 *display_buf);
|
||||
|
||||
void lp_touch_key_send_cmd(enum CTMU_M2P_CMD cmd);
|
||||
|
||||
void set_lpkey_active(u8 set);
|
||||
|
||||
u8 lp_touch_key_alog_range_display(u8 *display_buf);
|
||||
|
||||
#endif /* #ifndef _LP_TOUCH_KEY_API_ */
|
||||
148
include_lib/driver/cpu/br28/asm/lp_touch_key_hw.h
Normal file
148
include_lib/driver/cpu/br28/asm/lp_touch_key_hw.h
Normal file
@ -0,0 +1,148 @@
|
||||
#ifndef _LP_TOUCH_KEY_HW_H_
|
||||
#define _LP_TOUCH_KEY_HW_H_
|
||||
|
||||
/**************************************************************P11 通讯定义*****************************************************************/
|
||||
|
||||
enum CTMU_P2M_EVENT {
|
||||
CTMU_P2M_CH0_RES_EVENT = 0x50,
|
||||
CTMU_P2M_CH0_SHORT_KEY_EVENT,
|
||||
CTMU_P2M_CH0_LONG_KEY_EVENT,
|
||||
CTMU_P2M_CH0_HOLD_KEY_EVENT,
|
||||
CTMU_P2M_CH0_FALLING_EVENT,
|
||||
CTMU_P2M_CH0_RAISING_EVENT,
|
||||
|
||||
CTMU_P2M_CH1_RES_EVENT = 0x58,
|
||||
CTMU_P2M_CH1_SHORT_KEY_EVENT,
|
||||
CTMU_P2M_CH1_LONG_KEY_EVENT,
|
||||
CTMU_P2M_CH1_HOLD_KEY_EVENT,
|
||||
CTMU_P2M_CH1_FALLING_EVENT,
|
||||
CTMU_P2M_CH1_RAISING_EVENT,
|
||||
|
||||
CTMU_P2M_CH2_RES_EVENT = 0x60,
|
||||
CTMU_P2M_CH2_SHORT_KEY_EVENT,
|
||||
CTMU_P2M_CH2_LONG_KEY_EVENT,
|
||||
CTMU_P2M_CH2_HOLD_KEY_EVENT,
|
||||
CTMU_P2M_CH2_FALLING_EVENT,
|
||||
CTMU_P2M_CH2_RAISING_EVENT,
|
||||
|
||||
CTMU_P2M_CH3_RES_EVENT = 0x68,
|
||||
CTMU_P2M_CH3_SHORT_KEY_EVENT,
|
||||
CTMU_P2M_CH3_LONG_KEY_EVENT,
|
||||
CTMU_P2M_CH3_HOLD_KEY_EVENT,
|
||||
CTMU_P2M_CH3_FALLING_EVENT,
|
||||
CTMU_P2M_CH3_RAISING_EVENT,
|
||||
|
||||
CTMU_P2M_CH4_RES_EVENT = 0x70,
|
||||
CTMU_P2M_CH4_SHORT_KEY_EVENT,
|
||||
CTMU_P2M_CH4_LONG_KEY_EVENT,
|
||||
CTMU_P2M_CH4_HOLD_KEY_EVENT,
|
||||
CTMU_P2M_CH4_FALLING_EVENT,
|
||||
CTMU_P2M_CH4_RAISING_EVENT,
|
||||
|
||||
CTMU_P2M_EARTCH_IN_EVENT = 0x78,
|
||||
CTMU_P2M_EARTCH_OUT_EVENT,
|
||||
};
|
||||
|
||||
enum CTMU_M2P_CMD {
|
||||
CTMU_M2P_INIT = 0x50,
|
||||
CTMU_M2P_DISABLE, //模块关闭
|
||||
CTMU_M2P_ENABLE, //模块使能
|
||||
CTMU_M2P_CH0_ENABLE, //通道0打开
|
||||
CTMU_M2P_CH0_DISABLE, //通道0关闭
|
||||
CTMU_M2P_CH1_ENABLE, //通道1打开
|
||||
CTMU_M2P_CH1_DISABLE, //通道1关闭
|
||||
CTMU_M2P_CH2_ENABLE, //通道2打开
|
||||
CTMU_M2P_CH2_DISABLE, //通道2关闭
|
||||
CTMU_M2P_CH3_ENABLE, //通道3打开
|
||||
CTMU_M2P_CH3_DISABLE, //通道3关闭
|
||||
CTMU_M2P_CH4_ENABLE, //通道4打开
|
||||
CTMU_M2P_CH4_DISABLE, //通道4关闭
|
||||
CTMU_M2P_UPDATE_BASE_TIME, //更新时基参数
|
||||
CTMU_M2P_CHARGE_ENTER_MODE, //进仓充电模式
|
||||
CTMU_M2P_CHARGE_EXIT_MODE, //退出充电模式
|
||||
CTMU_M2P_RESET_ALGO, //单独复位触摸算法
|
||||
};
|
||||
|
||||
/////////////////////////////////////////////////
|
||||
// P11: P2M_MESSAGE_CTMU_WKUP_MSG
|
||||
// MSYS: P2M_CTMU_CTMU_WKUP_MSG
|
||||
// 消息列表
|
||||
// 作用: 与主系统同步消息, 缓解异步问题
|
||||
/////////////////////////////////////////////////
|
||||
#define P2M_MESSAGE_POWER_ON_FLAG BIT(0) //lpctmu长按开机标志, 0: 非长按开机, 1: 长按开机, P11/MSYS清0, P11置位, 主系统查询
|
||||
#define P2M_MESSAGE_SYNC_FLAG BIT(1) //主系统清0, P11置位, 主系统查询置位, 解决异步问题
|
||||
#define P2M_MESSAGE_KEY_ACTIVE_FLAG BIT(2) //lpctmu按键状态, 1: 按键按下, 0: 按键抬起, P11清0, P11置位, 主系统查询
|
||||
#define P2M_MESSAGE_INIT_MODE_FLAG BIT(3) //lpctmu初始化模式, 0: 普通初始化(复位硬件,复位算法,初始化定时器), 1: 连续工作初始化(恢复定时器工作), 主系统清0, 主系统置位, P11查询
|
||||
#define P2M_MESSAGE_RESET_ALGO_FLAG BIT(4) //主系统清0, P11置位, 主系统查询置位，用于内置触摸算法的复位
|
||||
|
||||
|
||||
//=======================================================================//
|
||||
// LPCTMU ANA0 //
|
||||
//=======================================================================//
|
||||
//------------------- 上限电压配置: P11_LPCTM->ANA0[7:6]
|
||||
/*
|
||||
上限电压表:
|
||||
0: 0.65V
|
||||
1: 0.70V
|
||||
2: 0.75V
|
||||
3: 0.80V
|
||||
*/
|
||||
enum LPCTM_VH_TABLE {
|
||||
LPCTMU_VH_065V = (0 << 6),
|
||||
LPCTMU_VH_070V = (1 << 6),
|
||||
LPCTMU_VH_075V = (2 << 6),
|
||||
LPCTMU_VH_080V = (3 << 6),
|
||||
};
|
||||
|
||||
//------------------- 下限电压配置: P11_LPCTM->ANA0[5:4]
|
||||
/*
|
||||
下限电压表:
|
||||
0: 0.20V
|
||||
1: 0.25V
|
||||
2: 0.30V
|
||||
3: 0.35V
|
||||
*/
|
||||
enum LPCTM_VL_TABLE {
|
||||
LPCTMU_VL_020V = (0 << 4),
|
||||
LPCTMU_VL_025V = (1 << 4),
|
||||
LPCTMU_VL_030V = (2 << 4),
|
||||
LPCTMU_VL_035V = (3 << 4),
|
||||
};
|
||||
|
||||
//------------------- 充放电电流配置: P11_LPCTM->ANA0[3:1]
|
||||
/*
|
||||
充放电电流表:
|
||||
0: 3.6 uA
|
||||
1: 7.2 uA
|
||||
2: 10.8 uA
|
||||
3: 14.4 uA
|
||||
4: 18.2 uA
|
||||
5: 21.6 uA
|
||||
6: 25.2 uA
|
||||
7: 28.8 uA
|
||||
*/
|
||||
enum LPCTM_ISEL_TABLE {
|
||||
LPCTMU_ISEL_036UA = (0 << 1),
|
||||
LPCTMU_ISEL_072UA = (1 << 1),
|
||||
LPCTMU_ISEL_108UA = (2 << 1),
|
||||
LPCTMU_ISEL_144UA = (3 << 1),
|
||||
LPCTMU_ISEL_180UA = (4 << 1),
|
||||
LPCTMU_ISEL_216UA = (5 << 1),
|
||||
LPCTMU_ISEL_252UA = (6 << 1),
|
||||
LPCTMU_ISEL_288UA = (7 << 1)
|
||||
};
|
||||
|
||||
u8 get_lpctmu_ana_level(void);
|
||||
|
||||
#define LPCTMU_ANA0_CONFIG(x) (P11_LPCTM->ANA0 = x)
|
||||
|
||||
/**********************************************************算法流程配置**********************************************************************************/
|
||||
#define CTMU_SAMPLE_RATE_PRD 20 //kick start采样周期, 单位: ms
|
||||
|
||||
#define CTMU_SHORT_CLICK_DELAY_TIME 400 //单击事件后等待下一次单击时间(ms)
|
||||
#define CTMU_HOLD_CLICK_DELAY_TIME 200 //long事件产生后, 发hold事件间隔(ms)
|
||||
#define CTMU_LONG_KEY_DELAY_TIME 2000 //从按下到产生long事件的时间(ms)
|
||||
|
||||
#endif /* #ifndef _LP_TOUCH_KEY_HW_H_ */
|
||||
|
||||
|
||||
29
include_lib/driver/cpu/br28/asm/lp_touch_key_tool.h
Normal file
29
include_lib/driver/cpu/br28/asm/lp_touch_key_tool.h
Normal file
@ -0,0 +1,29 @@
|
||||
#ifndef __LP_TOUCH_KEY_TOOL__
|
||||
#define __LP_TOUCH_KEY_TOOL__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
enum {
|
||||
BT_KEY_CH_RES_MSG,
|
||||
BT_EARTCH_RES_MSG,
|
||||
BT_EVENT_HW_MSG,
|
||||
BT_EVENT_SW_MSG,
|
||||
BT_EVENT_VDDIO,
|
||||
};
|
||||
|
||||
//tws
|
||||
void lpctmu_tws_send_event_data(int msg, int type);
|
||||
void lpctmu_tws_send_res_data(int data1, int data2, int data3, int data4, int data5, int type);
|
||||
|
||||
//spp
|
||||
int lp_touch_key_online_debug_init(void);
|
||||
int lp_touch_key_online_debug_send(u8 ch, u16 val);
|
||||
int lp_touch_key_online_debug_key_event_handle(u8 ch_index, struct sys_event *event);
|
||||
|
||||
//testbox
|
||||
u8 lp_touch_key_testbox_remote_test(u8 ch, u8 event);
|
||||
void lp_touch_key_testbox_inear_trim(u8 flag);
|
||||
|
||||
#endif
|
||||
|
||||
74
include_lib/driver/cpu/br28/asm/mcpwm.h
Normal file
74
include_lib/driver/cpu/br28/asm/mcpwm.h
Normal file
@ -0,0 +1,74 @@
|
||||
#ifndef _MCPWM_H_
|
||||
#define _MCPWM_H_
|
||||
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
|
||||
/* 对齐方式选择 */
|
||||
typedef enum {
|
||||
pwm_edge_aligned, ///< 边沿对齐模式
|
||||
pwm_center_aligned, ///< 中心对齐模式
|
||||
} pwm_aligned_mode_type;
|
||||
|
||||
/* pwm通道选择 */
|
||||
typedef enum {
|
||||
pwm_ch0,
|
||||
pwm_ch1,
|
||||
pwm_ch2,
|
||||
pwm_ch3,
|
||||
pwm_ch_max,
|
||||
} pwm_ch_num_type;
|
||||
|
||||
/* MCPWM TIMER寄存器 */
|
||||
typedef struct _pwm_timer_reg {
|
||||
volatile u32 tmr_con;
|
||||
volatile u32 tmr_cnt;
|
||||
volatile u32 tmr_pr;
|
||||
} PWM_TIMER_REG;
|
||||
|
||||
/* MCPWM通道寄存器 */
|
||||
typedef struct _pwm_ch_reg {
|
||||
volatile u32 ch_con0;
|
||||
volatile u32 ch_con1;
|
||||
volatile u32 ch_cmph;
|
||||
volatile u32 ch_cmpl;
|
||||
} PWM_CH_REG;
|
||||
|
||||
/* 初始化要用的参数结构体 */
|
||||
struct pwm_platform_data {
|
||||
pwm_aligned_mode_type pwm_aligned_mode; ///< PWM对齐方式选择
|
||||
pwm_ch_num_type pwm_ch_num; ///< 选择pwm通道号
|
||||
u32 frequency; ///< 初始共同频率，CH0, CH, CH2,,,,,,
|
||||
u16 duty; ///< 初始占空比，0~10000 对应 0%~100% 。每个通道可以有不同的占空比。互补模式的占空比体现在高引脚的波形上。
|
||||
u8 h_pin; ///< 一个通道的H引脚。
|
||||
u8 l_pin; ///< 一个通道的L引脚，不需要则填-1
|
||||
u8 complementary_en; ///< 该通道的两个引脚输出的波形。0: 同步， 1: 互补，互补波形的占空比体现在H引脚上
|
||||
};
|
||||
|
||||
|
||||
|
||||
void mcpwm_set_frequency(pwm_ch_num_type ch, pwm_aligned_mode_type align, u32 frequency);
|
||||
void mcpwm_set_duty(pwm_ch_num_type pwm_ch, u16 duty);
|
||||
void mctimer_ch_open_or_close(pwm_ch_num_type pwm_ch, u8 enable);
|
||||
void mcpwm_ch_open_or_close(pwm_ch_num_type pwm_ch, u8 enable);
|
||||
void mcpwm_open(pwm_ch_num_type pwm_ch);
|
||||
void mcpwm_close(pwm_ch_num_type pwm_ch);
|
||||
void mcpwm_init(struct pwm_platform_data *arg);
|
||||
void mcpwm_test(void);
|
||||
|
||||
|
||||
void set_io_ext_interrupt_cbfun(void (*cbfun)(u8 index));
|
||||
void io_ext_interrupt_init(u8 index, u8 port, u8 trigger_mode);
|
||||
void io_ext_interrupt_close(u8 index, u8 port);
|
||||
void io_ext_interrupt_test(void);
|
||||
|
||||
|
||||
void timer_pwm_init(JL_TIMER_TypeDef *JL_TIMERx, u32 pwm_io, u32 fre, u32 duty);
|
||||
void set_timer_pwm_duty(JL_TIMER_TypeDef *JL_TIMERx, u32 duty);
|
||||
void timer_pwm_test(void);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
29
include_lib/driver/cpu/br28/asm/plcnt.h
Normal file
29
include_lib/driver/cpu/br28/asm/plcnt.h
Normal file
@ -0,0 +1,29 @@
|
||||
#ifndef _PLCNT_DRV_H_
|
||||
#define _PLCNT_DRV_H_
|
||||
|
||||
|
||||
#define PLCNT_KEY_CH_MAX 3
|
||||
|
||||
struct touch_key_port {
|
||||
u16 press_delta; //按下判决的阈值
|
||||
u8 port; //触摸按键IO
|
||||
u8 key_value; //按键返回值
|
||||
};
|
||||
|
||||
struct touch_key_platform_data {
|
||||
u8 num; //触摸按键个数
|
||||
const struct touch_key_port *port_list;
|
||||
};
|
||||
|
||||
|
||||
/* =========== pclcnt API ============= */
|
||||
//plcnt 初始化
|
||||
int plcnt_init(void *_data);
|
||||
|
||||
//获取plcnt按键状态
|
||||
u8 get_plcnt_value(void);
|
||||
|
||||
|
||||
#endif /* _PLCNT_DRV_H_ */
|
||||
|
||||
|
||||
256
include_lib/driver/cpu/br28/asm/power/lp_ipc.h
Normal file
256
include_lib/driver/cpu/br28/asm/power/lp_ipc.h
Normal file
@ -0,0 +1,256 @@
|
||||
#ifndef __LP_IPC_H__
|
||||
#define __LP_IPC_H__
|
||||
|
||||
//=================================消息格式========================================
|
||||
|
||||
//消息buf大小
|
||||
#define MAX_POOL 128
|
||||
|
||||
//消息类型
|
||||
#define NO_MSG 0xff
|
||||
|
||||
//获取消息返回值
|
||||
enum {
|
||||
MSG_NO_ERROR = 0,
|
||||
MSG_NO_MSG = 0,
|
||||
MSG_EVENT_EXIST = -1,
|
||||
MSG_NOT_EVENT = -2,
|
||||
MSG_EVENT_PARAM_ERROR = -3,
|
||||
MSG_BUF_NOT_ENOUGH = -4,
|
||||
MSG_CBUF_ERROR = -5,
|
||||
};
|
||||
|
||||
//消息头格式
|
||||
#define MSG_HEADER_BYTE_LEN 3
|
||||
#define MSG_HEADER_BIT_LEN (MSG_HEADER_BYTE_LEN*8)
|
||||
#define MSG_HEADER_ALL_BIT ((1L<<MSG_HEADER_BIT_LEN) - 1)
|
||||
|
||||
#define MSG_INDEX_BIT 7
|
||||
#define MSG_ACK_BIT 1
|
||||
|
||||
#define MSG_TYPE_BIT_LEN 12
|
||||
#define MSG_PARAM_BIT_LEN (MSG_HEADER_BYTE_LEN*8-MSG_TYPE_BIT_LEN-MSG_INDEX_BIT-MSG_ACK_BIT)
|
||||
|
||||
//=================================M2P===========================================
|
||||
//M2P中断索引
|
||||
enum {
|
||||
M2P_LP_INDEX = 0,
|
||||
M2P_PF_INDEX,
|
||||
M2P_LLP_INDEX,
|
||||
M2P_P33_INDEX,
|
||||
M2P_SF_INDEX,
|
||||
M2P_CTMU_INDEX,
|
||||
M2P_CCMD_INDEX, //common cmd
|
||||
M2P_VAD_INDEX,
|
||||
M2P_USER_INDEX,
|
||||
M2P_WDT_INDEX,
|
||||
M2P_SYNC_INDEX,
|
||||
M2P_APP_INDEX,
|
||||
};
|
||||
|
||||
#define M2P_LRC_PRD M2P_MESSAGE_ACCESS(0x000)
|
||||
#define M2P_WDVDD M2P_MESSAGE_ACCESS(0x001)
|
||||
#define M2P_LRC_TMR_50us M2P_MESSAGE_ACCESS(0x002)
|
||||
#define M2P_LRC_TMR_200us M2P_MESSAGE_ACCESS(0x003)
|
||||
#define M2P_LRC_TMR_600us M2P_MESSAGE_ACCESS(0x004)
|
||||
#define M2P_VDDIO_KEEP M2P_MESSAGE_ACCESS(0x005)
|
||||
#define M2P_LRC_KEEP M2P_MESSAGE_ACCESS(0x006)
|
||||
#define M2P_SYNC_CMD M2P_MESSAGE_ACCESS(0x007)
|
||||
#define M2P_MESSAGE_VAD_CMD M2P_MESSAGE_ACCESS(0x008)
|
||||
#define M2P_MESSAGE_VAD_CBUF_RPTR M2P_MESSAGE_ACCESS(0x009)
|
||||
#define M2P_VDDIO_KEEP_TYPE M2P_MESSAGE_ACCESS(0x00a)
|
||||
#define M2P_RCH_FEQ_H M2P_MESSAGE_ACCESS(0x00b)
|
||||
#define M2P_MEM_CONTROL M2P_MESSAGE_ACCESS(0x00c)
|
||||
#define M2P_BTOSC_KEEP M2P_MESSAGE_ACCESS(0x00d)
|
||||
#define M2P_CTMU_KEEP M2P_MESSAGE_ACCESS(0x00e)
|
||||
#define M2P_RTC_KEEP M2P_MESSAGE_ACCESS(0x00f)
|
||||
#define M2P_WDT_SYNC M2P_MESSAGE_ACCESS(0x010)
|
||||
#define M2P_LIGHT_PDOWN_DVDD_VOL M2P_MESSAGE_ACCESS(0x011)
|
||||
#define M2P_PVDD_LEVEL_SLEEP_TRIM M2P_MESSAGE_ACCESS(0x012)
|
||||
|
||||
|
||||
/*触摸所有通道配置*/
|
||||
#define M2P_CTMU_CMD M2P_MESSAGE_ACCESS(0x18)
|
||||
#define M2P_CTMU_MSG M2P_MESSAGE_ACCESS(0x19)
|
||||
#define M2P_CTMU_PRD0 M2P_MESSAGE_ACCESS(0x1a)
|
||||
#define M2P_CTMU_PRD1 M2P_MESSAGE_ACCESS(0x1b)
|
||||
#define M2P_CTMU_CH_ENABLE M2P_MESSAGE_ACCESS(0x1c)
|
||||
#define M2P_CTMU_CH_DEBUG M2P_MESSAGE_ACCESS(0x1d)
|
||||
#define M2P_CTMU_CH_CFG M2P_MESSAGE_ACCESS(0x1e)
|
||||
#define M2P_CTMU_CH_WAKEUP_EN M2P_MESSAGE_ACCESS(0x1f)
|
||||
#define M2P_CTMU_EARTCH_CH M2P_MESSAGE_ACCESS(0x20)
|
||||
#define M2P_CTMU_TIME_BASE M2P_MESSAGE_ACCESS(0x21)
|
||||
|
||||
#define M2P_CTMU_LONG_TIMEL M2P_MESSAGE_ACCESS(0x22)
|
||||
#define M2P_CTMU_LONG_TIMEH M2P_MESSAGE_ACCESS(0x23)
|
||||
#define M2P_CTMU_HOLD_TIMEL M2P_MESSAGE_ACCESS(0x24)
|
||||
#define M2P_CTMU_HOLD_TIMEH M2P_MESSAGE_ACCESS(0x25)
|
||||
#define M2P_CTMU_SOFTOFF_LONG_TIMEL M2P_MESSAGE_ACCESS(0x26)
|
||||
#define M2P_CTMU_SOFTOFF_LONG_TIMEH M2P_MESSAGE_ACCESS(0x27)
|
||||
#define M2P_CTMU_LONG_PRESS_RESET_TIME_VALUE_L M2P_MESSAGE_ACCESS(0x28)//长按复位
|
||||
#define M2P_CTMU_LONG_PRESS_RESET_TIME_VALUE_H M2P_MESSAGE_ACCESS(0x29)//长按复位
|
||||
|
||||
#define M2P_CTMU_INEAR_VALUE_L M2P_MESSAGE_ACCESS(0x2a)
|
||||
#define M2P_CTMU_INEAR_VALUE_H M2P_MESSAGE_ACCESS(0x2b)
|
||||
#define M2P_CTMU_OUTEAR_VALUE_L M2P_MESSAGE_ACCESS(0x2c)
|
||||
#define M2P_CTMU_OUTEAR_VALUE_H M2P_MESSAGE_ACCESS(0x2d)
|
||||
#define M2P_CTMU_EARTCH_TRIM_VALUE_L M2P_MESSAGE_ACCESS(0x2e)
|
||||
#define M2P_CTMU_EARTCH_TRIM_VALUE_H M2P_MESSAGE_ACCESS(0x2f)
|
||||
|
||||
#define M2P_MASSAGE_CTMU_CH0_CFG0L 0x30
|
||||
#define M2P_MASSAGE_CTMU_CH0_CFG0H 0x31
|
||||
#define M2P_MASSAGE_CTMU_CH0_CFG1L 0x32
|
||||
#define M2P_MASSAGE_CTMU_CH0_CFG1H 0x33
|
||||
#define M2P_MASSAGE_CTMU_CH0_CFG2L 0x34
|
||||
#define M2P_MASSAGE_CTMU_CH0_CFG2H 0x35
|
||||
|
||||
#define M2P_CTMU_CH0_CFG0L M2P_MESSAGE_ACCESS(0x30)
|
||||
#define M2P_CTMU_CH0_CFG0H M2P_MESSAGE_ACCESS(0x31)
|
||||
#define M2P_CTMU_CH0_CFG1L M2P_MESSAGE_ACCESS(0x32)
|
||||
#define M2P_CTMU_CH0_CFG1H M2P_MESSAGE_ACCESS(0x33)
|
||||
#define M2P_CTMU_CH0_CFG2L M2P_MESSAGE_ACCESS(0x34)
|
||||
#define M2P_CTMU_CH0_CFG2H M2P_MESSAGE_ACCESS(0x35)
|
||||
|
||||
#define M2P_CTMU_CH1_CFG0L M2P_MESSAGE_ACCESS(0x38)
|
||||
#define M2P_CTMU_CH1_CFG0H M2P_MESSAGE_ACCESS(0x39)
|
||||
#define M2P_CTMU_CH1_CFG1L M2P_MESSAGE_ACCESS(0x3a)
|
||||
#define M2P_CTMU_CH1_CFG1H M2P_MESSAGE_ACCESS(0x3b)
|
||||
#define M2P_CTMU_CH1_CFG2L M2P_MESSAGE_ACCESS(0x3c)
|
||||
#define M2P_CTMU_CH1_CFG2H M2P_MESSAGE_ACCESS(0x3d)
|
||||
|
||||
#define M2P_CTMU_CH2_CFG0L M2P_MESSAGE_ACCESS(0x40)
|
||||
#define M2P_CTMU_CH2_CFG0H M2P_MESSAGE_ACCESS(0x41)
|
||||
#define M2P_CTMU_CH2_CFG1L M2P_MESSAGE_ACCESS(0x42)
|
||||
#define M2P_CTMU_CH2_CFG1H M2P_MESSAGE_ACCESS(0x43)
|
||||
#define M2P_CTMU_CH2_CFG2L M2P_MESSAGE_ACCESS(0x44)
|
||||
#define M2P_CTMU_CH2_CFG2H M2P_MESSAGE_ACCESS(0x45)
|
||||
|
||||
#define M2P_CTMU_CH3_CFG0L M2P_MESSAGE_ACCESS(0x48)
|
||||
#define M2P_CTMU_CH3_CFG0H M2P_MESSAGE_ACCESS(0x49)
|
||||
#define M2P_CTMU_CH3_CFG1L M2P_MESSAGE_ACCESS(0x4a)
|
||||
#define M2P_CTMU_CH3_CFG1H M2P_MESSAGE_ACCESS(0x4b)
|
||||
#define M2P_CTMU_CH3_CFG2L M2P_MESSAGE_ACCESS(0x4c)
|
||||
#define M2P_CTMU_CH3_CFG2H M2P_MESSAGE_ACCESS(0x4d)
|
||||
|
||||
#define M2P_CTMU_CH4_CFG0L M2P_MESSAGE_ACCESS(0x50)
|
||||
#define M2P_CTMU_CH4_CFG0H M2P_MESSAGE_ACCESS(0x51)
|
||||
#define M2P_CTMU_CH4_CFG1L M2P_MESSAGE_ACCESS(0x52)
|
||||
#define M2P_CTMU_CH4_CFG1H M2P_MESSAGE_ACCESS(0x53)
|
||||
#define M2P_CTMU_CH4_CFG2L M2P_MESSAGE_ACCESS(0x54)
|
||||
#define M2P_CTMU_CH4_CFG2H M2P_MESSAGE_ACCESS(0x55)
|
||||
#define M2P_RVD2PVDD_EN M2P_MESSAGE_ACCESS(0x56)
|
||||
#define M2P_PVDD_EXTERN_DCDC M2P_MESSAGE_ACCESS(0x57)
|
||||
|
||||
#define M2P_USER_PEND (0x58)
|
||||
#define M2P_USER_MSG_TYPE (0x59)
|
||||
#define M2P_USER_MSG_LEN0 (0x5a)
|
||||
#define M2P_USER_MSG_LEN1 (0x5b)
|
||||
#define M2P_USER_ADDR0 (0x5c)
|
||||
#define M2P_USER_ADDR1 (0x5d)
|
||||
#define M2P_USER_ADDR2 (0x5e)
|
||||
#define M2P_USER_ADDR3 (0x5f)
|
||||
|
||||
enum {
|
||||
CLOSE_P33_INTERRUPT = 1,
|
||||
OPEN_P33_INTERRUPT,
|
||||
LOWPOWER_PREPARE,
|
||||
M2P_SPIN_LOCK,
|
||||
M2P_SPIN_UNLOCK,
|
||||
P2M_SPIN_LOCK,
|
||||
P2M_SPIN_UNLOCK,
|
||||
M2P_WDT_CLEAR,
|
||||
|
||||
P2M_RESERVED_CMD = 0xFF,
|
||||
};
|
||||
|
||||
//=================================P2M===========================================
|
||||
//P2M中断索引
|
||||
enum {
|
||||
P2M_LP_INDEX = 0,
|
||||
P2M_PF_INDEX,
|
||||
P2M_LLP_INDEX,
|
||||
P2M_WK_INDEX,
|
||||
P2M_WDT_INDEX,
|
||||
P2M_LP_INDEX2,
|
||||
P2M_CTMU_INDEX,
|
||||
P2M_CTMU_POWUP,
|
||||
P2M_REPLY_CCMD_INDEX, //reply common cmd
|
||||
P2M_VAD_INDEX,
|
||||
P2M_USER_INDEX,
|
||||
P2M_BANK_INDEX,
|
||||
P2M_REPLY_SYNC_INDEX,
|
||||
P2M_APP_INDEX,
|
||||
};
|
||||
|
||||
#define P2M_WKUP_SRC P2M_MESSAGE_ACCESS(0x000)
|
||||
#define P2M_WKUP_PND0 P2M_MESSAGE_ACCESS(0x001)
|
||||
#define P2M_WKUP_PND1 P2M_MESSAGE_ACCESS(0x002)
|
||||
#define P2M_REPLY_SYNC_CMD P2M_MESSAGE_ACCESS(0x003)
|
||||
#define P2M_MESSAGE_VAD_CMD P2M_MESSAGE_ACCESS(0x004)
|
||||
#define P2M_MESSAGE_VAD_CBUF_WPTR P2M_MESSAGE_ACCESS(0x005)
|
||||
#define P2M_MESSAGE_BANK_ADR_L P2M_MESSAGE_ACCESS(0x006)
|
||||
#define P2M_MESSAGE_BANK_ADR_H P2M_MESSAGE_ACCESS(0x007)
|
||||
#define P2M_MESSAGE_BANK_INDEX P2M_MESSAGE_ACCESS(0x008)
|
||||
#define P2M_MESSAGE_BANK_ACK P2M_MESSAGE_ACCESS(0x009)
|
||||
#define P2M_P11_HEAP_BEGIN_ADDR_L P2M_MESSAGE_ACCESS(0x00A)
|
||||
#define P2M_P11_HEAP_BEGIN_ADDR_H P2M_MESSAGE_ACCESS(0x00B)
|
||||
#define P2M_P11_HEAP_SIZE_L P2M_MESSAGE_ACCESS(0x00C)
|
||||
#define P2M_P11_HEAP_SIZE_H P2M_MESSAGE_ACCESS(0x00D)
|
||||
|
||||
#define P2M_CTMU_KEY_EVENT P2M_MESSAGE_ACCESS(0x010)
|
||||
#define P2M_CTMU_KEY_CNT P2M_MESSAGE_ACCESS(0x011)
|
||||
#define P2M_CTMU_WKUP_MSG P2M_MESSAGE_ACCESS(0x012)
|
||||
#define P2M_CTMU_EARTCH_EVENT P2M_MESSAGE_ACCESS(0x013)
|
||||
|
||||
#define P2M_MASSAGE_CTMU_CH0_L_RES 0x014
|
||||
#define P2M_MASSAGE_CTMU_CH0_H_RES 0x015
|
||||
#define P2M_CTMU_CH0_L_RES P2M_MESSAGE_ACCESS(0x014)
|
||||
#define P2M_CTMU_CH0_H_RES P2M_MESSAGE_ACCESS(0x015)
|
||||
#define P2M_CTMU_CH1_L_RES P2M_MESSAGE_ACCESS(0x016)
|
||||
#define P2M_CTMU_CH1_H_RES P2M_MESSAGE_ACCESS(0x017)
|
||||
#define P2M_CTMU_CH2_L_RES P2M_MESSAGE_ACCESS(0x018)
|
||||
#define P2M_CTMU_CH2_H_RES P2M_MESSAGE_ACCESS(0x019)
|
||||
#define P2M_CTMU_CH3_L_RES P2M_MESSAGE_ACCESS(0x01a)
|
||||
#define P2M_CTMU_CH3_H_RES P2M_MESSAGE_ACCESS(0x01b)
|
||||
#define P2M_CTMU_CH4_L_RES P2M_MESSAGE_ACCESS(0x01c)
|
||||
#define P2M_CTMU_CH4_H_RES P2M_MESSAGE_ACCESS(0x01d)
|
||||
|
||||
#define P2M_CTMU_EARTCH_L_IIR_VALUE P2M_MESSAGE_ACCESS(0x01e)
|
||||
#define P2M_CTMU_EARTCH_H_IIR_VALUE P2M_MESSAGE_ACCESS(0x01f)
|
||||
#define P2M_CTMU_EARTCH_L_TRIM_VALUE P2M_MESSAGE_ACCESS(0x020)
|
||||
#define P2M_CTMU_EARTCH_H_TRIM_VALUE P2M_MESSAGE_ACCESS(0x021)
|
||||
#define P2M_CTMU_EARTCH_L_DIFF_VALUE P2M_MESSAGE_ACCESS(0x022)
|
||||
#define P2M_CTMU_EARTCH_H_DIFF_VALUE P2M_MESSAGE_ACCESS(0x023)
|
||||
|
||||
#define P2M_AWKUP_P_PND P2M_MESSAGE_ACCESS(0x024)
|
||||
#define P2M_AWKUP_N_PND P2M_MESSAGE_ACCESS(0x025)
|
||||
#define P2M_WKUP_RTC P2M_MESSAGE_ACCESS(0x026)
|
||||
|
||||
#define P2M_CBUF_ADDR0 P2M_MESSAGE_ACCESS(0x027)
|
||||
#define P2M_CBUF_ADDR1 P2M_MESSAGE_ACCESS(0x028)
|
||||
#define P2M_CBUF_ADDR2 P2M_MESSAGE_ACCESS(0x029)
|
||||
#define P2M_CBUF_ADDR3 P2M_MESSAGE_ACCESS(0x02a)
|
||||
|
||||
#define P2M_CBUF1_ADDR0 P2M_MESSAGE_ACCESS(0x02b)
|
||||
#define P2M_CBUF1_ADDR1 P2M_MESSAGE_ACCESS(0x02c)
|
||||
#define P2M_CBUF1_ADDR2 P2M_MESSAGE_ACCESS(0x02d)
|
||||
#define P2M_CBUF1_ADDR3 P2M_MESSAGE_ACCESS(0x02e)
|
||||
|
||||
#define P2M_USER_PEND (0x038)//传感器使用或者开放客户使用
|
||||
#define P2M_USER_MSG_TYPE (0x039)
|
||||
#define P2M_USER_MSG_LEN0 (0x03a)
|
||||
#define P2M_USER_MSG_LEN1 (0x03b)
|
||||
#define P2M_USER_ADDR0 (0x03c)
|
||||
#define P2M_USER_ADDR1 (0x03d)
|
||||
#define P2M_USER_ADDR2 (0x03e)
|
||||
#define P2M_USER_ADDR3 (0x040)
|
||||
|
||||
#include "m2p_msg.h"
|
||||
#include "p2m_msg.h"
|
||||
|
||||
|
||||
void msys_to_p11_sync_cmd(u8 cmd);
|
||||
|
||||
void lp_ipc_init();
|
||||
|
||||
#endif
|
||||
89
include_lib/driver/cpu/br28/asm/power/m2p_msg.h
Normal file
89
include_lib/driver/cpu/br28/asm/power/m2p_msg.h
Normal file
@ -0,0 +1,89 @@
|
||||
#ifndef __M2P_MSG_H__
|
||||
#define __M2P_MSG_H__
|
||||
|
||||
//m2p用户消息类型
|
||||
enum {
|
||||
M2P_MSG_ACK = BIT(0),
|
||||
M2P_MSG_TEST = BIT(1),
|
||||
M2P_MSG_COMMOM = BIT(2),
|
||||
M2P_MSG_CTMU = BIT(3),
|
||||
M2P_MSG_SENSOR = BIT(4),
|
||||
M2P_MSG_VAD = BIT(5),
|
||||
};
|
||||
|
||||
//测试
|
||||
struct m2p_msg_test {
|
||||
u8 dat;
|
||||
};
|
||||
|
||||
//测试
|
||||
struct m2p_msg_ack {
|
||||
u8 dat;
|
||||
};
|
||||
|
||||
//公共消息
|
||||
struct m2p_msg_common {
|
||||
u8 dat;
|
||||
};
|
||||
|
||||
//触摸消息
|
||||
struct m2p_msg_ctmu {
|
||||
u8 dat;
|
||||
};
|
||||
|
||||
//vad
|
||||
struct m2p_msg_vad {
|
||||
u8 dat;
|
||||
};
|
||||
|
||||
//m2p用户消息格式
|
||||
struct m2p_msg_head {
|
||||
u16 type :
|
||||
MSG_TYPE_BIT_LEN;
|
||||
u16 len :
|
||||
MSG_PARAM_BIT_LEN;
|
||||
u8 index :
|
||||
MSG_INDEX_BIT;
|
||||
u8 ack :
|
||||
MSG_ACK_BIT;
|
||||
} __attribute__((packed));
|
||||
|
||||
struct m2p_msg {
|
||||
struct m2p_msg_head head;
|
||||
union {
|
||||
struct m2p_msg_ack ack;
|
||||
struct m2p_msg_test test;
|
||||
struct m2p_msg_common com;
|
||||
struct m2p_msg_ctmu ctmu;
|
||||
struct m2p_msg_vad vad;
|
||||
} u;
|
||||
} __attribute__((packed));
|
||||
|
||||
//m2p用户消息对应处理
|
||||
struct m2p_msg_handler {
|
||||
u8 type;
|
||||
void (*handler)(struct m2p_msg *);
|
||||
} __attribute__((packed));
|
||||
|
||||
#define REGISTER_M2P_MSG_HANDLER(_type, fn, pri) \
|
||||
const struct m2p_msg_handler _##fn SEC_USED(.m2p_msg_handler)= { \
|
||||
.type = _type, \
|
||||
.handler = fn, \
|
||||
}
|
||||
|
||||
extern struct m2p_msg_handler m2p_msg_handler_begin[];
|
||||
extern struct m2p_msg_handler m2p_msg_handler_end[];
|
||||
|
||||
#define list_for_each_m2p_msg_handler(p) \
|
||||
for (p = m2p_msg_handler_begin; p < m2p_msg_handler_end; p++)
|
||||
|
||||
int m2p_get_msg(int len, struct m2p_msg *msg);
|
||||
|
||||
int m2p_post_msg(int len, struct m2p_msg *msg);
|
||||
|
||||
int m2p_post_sync_msg(int len, struct m2p_msg *msg, u8 abandon, int timeout);
|
||||
|
||||
void msys_to_p11_sys_cmd(u8 cmd);
|
||||
|
||||
|
||||
#endif
|
||||
23
include_lib/driver/cpu/br28/asm/power/p11.h
Normal file
23
include_lib/driver/cpu/br28/asm/power/p11.h
Normal file
@ -0,0 +1,23 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : p11.h
|
||||
|
||||
* Description :
|
||||
|
||||
* Author : Bingquan
|
||||
|
||||
* Email : caibingquan@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2019-12-09 10:21
|
||||
|
||||
* Copyright:(c)JIELI 2011-2019 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
#ifndef __P11_H__
|
||||
#define __P11_H__
|
||||
|
||||
#include "p11_csfr.h"
|
||||
#include "p11_sfr.h"
|
||||
#include "p11_app.h"
|
||||
|
||||
#endif /* #ifndef __P11_H__ */
|
||||
|
||||
|
||||
239
include_lib/driver/cpu/br28/asm/power/p11_app.h
Normal file
239
include_lib/driver/cpu/br28/asm/power/p11_app.h
Normal file
@ -0,0 +1,239 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : p11_app.h
|
||||
|
||||
* Description : 本文件基于p11.h文件封装应用的接口
|
||||
|
||||
* Author : MoZhiYe
|
||||
|
||||
* Email : mozhiye@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2021-04-19 09:00
|
||||
|
||||
* Copyright:(c)JIELI 2021-2029 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
#ifndef __P11_APP_H__
|
||||
#define __P11_APP_H__
|
||||
|
||||
#include "p11.h"
|
||||
|
||||
/*
|
||||
|
||||
_______________ <-----P11 Message Acess End
|
||||
| poweroff boot |
|
||||
|_______________|
|
||||
| m2p msg(0x40) |
|
||||
|_______________|
|
||||
| p2m msg(0x40) |
|
||||
|_______________|<-----P11 Message Acess Begin
|
||||
| |
|
||||
| p11 use |
|
||||
|_______________|__
|
||||
|
||||
*/
|
||||
#define P11_RAM_BASE 0xF20000
|
||||
#define P11_RAM_SIZE (0x8000)
|
||||
#define P11_RAM_END (P11_RAM_BASE + P11_RAM_SIZE)
|
||||
|
||||
#define P11_POWEROFF_RAM_SIZE (0x14 + 0xc)
|
||||
#define P11_POWEROFF_RAM_BEGIN (P11_RAM_END - P11_POWEROFF_RAM_SIZE)
|
||||
|
||||
#define P2M_MESSAGE_SIZE 0x40
|
||||
#define M2P_MESSAGE_SIZE 0x60
|
||||
|
||||
#define M2P_MESSAGE_RAM_BEGIN (P11_POWEROFF_RAM_BEGIN - M2P_MESSAGE_SIZE)
|
||||
#define P2M_MESSAGE_RAM_BEGIN (M2P_MESSAGE_RAM_BEGIN - P2M_MESSAGE_SIZE)
|
||||
|
||||
#define P11_MESSAGE_RAM_BEGIN (P2M_MESSAGE_RAM_BEGIN)
|
||||
|
||||
#define P11_RAM_ACCESS(x) (*(volatile u8 *)(x))
|
||||
|
||||
#define P2M_MESSAGE_ACCESS(x) P11_RAM_ACCESS(P2M_MESSAGE_RAM_BEGIN + x)
|
||||
#define M2P_MESSAGE_ACCESS(x) P11_RAM_ACCESS(M2P_MESSAGE_RAM_BEGIN + x)
|
||||
|
||||
//==========================================================//
|
||||
// P11_VAD_RAM //
|
||||
//==========================================================//
|
||||
//-------------------------- VAD CBUF-----------------------//
|
||||
#define VAD_POINT_PER_FRAME (160)
|
||||
#define VAD_FRAME_SIZE (160 * 2)
|
||||
#define VAD_CBUF_FRAME_CNT (6)
|
||||
#define VAD_CBUF_TAG_SIZE (0)
|
||||
#define VAD_CBUF_FRAME_SIZE (VAD_FRAME_SIZE + VAD_CBUF_TAG_SIZE)
|
||||
#define CONFIG_P11_CBUF_SIZE (VAD_CBUF_FRAME_SIZE * VAD_CBUF_FRAME_CNT)
|
||||
#define VAD_CBUF_END (P11_MESSAGE_RAM_BEGIN - 0x20)
|
||||
#define VAD_CBUF_BEGIN (VAD_CBUF_END - CONFIG_P11_CBUF_SIZE)
|
||||
|
||||
//------------------------ VAD CONFIG-----------------------//
|
||||
#define CONFIG_P2M_AVAD_CONFIG_SIZE (20 * 4) //sizeof(int)
|
||||
#define CONFIG_P2M_DVAD_CONFIG_SIZE (20 * 4) //sizeof(int)
|
||||
#define CONFIG_VAD_CONFIG_SIZE (CONFIG_P2M_AVAD_CONFIG_SIZE + CONFIG_P2M_DVAD_CONFIG_SIZE)
|
||||
#define VAD_AVAD_CONFIG_BEGIN (VAD_CBUF_BEGIN - CONFIG_P2M_AVAD_CONFIG_SIZE)
|
||||
#define VAD_DVAD_CONFIG_BEGIN (VAD_AVAD_CONFIG_BEGIN - CONFIG_P2M_DVAD_CONFIG_SIZE)
|
||||
|
||||
#define P11_HEAP_BEGIN (P11_RAM_BASE + ((P2M_P11_HEAP_BEGIN_ADDR_H << 8) | P2M_P11_HEAP_BEGIN_ADDR_L))
|
||||
#define P11_HEAP_SIZE ((P2M_P11_HEAP_SIZE_H << 8) | P2M_P11_HEAP_SIZE_L)
|
||||
|
||||
#define P11_RAM_PROTECT_END (P11_HEAP_BEGIN)
|
||||
|
||||
|
||||
#define P11_PWR_CON P11_CLOCK->PWR_CON
|
||||
|
||||
/*
|
||||
*------------------- P11_CLOCK->CLK_CON
|
||||
*/
|
||||
|
||||
#define P11_CLK_CON0 P11_CLOCK->CLK_CON0
|
||||
enum P11_SYS_CLK_TABLE {
|
||||
P11_SYS_CLK_RC250K = 0,
|
||||
P11_SYS_CLK_RC16M,
|
||||
P11_SYS_CLK_LRC_OSC,
|
||||
P11_SYS_CLK_BTOSC_24M,
|
||||
P11_SYS_CLK_BTOSC_48M,
|
||||
P11_SYS_CLK_PLL_SYS_CLK,
|
||||
P11_SYS_CLK_CLK_X2,
|
||||
};
|
||||
//#define P11_SYS_CLK_SEL(x) SFR(P11_CLOCK->CLK_CON0, 0, 3, x)
|
||||
#define P11_SYS_CLK_SEL(x) (P11_CLOCK->CLK_CON0 = x)
|
||||
|
||||
|
||||
//p11 btosc use d2sh
|
||||
#define CLOCK_KEEP(en) \
|
||||
if(en){ \
|
||||
P11_CLOCK->CLK_CON1 &= ~(3<<15); \
|
||||
P11_CLOCK->CLK_CON1 |= BIT(14); \
|
||||
P11_CLOCK->CLK_CON1 |= (2<<15); \
|
||||
}else{ \
|
||||
P11_CLOCK->CLK_CON1 &= ~(3<<15); \
|
||||
P11_CLOCK->CLK_CON1 &= ~BIT(14); \
|
||||
}
|
||||
|
||||
#define P11_P2M_CLK_CON0 P11_SYSTEM->P2M_CLK_CON0
|
||||
#define P11_SYSTEM_CON0 P11_SYSTEM->P11_SYS_CON0
|
||||
#define P11_SYSTEM_CON1 P11_SYSTEM->P11_SYS_CON1
|
||||
#define P11_P11_SYS_CON0 P11_SYSTEM_CON0
|
||||
#define P11_P11_SYS_CON1 P11_SYSTEM_CON1
|
||||
#define P11_RST_SRC P11_CLOCK->RST_SRC
|
||||
|
||||
#define LED_CLK_SEL(x) P11_SYSTEM->P2M_CLK_CON0 = ((P11_SYSTEM->P2M_CLK_CON0 & ~0xe0) | (x) << 5)
|
||||
#define GET_LED_CLK_SEL(x) (P11_SYSTEM->P2M_CLK_CON0 & 0xe0)
|
||||
|
||||
#define P11_WDT_CON P11_WDT->CON
|
||||
|
||||
#define P11_P2M_INT_IE P11_SYSTEM->P2M_INT_IE
|
||||
#define P11_M2P_INT_IE P11_SYSTEM->M2P_INT_IE
|
||||
#define P11_M2P_INT_SET P11_SYSTEM->M2P_INT_SET
|
||||
#define P11_P2M_INT_SET P11_SYSTEM->P2M_INT_SET
|
||||
#define P11_P2M_INT_CLR P11_SYSTEM->P2M_INT_CLR
|
||||
#define P11_P2M_INT_PND P11_SYSTEM->P2M_INT_PND //?
|
||||
#define P11_M2P_INT_PND P11_SYSTEM->M2P_INT_PND //?
|
||||
|
||||
#define P11_TMR0_CON0 P11_LPTMR0->CON0
|
||||
#define P11_TMR0_CON1 P11_LPTMR0->CON1
|
||||
#define P11_TMR0_CON2 P11_LPTMR0->CON2
|
||||
#define P11_TMR0_CNT P11_LPTMR0->CNT
|
||||
#define P11_TMR0_PRD P11_LPTMR0->PRD
|
||||
#define P11_TMR0_RSC P11_LPTMR0->RSC
|
||||
|
||||
#define P11_TMR1_CON0 P11_LPTMR1->CON0
|
||||
#define P11_TMR1_CON1 P11_LPTMR1->CON1
|
||||
#define P11_TMR1_CON2 P11_LPTMR1->CON2
|
||||
#define P11_TMR1_CNT P11_LPTMR1->CNT
|
||||
#define P11_TMR1_PRD P11_LPTMR1->PRD
|
||||
#define P11_TMR1_RSC P11_LPTMR1->RSC
|
||||
|
||||
#define P11_TMR2_CON0 P11_LPTMR2->CON0
|
||||
#define P11_TMR2_CON1 P11_LPTMR2->CON1
|
||||
#define P11_TMR2_CON2 P11_LPTMR2->CON2
|
||||
#define P11_TMR2_CNT P11_LPTMR2->CNT
|
||||
#define P11_TMR2_PRD P11_LPTMR2->PRD
|
||||
#define P11_TMR2_RSC P11_LPTMR2->RSC
|
||||
|
||||
#define P11_TMR3_CON0 P11_LPTMR3->CON0
|
||||
#define P11_TMR3_CON1 P11_LPTMR3->CON1
|
||||
#define P11_TMR3_CON2 P11_LPTMR3->CON2
|
||||
#define P11_TMR3_CNT P11_LPTMR3->CNT
|
||||
#define P11_TMR3_PRD P11_LPTMR3->PRD
|
||||
#define P11_TMR3_RSC P11_LPTMR3->RSC
|
||||
|
||||
#define GET_P11_SYS_RST_SRC() P11_RST_SRC
|
||||
|
||||
#define LP_PWR_IDLE(x) SFR(P11_PWR_CON, 0, 1, x)
|
||||
#define LP_PWR_STANDBY(x) SFR(P11_PWR_CON, 1, 1, x)
|
||||
#define LP_PWR_SLEEP(x) SFR(P11_PWR_CON, 2, 1, x)
|
||||
#define LP_PWR_SSMODE(x) SFR(P11_PWR_CON, 3, 1, x)
|
||||
#define LP_PWR_SOFT_RESET(x) SFR(P11_PWR_CON, 4, 1, x)
|
||||
#define LP_PWR_INIT_FLAG() (P11_PWR_CON & BIT(5))
|
||||
#define LP_PWR_RST_FLAG_CLR(x) SFR(P11_PWR_CON, 6, 1, x)
|
||||
#define LP_PWR_RST_FLAG() (P11_PWR_CON & BIT(7))
|
||||
|
||||
#define P33_TEST_ENABLE() P11_P11_SYS_CON0 |= BIT(5)
|
||||
#define P33_TEST_DISABLE() P11_P11_SYS_CON0 &= ~BIT(5)
|
||||
|
||||
#define P11_TX_DISABLE(x) P11_SYSTEM->P11_SYS_CON1 |= BIT(2)
|
||||
#define P11_TX_ENABLE(x) P11_SYSTEM->P11_SYS_CON1 &= ~BIT(2)
|
||||
|
||||
#define MSYS_IO_LATCH_ENABLE() P11_SYSTEM->P11_SYS_CON1 |= BIT(7)
|
||||
#define MSYS_IO_LATCH_DISABLE() P11_SYSTEM->P11_SYS_CON1 &= ~BIT(7)
|
||||
|
||||
#define LP_TMR0_EN(x) SFR(P11_TMR0_CON0, 0, 1, x)
|
||||
#define LP_TMR0_CTU(x) SFR(P11_TMR0_CON0, 1, 1, x)
|
||||
#define LP_TMR0_P11_WKUP_IE(x) SFR(P11_TMR0_CON0, 2, 1, x)
|
||||
#define LP_TMR0_P11_TO_IE(x) SFR(P11_TMR0_CON0, 3, 1, x)
|
||||
#define LP_TMR0_CLR_P11_WKUP(x) SFR(P11_TMR0_CON0, 4, 1, x)
|
||||
#define LP_TMR0_P11_WKUP(x) (P11_TMR0_CON0 & BIT(5))
|
||||
#define LP_TMR0_CLR_P11_TO(x) SFR(P11_TMR0_CON0, 6, 1, x)
|
||||
#define LP_TMR0_P11_TO(x) (P11_TMR0_CON0 & BIT(7))
|
||||
|
||||
#define LP_TMR0_SW_KICK_START_EN(x) SFR(P11_TMR0_CON1, 0, 1, x)
|
||||
#define LP_TMR0_HW_KICK_START_EN(x) SFR(P11_TMR0_CON1, 1, 1, x)
|
||||
#define LP_TMR0_WKUP_IE(x) SFR(P11_TMR0_CON1, 2, 1, x)
|
||||
#define LP_TMR0_TO_IE(x) SFR(P11_TMR0_CON1, 3, 1, x)
|
||||
#define LP_TMR0_CLR_MSYS_WKUP(x) SFR(P11_TMR0_CON1, 4, 1, x)
|
||||
#define LP_TMR0_MSYS_WKUP(x) (P11_TMR0_CON1 & BIT(5))
|
||||
#define LP_TMR0_CLR_MSYS_TO(x) SFR(P11_TMR0_CON1, 6, 1, x)
|
||||
#define LP_TMR0_MSYS_TO(x) (P11_TMR0_CON1 & BIT(7))
|
||||
|
||||
#define LP_TMR0_CLK_SEL(x) SFR(P11_TMR0_CON2, 0, 4, x)
|
||||
#define LP_TMR0_CLK_DIV(x) SFR(P11_TMR0_CON2, 4, 4, x)
|
||||
#define LP_TMR0_KST(x) SFR(P11_TMR0_CON2, 8, 1, x)
|
||||
#define LP_TMR0_RUN() (P11_TMR0_CON2 & BIT(9))
|
||||
|
||||
#define P11_M2P_RESET_MASK(x) SFR(P11_P11_SYS_CON1 , 4, 1, x)
|
||||
|
||||
//MEM_PWR_CON
|
||||
#define MEM_PWR_CPU_CON BIT(0)
|
||||
#define MEM_PWR_RAM0_RAM3_CON BIT(1)
|
||||
#define MEM_PWR_RAM4_RAM5_CON BIT(2)
|
||||
#define MEM_PWR_RAM6_RAM7_CON BIT(3)
|
||||
#define MEM_PWR_RAM8_RAM9_CON BIT(4)
|
||||
#define MEM_PWR_PERIPH_CON BIT(5)
|
||||
|
||||
#define MEM_PWR_RAM_SET(a) (((1 << a) - 1) - 1)
|
||||
|
||||
#define LRC_Hz_DEFAULT (200 * 1000L)
|
||||
|
||||
#define LRC_CON0_INIT \
|
||||
/* */ (0 << 7) |\
|
||||
/* */ (0 << 6) |\
|
||||
/*RC32K_RPPS_S1_33v */ (1 << 5) |\
|
||||
/*RC32K_RPPS_S0_33v */ (0 << 4) |\
|
||||
/* */ (0 << 3) |\
|
||||
/* */ (0 << 2) |\
|
||||
/*RC32K_RN_TRIM_33v */ (0 << 1) |\
|
||||
/*RC32K_EN_33v */ (1 << 0)
|
||||
|
||||
#define LRC_CON1_INIT \
|
||||
/* */ (0 << 7) |\
|
||||
/*RC32K_CAP_S2_33v */ (1 << 6) |\
|
||||
/*RC32K_CAP_S1_33v */ (0 << 5) |\
|
||||
/*RC32K_CAP_S0_33v */ (0 << 4) |\
|
||||
/* 2bit */ (0 << 2) |\
|
||||
/*RC32K_RNPS_S1_33v */ (0 << 1) |\
|
||||
/*RC32K_RNPS_S0_33v */ (1 << 0)
|
||||
|
||||
void wdt_isr(void);
|
||||
u8 p11_run_query(void);
|
||||
|
||||
#endif /* #ifndef __P11_APP_H__ */
|
||||
|
||||
|
||||
176
include_lib/driver/cpu/br28/asm/power/p11_csfr.h
Normal file
176
include_lib/driver/cpu/br28/asm/power/p11_csfr.h
Normal file
@ -0,0 +1,176 @@
|
||||
//*********************************************************************************//
|
||||
// Module name : csfr.h //
|
||||
// Description : q32small core sfr define //
|
||||
// By Designer : zequan_liu //
|
||||
// Dat changed : //
|
||||
//*********************************************************************************//
|
||||
|
||||
#ifndef __P11_Q32S_CSFR__
|
||||
#define __P11_Q32S_CSFR__
|
||||
|
||||
#define __RW volatile // read write
|
||||
#define __RO volatile const // only read
|
||||
#define __WO volatile // only write
|
||||
|
||||
#define __u8 unsigned int // u8 to u32 special for struct
|
||||
#define __u16 unsigned int // u16 to u32 special for struct
|
||||
#define __u32 unsigned int
|
||||
|
||||
//---------------------------------------------//
|
||||
// q32small define
|
||||
//---------------------------------------------//
|
||||
|
||||
#ifdef PMU_SYSTEM
|
||||
#define p11_q32s_sfr_base 0x00a000
|
||||
#define p11_q32s_sfr_offset 0x000000 // multi_core used
|
||||
#else
|
||||
#define p11_q32s_sfr_base 0xf2a000
|
||||
#define p11_q32s_sfr_offset 0x000000 // multi_core used
|
||||
#endif
|
||||
|
||||
#define p11_q32s_cpu_base (p11_q32s_sfr_base + 0x00)
|
||||
#define p11_q32s_mpu_base (p11_q32s_sfr_base + 0x80)
|
||||
|
||||
#define p11_q32s(n) ((JL_TypeDef_p11_q32s *)(p11_q32s_sfr_base + p11_q32s_sfr_offset*n))
|
||||
#define p11_q32s_mpu(n) ((JL_TypeDef_p11_q32s_MPU *)(p11_q32s_mpu_base + p11_q32s_sfr_offset*n))
|
||||
|
||||
//---------------------------------------------//
|
||||
// q32small core sfr
|
||||
//---------------------------------------------//
|
||||
|
||||
typedef struct {
|
||||
/* 00 */ __RO __u32 DR00;
|
||||
/* 01 */ __RO __u32 DR01;
|
||||
/* 02 */ __RO __u32 DR02;
|
||||
/* 03 */ __RO __u32 DR03;
|
||||
/* 04 */ __RO __u32 DR04;
|
||||
/* 05 */ __RO __u32 DR05;
|
||||
/* 06 */ __RO __u32 DR06;
|
||||
/* 07 */ __RO __u32 DR07;
|
||||
/* 08 */ __RO __u32 DR08;
|
||||
/* 09 */ __RO __u32 DR09;
|
||||
/* 0a */ __RO __u32 DR10;
|
||||
/* 0b */ __RO __u32 DR11;
|
||||
/* 0c */ __RO __u32 DR12;
|
||||
/* 0d */ __RO __u32 DR13;
|
||||
/* 0e */ __RO __u32 DR14;
|
||||
/* 0f */ __RO __u32 DR15;
|
||||
|
||||
/* 10 */ __RO __u32 RETI;
|
||||
/* 11 */ __RO __u32 RETE;
|
||||
/* 12 */ __RO __u32 RETX;
|
||||
/* 13 */ __RO __u32 RETS;
|
||||
/* 14 */ __RO __u32 SR04;
|
||||
/* 15 */ __RO __u32 PSR;
|
||||
/* 16 */ __RO __u32 CNUM;
|
||||
/* 17 */ __RO __u32 SR07;
|
||||
/* 18 */ __RO __u32 SR08;
|
||||
/* 19 */ __RO __u32 SR09;
|
||||
/* 1a */ __RO __u32 SR10;
|
||||
/* 1b */ __RO __u32 ICFG;
|
||||
/* 1c */ __RO __u32 USP;
|
||||
/* 1d */ __RO __u32 SSP;
|
||||
/* 1e */ __RO __u32 SP;
|
||||
/* 1f */ __RO __u32 PCRS;
|
||||
|
||||
/* 20 */ __RW __u32 BPCON;
|
||||
/* 21 */ __RW __u32 BSP;
|
||||
/* 22 */ __RW __u32 BP0;
|
||||
/* 23 */ __RW __u32 BP1;
|
||||
/* 24 */ __RW __u32 BP2;
|
||||
/* 25 */ __RW __u32 BP3;
|
||||
/* 26 */ __WO __u32 CMD_PAUSE;
|
||||
/* */ __RO __u32 REV_30_26[0x30 - 0x26 - 1];
|
||||
|
||||
/* 30 */ __RW __u32 PMU_CON;
|
||||
/* */ __RO __u32 REV_3b_30[0x3b - 0x30 - 1];
|
||||
/* 3b */ __RW __u8 TTMR_CON;
|
||||
/* 3c */ __RW __u32 TTMR_CNT;
|
||||
/* 3d */ __RW __u32 TTMR_PRD;
|
||||
/* 3e */ __RW __u32 BANK_CON;
|
||||
/* 3f */ __RW __u32 BANK_NUM;
|
||||
|
||||
/* 40 */ __RW __u32 ICFG00;
|
||||
/* 41 */ __RW __u32 ICFG01;
|
||||
/* 42 */ __RW __u32 ICFG02;
|
||||
/* 43 */ __RW __u32 ICFG03;
|
||||
/* 44 */ __RW __u32 ICFG04;
|
||||
/* 45 */ __RW __u32 ICFG05;
|
||||
/* 46 */ __RW __u32 ICFG06;
|
||||
/* 47 */ __RW __u32 ICFG07;
|
||||
/* 48 */ __RW __u32 ICFG08;
|
||||
/* 49 */ __RW __u32 ICFG09;
|
||||
/* 4a */ __RW __u32 ICFG10;
|
||||
/* 4b */ __RW __u32 ICFG11;
|
||||
/* 4c */ __RW __u32 ICFG12;
|
||||
/* 4d */ __RW __u32 ICFG13;
|
||||
/* 4e */ __RW __u32 ICFG14;
|
||||
/* 4f */ __RW __u32 ICFG15;
|
||||
|
||||
/* 50 */ __RW __u32 ICFG16;
|
||||
/* 51 */ __RW __u32 ICFG17;
|
||||
/* 52 */ __RW __u32 ICFG18;
|
||||
/* 53 */ __RW __u32 ICFG19;
|
||||
/* 54 */ __RW __u32 ICFG20;
|
||||
/* 55 */ __RW __u32 ICFG21;
|
||||
/* 56 */ __RW __u32 ICFG22;
|
||||
/* 57 */ __RW __u32 ICFG23;
|
||||
/* 58 */ __RW __u32 ICFG24;
|
||||
/* 59 */ __RW __u32 ICFG25;
|
||||
/* 5a */ __RW __u32 ICFG26;
|
||||
/* 5b */ __RW __u32 ICFG27;
|
||||
/* 5c */ __RW __u32 ICFG28;
|
||||
/* 5d */ __RW __u32 ICFG29;
|
||||
/* 5e */ __RW __u32 ICFG30;
|
||||
/* 5f */ __RW __u32 ICFG31;
|
||||
|
||||
/* 60 */ __RO __u32 IPND0;
|
||||
/* 61 */ __RO __u32 IPND1;
|
||||
/* 62 */ __RO __u32 IPND2;
|
||||
/* 63 */ __RO __u32 IPND3;
|
||||
/* 64 */ __RO __u32 IPND4;
|
||||
/* 65 */ __RO __u32 IPND5;
|
||||
/* 66 */ __RO __u32 IPND6;
|
||||
/* 67 */ __RO __u32 IPND7;
|
||||
/* 68 */ __WO __u32 ILAT_SET;
|
||||
/* 69 */ __WO __u32 ILAT_CLR;
|
||||
/* 6a */ __RW __u32 IPMASK;
|
||||
/* 6b */ __RW __u32 GIEMASK;
|
||||
/* 6c */ __RW __u32 IWKUP_NUM;
|
||||
/* */ __RO __u32 REV_70_6c[0x70 - 0x6c - 1];
|
||||
|
||||
/* 70 */ __RW __u32 ETM_CON;
|
||||
/* 71 */ __RO __u32 ETM_PC0;
|
||||
/* 72 */ __RO __u32 ETM_PC1;
|
||||
/* 73 */ __RO __u32 ETM_PC2;
|
||||
/* 74 */ __RO __u32 ETM_PC3;
|
||||
/* 75 */ __RW __u32 WP0_ADRH;
|
||||
/* 76 */ __RW __u32 WP0_ADRL;
|
||||
/* 77 */ __RW __u32 WP0_DATH;
|
||||
/* 78 */ __RW __u32 WP0_DATL;
|
||||
/* 79 */ __RW __u32 WP0_PC;
|
||||
|
||||
/* */ __RO __u32 REV_80_79[0x80 - 0x79 - 1];
|
||||
/* 80 */ __RW __u32 EMU_CON;
|
||||
/* 81 */ __RW __u32 EMU_MSG;
|
||||
/* 82 */ __RO __u32 EMU_SSP_H;
|
||||
/* 83 */ __RO __u32 EMU_SSP_L;
|
||||
/* 84 */ __RO __u32 EMU_USP_H;
|
||||
/* 85 */ __RO __u32 EMU_USP_L;
|
||||
} JL_TypeDef_p11_q32s;
|
||||
|
||||
#undef __RW
|
||||
#undef __RO
|
||||
#undef __WO
|
||||
|
||||
#undef __u8
|
||||
#undef __u16
|
||||
#undef __u32
|
||||
|
||||
#endif
|
||||
|
||||
//*********************************************************************************//
|
||||
// //
|
||||
// end of this module //
|
||||
// //
|
||||
//*********************************************************************************//
|
||||
38
include_lib/driver/cpu/br28/asm/power/p11_io_imap.h
Normal file
38
include_lib/driver/cpu/br28/asm/power/p11_io_imap.h
Normal file
@ -0,0 +1,38 @@
|
||||
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// input IO define
|
||||
//
|
||||
//===============================================================================//
|
||||
#define P11_PB0_IN 1
|
||||
#define P11_PB1_IN 2
|
||||
#define P11_PB2_IN 3
|
||||
#define P11_PB3_IN 4
|
||||
#define P11_PB4_IN 5
|
||||
#define P11_PB5_IN 6
|
||||
#define P11_PB6_IN 7
|
||||
#define P11_PB7_IN 8
|
||||
#define P11_PB8_IN 9
|
||||
#define P11_PB9_IN 10
|
||||
#define P11_PB10_IN 11
|
||||
#define P11_PB11_IN 12
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// function input select sfr
|
||||
//
|
||||
//===============================================================================//
|
||||
typedef struct {
|
||||
__RW __u8 P11_FI_GP_ICH0;
|
||||
__RW __u8 P11_FI_GP_ICH1;
|
||||
__RW __u8 P11_FI_GP_ICH2;
|
||||
__RW __u8 P11_FI_UART0_RX;
|
||||
__RW __u8 P11_FI_SPI_DI;
|
||||
__RW __u8 P11_FI_IIC_SCL;
|
||||
__RW __u8 P11_FI_IIC_SDA;
|
||||
__RW __u8 P11_FI_DMIC_DAT;
|
||||
} P11_IMAP_TypeDef;
|
||||
|
||||
#define P11_IMAP_BASE (p11_sfr_base + map_adr(0x16, 0x00))
|
||||
#define P11_IMAP ((P11_IMAP_TypeDef *)P11_IMAP_BASE)
|
||||
40
include_lib/driver/cpu/br28/asm/power/p11_io_omap.h
Normal file
40
include_lib/driver/cpu/br28/asm/power/p11_io_omap.h
Normal file
@ -0,0 +1,40 @@
|
||||
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// output function define
|
||||
//
|
||||
//===============================================================================//
|
||||
#define P11_FO_GP_OCH0 ((0 << 2)|BIT(1))
|
||||
#define P11_FO_GP_OCH1 ((1 << 2)|BIT(1))
|
||||
#define P11_FO_GP_OCH2 ((2 << 2)|BIT(1))
|
||||
#define P11_FO_UART0_TX ((3 << 2)|BIT(1)|BIT(0))
|
||||
#define P11_FO_UART1_TX ((4 << 2)|BIT(1)|BIT(0))
|
||||
#define P11_FO_SPI_CLK ((5 << 2)|BIT(1)|BIT(0))
|
||||
#define P11_FO_SPI_DO ((6 << 2)|BIT(1)|BIT(0))
|
||||
#define P11_FO_IIC_SCL ((7 << 2)|BIT(1)|BIT(0))
|
||||
#define P11_FO_IIC_SDA ((8 << 2)|BIT(1)|BIT(0))
|
||||
#define P11_FO_DMIC_CLK ((9 << 2)|BIT(1)|BIT(0))
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// IO output select sfr
|
||||
//
|
||||
//===============================================================================//
|
||||
typedef struct {
|
||||
__RW __u8 P11_PB0_OUT;
|
||||
__RW __u8 P11_PB1_OUT;
|
||||
__RW __u8 P11_PB2_OUT;
|
||||
__RW __u8 P11_PB3_OUT;
|
||||
__RW __u8 P11_PB4_OUT;
|
||||
__RW __u8 P11_PB5_OUT;
|
||||
__RW __u8 P11_PB6_OUT;
|
||||
__RW __u8 P11_PB7_OUT;
|
||||
__RW __u8 P11_PB8_OUT;
|
||||
__RW __u8 P11_PB9_OUT;
|
||||
__RW __u8 P11_PB10_OUT;
|
||||
__RW __u8 P11_PB11_OUT;
|
||||
} P11_OMAP_TypeDef;
|
||||
|
||||
#define P11_OMAP_BASE (p11_sfr_base + map_adr(0x15, 0x00))
|
||||
#define P11_OMAP ((P11_OMAP_TypeDef *)P11_OMAP_BASE)
|
||||
244
include_lib/driver/cpu/br28/asm/power/p11_sfr.h
Normal file
244
include_lib/driver/cpu/br28/asm/power/p11_sfr.h
Normal file
@ -0,0 +1,244 @@
|
||||
#ifndef __P11__
|
||||
#define __P11__
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// sfr define
|
||||
//
|
||||
//===============================================================================//
|
||||
|
||||
#ifdef PMU_SYSTEM
|
||||
#define p11_base 0x000000
|
||||
#define p11_ram_base p11_base
|
||||
#define p11_sfr_base 0x00a000
|
||||
#else
|
||||
#define p11_base 0xf20000
|
||||
#define p11_ram_base p11_base
|
||||
#define p11_sfr_base 0xf2a000
|
||||
#endif
|
||||
|
||||
#define __RW volatile // read write
|
||||
#define __RO volatile const // only read
|
||||
#define __WO volatile // only write
|
||||
|
||||
#define __u8 unsigned int // u8 to u32 special for struct
|
||||
#define __u16 unsigned int // u16 to u32 special for struct
|
||||
#define __u32 unsigned int
|
||||
|
||||
#define __s8(x) char(x); char(reserved_1_##x); char(reserved_2_##x); char(reserved_3_##x)
|
||||
#define __s16(x) short(x); short(reserved_1_##x)
|
||||
#define __s32(x) int(x)
|
||||
|
||||
#define map_adr(grp, adr) ((64 * grp + adr) * 4) // grp(0x0-0xff), adr(0x0-0x3f)
|
||||
#define P11_ACCESS(x) (*(volatile u32 *)(p11_base + x))
|
||||
#define P11_RAM(x) (*(volatile u32 *)(p11_ram_base + x))
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// sfr address define
|
||||
//
|
||||
//===============================================================================//
|
||||
|
||||
//............. 0x0000 - 0x03ff............ for cpu
|
||||
|
||||
// #include ../core/csfr.h
|
||||
|
||||
//............. 0x0400 - 0x04ff............ for clock
|
||||
typedef struct {
|
||||
__RW __u32 PWR_CON;
|
||||
__RW __u32 RST_SRC;
|
||||
__RW __u32 WKUP_EN;
|
||||
__RW __u32 WKUP_SRC;
|
||||
__RW __u32 SYS_DIV;
|
||||
__RW __u32 CLK_CON0;
|
||||
__RW __u32 CLK_CON1;
|
||||
__RW __u32 CLK_CON2;
|
||||
__RW __u32 CLK_CON3;
|
||||
} P11_CLOCK_TypeDef;
|
||||
|
||||
#define P11_CLOCK_BASE (p11_sfr_base + map_adr(0x04, 0x00))
|
||||
#define P11_CLOCK ((P11_CLOCK_TypeDef *)P11_CLOCK_BASE)
|
||||
|
||||
//............. 0x0500 - 0x05ff............ for memory control
|
||||
typedef struct {
|
||||
__RW __u32 MPC0;
|
||||
__RW __u32 MPC1;
|
||||
__RW __u32 MSC;
|
||||
} P11_MEM_CTL_TypeDef;
|
||||
|
||||
#define P11_MEM_CTL_BASE (p11_sfr_base + map_adr(0x05, 0x00))
|
||||
#define P11_MEM_CTL ((P11_MEM_CTL_TypeDef *)P11_MEM_CTL_BASE)
|
||||
|
||||
//............. 0x0600 - 0x06ff............ for system
|
||||
typedef struct {
|
||||
__RW __u32 P2M_INT_IE;
|
||||
__RW __u32 P2M_INT_SET;
|
||||
__RW __u32 P2M_INT_CLR;
|
||||
__RO __u32 P2M_INT_PND;
|
||||
__RW __u32 P2M_CLK_CON0;
|
||||
__RW __u32 M2P_INT_IE;
|
||||
__RW __u32 M2P_INT_SET;
|
||||
__RW __u32 M2P_INT_CLR;
|
||||
__RO __u32 M2P_INT_PND;
|
||||
__RW __u32 P11_SYS_CON0;
|
||||
__RW __u32 P11_SYS_CON1;
|
||||
__RW __u32 MEM_PWR_CON;
|
||||
} P11_SYSTEM_TypeDef;
|
||||
|
||||
#define P11_SYSTEM_BASE (p11_sfr_base + map_adr(0x06, 0x00))
|
||||
#define P11_SYSTEM ((P11_SYSTEM_TypeDef *)P11_SYSTEM_BASE)
|
||||
|
||||
//............. 0x0800 - 0x08ff............ for watch dog
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 KEY;
|
||||
__RW __u32 DUMMY;
|
||||
} P11_WDT_TypeDef;
|
||||
|
||||
#define P11_WDT_BASE (p11_sfr_base + map_adr(0x08, 0x00))
|
||||
#define P11_WDT ((P11_WDT_TypeDef *)P11_WDT_BASE)
|
||||
|
||||
//............. 0x0900 - 0x0cff............ for lp timer
|
||||
typedef struct {
|
||||
__RW __u32 CON0;
|
||||
__RW __u32 CON1;
|
||||
__RW __u32 CON2;
|
||||
__RW __u32 PRD;
|
||||
__RW __u32 RSC;
|
||||
__RO __u32 CNT;
|
||||
} P11_LPTMR_TypeDef;
|
||||
|
||||
#define P11_LPTMR0_BASE (p11_sfr_base + map_adr(0x09, 0x00))
|
||||
#define P11_LPTMR1_BASE (p11_sfr_base + map_adr(0x0a, 0x00))
|
||||
#define P11_LPTMR2_BASE (p11_sfr_base + map_adr(0x0b, 0x00))
|
||||
#define P11_LPTMR3_BASE (p11_sfr_base + map_adr(0x0c, 0x00))
|
||||
|
||||
#define P11_LPTMR0 ((P11_LPTMR_TypeDef *)P11_LPTMR0_BASE)
|
||||
#define P11_LPTMR1 ((P11_LPTMR_TypeDef *)P11_LPTMR1_BASE)
|
||||
#define P11_LPTMR2 ((P11_LPTMR_TypeDef *)P11_LPTMR2_BASE)
|
||||
#define P11_LPTMR3 ((P11_LPTMR_TypeDef *)P11_LPTMR3_BASE)
|
||||
|
||||
//............. 0x0d00 - 0x0dff............ for irflt
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
} P11_IRFLT_TypeDef;
|
||||
|
||||
#define P11_IRFLT_BASE (p11_sfr_base + map_adr(0x0d, 0x00))
|
||||
#define P11_IRFLT ((P11_IRFLT_TypeDef *)P11_IRFLT_BASE)
|
||||
|
||||
//............. 0x0e00 - 0x0eff............ for spi
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__WO __u32 BAUD;
|
||||
__RW __u32 BUF;
|
||||
//__WO __u32 ADR;
|
||||
//__WO __u32 CNT;
|
||||
} P11_SPI_TypeDef;
|
||||
|
||||
#define P11_SPI_BASE (p11_sfr_base + map_adr(0x0e, 0x00))
|
||||
#define P11_SPI ((P11_SPI_TypeDef *)P11_SPI_BASE)
|
||||
|
||||
//............. 0x0f00 - 0x10ff............ for uart
|
||||
typedef struct {
|
||||
__RW __u16 CON0;
|
||||
//__RW __u16 CON1;
|
||||
__WO __u16 BAUD;
|
||||
__RW __u8 BUF;
|
||||
__RW __u32 OTCNT;
|
||||
//__RW __u32 TXADR;
|
||||
//__WO __u16 TXCNT;
|
||||
//__RW __u32 RXSADR;
|
||||
//__RW __u32 RXEADR;
|
||||
//__RW __u32 RXCNT;
|
||||
//__RO __u16 HRXCNT;
|
||||
__RW __u16 CON2;
|
||||
} P11_UART_TypeDef;
|
||||
|
||||
#define P11_UART0_BASE (p11_sfr_base + map_adr(0x0f, 0x00))
|
||||
#define P11_UART1_BASE (p11_sfr_base + map_adr(0x10, 0x00))
|
||||
|
||||
#define P11_UART0 ((P11_UART_TypeDef *)P11_UART0_BASE)
|
||||
#define P11_UART1 ((P11_UART_TypeDef *)P11_UART1_BASE)
|
||||
|
||||
//............. 0x1100 - 0x11ff............ for iic
|
||||
typedef struct {
|
||||
__RW __u32 CON0;
|
||||
__RW __u32 CON1;
|
||||
__RW __u32 BAUD;
|
||||
__RW __u32 BUF;
|
||||
} P11_IIC_TypeDef;
|
||||
|
||||
#define P11_IIC_BASE (p11_sfr_base + map_adr(0x11, 0x00))
|
||||
#define P11_IIC ((P11_IIC_TypeDef *)P11_IIC_BASE)
|
||||
|
||||
//............. 0x1200 - 0x12ff............ for port
|
||||
typedef struct {
|
||||
__RW __u32 OCH_CON0 ;
|
||||
__RW __u32 ICH_CON0 ;
|
||||
__RW __u32 P33_PORT ;
|
||||
__RW __u32 PB_SEL ;
|
||||
__RW __u32 PB_PU ;
|
||||
__RW __u32 PB_PD ;
|
||||
__RW __u32 PB_DIR ;
|
||||
__RW __u32 PB_DIE ;
|
||||
__RW __u32 PB_DIEH ;
|
||||
__RW __u32 PB_OUT ;
|
||||
__RO __u32 PB_IN ;
|
||||
} P11_PORT_TypeDef;
|
||||
|
||||
#define P11_PORT_BASE (p11_sfr_base + map_adr(0x12, 0x00))
|
||||
#define P11_PORT ((P11_PORT_TypeDef *)P11_PORT_BASE)
|
||||
|
||||
//............. 0x1300 - 0x13ff............ for lp ctmu
|
||||
typedef struct {
|
||||
__RW __u32 CON0;
|
||||
__RW __u32 CON1;
|
||||
__RW __u32 CON2;
|
||||
__RW __u32 CON3;
|
||||
__RW __u32 ANA0;
|
||||
__RW __u32 ANA1;
|
||||
__RW __u32 RES;
|
||||
} P11_LPCTM_TypeDef;
|
||||
|
||||
#define P11_LPCTM_BASE (p11_sfr_base + map_adr(0x13, 0x00))
|
||||
#define P11_LPCTM ((P11_LPCTM_TypeDef *)P11_LPCTM_BASE)
|
||||
|
||||
//............. 0x1400 - 0x14ff............ for lpvad
|
||||
typedef struct {
|
||||
__RW __u32 VAD_CON;
|
||||
__RW __u32 VAD_ACON0;
|
||||
__RW __u32 VAD_ACON1;
|
||||
__RW __u32 AVAD_CON;
|
||||
__RW __u32 AVAD_DATA;
|
||||
__RW __u32 DVAD_CON0;
|
||||
__RW __u32 DVAD_CON1;
|
||||
__RW __u32 DMA_BADR;
|
||||
__RW __u32 DMA_LEN;
|
||||
__RW __u32 DMA_HPTR;
|
||||
__RW __u32 DMA_SPTR;
|
||||
__RW __u32 DMA_SPN;
|
||||
__RW __u32 DMA_SHN;
|
||||
} P11_LPVAD_TypeDef;
|
||||
|
||||
#define P11_LPVAD_BASE (p11_sfr_base + map_adr(0x14, 0x00))
|
||||
#define P11_LPVAD ((P11_LPVAD_TypeDef *)P11_LPVAD_BASE)
|
||||
|
||||
//............. 0x1500 - 0x16ff............ for crossbar
|
||||
#include "p11_io_omap.h"
|
||||
#include "p11_io_imap.h"
|
||||
|
||||
//............. 0x1700 - 0x18ff............ for gp timer
|
||||
typedef struct {
|
||||
__RW __u32 CON;
|
||||
__RW __u32 CNT;
|
||||
__RW __u32 PRD;
|
||||
__RW __u32 PWM;
|
||||
} P11_GPTMR_TypeDef;
|
||||
|
||||
#define P11_GPTMR0_BASE (p11_sfr_base + map_adr(0x17, 0x00))
|
||||
#define P11_GPTMR1_BASE (p11_sfr_base + map_adr(0x18, 0x00))
|
||||
|
||||
#define P11_GPTMR0 ((P11_GPTMR_TypeDef *)P11_GPTMR0_BASE)
|
||||
#define P11_GPTMR1 ((P11_GPTMR_TypeDef *)P11_GPTMR1_BASE)
|
||||
|
||||
#endif
|
||||
89
include_lib/driver/cpu/br28/asm/power/p2m_msg.h
Normal file
89
include_lib/driver/cpu/br28/asm/power/p2m_msg.h
Normal file
@ -0,0 +1,89 @@
|
||||
#ifndef __P2M_MSG_H__
|
||||
#define __P2M_MSG_H__
|
||||
|
||||
//p2m用户消息实例
|
||||
enum {
|
||||
P2M_MSG_ACK = BIT(0),
|
||||
P2M_MSG_TEST = BIT(1),
|
||||
P2M_MSG_COMMOM = BIT(2),
|
||||
P2M_MSG_CTMU = BIT(3),
|
||||
P2M_MSG_SENSOR = BIT(4),
|
||||
P2M_MSG_VAD = BIT(5),
|
||||
|
||||
};
|
||||
|
||||
//测试
|
||||
struct p2m_msg_test {
|
||||
u8 dat;
|
||||
};
|
||||
|
||||
//测试
|
||||
struct p2m_msg_ack {
|
||||
u8 dat;
|
||||
};
|
||||
|
||||
//公共消息
|
||||
struct p2m_msg_common {
|
||||
u8 dat;
|
||||
};
|
||||
|
||||
//触摸消息
|
||||
struct p2m_msg_ctmu {
|
||||
u8 dat;
|
||||
};
|
||||
|
||||
//vad
|
||||
struct p2m_msg_vad {
|
||||
u8 dat;
|
||||
};
|
||||
|
||||
//p2m用户消息格式
|
||||
struct p2m_msg_head {
|
||||
u16 type :
|
||||
MSG_TYPE_BIT_LEN;
|
||||
u16 len :
|
||||
MSG_PARAM_BIT_LEN;
|
||||
u8 index :
|
||||
MSG_INDEX_BIT;
|
||||
u8 ack :
|
||||
MSG_ACK_BIT;
|
||||
} __attribute__((packed));
|
||||
|
||||
struct p2m_msg {
|
||||
struct p2m_msg_head head;
|
||||
union {
|
||||
struct p2m_msg_ack ack;
|
||||
struct p2m_msg_test test;
|
||||
struct p2m_msg_common com;
|
||||
struct p2m_msg_ctmu ctmu;
|
||||
struct p2m_msg_vad vad;
|
||||
} u;
|
||||
} __attribute__((packed));
|
||||
|
||||
//p2m用户消息对应处理
|
||||
struct p2m_msg_handler {
|
||||
u8 type;
|
||||
void (*handler)(struct p2m_msg *);
|
||||
};
|
||||
|
||||
#define REGISTER_P2M_MSG_HANDLER(_type, fn, pri) \
|
||||
const struct p2m_msg_handler _##fn sec(.p2m_msg_handler)= { \
|
||||
.type = _type, \
|
||||
.handler = fn, \
|
||||
}
|
||||
|
||||
extern struct p2m_msg_handler p2m_msg_handler_begin[];
|
||||
extern struct p2m_msg_handler p2m_msg_handler_end[];
|
||||
|
||||
#define list_for_each_p2m_msg_handler(p) \
|
||||
for (p = p2m_msg_handler_begin; p < p2m_msg_handler_end; p++)
|
||||
|
||||
|
||||
|
||||
int p2m_get_msg(int len, struct p2m_msg *msg);
|
||||
|
||||
int p2m_post_msg(int len, struct p2m_msg *msg);
|
||||
|
||||
int p2m_post_sync_msg(int len, struct p2m_msg *msg, u8 abandon, int timeout);
|
||||
|
||||
#endif
|
||||
26
include_lib/driver/cpu/br28/asm/power/p33.h
Normal file
26
include_lib/driver/cpu/br28/asm/power/p33.h
Normal file
@ -0,0 +1,26 @@
|
||||
/*********************************************************************************************
|
||||
* Filename : p33.h
|
||||
|
||||
* Description :
|
||||
|
||||
* Author : Bingquan
|
||||
|
||||
* Email : caibingquan@zh-jieli.com
|
||||
|
||||
* Last modifiled : 2019-12-09 10:42
|
||||
|
||||
* Copyright:(c)JIELI 2011-2019 @ , All Rights Reserved.
|
||||
*********************************************************************************************/
|
||||
|
||||
#ifndef __P33_H__
|
||||
#define __P33_H__
|
||||
|
||||
#include "p33_sfr.h"
|
||||
|
||||
#include "p33_app.h"
|
||||
|
||||
#include "p33_io_app.h"
|
||||
|
||||
#include "rtc_app.h"
|
||||
|
||||
#endif
|
||||
796
include_lib/driver/cpu/br28/asm/power/p33_app.h
Normal file
796
include_lib/driver/cpu/br28/asm/power/p33_app.h
Normal file
@ -0,0 +1,796 @@
|
||||
#ifndef __P33_APP_H__
|
||||
#define __P33_APP_H__
|
||||
|
||||
//ROM
|
||||
u8 p33_buf(u8 buf);
|
||||
|
||||
// void p33_xor_1byte(u16 addr, u8 data0);
|
||||
#define p33_xor_1byte(addr, data0) (*((volatile u8 *)&addr + 0x300*4) = data0)
|
||||
// #define p33_xor_1byte(addr, data0) addr ^= (data0)
|
||||
|
||||
// void p33_and_1byte(u16 addr, u8 data0);
|
||||
#define p33_and_1byte(addr, data0) (*((volatile u8 *)&addr + 0x100*4) = (data0))
|
||||
//#define p33_and_1byte(addr, data0) addr &= (data0)
|
||||
|
||||
// void p33_or_1byte(u16 addr, u8 data0);
|
||||
#define p33_or_1byte(addr, data0) (*((volatile u8 *)&addr + 0x200*4) = data0)
|
||||
// #define p33_or_1byte(addr, data0) addr |= (data0)
|
||||
|
||||
// void p33_tx_1byte(u16 addr, u8 data0);
|
||||
#define p33_tx_1byte(addr, data0) addr = data0
|
||||
|
||||
// u8 p33_rx_1byte(u16 addr);
|
||||
#define p33_rx_1byte(addr) addr
|
||||
|
||||
#define P33_CON_SET(sfr, start, len, data) (sfr = (sfr & ~((~(0xff << (len))) << (start))) | \
|
||||
(((data) & (~(0xff << (len)))) << (start)))
|
||||
|
||||
#define P33_CON_GET(sfr) sfr
|
||||
|
||||
#define P33_ANA_CHECK(reg) (((reg & reg##_MASK) == reg##_RV) ? 1:0)
|
||||
|
||||
|
||||
#if 1
|
||||
|
||||
#define p33_fast_access(reg, data, en) \
|
||||
{ \
|
||||
if (en) { \
|
||||
p33_or_1byte(reg, (data)); \
|
||||
} else { \
|
||||
p33_and_1byte(reg, ~(data)); \
|
||||
} \
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#define p33_fast_access(reg, data, en) \
|
||||
{ \
|
||||
if (en) { \
|
||||
reg |= (data); \
|
||||
} else { \
|
||||
reg &= ~(data); \
|
||||
} \
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
//
|
||||
//
|
||||
// for p33_analog.doc
|
||||
//
|
||||
//
|
||||
//
|
||||
/************************P3_ANA_CON0*****************************/
|
||||
#define VDD13TO12_SYS_EN(en) P33_CON_SET(P3_ANA_CON0, 0, 1, en)
|
||||
|
||||
#define VDD13TO12_RVD_EN(en) P33_CON_SET(P3_ANA_CON0, 1, 1, en)
|
||||
|
||||
#define LDO13_EN(en) P33_CON_SET(P3_ANA_CON0, 2, 1, en)
|
||||
|
||||
#define DCDC13_EN(en) P33_CON_SET(P3_ANA_CON0, 3, 1, en)
|
||||
|
||||
#define GET_DCDC13_EN() ((P33_CON_GET(P3_ANA_CON0) & BIT(3)) ? 1:0)
|
||||
|
||||
#define PVDD_EN(en) P33_CON_SET(P3_ANA_CON0, 4, 1, en)
|
||||
|
||||
#define MVIO_VBAT_EN(en) P33_CON_SET(P3_ANA_CON0, 5, 1, en)
|
||||
|
||||
#define MVIO_VPWR_EN(en) P33_CON_SET(P3_ANA_CON0, 6, 1, en)
|
||||
|
||||
#define MBG_EN(en) P33_CON_SET(P3_ANA_CON0, 7, 1, en)
|
||||
|
||||
#define P3_ANA_CON0_MASK 0b11110011
|
||||
#define P3_ANA_CON0_RV 0b11110011
|
||||
|
||||
/************************P3_ANA_KEEP*****************************/
|
||||
#define CLOSE_ANA_KEEP() P33_CON_SET(P3_ANA_KEEP, 0, 8, 0)
|
||||
|
||||
#define P3_ANA_KEEP_MASK 0b11111111
|
||||
#define P3_ANA_KEEP_RV 0b00000000
|
||||
|
||||
/************************P3_ANA_KEEP1****************************/
|
||||
#define VIO2_EN_KEEP(en) P33_CON_SET(P3_ANA_KEEP1, 0, 1, en)
|
||||
|
||||
#define P3_ANA_KEEP1_MASK 0b00000001
|
||||
#define P3_ANA_KEEP1_RV 0b00000000
|
||||
|
||||
/**************************P3_ANA_CON1*********************************/
|
||||
#define RVDD_BYPASS_EN(en) P33_CON_SET(P3_ANA_CON1, 0, 1, en)
|
||||
|
||||
#define WVDD_SHORT_RVDD(en) P33_CON_SET(P3_ANA_CON1, 1, 1, en)
|
||||
|
||||
#define WVDD_SHORT_SVDD(en) P33_CON_SET(P3_ANA_CON1, 2, 1, en)
|
||||
|
||||
#define WLDO06_EN(en) P33_CON_SET(P3_ANA_CON1, 3, 1, en)
|
||||
|
||||
#define WLDO06_OE(en) P33_CON_SET(P3_ANA_CON1, 4, 1, en)
|
||||
|
||||
#define EVD_EN(en) P33_CON_SET(P3_ANA_CON1, 5, 1, en)
|
||||
|
||||
#define EVD_SHORT_PB8(en) P33_CON_SET(P3_ANA_CON1, 6, 1, en)
|
||||
|
||||
#define PVD_SHORT_PB8(en) P33_CON_SET(P3_ANA_CON1, 7, 1, en)
|
||||
|
||||
#define P3_ANA_CON1_MASK 0b10011111
|
||||
#define P3_ANA_CON1_RV 0b00000100
|
||||
|
||||
/************************P3_ANA_CON2*****************************/
|
||||
#define VCM_DET_EN(en) P33_CON_SET(P3_ANA_CON2, 3, 1, en)
|
||||
|
||||
#define MVIO_VBAT_ILMT_EN(en) P33_CON_SET(P3_ANA_CON2, 4, 1, en)
|
||||
|
||||
#define MVIO_VPWR_ILMT_EN(en) P33_CON_SET(P3_ANA_CON2, 5, 1, en)
|
||||
|
||||
#define DCVD_ILMT_EN(en) P33_CON_SET(P3_ANA_CON2, 6, 1, en)
|
||||
|
||||
#define CURRENT_LIMIT_DISABLE() (P3_ANA_CON2 &= ~(BIT(4) | BIT(5) | BIT(6)))
|
||||
|
||||
#define P3_ANA_CON2_MASK 0b01110000
|
||||
#define P3_ANA_CON2_RV 0b01110000
|
||||
|
||||
/************************P3_ANA_CON3*****************************/
|
||||
#define MVBG_SEL(en) P33_CON_SET(P3_ANA_CON3, 0, 4, en)
|
||||
|
||||
#define MVBG_GET() (P33_CON_GET(P3_ANA_CON3) & 0x0f)
|
||||
|
||||
#define WVBG_SEL(en) P33_CON_SET(P3_ANA_CON3, 4, 4, en)
|
||||
|
||||
#define P3_ANA_CON3_MASK 0b00000000
|
||||
#define P3_ANA_CON3_RV 0b00000000
|
||||
|
||||
/************************P3_ANA_CON4*****************************/
|
||||
#define PMU_DET_EN(en) P33_CON_SET(P3_ANA_CON4, 0, 1, en)
|
||||
|
||||
#define ADC_CHANNEL_SEL(ch) P33_CON_SET(P3_ANA_CON4, 1, 4, ch)
|
||||
|
||||
#define PMU_DET_BG_BUF_EN(en) P33_CON_SET(P3_ANA_CON4, 5, 1, en)
|
||||
|
||||
#define VBG_TEST_EN(en) P33_CON_SET(P3_ANA_CON4, 6, 1, en)
|
||||
|
||||
#define VBG_TEST_SEL(en) P33_CON_SET(P3_ANA_CON4, 7, 1, en)
|
||||
|
||||
#define P3_ANA_CON4_MASK 0b11100001
|
||||
#define P3_ANA_CON4_RV 0b11100001
|
||||
|
||||
/************************P3_ANA_CON5*****************************/
|
||||
//vddiom_lev
|
||||
enum {
|
||||
VDDIOM_VOL_20V = 0,
|
||||
VDDIOM_VOL_22V,
|
||||
VDDIOM_VOL_24V,
|
||||
VDDIOM_VOL_26V,
|
||||
VDDIOM_VOL_28V,
|
||||
VDDIOM_VOL_30V, //default
|
||||
VDDIOM_VOL_32V,
|
||||
VDDIOM_VOL_34V,
|
||||
};
|
||||
|
||||
#define VDDIOM_VOL_SEL(lev) P33_CON_SET(P3_ANA_CON5, 0, 3, lev)
|
||||
|
||||
#define GET_VDDIOM_VOL() (P33_CON_GET(P3_ANA_CON5) & 0x7)
|
||||
|
||||
//vddiow_lev
|
||||
enum {
|
||||
VDDIOW_VOL_20V = 0,
|
||||
VDDIOW_VOL_22V,
|
||||
VDDIOW_VOL_24V,
|
||||
VDDIOW_VOL_26V,
|
||||
VDDIOW_VOL_28V,
|
||||
VDDIOW_VOL_30V,
|
||||
VDDIOW_VOL_32V,
|
||||
VDDIOW_VOL_34V,
|
||||
};
|
||||
|
||||
#define VDDIOW_VOL_SEL(lev) P33_CON_SET(P3_ANA_CON5, 3, 3, lev)
|
||||
|
||||
#define GET_VDDIOW_VOL() (P33_CON_GET(P3_ANA_CON5)>>3 & 0x7)
|
||||
|
||||
#define VDDIO_HD_SEL(cur) P33_CON_SET(P3_ANA_CON5, 6, 2, cur)
|
||||
|
||||
#define P3_ANA_CON5_MASK 0b11000000
|
||||
#define P3_ANA_CON5_RV 0b01000000
|
||||
|
||||
/************************P3_ANA_CON6*****************************/
|
||||
#define VDC13_VOL_SEL(sel) P33_CON_SET(P3_ANA_CON6, 0, 4, sel)
|
||||
//Macro for VDC13_VOL_SEL
|
||||
enum {
|
||||
VDC13_VOL_SEL_100V = 0,
|
||||
VDC13_VOL_SEL_105V,
|
||||
VDC13_VOL_SEL_1075V,
|
||||
VDC13_VOL_SEL_110V,
|
||||
VDC13_VOL_SEL_1125V,
|
||||
VDC13_VOL_SEL_115V,
|
||||
VDC13_VOL_SEL_1175V,
|
||||
VDC13_VOL_SEL_120V,
|
||||
VDC13_VOL_SEL_1225V,
|
||||
VDC13_VOL_SEL_125V,
|
||||
VDC13_VOL_SEL_1275V,
|
||||
VDC13_VOL_SEL_130V,
|
||||
VDC13_VOL_SEL_1325V,
|
||||
VDC13_VOL_SEL_135V,
|
||||
VDC13_VOL_SEL_1375V,
|
||||
VDC13_VOL_SEL_140V,
|
||||
};
|
||||
|
||||
#define VD13_DEFAULT_VOL VDC13_VOL_SEL_125V
|
||||
|
||||
#define GET_VD13_VOL_SEL() (P33_CON_GET(P3_ANA_CON6) & 0xf)
|
||||
|
||||
#define VD13_HD_SEL(sel) P33_CON_SET(P3_ANA_CON6, 4, 2, sel)
|
||||
|
||||
#define VD13_CAP_EN(en) P33_CON_SET(P3_ANA_CON6, 6, 1, en)
|
||||
|
||||
#define VD13_DESHOT_EN(en) P33_CON_SET(P3_ANA_CON6, 7, 1, en)
|
||||
|
||||
#define P3_ANA_CON6_MASK 0b11111111
|
||||
#define P3_ANA_CON6_RV 0b11011010
|
||||
|
||||
/************************P3_ANA_CON7*****************************/
|
||||
#define BTDCDC_PFM_MODE(en) P33_CON_SET(P3_ANA_CON7, 0, 1, en)
|
||||
|
||||
#define GET_BTDCDC_PFM_MODE() (P33_CON_GET(P3_ANA_CON7) & BIT(0) ? 1 : 0)
|
||||
|
||||
#define BTDCDC_RAMP_SHORT(en) P33_CON_SET(P3_ANA_CON7, 1, 1, en)
|
||||
|
||||
#define BTDCDC_V17_TEST_OE(en) P33_CON_SET(P3_ANA_CON7, 2, 1, en);
|
||||
|
||||
#define BTDCDC_DUTY_SEL(sel) P33_CON_SET(P3_ANA_CON7, 3, 2, sel)
|
||||
|
||||
#define BTDCDC_OSC_SEL(sel) P33_CON_SET(P3_ANA_CON7, 5, 3, sel)
|
||||
//Macro for BTDCDC_OSC_SEL
|
||||
enum {
|
||||
BTDCDC_OSC_SEL0520KHz = 0,
|
||||
BTDCDC_OSC_SEL0762KHz,
|
||||
BTDCDC_OSC_SEL0997KHz,
|
||||
BTDCDC_OSC_SEL1220KHz,
|
||||
BTDCDC_OSC_SEL1640KHz,
|
||||
BTDCDC_OSC_SEL1840KHz,
|
||||
BTDCDC_OSC_SEL2040KHz,
|
||||
BTDCDC_OSC_SEL2220MHz,
|
||||
};
|
||||
|
||||
#define P3_ANA_CON7_MASK 0b11111111
|
||||
#define P3_ANA_CON7_RV 0b01001001
|
||||
|
||||
/************************P3_ANA_CON8*****************************/
|
||||
#define BTDCDC_V21_RES_S(sel) P33_CON_SET(P3_ANA_CON8, 0, 2, sel)
|
||||
|
||||
#define BTDCDC_DT_S(sel) P33_CON_SET(P3_ANA_CON8, 2, 2, sel)
|
||||
|
||||
#define BTDCDC_ISENSE_HD(sel) P33_CON_SET(P3_ANA_CON8, 4, 2, sel)
|
||||
|
||||
#define BTDCDC_COMP_HD(sel) P33_CON_SET(P3_ANA_CON8, 6, 2, sel)
|
||||
|
||||
#define P3_ANA_CON8_MASK 0b11111111
|
||||
#define P3_ANA_CON8_RV 0b01100110
|
||||
|
||||
/************************P3_ANA_CON9*****************************/
|
||||
#define BTDCDC_NMOS_S(sel) P33_CON_SET(P3_ANA_CON9, 1, 3, sel)
|
||||
|
||||
#define BTDCDC_PMOS_S(sel) P33_CON_SET(P3_ANA_CON9, 5, 3, sel)
|
||||
|
||||
#define P3_ANA_CON9_MASK 0b11101110
|
||||
#define P3_ANA_CON9_RV 0b01101110
|
||||
|
||||
/************************P3_ANA_CON10*****************************/
|
||||
|
||||
#define BTDCDC_OSC_TEST_OE(en) P33_CON_SET(P3_ANA_CON10, 7, 1, en)
|
||||
|
||||
#define BTDCDC_HD_BIAS_SEL(sel) P33_CON_SET(P3_ANA_CON10, 5, 2, sel)
|
||||
|
||||
#define BTDCDC_CLK_SEL(sel) P33_CON_SET(P3_ANA_CON10, 4, 1, sel)
|
||||
|
||||
#define GET_BTDCDC_CLK_SEL() (P33_CON_GET(P3_ANA_CON10) & BIT(4) ? 1 : 0)
|
||||
|
||||
#define BTDCDC_ZCD_RES(sel) P33_CON_SET(P3_ANA_CON10, 2, 2, sel)
|
||||
|
||||
#define BTDCDC_ZCD_EN(en) P33_CON_SET(P3_ANA_CON10, 0, 1, en)
|
||||
|
||||
#define P3_ANA_CON10_MASK 0b11111101
|
||||
#define P3_ANA_CON10_RV 0b00110001
|
||||
|
||||
/************************P3_ANA_CON11*****************************/
|
||||
#define SYSVDD_VOL_SEL(sel) P33_CON_SET(P3_ANA_CON11, 0, 4, sel)
|
||||
//Macro for SYSVDD_VOL_SEL
|
||||
enum {
|
||||
SYSVDD_VOL_SEL_081V = 0,
|
||||
SYSVDD_VOL_SEL_084V,
|
||||
SYSVDD_VOL_SEL_087V,
|
||||
SYSVDD_VOL_SEL_090V,
|
||||
SYSVDD_VOL_SEL_093V,
|
||||
SYSVDD_VOL_SEL_096V,
|
||||
SYSVDD_VOL_SEL_099V,
|
||||
SYSVDD_VOL_SEL_102V,
|
||||
SYSVDD_VOL_SEL_105V,
|
||||
SYSVDD_VOL_SEL_108V,
|
||||
SYSVDD_VOL_SEL_111V,
|
||||
SYSVDD_VOL_SEL_114V,
|
||||
SYSVDD_VOL_SEL_117V,
|
||||
SYSVDD_VOL_SEL_120V,
|
||||
SYSVDD_VOL_SEL_123V,
|
||||
SYSVDD_VOL_SEL_126V,
|
||||
};
|
||||
|
||||
#define SYSVDD_DEFAULT_VOL SYSVDD_VOL_SEL_105V
|
||||
|
||||
#define GET_SYSVDD_VOL_SEL() (P33_CON_GET(P3_ANA_CON11) & 0xf)
|
||||
|
||||
#define SYSVDD_VOL_HD_SEL(sel) P33_CON_SET(P3_ANA_CON11, 4, 2, sel)
|
||||
|
||||
#define SYSVDD_CAP_EN(en) P33_CON_SET(P3_ANA_CON11, 6, 1, en)
|
||||
|
||||
#define P3_ANA_CON11_MASK 0b01110000
|
||||
#define P3_ANA_CON11_RV 0b00010000
|
||||
|
||||
/************************P3_ANA_CON12*****************************/
|
||||
#define RVDD_VOL_SEL(sel) P33_CON_SET(P3_ANA_CON12, 0, 4, sel)
|
||||
//Macro for SYSVDD_VOL_SEL
|
||||
enum {
|
||||
RVDD_VOL_SEL_081V = 0,
|
||||
RVDD_VOL_SEL_084V,
|
||||
RVDD_VOL_SEL_087V,
|
||||
RVDD_VOL_SEL_090V,
|
||||
RVDD_VOL_SEL_093V,
|
||||
RVDD_VOL_SEL_096V,
|
||||
RVDD_VOL_SEL_099V,
|
||||
RVDD_VOL_SEL_102V,
|
||||
RVDD_VOL_SEL_105V,
|
||||
RVDD_VOL_SEL_108V,
|
||||
RVDD_VOL_SEL_111V,
|
||||
RVDD_VOL_SEL_114V,
|
||||
RVDD_VOL_SEL_117V,
|
||||
RVDD_VOL_SEL_120V,
|
||||
RVDD_VOL_SEL_123V,
|
||||
RVDD_VOL_SEL_126V,
|
||||
};
|
||||
|
||||
#define RVDD_DEFAULT_VOL RVDD_VOL_SEL_105V
|
||||
|
||||
#define GET_RVDD_VOL_SEL() (P33_CON_GET(P3_ANA_CON12) & 0xf)
|
||||
|
||||
#define RVDD_VOL_HD_SEL(en) P33_CON_SET(P3_ANA_CON12, 4, 2, en)
|
||||
|
||||
#define RVDD_CAP_EN(en) P33_CON_SET(P3_ANA_CON12, 6, 1, en)
|
||||
|
||||
#define P3_ANA_CON12_MASK 0b01110000
|
||||
#define P3_ANA_CON12_RV 0b00010000
|
||||
|
||||
/************************P3_ANA_CON13*****************************/
|
||||
#define WVDD_VOL_SEL(sel) P33_CON_SET(P3_ANA_CON13, 0, 4, sel)
|
||||
//Macro for WVDD_VOL_SEL
|
||||
enum {
|
||||
WVDD_VOL_SEL_050V = 0,
|
||||
WVDD_VOL_SEL_055V,
|
||||
WVDD_VOL_SEL_060V,
|
||||
WVDD_VOL_SEL_065V,
|
||||
WVDD_VOL_SEL_070V,
|
||||
WVDD_VOL_SEL_075V,
|
||||
WVDD_VOL_SEL_080V,
|
||||
WVDD_VOL_SEL_085V,
|
||||
WVDD_VOL_SEL_090V,
|
||||
WVDD_VOL_SEL_095V,
|
||||
WVDD_VOL_SEL_100V,
|
||||
WVDD_VOL_SEL_105V,
|
||||
WVDD_VOL_SEL_110V,
|
||||
WVDD_VOL_SEL_115V,
|
||||
WVDD_VOL_SEL_120V,
|
||||
WVDD_VOL_SEL_125V,
|
||||
};
|
||||
|
||||
#define WVDD_VOL_MIN 500
|
||||
#define VWDD_VOL_MAX 1250
|
||||
#define WVDD_VOL_TRIM 800//mv
|
||||
#define WVDD_VOL_STEP 50
|
||||
#define WVDD_LEVEL_MAX 0xf
|
||||
#define WVDD_LEVEL_ERR 0xff
|
||||
|
||||
#define WVDD_VOL_TRIM_LED 850
|
||||
|
||||
#define WVDD_LEVEL_DEFAULT ((WVDD_VOL_TRIM-WVDD_VOL_MIN)/WVDD_VOL_STEP + 2)
|
||||
|
||||
#define WVDD_LOAD_EN(en) P33_CON_SET(P3_ANA_CON13, 4, 1, en)
|
||||
|
||||
#define WVDDIO_FBRES_AUTO(en) P33_CON_SET(P3_ANA_CON13, 6, 1, en)
|
||||
|
||||
#define WVDDIO_FBRES_SEL_W(en) P33_CON_SET(P3_ANA_CON13, 7, 1, en)
|
||||
|
||||
#define P3_ANA_CON13_MASK 0b11110000
|
||||
#define P3_ANA_CON13_RV 0b10000000
|
||||
|
||||
/************************P3_ANA_CON14*****************************/
|
||||
#define RVD2PVD_SHORT_EN(en) P33_CON_SET(P3_ANA_CON14, 4, 1, en)
|
||||
|
||||
#define GET_RVD2PVD_SHORT_EN() (P33_CON_GET(P3_ANA_CON14) & BIT(4) ? 1:0)
|
||||
|
||||
#define PVD_DEUDSHT_EN(en) P33_CON_SET(P3_ANA_CON14, 3, 1, en)
|
||||
|
||||
#define GET_PVD_DEUDST_EN() ((P33_CON_GET(P3_ANA_CON14) & BIT(3)) ? 1:0)
|
||||
|
||||
#define PVD_HD_SEL(sel) P33_CON_SET(P3_ANA_CON14, 0, 3, sel)
|
||||
|
||||
#define GET_PVD_HD_SEL() (P33_CON_GET(P3_ANA_CON14) & 0x7)
|
||||
|
||||
#define P3_ANA_CON14_MASK 0b00011111
|
||||
#define P3_ANA_CON14_RV 0b00000100
|
||||
|
||||
/************************P3_ANA_CON15*****************************/
|
||||
#define EVD_VOL_SEL(sel) P33_CON_SET(P3_ANA_CON15, 0, 2, sel)
|
||||
enum {
|
||||
EVD_VOL_SEL_100V = 0,
|
||||
EVD_VOL_SEL_105V,
|
||||
EVD_VOL_SEL_110V,
|
||||
EVD_VOL_SEL_115V,
|
||||
};
|
||||
|
||||
#define EVD_HD_SEL(sel) P33_CON_SET(P3_ANA_CON15, 2, 2, sel)
|
||||
|
||||
#define EVD_CAP_EN(en) P33_CON_SET(P3_ANA_CON15, 4, 1, en)
|
||||
|
||||
#define P3_ANA_CON15_MASK 0b00001100
|
||||
#define P3_ANA_CON15_RV 0b00000100
|
||||
|
||||
/************************P3_PVDD0_AUTO*****************************/
|
||||
#define PVDD_LEVEL_LOW(sel) P33_CON_SET(P3_PVDD0_AUTO, 0, 4, sel)
|
||||
|
||||
#define GET_PVDD_LEVEL_LOW() (P33_CON_GET(P3_PVDD0_AUTO) & 0xf)
|
||||
|
||||
#define PVDD_LEVEL_AUTO(en) P33_CON_SET(P3_PVDD0_AUTO, 4, 1, en)
|
||||
|
||||
#define GET_PVDD_LEVEL_AUTO() ((P33_CON_GET(P3_PVDD0_AUTO) & BIT(4)) ? 1:0)
|
||||
|
||||
#define PVDD_AUTO_PRD(sel) P33_CON_SET(P3_PVDD0_AUTO, 5, 3, sel)
|
||||
|
||||
#define GET_PVDD_AUTO_PRD() ((P33_CON_GET(P3_PVDD0_AUTO) & (0x7<<5)) >> 5)
|
||||
|
||||
enum {
|
||||
PVDD_VOL_SEL_050V = 0,
|
||||
PVDD_VOL_SEL_055V,
|
||||
PVDD_VOL_SEL_060V,
|
||||
PVDD_VOL_SEL_065V,
|
||||
PVDD_VOL_SEL_070V,
|
||||
PVDD_VOL_SEL_075V,
|
||||
PVDD_VOL_SEL_080V,
|
||||
PVDD_VOL_SEL_085V,
|
||||
PVDD_VOL_SEL_090V,
|
||||
PVDD_VOL_SEL_095V,
|
||||
PVDD_VOL_SEL_100V,
|
||||
PVDD_VOL_SEL_105V,
|
||||
PVDD_VOL_SEL_110V,
|
||||
PVDD_VOL_SEL_115V,
|
||||
PVDD_VOL_SEL_120V,
|
||||
PVDD_VOL_SEL_125V,
|
||||
};
|
||||
|
||||
#define PVDD_VOL_MIN 500
|
||||
#define PVDD_VOL_MAX 1250
|
||||
#define PVDD_VOL_STEP 50
|
||||
#define PVDD_LEVEL_MAX 0xf
|
||||
#define PVDD_LEVEL_ERR 0xff
|
||||
#define PVDD_LEVEL_DEFAULT 0xc
|
||||
|
||||
#define PVDD_LEVEL_REF PVDD_VOL_SEL_115V
|
||||
#define PVDD_VOL_REF 1150//mV
|
||||
|
||||
#define PVDD_VOL_CLOCK_SET 1200
|
||||
|
||||
#define PVDD_VOL_HIGH_NOW 1100
|
||||
|
||||
#ifdef CONFIG_WATCH_CASE_ENABLE
|
||||
#define PVDD_LEVEL_SLEEP PVDD_VOL_SEL_090V
|
||||
#define PVDD_VOL_SLEEP 900
|
||||
|
||||
#else
|
||||
#define PVDD_LEVEL_SLEEP PVDD_VOL_SEL_095V
|
||||
#define PVDD_VOL_SLEEP 950
|
||||
|
||||
#endif
|
||||
|
||||
#define P3_PVDD0_AUTO_MASK 0b11110000
|
||||
#define P3_PVDD0_AUTO_RV 0b01110000
|
||||
|
||||
/************************P3_PVDD1_AUTO*****************************/
|
||||
#define PVDD_LEVEL_HIGH_NOW(sel) P33_CON_SET(P3_PVDD1_AUTO, 0, 8, (sel<<4)|sel);
|
||||
|
||||
#define PVDD_LEVEL_HIGH(sel) P33_CON_SET(P3_PVDD1_AUTO, 4, 4, sel)
|
||||
|
||||
#define GET_PVDD_LEVEL_HIGH() ((P33_CON_GET(P3_PVDD1_AUTO) & 0xf0)>>4)
|
||||
|
||||
#define PVDD_LEVEL_NOW(sel) P33_CON_SET(P3_PVDD1_AUTO, 0, 4, sel)
|
||||
|
||||
#define GET_PVDD_LEVEL_NOW() (P33_CON_GET(P3_PVDD1_AUTO) & 0x0f)
|
||||
|
||||
#define P3_PVDD1_AUTO_MASK 0b00000000
|
||||
#define P3_PVDD1_AUTO_RV 0b00000000
|
||||
|
||||
/************************P3_PVDD2_AUTO*****************************/
|
||||
#define GET_PVDD_DRV_AUTO() (P33_CON_GET(P3_PVDD2_AUTO) & BIT(0))
|
||||
|
||||
#define P3_PVDD2_AUTO_MASK 0b00000001
|
||||
#define P3_PVDD2_AUTO_RV 0b00000001
|
||||
|
||||
/************************P3_CHG_CON0*****************************/
|
||||
#define CHARGE_EN(en) P33_CON_SET(P3_CHG_CON0, 0, 1, en)
|
||||
|
||||
#define CHGGO_EN(en) P33_CON_SET(P3_CHG_CON0, 1, 1, en)
|
||||
|
||||
#define IS_CHARGE_EN() ((P33_CON_GET(P3_CHG_CON0) & BIT(0)) ? 1: 0 )
|
||||
|
||||
#define CHG_HV_MODE(mode) P33_CON_SET(P3_CHG_CON0, 2, 1, mode)
|
||||
|
||||
#define CHG_TRICKLE_EN(en) P33_CON_SET(P3_CHG_CON0, 3, 1, en)
|
||||
|
||||
#define CHG_CCLOOP_EN(en) P33_CON_SET(P3_CHG_CON0, 4, 1, en)
|
||||
|
||||
#define CHG_VILOOP_EN(en) P33_CON_SET(P3_CHG_CON0, 5, 1, en)
|
||||
|
||||
#define CHG_VINLOOP_SLT(sel) P33_CON_SET(P3_CHG_CON0, 6, 1, sel)
|
||||
|
||||
#define CHG_SEL_CHG_FULL 0
|
||||
#define CHG_SEL_VBAT_DET 1
|
||||
#define CHG_SSEL(sel) P33_CON_SET(P3_CHG_CON0, 7, 1, sel)
|
||||
|
||||
#define P3_CHG_CON0_MASK 0
|
||||
#define P3_CHG_CON0_RV 0
|
||||
|
||||
/************************P3_CHG_CON1*****************************/
|
||||
#define CHARGE_FULL_V_SEL(a) P33_CON_SET(P3_CHG_CON1, 0, 4, a)
|
||||
|
||||
#define CHARGE_mA_SEL(a) P33_CON_SET(P3_CHG_CON1, 4, 4, a)
|
||||
|
||||
#define P3_CHG_CON1_MASK 0
|
||||
#define P3_CHG_CON1_RV 0
|
||||
|
||||
/************************P3_CHG_CON2*****************************/
|
||||
#define CHARGE_FULL_mA_SEL(a) P33_CON_SET(P3_CHG_CON2, 4, 3, a)
|
||||
|
||||
enum {
|
||||
CHARGE_DET_VOL_365V,
|
||||
CHARGE_DET_VOL_375V,
|
||||
CHARGE_DET_VOL_385V,
|
||||
CHARGE_DET_VOL_395V,
|
||||
};
|
||||
#define CHARGE_DET_VOL(a) P33_CON_SET(P3_CHG_CON2, 1, 2, a)
|
||||
|
||||
#define CHARGE_DET_EN(en) P33_CON_SET(P3_CHG_CON2, 0, 1, en)
|
||||
|
||||
#define P3_CHG_CON2_MASK 0
|
||||
#define P3_CHG_CON2_RV 0
|
||||
|
||||
/************************P3_L5V_CON0*****************************/
|
||||
#define L5V_LOAD_EN(a) P33_CON_SET(P3_L5V_CON0, 0, 1, a)
|
||||
|
||||
#define L5V_IO_MODE(a) P33_CON_SET(P3_L5V_CON0, 2, 1, a)
|
||||
|
||||
#define IS_L5V_LOAD_EN() ((P33_CON_GET(P3_L5V_CON0) & BIT(0)) ? 1: 0 )
|
||||
|
||||
#define GET_L5V_RES_DET_S_SEL() (P33_CON_GET(P3_L5V_CON1) & 0x03)
|
||||
|
||||
#define P3_L5V_CON0_MASK 0
|
||||
#define P3_L5V_CON0_RV 0
|
||||
|
||||
/************************P3_L5V_CON1*****************************/
|
||||
#define L5V_RES_DET_S_SEL(a) P33_CON_SET(P3_L5V_CON1, 0, 2, a)
|
||||
|
||||
#define P3_L5V_CON1_MASK 0
|
||||
#define P3_L5V_CON1_RV 0
|
||||
|
||||
/************************P3_VLVD_CON*****************************/
|
||||
#define P33_VLVD_EN(en) P33_CON_SET(P3_VLVD_CON, 0, 1, en)
|
||||
|
||||
#define GET_VLVD_EN() (P33_CON_GET(P3_VLVD_CON) & BIT(0))
|
||||
|
||||
#define P33_VLVD_PS(en) P33_CON_SET(P3_VLVD_CON, 1, 1, en)
|
||||
|
||||
#define P33_VLVD_OE(en) P33_CON_SET(P3_VLVD_CON, 2, 1, en)
|
||||
|
||||
#define GET_VLVD_OE() ((P33_CON_GET(P3_VLVD_CON) & BIT(2)) ? 1:0)
|
||||
|
||||
#define VLVD_SEL(lev) P33_CON_SET(P3_VLVD_CON, 3, 3, lev)
|
||||
|
||||
#define GET_VLVD_SEL() ((P33_CON_GET(P3_VLVD_CON) & (0x7<<3))>>3)
|
||||
//Macro for VLVD_SEL
|
||||
enum {
|
||||
VLVD_SEL_18V = 0,
|
||||
VLVD_SEL_19V,
|
||||
VLVD_SEL_20V,
|
||||
VLVD_SEL_21V,
|
||||
VLVD_SEL_22V,
|
||||
VLVD_SEL_23V,
|
||||
VLVD_SEL_24V,
|
||||
VLVD_SEL_25V,
|
||||
};
|
||||
|
||||
#define VLVD_PND_CLR() P33_CON_SET(P3_VLVD_CON, 6, 1, 1)
|
||||
|
||||
#define VLVD_PND() ((P33_CON_GET(P3_VLVD_CON) & BIT(7)) ? 1 : 0)
|
||||
|
||||
#define P3_VLVD_CON_MASK 0
|
||||
#define P3_VLVD_CON_RV 0
|
||||
|
||||
/************************P3_VLVD_FLT*****************************/
|
||||
#define VLVD_FLT(sel) P33_CON_SET(P3_VLVD_FLT, 0, 2, sel);
|
||||
|
||||
#define P3_VLVD_FLT_MASK 0b00000011
|
||||
#define P3_VLVD_FLT_RV 0b00000010
|
||||
|
||||
/************************P3_RST_CON0*****************************/
|
||||
#define DPOR_MASK(en) P33_CON_SET(P3_RST_CON0, 0, 1, en)
|
||||
|
||||
#define VLVD_RST_EN(en) P33_CON_SET(P3_RST_CON0, 2, 1, en)
|
||||
|
||||
#define VLVD_WKUP_EN(en) P33_CON_SET(P3_RST_CON0, 3, 1, en)
|
||||
|
||||
#define PPOR_MASK(en) P33_CON_SET(P3_RST_CON0, 4, 1, en)
|
||||
|
||||
#define P11_TO_P33_RST_MASK(en) P33_CON_SET(P3_RST_CON0, 5, 1, en)
|
||||
|
||||
#define DVDDOK_OE(en) P33_CON_SET(P3_RST_CON0, 6, 1, en)
|
||||
|
||||
#define PVDDOK_OE(en) P33_CON_SET(P3_RST_CON0, 7, 1, en)
|
||||
|
||||
#define P3_RST_CON0_MASK 0b11111101
|
||||
#define P3_RST_CON0_RV 0b00000100
|
||||
|
||||
/************************P3_LRC_CON0*****************************/
|
||||
#define RC32K_EN(en) P33_CON_SET(P3_LRC_CON0, 0, 1, en)
|
||||
|
||||
#define RC32K_RN_TRIM(en) P33_CON_SET(P3_LRC_CON0, 1, 1, en)
|
||||
|
||||
#define RC32K_RPPS_SEL(sel) P33_CON_SET(P3_LRC_CON0, 4, 2, sel)
|
||||
|
||||
#define P3_LRC_CON0_MASK 0b00110011
|
||||
#define P3_LRC_CON0_RV 0b00100001
|
||||
|
||||
/************************P3_LRC_CON1*****************************/
|
||||
#define RC32K_PNPS_SEL(sel) P33_CON_SET(P3_LRC_CON1, 0, 2, sel)
|
||||
|
||||
#define RC32K_CAP_SEL(sel) P33_CON_SET(P3_LRC_CON1, 4, 3, sel)
|
||||
|
||||
#define CLOSE_LRC() P33_CON_SET(P3_LRC_CON0, 0, 8, 0);\
|
||||
P33_CON_SET(P3_LRC_CON1, 0, 8, 0)
|
||||
|
||||
#define P3_LRC_CON1_MASK 0b01110011
|
||||
#define P3_LRC_CON1_RV 0b01000001
|
||||
|
||||
/************************P3_CLK_CON0*****************************/
|
||||
#define RC_250K_EN(a) P33_CON_SET(P3_CLK_CON0, 0, 1, a)
|
||||
|
||||
#define P3_CLK_CON0_MASK 0b00000001
|
||||
#define P3_CLK_CON0_RV 0b00000000
|
||||
|
||||
/************************P3_VLD_KEEP*****************************/
|
||||
#define RTC_WKUP_KEEP(a) P33_CON_SET(P3_VLD_KEEP, 1, 1, a)
|
||||
|
||||
#define P33_WKUP_P11_EN(a) P33_CON_SET(P3_VLD_KEEP, 2, 1, a)
|
||||
|
||||
#define P3_VLD_KEEP_MASK 0b00000110
|
||||
#define P3_VLD_KEEP_RV 0b00000110
|
||||
|
||||
/************************P3_PMU_CON0*****************************/
|
||||
#define GET_P33_SYS_POWER_FLAG() ((P33_CON_GET(P3_PMU_CON0) & BIT(7)) ? 1 : 0)
|
||||
|
||||
#define P33_SYS_POWERUP_CLEAR() P33_CON_SET(P3_PMU_CON0, 6, 1, 1);
|
||||
|
||||
#define P3_PMU_CON0_MASK 0b00000000
|
||||
#define P3_PMU_CON0_RV 0b00000000
|
||||
|
||||
/************************P3_PMU_DBG_CON*****************************/
|
||||
#define P3_PMU_DBG_CON_MASK 0b00000000
|
||||
#define P3_PMU_DBG_CON_RV 0b00000000
|
||||
|
||||
/************************P3_IOV2_CON*****************************/
|
||||
#define GET_IOV2_VOL() ((P33_CON_GET(P3_IOV2_CON) & (0x7<<3)) >> 3)
|
||||
|
||||
#define GET_IOV2_IFULL() ((P33_CON_GET(P3_IOV2_CON) & BIT(2)) ? 1:0)
|
||||
|
||||
#define GET_IOV2_BYPASS() ((P33_CON_GET(P3_IOV2_CON) & BIT(1)) ? 1:0)
|
||||
|
||||
#define GET_IOV2_EN() ((P33_CON_GET(P3_IOV2_CON) & BIT(0)) ? 1:0)
|
||||
|
||||
#define P3_IOV2_CON_MASK 0
|
||||
#define P3_IOV2_CON_RV 0
|
||||
|
||||
/************************P3_RVD_CON*****************************/
|
||||
#define RVDD_CMP_EN(en) P33_CON_SET(P3_RVD_CON, 4, 1, en)
|
||||
|
||||
#define PVDD_DCDC_LEV_SEL(sel) P33_CON_SET(P3_RVD_CON, 0, 4, sel)
|
||||
|
||||
#define GET_PVDD_DCDC_LEV_SEL() (P33_CON_GET(P3_RVD_CON) & 0xf)
|
||||
|
||||
#define P3_RVD_CON_MASK 0b00000000
|
||||
#define P3_RVD_CON_RV 0b00000000
|
||||
|
||||
/************************P3_CHG_WKUP*****************************/
|
||||
#define CHARGE_LEVEL_DETECT_EN(a) P33_CON_SET(P3_CHG_WKUP, 0, 1, a)
|
||||
|
||||
#define CHARGE_EDGE_DETECT_EN(a) P33_CON_SET(P3_CHG_WKUP, 1, 1, a)
|
||||
|
||||
#define CHARGE_WKUP_SOURCE_SEL(a) P33_CON_SET(P3_CHG_WKUP, 2, 2, a)
|
||||
|
||||
#define CHARGE_WKUP_EN(a) P33_CON_SET(P3_CHG_WKUP, 4, 1, a)
|
||||
|
||||
#define CHARGE_WKUP_EDGE_SEL(a) P33_CON_SET(P3_CHG_WKUP, 5, 1, a)
|
||||
|
||||
#define CHARGE_WKUP_PND_CLR() P33_CON_SET(P3_CHG_WKUP, 6, 1, 1)
|
||||
|
||||
/************************P3_AWKUP_LEVEL*****************************/
|
||||
#define CHARGE_FULL_FILTER_GET() ((P33_CON_GET(P3_AWKUP_LEVEL) & BIT(2)) ? 1: 0)
|
||||
|
||||
#define LVCMP_DET_FILTER_GET() ((P33_CON_GET(P3_AWKUP_LEVEL) & BIT(1)) ? 1: 0)
|
||||
|
||||
#define LDO5V_DET_FILTER_GET() ((P33_CON_GET(P3_AWKUP_LEVEL) & BIT(0)) ? 1: 0)
|
||||
|
||||
/************************P3_ANA_READ*****************************/
|
||||
#define CHARGE_FULL_FLAG_GET() ((P33_CON_GET(P3_ANA_READ) & BIT(0)) ? 1: 0 )
|
||||
|
||||
#define LVCMP_DET_GET() ((P33_CON_GET(P3_ANA_READ) & BIT(1)) ? 1: 0 )
|
||||
|
||||
#define LDO5V_DET_GET() ((P33_CON_GET(P3_ANA_READ) & BIT(2)) ? 1: 0 )
|
||||
//
|
||||
//
|
||||
// for ANA_control.doc
|
||||
//
|
||||
//
|
||||
//
|
||||
/************************P3_LS_XX*****************************/
|
||||
#define PVDD_ANA_LAT_EN(en) \
|
||||
if(en){ \
|
||||
P3_LS_P11 = 0x01; \
|
||||
P3_LS_P11 = 0x03; \
|
||||
}else{ \
|
||||
P3_LS_P11 = 0x0; \
|
||||
}
|
||||
|
||||
#define DVDD_ANA_LAT_EN(en) \
|
||||
if(en){ \
|
||||
P3_LS_IO_DLY = 0x1; \
|
||||
P3_LS_IO_ROM = 0x1; \
|
||||
P3_LS_ADC = 0x1; \
|
||||
P3_LS_AUDIO = 0x1; \
|
||||
P3_LS_RF = 0x1; \
|
||||
P3_LS_PLL = 0x1; \
|
||||
P3_LS_IO_DLY = 0x3; \
|
||||
P3_LS_IO_ROM = 0x3; \
|
||||
P3_LS_ADC = 0x3; \
|
||||
P3_LS_AUDIO = 0x3; \
|
||||
P3_LS_RF = 0x3; \
|
||||
P3_LS_PLL = 0x3; \
|
||||
}else{ \
|
||||
P3_LS_IO_DLY = 0x0; \
|
||||
P3_LS_IO_ROM = 0x0; \
|
||||
P3_LS_ADC = 0x0; \
|
||||
P3_LS_AUDIO = 0x0; \
|
||||
P3_LS_RF = 0x0; \
|
||||
P3_LS_PLL = 0x0;\
|
||||
}
|
||||
|
||||
#define DVDD_ANA_ROM_LAT_EN(en) \
|
||||
if(en){ \
|
||||
P3_LS_IO_ROM = 1; \
|
||||
P3_LS_PLL = 1; \
|
||||
P3_LS_RF = 1; \
|
||||
P3_LS_IO_ROM = 3; \
|
||||
P3_LS_PLL = 3; \
|
||||
P3_LS_RF = 3; \
|
||||
}else{ \
|
||||
P3_LS_IO_ROM = 0; \
|
||||
P3_LS_PLL = 0; \
|
||||
P3_LS_RF = 0; \
|
||||
}
|
||||
//
|
||||
//
|
||||
// for reset_source.doc
|
||||
//
|
||||
//
|
||||
//
|
||||
/************************P3_PR_PWR*****************************/
|
||||
#define P3_SOFT_RESET() P33_CON_SET(P3_PR_PWR, 4, 2, 3)
|
||||
|
||||
/************************P3_IVS_CLR*****************************/
|
||||
#define P33_SF_KICK_START() P33_CON_SET(P3_IVS_CLR, 0, 8, 0b10101000)
|
||||
|
||||
/************************P3_RST_SRC*****************************/
|
||||
#define GET_P33_SYS_RST_SRC() P33_CON_GET(P3_RST_SRC)
|
||||
|
||||
|
||||
#endif
|
||||
140
include_lib/driver/cpu/br28/asm/power/p33_io_app.h
Normal file
140
include_lib/driver/cpu/br28/asm/power/p33_io_app.h
Normal file
@ -0,0 +1,140 @@
|
||||
#ifndef __P33_IO_APP_H__
|
||||
#define __P33_IO_APP_H__
|
||||
|
||||
/*******************************************************************/
|
||||
|
||||
/*
|
||||
*-------------------P3_WKUP_DLY
|
||||
*/
|
||||
|
||||
#define P3_WKUP_DLY_SET(val) P33_CON_SET(P3_WKUP_DLY, 0, 3, val)
|
||||
|
||||
/*******************************************************************/
|
||||
|
||||
/*
|
||||
*-------------------P3_PCNT_CON
|
||||
*/
|
||||
|
||||
#define PCNT_PND_CLR() P33_CON_SET(P3_PCNT_CON, 6, 1, 1)
|
||||
|
||||
/*******************************************************************/
|
||||
|
||||
/*
|
||||
*-------------------P3_PCNT_SET
|
||||
*/
|
||||
|
||||
#define SET_EXCEPTION_FLAG() P33_CON_SET(P3_PCNT_SET0, 0, 7, 0xb)
|
||||
#define SET_ASSERT_FLAG() P33_CON_SET(P3_PCNT_SET0, 0, 7, 0xc)
|
||||
#define SET_XOSC_RESUME_ERR_FLAG() P33_CON_SET(P3_PCNT_SET0, 0, 7, 0xd)
|
||||
#define SET_LPTMR_TIMEOUT_FLAG() P33_CON_SET(P3_PCNT_SET0, 0, 7, 0xe)
|
||||
#define SET_LVD_FLAG(en) P33_CON_SET(P3_PCNT_SET0, 7, 1, en)
|
||||
|
||||
#define GET_EXCEPTION_FLAG() (((P33_CON_GET(P3_PCNT_SET0)&0x7f) == 0xb) ? 1 : 0)
|
||||
#define GET_ASSERT_FLAG() (((P33_CON_GET(P3_PCNT_SET0)&0x7f) == 0xc) ? 1 : 0)
|
||||
#define GET_XOSC_RESUME_ERR_FLAG() (((P33_CON_GET(P3_PCNT_SET0)&0x7f) == 0xd) ? 1 : 0)
|
||||
#define GET_LPTMR_TIMEOUT_FLAG() (((P33_CON_GET(P3_PCNT_SET0)&0x7f) == 0xe) ? 1 : 0)
|
||||
#define GET_LVD_FLAG() (((P33_CON_GET(P3_PCNT_SET0)&0x80) == 0x80) ? 1 : 0)
|
||||
|
||||
#define SOFT_RESET_FLAG_CLEAR() (P33_CON_SET(P3_PCNT_SET0, 0, 8, 0))
|
||||
|
||||
/*******************************************************************/
|
||||
|
||||
/*
|
||||
*-------------------P3_WKUP_XX
|
||||
*/
|
||||
|
||||
#define MAX_WAKEUP_PORT 12 //最大同时支持数字io输入个数
|
||||
|
||||
#define MAX_WAKEUP_ANA_PORT 3 //最大同时支持模拟io输入个数
|
||||
|
||||
typedef enum {
|
||||
RISING_EDGE = 0,
|
||||
FALLING_EDGE,
|
||||
BOTH_EDGE,
|
||||
} POWER_WKUP_EDGE;
|
||||
|
||||
typedef enum {
|
||||
PORT_FLT_NULL = 0,
|
||||
PORT_FLT_256us,
|
||||
PORT_FLT_512us,
|
||||
PORT_FLT_1ms,
|
||||
PORT_FLT_2ms,
|
||||
PORT_FLT_4ms,
|
||||
PORT_FLT_8ms,
|
||||
PORT_FLT_16ms,
|
||||
} POWER_WKUP_FLT;
|
||||
|
||||
//en
|
||||
#define P33_SET_WKUP_EN(data) P33_CON_SET(P3_WKUP_EN0, 0, 8, data & 0xff); \
|
||||
P33_CON_SET(P3_WKUP_EN1, 0, 8, (data >> 8) & 0xff)
|
||||
|
||||
#define P33_OR_WKUP_EN(data) p33_fast_access(P3_WKUP_EN0, data & 0xff, 1); \
|
||||
p33_fast_access(P3_WKUP_EN1, (data >> 8) & 0xff, 1)
|
||||
|
||||
#define P33_AND_WKUP_EN(data) p33_fast_access(P3_WKUP_EN0, data & 0xff, 0); \
|
||||
p33_fast_access(P3_WKUP_EN1, (data >> 8) & 0xff, 0)
|
||||
|
||||
//edge
|
||||
#define P33_SET_WKUP_EDGE(data) P33_CON_SET(P3_WKUP_EDGE0, 0, 8, data & 0xff); \
|
||||
P33_CON_SET(P3_WKUP_EDGE1, 0, 8, (data >> 8) & 0xff)
|
||||
|
||||
#define P33_OR_WKUP_EDGE(data) p33_fast_access(P3_WKUP_EDGE0, data & 0xff, 1); \
|
||||
p33_fast_access(P3_WKUP_EDGE1, (data >> 8) & 0xff, 1)
|
||||
|
||||
#define P33_AND_WKUP_EDGE(data) p33_fast_access(P3_WKUP_EDGE0, data & 0xff, 0); \
|
||||
p33_fast_access(P3_WKUP_EDGE1, (data >> 8) & 0xff, 0)
|
||||
|
||||
//cpnd
|
||||
#define P33_SET_WKUP_CPND(data) p33_fast_access(P3_WKUP_CPND0, data & 0xff, 1); \
|
||||
p33_fast_access(P3_WKUP_CPND1, (data >> 8) & 0xff, 1)
|
||||
|
||||
//pnd
|
||||
#define P33_GET_WKUP_PND() (P33_CON_GET(P3_WKUP_PND0) | (P33_CON_GET(P3_WKUP_PND1)<<8))
|
||||
|
||||
//akwup_en
|
||||
#define P33_SET_AWKUP_EN(data) P33_CON_SET(P3_AWKUP_EN, 0, 8, data & 0xff)
|
||||
|
||||
#define P33_OR_AWKUP_EN(data) p33_fast_access(P3_AWKUP_EN, data & 0xff, 1)
|
||||
|
||||
//awkup_p_pnd
|
||||
#define P33_GET_AWKUP_P_PND() (P33_CON_GET(P3_AWKUP_P_PND))
|
||||
|
||||
//awkup_n_pnd
|
||||
#define P33_GET_AWKUP_N_PND() (P33_CON_GET(P3_AWKUP_N_PND))
|
||||
|
||||
//awkup_p_cpnd
|
||||
#define P33_SET_AWKUP_P_CPND(data) p33_fast_access(P3_AWKUP_P_CPND, data & 0xff, 1)
|
||||
|
||||
//awkup_n_cpnd
|
||||
#define P33_SET_AWKUP_N_CPND(data) p33_fast_access(P3_AWKUP_N_CPND, data & 0xff, 1)
|
||||
|
||||
//awkup_p_ie
|
||||
#define P33_SET_AWKUP_P_IE(data) P33_CON_SET(P3_AWKUP_P_IE, 0, 8, data & 0xff)
|
||||
#define P33_OR_AWKUP_P_IE(data) p33_fast_access(P3_AWKUP_P_IE, data & 0xff, 1)
|
||||
#define P33_AND_AWKUP_P_IE(data) p33_fast_access(P3_AWKUP_P_IE, data & 0xff, 0)
|
||||
|
||||
//awkup_n_ie
|
||||
#define P33_SET_AWAKEUP_N_IE(data) P33_CON_SET(P3_AWKUP_N_IE, 0, 8, data & 0xff)
|
||||
#define P33_OR_AWKUP_N_IE(data) p33_fast_access(P3_AWKUP_N_IE, data & 0xff, 1)
|
||||
#define P33_AND_AWKUP_N_IE(data) p33_fast_access(P3_AWKUP_N_IE, data & 0xff, 0)
|
||||
|
||||
#define CLEAN_GPIO_WAKEUP_PENDING() P33_SET_AWKUP_P_CPND(0xff); \
|
||||
P33_SET_AWKUP_N_CPND(0xff); \
|
||||
P33_SET_WKUP_CPND(0xffff);
|
||||
|
||||
#define CLEAN_P33_WKUP_PENDING() P33_SET_AWKUP_P_CPND(0xff); \
|
||||
P33_SET_AWKUP_N_CPND(0xff); \
|
||||
P33_SET_WKUP_CPND(0xffff); \
|
||||
VLVD_PND_CLR(); \
|
||||
PCNT_PND_CLR()
|
||||
|
||||
enum {
|
||||
P3_WKUP_SRC_PCNT_OVF = 0,
|
||||
P3_WKUP_SRC_PORT_EDGE,
|
||||
P3_WKUP_SRC_ANA_EDGE,
|
||||
P3_WKUP_SRC_VDDIO_LVD = 4,
|
||||
};
|
||||
|
||||
#define P33_GET_WKUP_SRC() P33_CON_GET(P3_WKUP_SRC)
|
||||
|
||||
#endif
|
||||
249
include_lib/driver/cpu/br28/asm/power/p33_sfr.h
Normal file
249
include_lib/driver/cpu/br28/asm/power/p33_sfr.h
Normal file
@ -0,0 +1,249 @@
|
||||
#ifndef __BR28_P33__
|
||||
#define __BR28_P33__
|
||||
////////////////////////////////
|
||||
|
||||
#ifdef PMU_SYSTEM
|
||||
#define P33_ACCESS(x) (*(volatile u32 *)(0xc000 + x*4))
|
||||
#else
|
||||
#define P33_ACCESS(x) (*(volatile u32 *)(0xf20000 + 0xc000 + x*4))
|
||||
#endif
|
||||
|
||||
#ifdef PMU_SYSTEM
|
||||
#define RTC_ACCESS(x) (*(volatile u32 *)(0xd000 + x*4))
|
||||
#else
|
||||
#define RTC_ACCESS(x) (*(volatile u32 *)(0xf20000 + 0xd000 + x*4))
|
||||
#endif
|
||||
|
||||
//===========
|
||||
//===============================================================================//
|
||||
//
|
||||
//
|
||||
//
|
||||
//===============================================================================//
|
||||
//............. 0x0000 - 0x000f............
|
||||
#define P3_IOV2_CON P33_ACCESS(0x00)
|
||||
|
||||
//............. 0x0010 - 0x001f............ for analog others
|
||||
#define P3_OSL_CON P33_ACCESS(0x10)
|
||||
#define P3_VLVD_CON P33_ACCESS(0x11)
|
||||
#define P3_RST_SRC P33_ACCESS(0x12)
|
||||
#define P3_LRC_CON0 P33_ACCESS(0x13)
|
||||
#define P3_LRC_CON1 P33_ACCESS(0x14)
|
||||
#define P3_RST_CON0 P33_ACCESS(0x15)
|
||||
#define P3_ANA_KEEP P33_ACCESS(0x16)
|
||||
#define P3_VLD_KEEP P33_ACCESS(0x17)
|
||||
#define P3_CLK_CON0 P33_ACCESS(0x18)
|
||||
#define P3_ANA_READ P33_ACCESS(0x19)
|
||||
#define P3_CHG_CON0 P33_ACCESS(0x1a)
|
||||
#define P3_CHG_CON1 P33_ACCESS(0x1b)
|
||||
#define P3_CHG_CON2 P33_ACCESS(0x1c)
|
||||
#define P3_CHG_CON3 P33_ACCESS(0x1d)
|
||||
|
||||
//............. 0x0020 - 0x002f............ for PWM LED
|
||||
//#define P3_PWM_CON0 P33_ACCESS(0x20)
|
||||
//#define P3_PWM_CON1 P33_ACCESS(0x21)
|
||||
//#define P3_PWM_CON2 P33_ACCESS(0x22)
|
||||
//#define P3_PWM_CON3 P33_ACCESS(0x23)
|
||||
//#define P3_PWM_BRI_PRDL P33_ACCESS(0x24)
|
||||
//#define P3_PWM_BRI_PRDH P33_ACCESS(0x25)
|
||||
//#define P3_PWM_BRI_DUTY0L P33_ACCESS(0x26)
|
||||
//#define P3_PWM_BRI_DUTY0H P33_ACCESS(0x27)
|
||||
//#define P3_PWM_BRI_DUTY1L P33_ACCESS(0x28)
|
||||
//#define P3_PWM_BRI_DUTY1H P33_ACCESS(0x29)
|
||||
//#define P3_PWM_PRD_DIVL P33_ACCESS(0x2a)
|
||||
//#define P3_PWM_DUTY0 P33_ACCESS(0x2b)
|
||||
//#define P3_PWM_DUTY1 P33_ACCESS(0x2c)
|
||||
//#define P3_PWM_DUTY2 P33_ACCESS(0x2d)
|
||||
//#define P3_PWM_DUTY3 P33_ACCESS(0x2e)
|
||||
//#define P3_PWM_CNT_RD P33_ACCESS(0x2f)
|
||||
|
||||
//............. 0x0030 - 0x003f............ for PMU manager
|
||||
#define P3_PMU_CON0 P33_ACCESS(0x30)
|
||||
|
||||
#define P3_SFLAG0 P33_ACCESS(0x38)
|
||||
#define P3_SFLAG1 P33_ACCESS(0x39)
|
||||
#define P3_SFLAG2 P33_ACCESS(0x3a)
|
||||
#define P3_SFLAG3 P33_ACCESS(0x3b)
|
||||
//#define P3_SFLAG4 P33_ACCESS(0x3c)
|
||||
//#define P3_SFLAG5 P33_ACCESS(0x3d)
|
||||
//#define P3_SFLAG6 P33_ACCESS(0x3e)
|
||||
//#define P3_SFLAG7 P33_ACCESS(0x3f)
|
||||
|
||||
//............. 0x0040 - 0x004f............ for
|
||||
#define P3_IVS_RD P33_ACCESS(0x40)
|
||||
#define P3_IVS_SET P33_ACCESS(0x41)
|
||||
#define P3_IVS_CLR P33_ACCESS(0x42)
|
||||
#define P3_PVDD0_AUTO P33_ACCESS(0x43)
|
||||
#define P3_PVDD1_AUTO P33_ACCESS(0x44)
|
||||
#define P3_WKUP_DLY P33_ACCESS(0x45)
|
||||
#define P3_VLVD_FLT P33_ACCESS(0x46)
|
||||
#define P3_PINR_CON1 P33_ACCESS(0x47)
|
||||
#define P3_PINR_CON P33_ACCESS(0x48)
|
||||
#define P3_PCNT_CON P33_ACCESS(0x49)
|
||||
#define P3_PCNT_SET0 P33_ACCESS(0x4a)
|
||||
#define P3_PCNT_SET1 P33_ACCESS(0x4b)
|
||||
#define P3_PCNT_DAT0 P33_ACCESS(0x4c)
|
||||
#define P3_PCNT_DAT1 P33_ACCESS(0x4d)
|
||||
#define P3_PVDD2_AUTO P33_ACCESS(0x4e)
|
||||
|
||||
//............. 0x0050 - 0x005f............ for port wake up
|
||||
#define P3_WKUP_EN0 P33_ACCESS(0x50)
|
||||
#define P3_WKUP_EN1 P33_ACCESS(0x51)
|
||||
#define P3_WKUP_EDGE0 P33_ACCESS(0x52)
|
||||
#define P3_WKUP_EDGE1 P33_ACCESS(0x53)
|
||||
#define P3_WKUP_LEVEL0 P33_ACCESS(0x54)
|
||||
#define P3_WKUP_LEVEL1 P33_ACCESS(0x55)
|
||||
#define P3_WKUP_PND0 P33_ACCESS(0x56)
|
||||
#define P3_WKUP_PND1 P33_ACCESS(0x57)
|
||||
#define P3_WKUP_CPND0 P33_ACCESS(0x58)
|
||||
#define P3_WKUP_CPND1 P33_ACCESS(0x59)
|
||||
|
||||
//............. 0x0060 - 0x006f............ for
|
||||
#define P3_AWKUP_EN P33_ACCESS(0x60)
|
||||
#define P3_AWKUP_P_IE P33_ACCESS(0x61)
|
||||
#define P3_AWKUP_N_IE P33_ACCESS(0x62)
|
||||
#define P3_AWKUP_LEVEL P33_ACCESS(0x63)
|
||||
#define P3_AWKUP_INSEL P33_ACCESS(0x64)
|
||||
#define P3_AWKUP_P_PND P33_ACCESS(0x65)
|
||||
#define P3_AWKUP_N_PND P33_ACCESS(0x66)
|
||||
#define P3_AWKUP_P_CPND P33_ACCESS(0x67)
|
||||
#define P3_AWKUP_N_CPND P33_ACCESS(0x68)
|
||||
|
||||
//............. 0x0070 - 0x007f............ for power gate
|
||||
//#define P3_PGDR_CON0 P33_ACCESS(0x70)
|
||||
//#define P3_PGDR_CON1 P33_ACCESS(0x71)
|
||||
#define P3_PGSD_CON P33_ACCESS(0x72)
|
||||
//#define P3_PGFS_CON P33_ACCESS(0x73)
|
||||
|
||||
//............. 0x0080 - 0x008f............ for
|
||||
#define P3_AWKUP_FLT0 P33_ACCESS(0x80)
|
||||
#define P3_AWKUP_FLT1 P33_ACCESS(0x81)
|
||||
#define P3_AWKUP_FLT2 P33_ACCESS(0x82)
|
||||
|
||||
#define P3_APORT_SEL0 P33_ACCESS(0x88)
|
||||
#define P3_APORT_SEL1 P33_ACCESS(0x89)
|
||||
#define P3_APORT_SEL2 P33_ACCESS(0x8a)
|
||||
|
||||
//............. 0x0090 - 0x009f............ for analog control
|
||||
#define P3_ANA_CON0 P33_ACCESS(0x90)
|
||||
#define P3_ANA_CON1 P33_ACCESS(0x91)
|
||||
#define P3_ANA_CON2 P33_ACCESS(0x92)
|
||||
#define P3_ANA_CON3 P33_ACCESS(0x93)
|
||||
#define P3_ANA_CON4 P33_ACCESS(0x94)
|
||||
#define P3_ANA_CON5 P33_ACCESS(0x95)
|
||||
#define P3_ANA_CON6 P33_ACCESS(0x96)
|
||||
#define P3_ANA_CON7 P33_ACCESS(0x97)
|
||||
#define P3_ANA_CON8 P33_ACCESS(0x98)
|
||||
#define P3_ANA_CON9 P33_ACCESS(0x99)
|
||||
#define P3_ANA_CON10 P33_ACCESS(0x9a)
|
||||
#define P3_ANA_CON11 P33_ACCESS(0x9b)
|
||||
#define P3_ANA_CON12 P33_ACCESS(0x9c)
|
||||
#define P3_ANA_CON13 P33_ACCESS(0x9d)
|
||||
#define P3_ANA_CON14 P33_ACCESS(0x9e)
|
||||
#define P3_ANA_CON15 P33_ACCESS(0x9f)
|
||||
|
||||
//............. 0x00a0 - 0x00af............
|
||||
#define P3_PR_PWR P33_ACCESS(0xa0)
|
||||
#define P3_L5V_CON0 P33_ACCESS(0xa1)
|
||||
#define P3_L5V_CON1 P33_ACCESS(0xa2)
|
||||
|
||||
#define P3_LS_P11 P33_ACCESS(0xa4)
|
||||
|
||||
#define P3_RVD_CON P33_ACCESS(0xa7)
|
||||
#define P3_WKUP_SRC P33_ACCESS(0xa8)
|
||||
|
||||
#define P3_PMU_DBG_CON P33_ACCESS(0xaa)
|
||||
#define P3_ANA_KEEP1 P33_ACCESS(0xab)
|
||||
|
||||
//............. 0x00b0 - 0x00bf............ for EFUSE
|
||||
#define P3_EFUSE_CON0 P33_ACCESS(0xb0)
|
||||
#define P3_EFUSE_CON1 P33_ACCESS(0xb1)
|
||||
#define P3_EFUSE_RDAT P33_ACCESS(0xb2)
|
||||
|
||||
#define P3_FUNC_EN P33_ACCESS(0xb8)
|
||||
|
||||
//............. 0x00c0 - 0x00cf............ for port input select
|
||||
#define P3_PORT_SEL0 P33_ACCESS(0xc0)
|
||||
#define P3_PORT_SEL1 P33_ACCESS(0xc1)
|
||||
#define P3_PORT_SEL2 P33_ACCESS(0xc2)
|
||||
#define P3_PORT_SEL3 P33_ACCESS(0xc3)
|
||||
#define P3_PORT_SEL4 P33_ACCESS(0xc4)
|
||||
#define P3_PORT_SEL5 P33_ACCESS(0xc5)
|
||||
#define P3_PORT_SEL6 P33_ACCESS(0xc6)
|
||||
#define P3_PORT_SEL7 P33_ACCESS(0xc7)
|
||||
#define P3_PORT_SEL8 P33_ACCESS(0xc8)
|
||||
#define P3_PORT_SEL9 P33_ACCESS(0xc9)
|
||||
#define P3_PORT_SEL10 P33_ACCESS(0xca)
|
||||
#define P3_PORT_SEL11 P33_ACCESS(0xcb)
|
||||
#define P3_PORT_SEL12 P33_ACCESS(0xcc)
|
||||
#define P3_PORT_SEL13 P33_ACCESS(0xcd)
|
||||
#define P3_PORT_SEL14 P33_ACCESS(0xce)
|
||||
#define P3_PORT_SEL15 P33_ACCESS(0xcf)
|
||||
|
||||
//............. 0x00d0 - 0x00df............
|
||||
#define P3_LS_IO_DLY P33_ACCESS(0xd0) //TODO: check sync with verilog head file chip_def.v LEVEL_SHIFTER
|
||||
#define P3_LS_IO_ROM P33_ACCESS(0xd1)
|
||||
#define P3_LS_ADC P33_ACCESS(0xd2)
|
||||
#define P3_LS_AUDIO P33_ACCESS(0xd3)
|
||||
#define P3_LS_RF P33_ACCESS(0xd4)
|
||||
#define P3_LS_PLL P33_ACCESS(0xd5)
|
||||
|
||||
|
||||
//===============================================================================//
|
||||
//
|
||||
// p33 rtcvdd
|
||||
//
|
||||
//===============================================================================//
|
||||
//#define RTC_SFR_BEGIN 0x1000
|
||||
|
||||
|
||||
|
||||
//............. 0x0080 - 0x008f............ for RTC
|
||||
#define R3_ALM_CON RTC_ACCESS((0x80))
|
||||
|
||||
#define R3_RTC_CON0 RTC_ACCESS((0x84))
|
||||
#define R3_RTC_CON1 RTC_ACCESS((0x85))
|
||||
#define R3_RTC_DAT0 RTC_ACCESS((0x86))
|
||||
#define R3_RTC_DAT1 RTC_ACCESS((0x87))
|
||||
#define R3_RTC_DAT2 RTC_ACCESS((0x88))
|
||||
#define R3_RTC_DAT3 RTC_ACCESS((0x89))
|
||||
#define R3_RTC_DAT4 RTC_ACCESS((0x8a))
|
||||
#define R3_ALM_DAT0 RTC_ACCESS((0x8b))
|
||||
#define R3_ALM_DAT1 RTC_ACCESS((0x8c))
|
||||
#define R3_ALM_DAT2 RTC_ACCESS((0x8d))
|
||||
#define R3_ALM_DAT3 RTC_ACCESS((0x8e))
|
||||
#define R3_ALM_DAT4 RTC_ACCESS((0x8f))
|
||||
|
||||
//............. 0x0090 - 0x009f............ for PORT control
|
||||
#define R3_WKUP_EN RTC_ACCESS((0x90))
|
||||
#define R3_WKUP_EDGE RTC_ACCESS((0x91))
|
||||
#define R3_WKUP_CPND RTC_ACCESS((0x92))
|
||||
#define R3_WKUP_PND RTC_ACCESS((0x93))
|
||||
#define R3_WKUP_FLEN RTC_ACCESS((0x94))
|
||||
#define R3_PORT_FLT RTC_ACCESS((0x95))
|
||||
|
||||
#define R3_PR_IN RTC_ACCESS((0x98))
|
||||
#define R3_PR_OUT RTC_ACCESS((0x99))
|
||||
#define R3_PR_DIR RTC_ACCESS((0x9a))
|
||||
#define R3_PR_DIE RTC_ACCESS((0x9b))
|
||||
#define R3_PR_PU RTC_ACCESS((0x9c))
|
||||
#define R3_PR_PD RTC_ACCESS((0x9d))
|
||||
#define R3_PR_HD RTC_ACCESS((0x9e))
|
||||
|
||||
//............. 0x00a0 - 0x00af............ for system
|
||||
#define R3_TIME_CON RTC_ACCESS((0xa0))
|
||||
#define R3_TIME_CPND RTC_ACCESS((0xa1))
|
||||
#define R3_TIME_PND RTC_ACCESS((0xa2))
|
||||
|
||||
#define R3_ADC_CON RTC_ACCESS((0xa4))
|
||||
#define R3_OSL_CON RTC_ACCESS((0xa5))
|
||||
|
||||
#define R3_WKUP_SRC RTC_ACCESS((0xa8))
|
||||
#define R3_RST_SRC RTC_ACCESS((0xa9))
|
||||
|
||||
#define R3_RST_CON RTC_ACCESS((0xab))
|
||||
#define R3_CLK_CON RTC_ACCESS((0xac))
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
336
include_lib/driver/cpu/br28/asm/power/power_api.h
Normal file
336
include_lib/driver/cpu/br28/asm/power/power_api.h
Normal file
@ -0,0 +1,336 @@
|
||||
#ifndef __POWER_API_H__
|
||||
#define __POWER_API_H__
|
||||
|
||||
#define PMU_NEW_FLOW 0
|
||||
#define TRIM_WVDD BIT(0)
|
||||
#define TRIM_PVDD BIT(1)
|
||||
#define TRIM_IOVDD BIT(2)
|
||||
|
||||
//=========================电源参数配置==================================
|
||||
struct low_power_param {
|
||||
u8 config; //低功耗使能，蓝牙&&系统空闲可进入低功耗
|
||||
u8 osc_type; //低功耗晶振类型，btosc/lrc
|
||||
u32 btosc_hz; //蓝牙晶振频率
|
||||
|
||||
//vddiow_lev不需要配置，sleep、softoff模式会保持电压，除非配置使用nkeep_vddio(功耗相差不大)
|
||||
u8 vddiom_lev; //vddiom
|
||||
u8 vddiow_lev; //vddiow
|
||||
u8 nkeep_vddio; //softoff模式下不保持vddio
|
||||
|
||||
u32 osc_delay_us; //低功耗晶振起振延时，为预留配置。
|
||||
u8 rtc_clk; //rtc时钟源，softoff模式根据此配置是否保持住相应时钟
|
||||
u8 lpctmu_en; //低功耗触摸，softoff模式根据此配置是否保持住该模块
|
||||
|
||||
u8 mem_init_con; //初始化ram电源
|
||||
u8 mem_lowpower_con; //低功耗ram电源
|
||||
u8 rvdd2pvdd; //低功耗外接dcdc
|
||||
u8 pvdd_dcdc_port;
|
||||
|
||||
u8 lptmr_flow; //低功耗参数由用户配置
|
||||
u32 t1;
|
||||
u32 t2;
|
||||
u32 t3_lrc;
|
||||
u32 t4_lrc;
|
||||
u32 t3_btosc;
|
||||
u32 t4_btosc;
|
||||
|
||||
u8 flash_pg; //iomc: 外置flash power gate
|
||||
|
||||
u8 btosc_disable;
|
||||
u8 delay_us;
|
||||
|
||||
u8 vddio_keep_type_pd; //sleep keep vddio使用类型
|
||||
u8 vddio_keep_type_sf; //soff keep vddio使用类型
|
||||
};
|
||||
|
||||
//config
|
||||
#define SLEEP_EN BIT(0)
|
||||
#define DEEP_SLEEP_EN BIT(1)
|
||||
|
||||
enum {
|
||||
VDDIO_KEEP_TYPE_TRIM = 0,//vddio keep使用trim值：默认
|
||||
VDDIO_KEEP_TYPE_PG, //vddio keep使用 mvvdio：功耗代价100ua
|
||||
};
|
||||
|
||||
//osc_type
|
||||
enum {
|
||||
OSC_TYPE_LRC = 0,
|
||||
OSC_TYPE_BT_OSC,
|
||||
};
|
||||
|
||||
//DCVDD电源模式
|
||||
enum {
|
||||
PWR_LDO15,
|
||||
PWR_DCDC15,
|
||||
};
|
||||
|
||||
//PVDD电源模式
|
||||
enum PVDD_MODE {
|
||||
PWR_PVDD_LDO,
|
||||
PWR_PVDD_DCDC,
|
||||
};
|
||||
|
||||
//==============================软关机参数配置============================
|
||||
//软关机会复位寄存器，该参数为传给rom配置的参数。
|
||||
struct soft_flag0_t {
|
||||
u8 wdt_dis: 1;
|
||||
u8 poweroff: 1;
|
||||
u8 is_port_b: 1;
|
||||
u8 lvd_en: 1;
|
||||
u8 pmu_en: 1;
|
||||
u8 iov2_ldomode: 1;
|
||||
u8 res: 2;
|
||||
};
|
||||
|
||||
struct soft_flag1_t {
|
||||
u8 usbdp: 2;
|
||||
u8 usbdm: 2;
|
||||
u8 uart_key_port: 1;
|
||||
u8 ldoin: 3;
|
||||
};
|
||||
|
||||
struct soft_flag2_t {
|
||||
u8 pg2: 4;
|
||||
u8 pg3: 4;
|
||||
};
|
||||
|
||||
struct soft_flag3_t {
|
||||
u8 pg4: 4;
|
||||
u8 res: 4;
|
||||
};
|
||||
|
||||
struct soft_flag4_t {
|
||||
u8 fast_boot: 1;
|
||||
u8 flash_stable_delay_sel: 2;
|
||||
u8 res: 5;
|
||||
};
|
||||
|
||||
struct soft_flag5_t {
|
||||
u8 mvddio: 3;
|
||||
u8 wvbg: 4;
|
||||
u8 res: 1;
|
||||
};
|
||||
|
||||
struct boot_soft_flag_t {
|
||||
union {
|
||||
struct soft_flag0_t boot_ctrl;
|
||||
u8 value;
|
||||
} flag0;
|
||||
union {
|
||||
struct soft_flag1_t misc;
|
||||
u8 value;
|
||||
} flag1;
|
||||
union {
|
||||
struct soft_flag2_t pg2_pg3;
|
||||
u8 value;
|
||||
} flag2;
|
||||
union {
|
||||
struct soft_flag3_t pg4_res;
|
||||
u8 value;
|
||||
} flag3;
|
||||
union {
|
||||
struct soft_flag4_t fast_boot_ctrl;
|
||||
u8 value;
|
||||
} flag4;
|
||||
union {
|
||||
struct soft_flag5_t level;
|
||||
u8 value;
|
||||
} flag5;
|
||||
};
|
||||
|
||||
enum soft_flag_io_stage {
|
||||
SOFTFLAG_HIGH_RESISTANCE,
|
||||
SOFTFLAG_PU,
|
||||
SOFTFLAG_PD,
|
||||
|
||||
SOFTFLAG_OUT0,
|
||||
SOFTFLAG_OUT0_HD0,
|
||||
SOFTFLAG_OUT0_HD,
|
||||
SOFTFLAG_OUT0_HD0_HD,
|
||||
|
||||
SOFTFLAG_OUT1,
|
||||
SOFTFLAG_OUT1_HD0,
|
||||
SOFTFLAG_OUT1_HD,
|
||||
SOFTFLAG_OUT1_HD0_HD,
|
||||
};
|
||||
|
||||
//==============================电源接口============================
|
||||
|
||||
#define AT_VOLATILE_RAM_CODE_POWER AT(.power_driver.text.cache.L1)
|
||||
#define AT_VOLATILE_CACHE_CODE_POWER AT(.power_driver.text.cache.L2)
|
||||
|
||||
void power_set_mode(u8 mode);
|
||||
|
||||
void power_set_pvdd_mode(enum PVDD_MODE mode);
|
||||
|
||||
u8 get_pvdd_dcdc_cfg();
|
||||
|
||||
void power_init(const struct low_power_param *param);
|
||||
|
||||
void power_keep_dacvdd_en(u8 en);
|
||||
|
||||
void sdpg_config(int enable);
|
||||
|
||||
void p11_init(void);
|
||||
|
||||
u8 get_wvdd_trim_level();
|
||||
|
||||
u8 get_pvdd_level();
|
||||
|
||||
u8 get_pvdd_trim_level();
|
||||
|
||||
u8 get_miovdd_trim_level();
|
||||
|
||||
u8 get_wiovdd_trim_level();
|
||||
|
||||
void store_pmu_trim_value_to_vm(u8 wvdd_level, u8 pvdd_level, u8 miovdd_lev, u8 wiovdd_lev);
|
||||
|
||||
u8 load_pmu_trim_value_from_vm();
|
||||
|
||||
void volatage_trim_init();
|
||||
|
||||
//==============================sleep接口============================
|
||||
//注意：所有接口在临界区被调用，请勿使用阻塞操作
|
||||
//sleep模式介绍
|
||||
//1.所有数字模块停止，包括cpu、periph、audio、rf等
|
||||
//2.所有模拟模块停止，包括pll、btosc、rc等
|
||||
//3.只保留pmu模块
|
||||
|
||||
//light_sleep: 不切电源域
|
||||
//normal_sleep: dvdd低电
|
||||
//deepsleep：dvdd掉电
|
||||
|
||||
//----------------低功耗线程查询是否满足低功耗状态, 被动等待------------
|
||||
struct low_power_operation {
|
||||
|
||||
const char *name;
|
||||
|
||||
u32(*get_timeout)(void *priv);
|
||||
|
||||
void (*suspend_probe)(void *priv);
|
||||
|
||||
void (*suspend_post)(void *priv, u32 usec);
|
||||
|
||||
void (*resume)(void *priv, u32 usec);
|
||||
|
||||
void (*resume_post)(void *priv, u32 usec);
|
||||
};
|
||||
|
||||
enum LOW_POWER_LEVEL {
|
||||
LOW_POWER_MODE_LIGHT_SLEEP = 1,
|
||||
LOW_POWER_MODE_SLEEP,
|
||||
LOW_POWER_MODE_DEEP_SLEEP,
|
||||
};
|
||||
|
||||
typedef u8(*idle_handler_t)(void);
|
||||
typedef enum LOW_POWER_LEVEL(*level_handler_t)(void);
|
||||
|
||||
typedef u8(*idle_handler_t)(void);
|
||||
|
||||
struct lp_target {
|
||||
char *name;
|
||||
level_handler_t level;
|
||||
idle_handler_t is_idle;
|
||||
};
|
||||
|
||||
#define REGISTER_LP_TARGET(target) \
|
||||
const struct lp_target target sec(.lp_target)
|
||||
|
||||
|
||||
extern const struct lp_target lp_target_begin[];
|
||||
extern const struct lp_target lp_target_end[];
|
||||
|
||||
#define list_for_each_lp_target(p) \
|
||||
for (p = lp_target_begin; p < lp_target_end; p++)
|
||||
|
||||
|
||||
//--------------低功耗线程请求进入低功耗, 主动发出------------
|
||||
struct lp_request {
|
||||
char *name;
|
||||
u8(*request_enter)(u32 timeout);
|
||||
u8(*request_exit)(u32 timeout);
|
||||
};
|
||||
|
||||
#define REGISTER_LP_REQUEST(target) \
|
||||
const struct lp_request target sec(.lp_request)
|
||||
|
||||
extern const struct lp_request lp_request_begin[];
|
||||
extern const struct lp_request lp_request_end[];
|
||||
|
||||
#define list_for_each_lp_request(p) \
|
||||
for (p = lp_request_begin; p < lp_request_end; p++)
|
||||
|
||||
//-----------------------深度睡眠处理--------------------------
|
||||
struct deepsleep_target {
|
||||
char *name;
|
||||
u8(*enter)(void);
|
||||
u8(*exit)(void);
|
||||
};
|
||||
|
||||
#define DEEPSLEEP_TARGET_REGISTER(target) \
|
||||
const struct deepsleep_target target sec(.deepsleep_target)
|
||||
|
||||
|
||||
extern const struct deepsleep_target deepsleep_target_begin[];
|
||||
extern const struct deepsleep_target deepsleep_target_end[];
|
||||
|
||||
#define list_for_each_deepsleep_target(p) \
|
||||
for (p = deepsleep_target_begin; p < deepsleep_target_end; p++)
|
||||
|
||||
|
||||
#define NEW_BASEBAND_COMPENSATION 0
|
||||
|
||||
u32 __tus_carry(u32 x);
|
||||
|
||||
#define power_is_poweroff_post() 0
|
||||
|
||||
void *low_power_get(void *priv, const struct low_power_operation *ops);
|
||||
|
||||
void low_power_put(void *priv);
|
||||
|
||||
void low_power_sys_request(void *priv);
|
||||
|
||||
void *low_power_sys_get(void *priv, const struct low_power_operation *ops);
|
||||
|
||||
void low_power_sys_put(void *priv);
|
||||
|
||||
u8 is_low_power_mode(enum LOW_POWER_LEVEL level);
|
||||
|
||||
u8 low_power_sys_is_idle(void);
|
||||
|
||||
s32 low_power_trace_drift(u32 usec);
|
||||
|
||||
void low_power_reset_osc_type(u8 type);
|
||||
|
||||
u8 low_power_get_default_osc_type(void);
|
||||
|
||||
u8 low_power_get_osc_type(void);
|
||||
|
||||
void low_power_on(void);
|
||||
|
||||
void low_power_request(void);
|
||||
|
||||
u8 low_power_sys_request_enter(u32 timeout);
|
||||
|
||||
u8 low_power_sys_request_exit(u32 timeout);
|
||||
|
||||
u32 get_rch_hz();
|
||||
|
||||
void cap_rch_enable();
|
||||
|
||||
void cap_rch_disable();
|
||||
|
||||
//==============================soft接口============================
|
||||
|
||||
|
||||
void power_set_soft_poweroff();
|
||||
|
||||
void power_set_soft_poweroff_advance();
|
||||
|
||||
void mask_softflag_config(const struct boot_soft_flag_t *softflag);
|
||||
|
||||
void power_set_callback(u8 mode, void (*powerdown_enter)(u8 step), void (*powerdown_exit)(u32), void (*soft_poweroff_enter)(void));
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
8
include_lib/driver/cpu/br28/asm/power/power_compat.h
Normal file
8
include_lib/driver/cpu/br28/asm/power/power_compat.h
Normal file
@ -0,0 +1,8 @@
|
||||
#ifndef __POWER_COMPAT_H__
|
||||
#define __POWER_COMPAT_H__
|
||||
|
||||
//compatibility
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
154
include_lib/driver/cpu/br28/asm/power/power_port.h
Normal file
154
include_lib/driver/cpu/br28/asm/power/power_port.h
Normal file
@ -0,0 +1,154 @@
|
||||
#ifndef __POWER_PORT_H__
|
||||
#define __POWER_PORT_H__
|
||||
|
||||
#define NO_CONFIG_PORT (-1)
|
||||
enum {
|
||||
PORTA_GROUP = 0,
|
||||
PORTB_GROUP,
|
||||
PORTC_GROUP,
|
||||
PORTD_GROUP,
|
||||
PORTE_GROUP,
|
||||
PORTG_GROUP,
|
||||
PORTP_GROUP,
|
||||
};
|
||||
|
||||
struct gpio_value {
|
||||
u16 gpioa;
|
||||
u16 gpiob;
|
||||
u16 gpioc;
|
||||
u16 gpiod;
|
||||
u16 gpioe;
|
||||
u16 gpiog;
|
||||
u16 gpiop;
|
||||
u16 gpiousb;
|
||||
};
|
||||
|
||||
#define _PORT(p) JL_PORT##p
|
||||
#define SPI_PORT(p) _PORT(p)
|
||||
|
||||
|
||||
|
||||
// | func\port | A | B | C |
|
||||
// |-----------|------|------|------|
|
||||
// | CS | PD3 | PG4 | PC3 |
|
||||
// | CLK | PD0 | PD0 | PC1 |
|
||||
// | DO(D0) | PD1 | PD1 | PC2 |
|
||||
// | DI(D1) | PD2 | PG3 | PC4 |
|
||||
// | WP(D2) | PD5 | PG2 | PC5 |
|
||||
// | HOLD(D3) | PD6 | PD6 | PC0 |
|
||||
|
||||
#define PORT_SPI0_PWRA D
|
||||
#define SPI0_PWRA 4
|
||||
|
||||
#define PORT_SPI0_CSA D
|
||||
#define SPI0_CSA 3
|
||||
|
||||
#define PORT_SPI0_CLKA D
|
||||
#define SPI0_CLKA 0
|
||||
|
||||
#define PORT_SPI0_DOA D
|
||||
#define SPI0_DOA 1
|
||||
|
||||
#define PORT_SPI0_DIA D
|
||||
#define SPI0_DIA 2
|
||||
|
||||
#define PORT_SPI0_D2A D
|
||||
#define SPI0_D2A 5
|
||||
|
||||
#define PORT_SPI0_D3A D
|
||||
#define SPI0_D3A 6
|
||||
|
||||
#define SPI0_PWR_A IO_PORTD_04
|
||||
#define SPI0_CS_A IO_PORTD_03
|
||||
#define SPI0_CLK_A IO_PORTD_00
|
||||
#define SPI0_DO_D0_A IO_PORTD_01
|
||||
#define SPI0_DI_D1_A IO_PORTD_02
|
||||
#define SPI0_WP_D2_A IO_PORTD_05
|
||||
#define SPI0_HOLD_D3_A IO_PORTD_06
|
||||
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
#define PORT_SPI0_PWRB D
|
||||
#define SPI0_PWRB 4
|
||||
|
||||
#define PORT_SPI0_CSB G
|
||||
#define SPI0_CSB 4
|
||||
|
||||
#define PORT_SPI0_CLKB D
|
||||
#define SPI0_CLKB 0
|
||||
|
||||
#define PORT_SPI0_DOB D
|
||||
#define SPI0_DOB 1
|
||||
|
||||
#define PORT_SPI0_DIB G
|
||||
#define SPI0_DIB 3
|
||||
|
||||
#define PORT_SPI0_D2B G
|
||||
#define SPI0_D2B 2
|
||||
|
||||
#define PORT_SPI0_D3B D
|
||||
#define SPI0_D3B 6
|
||||
|
||||
#define SPI0_PWR_B IO_PORTD_04
|
||||
#define SPI0_CS_B IO_PORTG_04
|
||||
#define SPI0_CLK_B IO_PORTD_00
|
||||
#define SPI0_DO_D0_B IO_PORTD_01
|
||||
#define SPI0_DI_D1_B IO_PORTG_03
|
||||
#define SPI0_WP_D2_B IO_PORTG_02
|
||||
#define SPI0_HOLD_D3_B IO_PORTD_06
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////
|
||||
#define PORT_SPI0_PWRC C
|
||||
#define SPI0_PWRC 8
|
||||
|
||||
#define PORT_SPI0_CSC C
|
||||
#define SPI0_CSC 3
|
||||
|
||||
#define PORT_SPI0_CLKC C
|
||||
#define SPI0_CLKC 1
|
||||
|
||||
#define PORT_SPI0_DOC C
|
||||
#define SPI0_DOC 2
|
||||
|
||||
#define PORT_SPI0_DIC C
|
||||
#define SPI0_DIC 4
|
||||
|
||||
#define PORT_SPI0_D2C C
|
||||
#define SPI0_D2C 5
|
||||
|
||||
#define PORT_SPI0_D3C C
|
||||
#define SPI0_D3C 0
|
||||
|
||||
#define SPI0_PWR_C IO_PORTC_08
|
||||
#define SPI0_CS_C IO_PORTC_03
|
||||
#define SPI0_CLK_C IO_PORTC_01
|
||||
#define SPI0_DO_D0_C IO_PORTC_02
|
||||
#define SPI0_DI_D1_C IO_PORTC_04
|
||||
#define SPI0_WP_D2_C IO_PORTC_05
|
||||
#define SPI0_HOLD_D3_C IO_PORTC_00
|
||||
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#define PSRAM_D0A IO_PORTE_00
|
||||
#define PSRAM_D1A IO_PORTE_01
|
||||
#define PSRAM_D2A IO_PORTE_02
|
||||
#define PSRAM_D3A IO_PORTE_05
|
||||
|
||||
u32 get_sfc_port(void);
|
||||
u8 get_sfc_bit_mode();
|
||||
u8 get_sfc1_bit_mode();
|
||||
void port_init(void);
|
||||
void port_protect(u16 *port_group, u32 port_num);
|
||||
|
||||
u8 WSIG_to_PANA(u8 wsig);
|
||||
u8 PANA_to_WSIG(u8 iomap);
|
||||
|
||||
void soff_gpio_protect(u32 gpio);
|
||||
void board_set_soft_poweroff_common(void *priv);
|
||||
|
||||
void sleep_gpio_protect(u32 gpio);
|
||||
void sleep_enter_callback_common(void *priv);
|
||||
void sleep_exit_callback_common(void *priv);
|
||||
|
||||
#endif
|
||||
|
||||
59
include_lib/driver/cpu/br28/asm/power/power_reset.h
Normal file
59
include_lib/driver/cpu/br28/asm/power/power_reset.h
Normal file
@ -0,0 +1,59 @@
|
||||
#ifndef __POWER_RESET_H__
|
||||
#define __POWER_RESET_H__
|
||||
|
||||
/*
|
||||
*复位原因包括两种
|
||||
1.系统复位源: p33 p11 主系统
|
||||
2.自定义复位源：断言、异常等
|
||||
*/
|
||||
enum RST_REASON {
|
||||
/*主系统*/
|
||||
MSYS_P11_RST, //P11复位
|
||||
MSYS_DVDD_POR_RST, //DVDD上电
|
||||
MSYS_SOFT_RST, //主系统软件复位
|
||||
MSYS_P2M_RST, //低功耗唤醒复位(softoff advance && deepsleep)
|
||||
MSYS_POWER_RETURN, //主系统未被复位
|
||||
|
||||
/*P11*/
|
||||
P11_PVDD_POR_RST, //pvdd上电
|
||||
P11_IVS_RST, //低功耗唤醒复位(softoff legacy)
|
||||
P11_P33_RST, //p33复位
|
||||
P11_WDT_RST, //看门狗复位
|
||||
P11_SOFT_RST, //软件复位
|
||||
P11_MSYS_RST, //主系统复位P11
|
||||
P11_POWER_RETURN, //P11系统未被复位
|
||||
|
||||
/*P33*/
|
||||
P33_VDDIO_POR_RST, //vddio上电复位(电池/vpwr供电)
|
||||
P33_VDDIO_LVD_RST, //vddio低压复位、上电复位(电池/vpwr供电)
|
||||
P33_VCM_RST, //vcm高电平短接复位
|
||||
P33_PPINR_RST, //数字io输入长按复位
|
||||
P33_P11_RST, //p11系统复位p33，rset_mask=0
|
||||
P33_SOFT_RST, //p33软件复位，一般软件复位指此系统复位源，所有系统会直接复位。
|
||||
P33_PPINR1_RST, //模拟io输入长按复位，包括charge_full、vatch、ldoint、vabt_det
|
||||
P33_POWER_RETURN, //p33系统未被复位。
|
||||
|
||||
//SUB
|
||||
P33_EXCEPTION_SOFT_RST, //异常软件复位
|
||||
P33_ASSERT_SOFT_RST, //断言软件复位
|
||||
P33_XOSC_RESUME_ERR_RST, //快速起振恢复失败软件复位
|
||||
P33_LPTMR_TIMEOUT_RST, //LPTMR软件复位
|
||||
};
|
||||
|
||||
void power_reset_close();
|
||||
|
||||
void reset_source_dump(void);
|
||||
|
||||
void p33_soft_reset(void);
|
||||
|
||||
void set_reset_source_value(enum RST_REASON index);
|
||||
|
||||
u32 get_reset_source_value(void);
|
||||
|
||||
u8 is_reset_source(enum RST_REASON index);
|
||||
|
||||
int cpu_reset_by_soft();
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
74
include_lib/driver/cpu/br28/asm/power/power_wakeup.h
Normal file
74
include_lib/driver/cpu/br28/asm/power/power_wakeup.h
Normal file
@ -0,0 +1,74 @@
|
||||
#ifndef __POWER_WAKEUP_H__
|
||||
#define __POWER_WAKEUP_H__
|
||||
|
||||
enum WAKEUP_REASON {
|
||||
//WAKEUP
|
||||
PWR_WK_REASON_PLUSE_CNT_OVERFLOW, //pcnt唤醒复位
|
||||
PWR_WK_REASON_P11, //P11唤醒复位
|
||||
PWR_WK_REASON_LPCTMU, //触摸唤醒复位
|
||||
PWR_WK_REASON_PORT_EDGE, //数字io输入边沿唤醒复位
|
||||
PWR_WK_REASON_ANA_EDGE, //模拟io输入边沿唤醒复位
|
||||
PWR_WK_REASON_VDDIO_LVD, //vddio lvd唤醒复位
|
||||
PWR_WK_REASON_EDGE_INDEX0, //p33 index0 io唤醒复位
|
||||
PWR_WK_REASON_EDGE_INDEX1, //p33 index1 io唤醒复位
|
||||
PWR_WK_REASON_EDGE_INDEX2, //p33 index2 io唤醒复位
|
||||
PWR_WK_REASON_EDGE_INDEX3, //p33 index3 io唤醒复位
|
||||
PWR_WK_REASON_EDGE_INDEX4, //p33 index4 io唤醒复位
|
||||
PWR_WK_REASON_EDGE_INDEX5, //p33 index5 io唤醒复位
|
||||
PWR_WK_REASON_EDGE_INDEX6, //p33 index6 io唤醒复位
|
||||
PWR_WK_REASON_EDGE_INDEX7, //p33 index7 io唤醒复位
|
||||
PWR_WK_REASON_EDGE_INDEX8, //p33 index8 io唤醒复位
|
||||
PWR_WK_REASON_EDGE_INDEX9, //p33 index9 io唤醒复位
|
||||
PWR_WK_REASON_EDGE_INDEX10, //p33 index10 io唤醒复位
|
||||
PWR_WK_REASON_EDGE_INDEX11, //p33 index11 io唤醒复位
|
||||
PWR_ANA_WK_REASON_FALLINIG_EDGE_LDOIN, //LDO5V上升沿唤醒复位
|
||||
PWR_ANA_WK_REASON_RISING_EDGE_LDOIN, //LDO5V下降沿唤醒复位
|
||||
PWR_ANA_WK_REASON_FALLING_EDGE_VBATCH, //VBATCH上升降沿唤醒复位
|
||||
PWR_ANA_WK_REASON_RISING_EDGE_VBATCH, //VBATCH下降沿唤醒复位
|
||||
PWR_RTC_WK_REASON_ALM, //RTC闹钟唤醒复位
|
||||
PWR_RTC_WK_REASON_256HZ, //RTC 256Hz时基唤醒复位
|
||||
PWR_RTC_WK_REASON_64HZ, //RTC 64Hz时基唤醒复位
|
||||
PWR_RTC_WK_REASON_2HZ, //RTC 2Hz时基唤醒复位
|
||||
PWR_RTC_WK_REASON_1HZ, //RTC 1Hz时基唤醒复位
|
||||
};
|
||||
|
||||
//=========================唤醒参数配置==================================
|
||||
|
||||
struct port_wakeup {
|
||||
u8 iomap; //唤醒io
|
||||
u8 pullup_down_enable; //上下拉是否使能
|
||||
POWER_WKUP_EDGE edge; //唤醒边沿条件
|
||||
POWER_WKUP_FLT filter; //滤波参数，数字io输入没有滤波可配制
|
||||
};
|
||||
|
||||
struct wakeup_param {
|
||||
//数字io输入
|
||||
const struct port_wakeup *port[MAX_WAKEUP_PORT];
|
||||
//模拟io输入
|
||||
const struct port_wakeup *aport[MAX_WAKEUP_ANA_PORT];
|
||||
};
|
||||
|
||||
//=========================唤醒接口==================================
|
||||
void power_wakeup_index_enable(u8 index, u8 enable);
|
||||
void power_wakeup_gpio_enable(u8 gpio, u8 enable);
|
||||
void power_wakeup_gpio_edge(u8 gpio, POWER_WKUP_EDGE edge);
|
||||
|
||||
void power_awakeup_index_enable(u8 index, u8 enable);
|
||||
void power_awakeup_gpio_enable(u8 gpio, u8 enable);
|
||||
void power_awakeup_gpio_edge(u8 gpio, POWER_WKUP_EDGE edge);
|
||||
|
||||
void power_wakeup_set_callback(void (*wakeup_callback)(u8 index, u8 gpio));
|
||||
void power_awakeup_set_callback(void (*wakeup_callback)(u8 index, u8 gpio, POWER_WKUP_EDGE edge));
|
||||
|
||||
void port_edge_wkup_set_callback_by_index(u8 index, void (*wakeup_callback)(u8 index, u8 gpio));
|
||||
void aport_edge_wkup_set_callback_by_index(u8 index, void (*wakeup_callback)(u8 index, u8 gpio, POWER_WKUP_EDGE edge));
|
||||
|
||||
void power_wakeup_init(const struct wakeup_param *param);
|
||||
|
||||
u8 is_wakeup_source(enum WAKEUP_REASON index);
|
||||
|
||||
void power_wakeup_reason_dump();
|
||||
|
||||
u8 is_ldo5v_wakeup(void);
|
||||
|
||||
#endif
|
||||
55
include_lib/driver/cpu/br28/asm/power/rtc_app.h
Normal file
55
include_lib/driver/cpu/br28/asm/power/rtc_app.h
Normal file
@ -0,0 +1,55 @@
|
||||
#ifndef __RTC_APP_H__
|
||||
#define __RTC_APP_H__
|
||||
|
||||
enum {
|
||||
R3_WKUP_SRC_ALM = 0,
|
||||
R3_WKUP_SRC_256HZ = 4,
|
||||
R3_WKUP_SRC_64HZ,
|
||||
R3_WKUP_SRC_2HZ,
|
||||
R3_WKUP_SRC_1HZ,
|
||||
};
|
||||
|
||||
|
||||
/************************R3_ALM_CON*****************************/
|
||||
#define ALM_ALMOUT(a) P33_CON_SET(R3_ALM_CON, 7, 1, a)
|
||||
|
||||
#define ALM_CLK_SEL(a) P33_CON_SET(R3_ALM_CON, 2, 3, a)
|
||||
|
||||
#define ALM_ALMEN(a) P33_CON_SET(R3_ALM_CON, 0, 1, a)
|
||||
|
||||
//Macro for CLK_SEL
|
||||
enum {
|
||||
CLK_SEL_32K = 1,
|
||||
CLK_SEL_12M,
|
||||
CLK_SEL_24M,
|
||||
CLK_SEL_LRC,
|
||||
};
|
||||
|
||||
/************************R3_RTC_CON0*****************************/
|
||||
#define RTC_ALM_RDEN(a) P33_CON_SET(R3_RTC_CON0, 5, 1, a)
|
||||
|
||||
#define RTC_RTC_RDEN(a) P33_CON_SET(R3_RTC_CON0, 4, 1, a)
|
||||
|
||||
#define RTC_ALM_WREN(a) P33_CON_SET(R3_RTC_CON0, 1, 1, a)
|
||||
|
||||
#define RTC_RTC_WREN(a) P33_CON_SET(R3_RTC_CON0, 0, 1, a)
|
||||
|
||||
/************************R3_OSL_CON*****************************/
|
||||
#define OSL_X32XS(a) P33_CON_SET(R3_OSL_CON, 4, 2, a)
|
||||
|
||||
#define OSL_X32TS(a) P33_CON_SET(R3_OSL_CON, 2, 1, a)
|
||||
|
||||
#define OSL_X32OS(a) P33_CON_SET(R3_OSL_CON, 1, 1, a)
|
||||
|
||||
#define OSL_X32ES(a) P33_CON_SET(R3_OSL_CON, 0, 1, a)
|
||||
|
||||
/************************R3_TIME_CPND*****************************/
|
||||
#define TIME_256HZ_CPND(a) P33_CON_SET(R3_TIME_CPND, 0, 1, a)
|
||||
|
||||
#define TIME_64HZ_CPND(a) P33_CON_SET(R3_TIME_CPND, 1, 1, a)
|
||||
|
||||
#define TIME_2HZ_CPND(a) P33_CON_SET(R3_TIME_CPND, 2, 1, a)
|
||||
|
||||
#define TIME_1HZ_CPND(a) P33_CON_SET(R3_TIME_CPND, 3, 1, a)
|
||||
|
||||
#endif
|
||||
23
include_lib/driver/cpu/br28/asm/power_interface.h
Normal file
23
include_lib/driver/cpu/br28/asm/power_interface.h
Normal file
@ -0,0 +1,23 @@
|
||||
#ifndef POWER_INTERFACE_H
|
||||
#define POWER_INTERFACE_H
|
||||
|
||||
#include "generic/typedef.h"
|
||||
|
||||
#include "asm/power/p33.h"
|
||||
|
||||
#include "asm/power/p11.h"
|
||||
|
||||
#include "asm/power/power_api.h"
|
||||
|
||||
#include "asm/power/power_port.h"
|
||||
|
||||
#include "asm/power/power_wakeup.h"
|
||||
|
||||
#include "asm/power/power_reset.h"
|
||||
|
||||
#include "asm/power/power_compat.h"
|
||||
|
||||
#include "asm/power/lp_ipc.h"
|
||||
|
||||
|
||||
#endif
|
||||
233
include_lib/driver/cpu/br28/asm/pwm_led.h
Normal file
233
include_lib/driver/cpu/br28/asm/pwm_led.h
Normal file
@ -0,0 +1,233 @@
|
||||
#ifndef _PWM_LED_H_
|
||||
#define _PWM_LED_H_
|
||||
|
||||
/*******************************************************************
|
||||
* 本文件为LED灯配置的接口头文件
|
||||
*
|
||||
* 约定:
|
||||
* 1)两盏灯为单IO双LED接法;
|
||||
* 2)LED0: RLED, 蓝色, 低电平亮灯;
|
||||
* 3)LED1: BLED, 红色, 高电平亮灯;
|
||||
*********************************************************************/
|
||||
|
||||
// LED实现的效果有:
|
||||
// 1.两盏LED全亮;
|
||||
// 2.LED单独亮灭;
|
||||
// 3.LED单独慢闪和快闪;
|
||||
// 4.LED 5s内单独闪一次和两次;
|
||||
// 5.LED交替快闪和慢闪;
|
||||
// 6.LED单独呼吸;
|
||||
// 7.LED交替呼吸
|
||||
|
||||
/*
|
||||
* LED各个效果可供配置以下参数, 请按照参数后面的注释说明的范围进行配置
|
||||
*/
|
||||
|
||||
//#define PWM_LED_TWO_IO_SUPPORT //定义该宏会支持两个IO推灯模式, 默认关闭
|
||||
|
||||
#define CFG_LED0_LIGHT 200 //10 ~ 500, 值越大, (红灯)亮度越高
|
||||
#define CFG_LED1_LIGHT 200 //10 ~ 500, 值越大, (蓝灯)亮度越高
|
||||
|
||||
#define CFG_SINGLE_FAST_FLASH_FREQ 500 //LED单独快闪速度, ms闪烁一次(100 ~ 1000)
|
||||
#define CFG_SINGLE_FAST_LIGHT_TIME 100 //单灯快闪灯亮持续时间, 单位ms
|
||||
|
||||
#define CFG_SINGLE_SLOW_FLASH_FREQ 2000 //LED单独慢闪速度, ms闪烁一次(1000 ~ 20000)
|
||||
#define CFG_SINGLE_SLOW_LIGHT_TIME 100 //单灯慢闪灯亮持续时间, 单位ms
|
||||
|
||||
#define CFG_DOUBLE_FAST_FLASH_FREQ 500 //LED交替快闪速度, ms闪烁一次(100 ~ 1000)
|
||||
#define CFG_DOUBLE_SLOW_FLASH_FREQ 2000 //LED交替慢闪速度, ms闪烁一次(1000 ~ 20000)
|
||||
|
||||
/***************** LED0/LED1单独每隔5S单闪时, 可供调节参数 ********************/
|
||||
#define CFG_LED_5S_FLASH_LIGHT_TIME 100 //LED 5S 闪烁时灯亮持续时间, 单位ms
|
||||
|
||||
/***************** 呼吸模式配置参数, 可供调节参数 ********************/
|
||||
#define CFG_LED_BREATH_TIME 1000 //呼吸时间灭->亮->灭, 单位ms
|
||||
#define CFG_LED0_BREATH_BRIGHT 300 //呼吸亮度, 范围: 0 ~ 500
|
||||
#define CFG_LED1_BREATH_BRIGHT 300 //呼吸亮度, 范围: 0 ~ 500
|
||||
#define CFG_LED_BREATH_BLINK_TIME 1000 //灭灯延时, 单位ms
|
||||
|
||||
|
||||
enum pwm_led_clk_source {
|
||||
PWM_LED_CLK_RESERVED0, //PWM_LED_CLK_OSC32K, no use
|
||||
PWM_LED_CLK_RC32K, //use
|
||||
PWM_LED_CLK_RESERVED1, //PWM_LED_CLK_BTOSC_12M, no use
|
||||
PWM_LED_CLK_RESERVED2, //PWM_LED_CLK_RCLK_250K, no use
|
||||
PWM_LED_CLK_BTOSC_24M, //use
|
||||
};
|
||||
|
||||
enum pwm_led_mode {
|
||||
PWM_LED_MODE_START,
|
||||
|
||||
PWM_LED_ALL_OFF, //mode1: 全灭
|
||||
PWM_LED_ALL_ON, //mode2: 全亮
|
||||
|
||||
PWM_LED0_ON, //mode3: 蓝亮
|
||||
PWM_LED0_OFF, //mode4: 蓝灭
|
||||
PWM_LED0_SLOW_FLASH, //mode5: 蓝慢闪
|
||||
PWM_LED0_FAST_FLASH, //mode6: 蓝快闪
|
||||
PWM_LED0_DOUBLE_FLASH_5S, //mode7: 蓝灯5秒连闪两下
|
||||
PWM_LED0_ONE_FLASH_5S, //mode8: 蓝灯5秒连闪1下
|
||||
|
||||
PWM_LED1_ON, //mode9: 红亮
|
||||
PWM_LED1_OFF, //mode10: 红灭
|
||||
PWM_LED1_SLOW_FLASH, //mode11: 红慢闪
|
||||
PWM_LED1_FAST_FLASH, //mode12: 红快闪
|
||||
PWM_LED1_DOUBLE_FLASH_5S, //mode13: 红灯5秒连闪两下
|
||||
PWM_LED1_ONE_FLASH_5S, //mode14: 红灯5秒闪1下
|
||||
|
||||
PWM_LED0_LED1_FAST_FLASH, //mode15: 红蓝交替闪（快闪）
|
||||
PWM_LED0_LED1_SLOW_FLASH, //mode16: 红蓝交替闪（慢闪）
|
||||
|
||||
PWM_LED0_BREATHE, //mode17: 蓝灯呼吸灯模式
|
||||
PWM_LED1_BREATHE, //mode18: 红灯呼吸灯模式
|
||||
PWM_LED0_LED1_BREATHE, //mode19: 红蓝交替呼吸灯模式
|
||||
|
||||
PWM_LED_MODE_END,
|
||||
|
||||
PWM_LED1_FLASH_THREE, //自定义状态，不能通过pmd_led_mode去设置
|
||||
PWM_LED0_FLASH_THREE, //自定义状态，不能通过pmd_led_mode去设置
|
||||
|
||||
PWM_LED_USER_DEFINE_BEGIN = 0x50,
|
||||
PWM_LED_USER_DEFINE_MODE0, //用户自定义模式0:
|
||||
PWM_LED_USER_DEFINE_END,
|
||||
|
||||
PWM_LED_NULL = 0xFF,
|
||||
};
|
||||
|
||||
struct pwm_led_two_io_mode {
|
||||
u8 two_io_mode_enable;
|
||||
u8 led0_pin;
|
||||
u8 led1_pin;
|
||||
};
|
||||
enum led_io_mode {
|
||||
LED_ONE_IO_MODE,
|
||||
LED_TWO_IO_MODE,
|
||||
};
|
||||
|
||||
struct one_io_cfg {
|
||||
u8 pin;
|
||||
};
|
||||
|
||||
struct two_io_cfg {
|
||||
u8 pin0;
|
||||
u8 pin1;
|
||||
};
|
||||
|
||||
union io_mode_cfg {
|
||||
struct one_io_cfg one_io;
|
||||
struct two_io_cfg two_io;
|
||||
};
|
||||
|
||||
struct led_platform_data {
|
||||
enum led_io_mode io_mode;
|
||||
union io_mode_cfg io_cfg;
|
||||
};
|
||||
|
||||
#define LED_PLATFORM_DATA_BEGIN(data) \
|
||||
const struct led_platform_data data = {
|
||||
|
||||
#define LED_PLATFORM_DATA_END() \
|
||||
};
|
||||
|
||||
/*********************** LED 初始化 ******************************/
|
||||
void pwm_led_init(const struct led_platform_data *user_data);
|
||||
|
||||
/********************** LED 闪烁模式切换 ************************/
|
||||
void pwm_led_mode_set(u8 fre_mode);
|
||||
|
||||
/*****************************************************************
|
||||
LED时钟源切换, support:
|
||||
PWM_LED_CLK_RC32K
|
||||
PWM_LED_CLK_BTOSC_24M
|
||||
*********************************************************************/
|
||||
void pwm_led_clk_set(enum pwm_led_clk_source src);
|
||||
|
||||
/***************** 闪烁状态复位, 重新开始一个周期 ******************/
|
||||
void pwm_led_display_mode_reset(void);
|
||||
|
||||
/***************** 获取led当前的闪烁模式 ***************************/
|
||||
enum pwm_led_mode pwm_led_display_mode_get(void);
|
||||
|
||||
/********************************************************************
|
||||
修改LED灯IO口驱动能力, 挡位: 0 ~ 3
|
||||
0: 2.4mA(8mA mos + 120Ωres)
|
||||
1: 8mA(8mA mos)
|
||||
2: 18.4mA(24mA mos + 120Ωres)
|
||||
3: 24mA(24mA mos)
|
||||
*********************************************************************/
|
||||
void pwm_led_io_max_drive_set(u8 strength);
|
||||
|
||||
/******************* PWM 模块开关 *********************/
|
||||
void pwm_led_set_on(void);
|
||||
void pwm_led_set_off(void);
|
||||
void led_module_on();
|
||||
void led_module_off();
|
||||
|
||||
|
||||
/******************* PWM 模块是否开启 *********************/
|
||||
u8 is_pwm_led_on(void);
|
||||
bool is_led_module_on();
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: 自定义设置单灯闪状态
|
||||
//@input: void
|
||||
// led_index: 0: led0, 1:led1, 2:led0 & led1(互闪)
|
||||
// led0_bright, LED0亮度: 0 ~ 500
|
||||
// led1_bright, LED1亮度: 0 ~ 500
|
||||
// led1_bright: led1亮度,
|
||||
// period: 闪灯周期(ms), 多少ms闪一下,
|
||||
// start_light_time: 在周期中开始亮灯的时间, -1: 周期最后亮灯
|
||||
// light_time: 灯亮持续时间,
|
||||
//@return: void
|
||||
//@note:
|
||||
//=================================================================================//
|
||||
void pwm_led_one_flash_display(u8 led_index, u16 led0_bright, u16 led1_bright,
|
||||
u32 period, u32 start_light_time, u32 light_time);
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: 自定义设置单灯双闪状态
|
||||
//@input:
|
||||
// led_index: 0: led0, 1:led1, 3:led0 & led1(互闪)
|
||||
// led0_bright, LED0亮度: 0 ~ 500
|
||||
// led1_bright, LED1亮度: 0 ~ 500
|
||||
// period: 闪灯周期(ms), 多少ms闪一下
|
||||
// first_light_time: 第一次亮灯持续时间,
|
||||
// second_light_time: 第二次亮灯持续时间,
|
||||
// gap_time: 两次亮灯时间间隔,
|
||||
//@return: void
|
||||
//@note:
|
||||
//=================================================================================//
|
||||
void pwm_led_double_flash_display(u8 led_index, u16 led0_bright, u16 led1_bright,
|
||||
u32 period, u32 first_light_time, u32 gap_time, u32 second_light_time);
|
||||
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: 自定义设置呼吸模式
|
||||
//@input:
|
||||
// led_index: 0: led0, 1:led1, 2:led0 & led1(交互呼吸)
|
||||
// breathe_time: 呼吸周期(灭->最亮->灭), 设置范围: 500ms以上;
|
||||
// led0_bright: led0呼吸到最亮的亮度(0 ~ 500);
|
||||
// led1_bright: led1呼吸到最亮的亮度(0 ~ 500);
|
||||
// led0_light_delay_time: led0最高亮度延时(0 ~ 100ms);
|
||||
// led1_light_delay_time: led1最高亮度延时(0 ~ 100ms);
|
||||
// led_blink_delay_time: led0和led1灭灯延时(0 ~ 20000ms), 0 ~ 20S;
|
||||
//@return: void
|
||||
//@note:
|
||||
//=================================================================================//
|
||||
void pwm_led_breathe_display(u8 led_index, u16 breathe_time, u16 led0_bright, u16 led1_bright,
|
||||
u32 led0_light_delay_time, u32 led1_light_delay_time, u32 led_blink_delay_time);
|
||||
|
||||
//=================================================================================//
|
||||
//@brief: 注册LED周期中断函数, 每个LED周期结束后会调用一次, 可以统计指定状态闪烁多少次
|
||||
//@input:
|
||||
//@return: void
|
||||
//@note:
|
||||
//=================================================================================//
|
||||
void pwm_led_register_irq(void (*func)(void));
|
||||
|
||||
void led_module_enter_sniff_mode();
|
||||
void led_module_exit_sniff_mode();
|
||||
|
||||
#endif //_PWM_LED_H_
|
||||
|
||||
|
||||
37
include_lib/driver/cpu/br28/asm/rdec.h
Normal file
37
include_lib/driver/cpu/br28/asm/rdec.h
Normal file
@ -0,0 +1,37 @@
|
||||
#ifndef _RDEC_H_
|
||||
#define _RDEC_H_
|
||||
|
||||
#define DEVICE_EVENT_FROM_RDEC (('R' << 24) | ('D' << 16) | ('E' << 8) | '\0')
|
||||
|
||||
enum rdec_index {
|
||||
RDEC0,
|
||||
RDEC1,
|
||||
RDEC2,
|
||||
};
|
||||
|
||||
struct rdec_device {
|
||||
enum rdec_index index;
|
||||
u8 sin_port0; //采样信号端口0
|
||||
u8 sin_port1; //采样信号端口1
|
||||
u8 key_value0; //键值1
|
||||
u8 key_value1; //键值2
|
||||
};
|
||||
|
||||
struct rdec_platform_data {
|
||||
u8 enable;
|
||||
u8 num; //rdec数量
|
||||
const struct rdec_device *rdec;
|
||||
};
|
||||
|
||||
#define RDEC_PLATFORM_DATA_BEGIN(data) \
|
||||
static const struct rdec_platform_data data = {
|
||||
|
||||
#define RDEC_PLATFORM_DATA_END() \
|
||||
};
|
||||
|
||||
/*********************** rdec 初始化 ******************************/
|
||||
int rdec_init(const struct rdec_platform_data *user_data);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
39
include_lib/driver/cpu/br28/asm/rtc.h
Normal file
39
include_lib/driver/cpu/br28/asm/rtc.h
Normal file
@ -0,0 +1,39 @@
|
||||
|
||||
#ifndef __RTC_H__
|
||||
#define __RTC_H__
|
||||
|
||||
#include "typedef.h"
|
||||
#include "system/sys_time.h"
|
||||
|
||||
|
||||
struct rtc_dev_platform_data {
|
||||
const struct sys_time *default_sys_time;
|
||||
const struct sys_time *default_alarm;
|
||||
void (*cbfun)(u8);
|
||||
u8 clk_sel;
|
||||
u8 x32xs;
|
||||
};
|
||||
|
||||
#define RTC_DEV_PLATFORM_DATA_BEGIN(data) \
|
||||
const struct rtc_dev_platform_data data = {
|
||||
|
||||
#define RTC_DEV_PLATFORM_DATA_END() \
|
||||
.x32xs = 0, \
|
||||
};
|
||||
|
||||
extern const struct device_operations rtc_dev_ops;
|
||||
|
||||
int rtc_init(const struct rtc_dev_platform_data *arg);
|
||||
int rtc_ioctl(u32 cmd, u32 arg);
|
||||
void set_alarm_ctrl(u8 set_alarm);
|
||||
void write_sys_time(struct sys_time *curr_time);
|
||||
void read_sys_time(struct sys_time *curr_time);
|
||||
void write_alarm(struct sys_time *alarm_time);
|
||||
void read_alarm(struct sys_time *alarm_time);
|
||||
|
||||
u16 month_to_day(u16 year, u8 month);
|
||||
void day_to_ymd(u16 day, struct sys_time *sys_time);
|
||||
u16 ymd_to_day(struct sys_time *time);
|
||||
u8 caculate_weekday_by_time(struct sys_time *r_time);
|
||||
|
||||
#endif // __RTC_API_H__
|
||||
50
include_lib/driver/cpu/br28/asm/sdmmc.h
Normal file
50
include_lib/driver/cpu/br28/asm/sdmmc.h
Normal file
@ -0,0 +1,50 @@
|
||||
#ifndef ARCH_SDMMC_H
|
||||
#define ARCH_SDMMC_H
|
||||
|
||||
|
||||
#include "device/sdmmc.h"
|
||||
|
||||
struct sdmmc_platform_data {
|
||||
char port[6];
|
||||
u8 irq;
|
||||
u8 data_width;
|
||||
u8 priority;
|
||||
u8 detect_mode;
|
||||
u8 detect_io;
|
||||
u8 detect_io_level;
|
||||
u8 detect_time_interval;
|
||||
u32 detect_timeout;
|
||||
u32 speed;
|
||||
volatile u16 *sfr;
|
||||
int (*detect_func)(const struct sdmmc_platform_data *);
|
||||
void (*port_init)(const struct sdmmc_platform_data *, int mode);
|
||||
void (*power)(int on);
|
||||
};
|
||||
|
||||
#define SD0_PLATFORM_DATA_BEGIN(data) \
|
||||
static const struct sdmmc_platform_data data = {
|
||||
|
||||
|
||||
#define SD0_PLATFORM_DATA_END() \
|
||||
.irq = IRQ_SD0_IDX, \
|
||||
.sfr = (volatile u16 *)JL_SD0, \
|
||||
.port_init = sdmmc_0_port_init, \
|
||||
.detect_time_interval = 250, \
|
||||
.detect_timeout = 1000, \
|
||||
};
|
||||
|
||||
extern const struct device_operations sd_dev_ops;
|
||||
|
||||
extern void sdmmc_0_port_init(const struct sdmmc_platform_data *, int mode);
|
||||
|
||||
extern int sdmmc_0_clk_detect(const struct sdmmc_platform_data *);
|
||||
extern int sdmmc_0_io_detect(const struct sdmmc_platform_data *);
|
||||
extern int sdmmc_0_cmd_detect(const struct sdmmc_platform_data *);
|
||||
extern int sdmmc_cmd_detect(const struct sdmmc_platform_data *data);
|
||||
|
||||
extern void sd_set_power(u8 enable);
|
||||
|
||||
|
||||
extern const struct device_operations sd_dev_ops;
|
||||
#endif
|
||||
|
||||
13
include_lib/driver/cpu/br28/asm/sfc_norflash_api.h
Normal file
13
include_lib/driver/cpu/br28/asm/sfc_norflash_api.h
Normal file
@ -0,0 +1,13 @@
|
||||
#ifndef __SFC_NORFLASH_API_H__
|
||||
#define __SFC_NORFLASH_API_H__
|
||||
|
||||
#include "typedef.h"
|
||||
|
||||
int norflash_init(const struct dev_node *node, void *arg);
|
||||
int norflash_open(const char *name, struct device **device, void *arg);
|
||||
int norflash_read(struct device *device, void *buf, u32 len, u32 offset);
|
||||
int norflash_write(struct device *device, void *buf, u32 len, u32 offset);
|
||||
int norflash_ioctl(struct device *device, u32 cmd, u32 arg);
|
||||
|
||||
|
||||
#endif
|
||||
47
include_lib/driver/cpu/br28/asm/sfc_spi.h
Normal file
47
include_lib/driver/cpu/br28/asm/sfc_spi.h
Normal file
@ -0,0 +1,47 @@
|
||||
#ifndef _SFC1_INTERFACE_H_
|
||||
#define _SFC1_INTERFACE_H_
|
||||
#include "typedef.h"
|
||||
#include "generic/ioctl.h"
|
||||
|
||||
enum SFC_DATA_WIDTH {
|
||||
SFC_DATA_WIDTH_2 = 2,
|
||||
SFC_DATA_WIDTH_4 = 4,
|
||||
};
|
||||
|
||||
enum SFC_READ_MODE {
|
||||
SFC_RD_OUTPUT = 0,
|
||||
SFC_RD_IO,
|
||||
SFC_RD_IO_CONTINUE,
|
||||
};
|
||||
|
||||
struct sfc_spi_platform_data {
|
||||
u8 spi_hw_index;
|
||||
enum SFC_DATA_WIDTH sfc_data_width;
|
||||
enum SFC_READ_MODE sfc_read_mode;
|
||||
u8 sfc_encry; //是否加密
|
||||
u16 sfc_clk_div; //时钟分频: sfc_fre = sys_clk / div;
|
||||
u32 unencry_start_addr; //不加密起始地址
|
||||
u32 unencry_size; //不加密大小
|
||||
};
|
||||
|
||||
#define SFC_SPI_PLATFORM_DATA_BEGIN(data) \
|
||||
const struct sfc_spi_platform_data data = {
|
||||
|
||||
#define SFC_SPI_PLATFORM_DATA_END() \
|
||||
};
|
||||
|
||||
|
||||
//sfc1 API:
|
||||
int sfc_spi_init(struct sfc_spi_platform_data *sfc_spi_data);
|
||||
int sfc_spi_open(void *sfc_spi_data);
|
||||
int sfc_spi_close(void);
|
||||
u32 sfc_spi_read_id(void);
|
||||
int sfc_spi_read(u32 addr, void *buf, u32 len);
|
||||
int sfc_spi_write_pages(u32 addr, void *buf, u32 len);
|
||||
int sfc_spi_eraser(u32 cmd, u32 addr);
|
||||
u32 sfc1_flash_addr2cpu_addr(u32 offset);
|
||||
u32 sfc1_cpu_addr2flash_addr(u32 offset);
|
||||
|
||||
void sfc_suspend(u32 enable_spi);
|
||||
void sfc1_suspend();
|
||||
#endif /* #ifndef _SFC1_INTERFACE_H_ */
|
||||
77
include_lib/driver/cpu/br28/asm/spi.h
Normal file
77
include_lib/driver/cpu/br28/asm/spi.h
Normal file
@ -0,0 +1,77 @@
|
||||
#ifndef _SPI_INTERFACE_H_
|
||||
#define _SPI_INTERFACE_H_
|
||||
#include "typedef.h"
|
||||
#include "generic/ioctl.h"
|
||||
|
||||
|
||||
/*enum spi_mode {
|
||||
SPI_2WIRE_MODE,
|
||||
SPI_ODD_MODE,
|
||||
SPI_DUAL_MODE,
|
||||
SPI_QUAD_MODE,
|
||||
};*/
|
||||
enum spi_mode {
|
||||
SPI_MODE_BIDIR_1BIT, //支持SPIx(x=0,1,2)，全双工，di接收，do发送
|
||||
SPI_MODE_UNIDIR_1BIT, //支持SPIx(x=0,1,2)，半双工，do分时发送/接收
|
||||
SPI_MODE_UNIDIR_2BIT, //支持SPIx(x=0)，半双工，di & do共2bit分时发送/接收
|
||||
SPI_MODE_UNIDIR_4BIT, //支持SPIx(x=0)，半双工，di & do & wp & hold 共4bit分时发送/接收
|
||||
};
|
||||
|
||||
enum {
|
||||
SPI0,
|
||||
SPI1,
|
||||
SPI2,
|
||||
SPI_MAX_HW_NUM,
|
||||
};
|
||||
|
||||
#define SPI_MAX_IO_GROUP 2
|
||||
|
||||
struct spi_io {
|
||||
u8 cs_pin;
|
||||
u8 di_pin;
|
||||
u8 do_pin;
|
||||
u8 clk_pin;
|
||||
u8 d2_pin;
|
||||
u8 d3_pin;
|
||||
};
|
||||
|
||||
struct spi_io_mapping {
|
||||
u32 num; //可选端口数量
|
||||
struct spi_io io[SPI_MAX_IO_GROUP];
|
||||
};
|
||||
|
||||
enum spi_role {
|
||||
SPI_ROLE_MASTER,
|
||||
SPI_ROLE_SLAVE,
|
||||
};
|
||||
|
||||
struct spi_platform_data {
|
||||
u8 port[5];//CLK, DO, DI D2(wp) D3(hold)
|
||||
u8 mode; //模式，选项为enum spi_mode中的枚举常量
|
||||
u8 role; //角色，选项为enum spi_role中的枚举常量
|
||||
u32 clk; //波特率
|
||||
};
|
||||
|
||||
extern const struct spi_platform_data spi1_p_data;
|
||||
extern const struct spi_platform_data spi2_p_data;
|
||||
|
||||
typedef const int spi_dev;
|
||||
|
||||
int spi_open(spi_dev spi);
|
||||
int spi_dma_recv(spi_dev spi, void *buf, u32 len);
|
||||
int spi_dma_send(spi_dev spi, const void *buf, u32 len);
|
||||
void spi_dma_set_addr_for_isr(spi_dev spi, void *buf, u32 len, u8 rw);
|
||||
void spi_set_ie(spi_dev spi, u8 en);
|
||||
u8 spi_get_pending(spi_dev spi);
|
||||
void spi_clear_pending(spi_dev spi);
|
||||
void spi_set_bit_mode(spi_dev spi, int mode);
|
||||
u8 spi_recv_byte(spi_dev spi, int *err);
|
||||
u8 spi_recv_byte_for_isr(spi_dev spi);
|
||||
int spi_send_byte(spi_dev spi, u8 byte);
|
||||
void spi_send_byte_for_isr(spi_dev spi, u8 byte);
|
||||
u8 spi_send_recv_byte(spi_dev spi, u8 byte, int *err);
|
||||
int spi_set_baud(spi_dev spi, u32 baud);
|
||||
u32 spi_get_baud(spi_dev spi);
|
||||
void spi_close(spi_dev spi);
|
||||
|
||||
#endif
|
||||
29
include_lib/driver/cpu/br28/asm/spiflash.h
Normal file
29
include_lib/driver/cpu/br28/asm/spiflash.h
Normal file
@ -0,0 +1,29 @@
|
||||
#ifndef ASM_SPIFLASH_H
|
||||
#define ASM_SPIFLASH_H
|
||||
|
||||
|
||||
|
||||
#include "device/device.h"
|
||||
#include "device/spiflash.h"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
extern const struct device_operations spiflash_dev_ops;
|
||||
extern const struct device_operations sfcflash_dev_ops;
|
||||
extern const struct device_operations sdfile_dev_ops;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
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Reference in New Issue
Block a user